Mercurial > hg > graal-jvmci-8
changeset 23715:3d3f2a5699e6
Update Assembler::locate_operand from JDK9
author | Tom Rodriguez <tom.rodriguez@oracle.com> |
---|---|
date | Fri, 01 Jul 2016 13:17:25 -0700 |
parents | c351824fff81 |
children | 74c4e0459c11 |
files | src/cpu/x86/vm/assembler_x86.cpp |
diffstat | 1 files changed, 27 insertions(+), 0 deletions(-) [+] |
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--- a/src/cpu/x86/vm/assembler_x86.cpp Thu Jun 23 09:18:05 2016 -0700 +++ b/src/cpu/x86/vm/assembler_x86.cpp Fri Jul 01 13:17:25 2016 -0700 @@ -559,9 +559,12 @@ case 0x55: // andnps case 0x56: // orps case 0x57: // xorps + case 0x58: // addpd + case 0x59: // mulpd case 0x6E: // movd case 0x7E: // movd case 0xAE: // ldmxcsr, stmxcsr, fxrstor, fxsave, clflush + case 0xFE: // paddd debug_only(has_disp32 = true); break; @@ -700,6 +703,30 @@ debug_only(has_disp32 = true); // has both kinds of operands! break; + case 0x62: // EVEX_4bytes + assert((UseAVX > 0), "shouldn't have EVEX prefix"); + assert(ip == inst+1, "no prefixes allowed"); + // no EVEX collisions, all instructions that have 0x62 opcodes + // have EVEX versions and are subopcodes of 0x66 + ip++; // skip P0 and exmaine W in P1 + is_64bit = ((VEX_W & *ip) == VEX_W); + ip++; // move to P2 + ip++; // skip P2, move to opcode + // To find the end of instruction (which == end_pc_operand). + switch (0xFF & *ip) { + case 0x22: // pinsrd r, r/a, #8 + case 0x61: // pcmpestri r, r/a, #8 + case 0x70: // pshufd r, r/a, #8 + case 0x73: // psrldq r, #8 + tail_size = 1; // the imm8 + break; + default: + break; + } + ip++; // skip opcode + debug_only(has_disp32 = true); // has both kinds of operands! + break; + case 0xD1: // sal a, 1; sar a, 1; shl a, 1; shr a, 1 case 0xD3: // sal a, %cl; sar a, %cl; shl a, %cl; shr a, %cl case 0xD9: // fld_s a; fst_s a; fstp_s a; fldcw a