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annotate src/share/vm/c1/c1_Defs.hpp @ 2607:008adfd6d850

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Fixed the stateBefore of invokes and monitorenter instructions to include the arguments of the instruction. This is necessary to ensure correct continuation in the interpreter when the stateBefore is used as a deoptimization point.
author Thomas Wuerthinger <thomas@wuerthinger.net>
date Fri, 06 May 2011 17:47:17 +0200
parents 1d1603768966
children
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1 /*
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2 * Copyright (c) 2000, 2011, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #ifndef SHARE_VM_C1_C1_DEFS_HPP
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26 #define SHARE_VM_C1_C1_DEFS_HPP
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27
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28 #include "utilities/globalDefinitions.hpp"
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29 #ifdef TARGET_ARCH_x86
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30 # include "register_x86.hpp"
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31 #endif
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32 #ifdef TARGET_ARCH_sparc
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33 # include "register_sparc.hpp"
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34 #endif
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35 #ifdef TARGET_ARCH_zero
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36 # include "register_zero.hpp"
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37 #endif
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38 #ifdef TARGET_ARCH_arm
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39 # include "register_arm.hpp"
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40 #endif
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41 #ifdef TARGET_ARCH_ppc
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42 # include "register_ppc.hpp"
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43 #endif
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44
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45 // set frame size and return address offset to these values in blobs
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46 // (if the compiled frame uses ebp as link pointer on IA; otherwise,
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47 // the frame size must be fixed)
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48 enum {
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49 no_frame_size = -1
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50 };
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52
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53 #ifdef TARGET_ARCH_x86
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54 # include "c1_Defs_x86.hpp"
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55 #endif
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56 #ifdef TARGET_ARCH_sparc
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57 # include "c1_Defs_sparc.hpp"
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58 #endif
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59 #ifdef TARGET_ARCH_arm
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60 # include "c1_Defs_arm.hpp"
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61 #endif
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62 #ifdef TARGET_ARCH_ppc
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63 # include "c1_Defs_ppc.hpp"
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64 #endif
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67 // native word offsets from memory address
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68 enum {
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69 lo_word_offset_in_bytes = pd_lo_word_offset_in_bytes,
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70 hi_word_offset_in_bytes = pd_hi_word_offset_in_bytes
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71 };
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72
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74 // the processor may require explicit rounding operations to implement the strictFP mode
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75 enum {
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76 strict_fp_requires_explicit_rounding = pd_strict_fp_requires_explicit_rounding
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77 };
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80 // for debug info: a float value in a register may be saved in double precision by runtime stubs
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81 enum {
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82 float_saved_as_double = pd_float_saved_as_double
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83 };
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84
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85 #endif // SHARE_VM_C1_C1_DEFS_HPP