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annotate src/share/vm/opto/machnode.hpp @ 14481:016b6a289fc4
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author | jbachorik |
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date | Mon, 24 Feb 2014 10:28:22 +0100 |
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0 | 1 /* |
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2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #ifndef SHARE_VM_OPTO_MACHNODE_HPP |
26 #define SHARE_VM_OPTO_MACHNODE_HPP | |
27 | |
28 #include "opto/callnode.hpp" | |
29 #include "opto/matcher.hpp" | |
30 #include "opto/multnode.hpp" | |
31 #include "opto/node.hpp" | |
32 #include "opto/regmask.hpp" | |
33 | |
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34 class BiasedLockingCounters; |
0 | 35 class BufferBlob; |
36 class CodeBuffer; | |
37 class JVMState; | |
38 class MachCallDynamicJavaNode; | |
39 class MachCallJavaNode; | |
40 class MachCallLeafNode; | |
41 class MachCallNode; | |
42 class MachCallRuntimeNode; | |
43 class MachCallStaticJavaNode; | |
44 class MachEpilogNode; | |
45 class MachIfNode; | |
46 class MachNullCheckNode; | |
47 class MachOper; | |
48 class MachProjNode; | |
49 class MachPrologNode; | |
50 class MachReturnNode; | |
51 class MachSafePointNode; | |
52 class MachSpillCopyNode; | |
53 class Matcher; | |
54 class PhaseRegAlloc; | |
55 class RegMask; | |
56 class State; | |
57 | |
58 //---------------------------MachOper------------------------------------------ | |
59 class MachOper : public ResourceObj { | |
60 public: | |
61 // Allocate right next to the MachNodes in the same arena | |
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62 void *operator new( size_t x, Compile* C ) throw() { return C->node_arena()->Amalloc_D(x); } |
0 | 63 |
64 // Opcode | |
65 virtual uint opcode() const = 0; | |
66 | |
67 // Number of input edges. | |
68 // Generally at least 1 | |
69 virtual uint num_edges() const { return 1; } | |
70 // Array of Register masks | |
71 virtual const RegMask *in_RegMask(int index) const; | |
72 | |
73 // Methods to output the encoding of the operand | |
74 | |
75 // Negate conditional branches. Error for non-branch Nodes | |
76 virtual void negate(); | |
77 | |
78 // Return the value requested | |
79 // result register lookup, corresponding to int_format | |
80 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const; | |
81 // input register lookup, corresponding to ext_format | |
82 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const; | |
83 | |
84 // helpers for MacroAssembler generation from ADLC | |
85 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const { | |
86 return ::as_Register(reg(ra_, node)); | |
87 } | |
88 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const { | |
89 return ::as_Register(reg(ra_, node, idx)); | |
90 } | |
91 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const { | |
92 return ::as_FloatRegister(reg(ra_, node)); | |
93 } | |
94 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { | |
95 return ::as_FloatRegister(reg(ra_, node, idx)); | |
96 } | |
97 | |
98 #if defined(IA32) || defined(AMD64) | |
99 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const { | |
100 return ::as_XMMRegister(reg(ra_, node)); | |
101 } | |
102 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { | |
103 return ::as_XMMRegister(reg(ra_, node, idx)); | |
104 } | |
105 #endif | |
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106 // CondRegister reg converter |
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107 #if defined(PPC64) |
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108 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const { |
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109 return ::as_ConditionRegister(reg(ra_, node)); |
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110 } |
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111 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { |
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112 return ::as_ConditionRegister(reg(ra_, node, idx)); |
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113 } |
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114 #endif |
0 | 115 |
116 virtual intptr_t constant() const; | |
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117 virtual relocInfo::relocType constant_reloc() const; |
0 | 118 virtual jdouble constantD() const; |
119 virtual jfloat constantF() const; | |
120 virtual jlong constantL() const; | |
121 virtual TypeOopPtr *oop() const; | |
122 virtual int ccode() const; | |
123 // A zero, default, indicates this value is not needed. | |
124 // May need to lookup the base register, as done in int_ and ext_format | |
125 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const; | |
126 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const; | |
127 virtual int scale() const; | |
128 // Parameters needed to support MEMORY_INTERFACE access to stackSlot | |
129 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const; | |
130 // Check for PC-Relative displacement | |
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131 virtual relocInfo::relocType disp_reloc() const; |
0 | 132 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot |
133 virtual int base_position() const; // base edge position, or -1 | |
134 virtual int index_position() const; // index edge position, or -1 | |
135 | |
136 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP | |
137 // Only returns non-null value for i486.ad's indOffset32X | |
138 virtual const TypePtr *disp_as_type() const { return NULL; } | |
139 | |
140 // Return the label | |
141 virtual Label *label() const; | |
142 | |
143 // Return the method's address | |
144 virtual intptr_t method() const; | |
145 | |
146 // Hash and compare over operands are currently identical | |
147 virtual uint hash() const; | |
148 virtual uint cmp( const MachOper &oper ) const; | |
149 | |
150 // Virtual clone, since I do not know how big the MachOper is. | |
151 virtual MachOper *clone(Compile* C) const = 0; | |
152 | |
153 // Return ideal Type from simple operands. Fail for complex operands. | |
154 virtual const Type *type() const; | |
155 | |
156 // Set an integer offset if we have one, or error otherwise | |
157 virtual void set_con( jint c0 ) { ShouldNotReachHere(); } | |
158 | |
159 #ifndef PRODUCT | |
160 // Return name of operand | |
161 virtual const char *Name() const { return "???";} | |
162 | |
163 // Methods to output the text version of the operand | |
164 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0; | |
165 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0; | |
166 | |
167 virtual void dump_spec(outputStream *st) const; // Print per-operand info | |
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168 |
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169 // Check whether o is a valid oper. |
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170 static bool notAnOper(const MachOper *o) { |
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171 if (o == NULL) return true; |
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172 if (((intptr_t)o & 1) != 0) return true; |
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173 if (*(address*)o == badAddress) return true; // kill by Node::destruct |
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174 return false; |
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175 } |
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176 #endif // !PRODUCT |
0 | 177 }; |
178 | |
179 //------------------------------MachNode--------------------------------------- | |
180 // Base type for all machine specific nodes. All node classes generated by the | |
181 // ADLC inherit from this class. | |
182 class MachNode : public Node { | |
183 public: | |
184 MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) { | |
185 init_class_id(Class_Mach); | |
186 } | |
187 // Required boilerplate | |
188 virtual uint size_of() const { return sizeof(MachNode); } | |
189 virtual int Opcode() const; // Always equal to MachNode | |
190 virtual uint rule() const = 0; // Machine-specific opcode | |
191 // Number of inputs which come before the first operand. | |
192 // Generally at least 1, to skip the Control input | |
193 virtual uint oper_input_base() const { return 1; } | |
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194 // Position of constant base node in node's inputs. -1 if |
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195 // no constant base node input. |
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196 virtual uint mach_constant_base_node_input() const { return (uint)-1; } |
0 | 197 |
198 // Copy inputs and operands to new node of instruction. | |
199 // Called from cisc_version() and short_branch_version(). | |
200 // !!!! The method's body is defined in ad_<arch>.cpp file. | |
201 void fill_new_machnode(MachNode *n, Compile* C) const; | |
202 | |
203 // Return an equivalent instruction using memory for cisc_operand position | |
204 virtual MachNode *cisc_version(int offset, Compile* C); | |
205 // Modify this instruction's register mask to use stack version for cisc_operand | |
206 virtual void use_cisc_RegMask(); | |
207 | |
208 // Support for short branches | |
209 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; } | |
210 | |
3851 | 211 // Avoid back to back some instructions on some CPUs. |
212 bool avoid_back_to_back() const { return (flags() & Flag_avoid_back_to_back) != 0; } | |
213 | |
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214 // instruction implemented with a call |
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215 bool has_call() const { return (flags() & Flag_has_call) != 0; } |
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216 |
0 | 217 // First index in _in[] corresponding to operand, or -1 if there is none |
218 int operand_index(uint operand) const; | |
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219 int operand_index(const MachOper *oper) const; |
0 | 220 |
221 // Register class input is expected in | |
222 virtual const RegMask &in_RegMask(uint) const; | |
223 | |
224 // cisc-spillable instructions redefine for use by in_RegMask | |
225 virtual const RegMask *cisc_RegMask() const { return NULL; } | |
226 | |
227 // If this instruction is a 2-address instruction, then return the | |
228 // index of the input which must match the output. Not nessecary | |
229 // for instructions which bind the input and output register to the | |
230 // same singleton regiser (e.g., Intel IDIV which binds AX to be | |
231 // both an input and an output). It is nessecary when the input and | |
232 // output have choices - but they must use the same choice. | |
233 virtual uint two_adr( ) const { return 0; } | |
234 | |
235 // Array of complex operand pointers. Each corresponds to zero or | |
236 // more leafs. Must be set by MachNode constructor to point to an | |
237 // internal array of MachOpers. The MachOper array is sized by | |
238 // specific MachNodes described in the ADL. | |
239 uint _num_opnds; | |
240 MachOper **_opnds; | |
241 uint num_opnds() const { return _num_opnds; } | |
242 | |
243 // Emit bytes into cbuf | |
244 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
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245 // Expand node after register allocation. |
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246 // Node is replaced by several nodes in the postalloc expand phase. |
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247 // Corresponding methods are generated for nodes if they specify |
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248 // postalloc_expand. See block.cpp for more documentation. |
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249 virtual bool requires_postalloc_expand() const { return false; } |
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250 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_); |
0 | 251 // Size of instruction in bytes |
252 virtual uint size(PhaseRegAlloc *ra_) const; | |
253 // Helper function that computes size by emitting code | |
254 virtual uint emit_size(PhaseRegAlloc *ra_) const; | |
255 | |
256 // Return the alignment required (in units of relocInfo::addr_unit()) | |
257 // for this instruction (must be a power of 2) | |
258 virtual int alignment_required() const { return 1; } | |
259 | |
260 // Return the padding (in bytes) to be emitted before this | |
261 // instruction to properly align it. | |
262 virtual int compute_padding(int current_offset) const { return 0; } | |
263 | |
264 // Return number of relocatable values contained in this instruction | |
265 virtual int reloc() const { return 0; } | |
266 | |
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267 // Return number of words used for double constants in this instruction |
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268 virtual int ins_num_consts() const { return 0; } |
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269 |
0 | 270 // Hash and compare over operands. Used to do GVN on machine Nodes. |
271 virtual uint hash() const; | |
272 virtual uint cmp( const Node &n ) const; | |
273 | |
274 // Expand method for MachNode, replaces nodes representing pseudo | |
275 // instructions with a set of nodes which represent real machine | |
276 // instructions and compute the same value. | |
1203 | 277 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; } |
0 | 278 |
279 // Bottom_type call; value comes from operand0 | |
280 virtual const class Type *bottom_type() const { return _opnds[0]->type(); } | |
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281 virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : t->ideal_reg(); } |
0 | 282 |
283 // If this is a memory op, return the base pointer and fixed offset. | |
284 // If there are no such, return NULL. If there are multiple addresses | |
285 // or the address is indeterminate (rare cases) then return (Node*)-1, | |
286 // which serves as node bottom. | |
287 // If the offset is not statically determined, set it to Type::OffsetBot. | |
288 // This method is free to ignore stack slots if that helps. | |
289 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1) | |
290 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible | |
291 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const; | |
292 | |
293 // Helper for get_base_and_disp: find the base and index input nodes. | |
294 // Returns the MachOper as determined by memory_operand(), for use, if | |
295 // needed by the caller. If (MachOper *)-1 is returned, base and index | |
296 // are set to NodeSentinel. If (MachOper *) NULL is returned, base and | |
297 // index are set to NULL. | |
298 const MachOper* memory_inputs(Node* &base, Node* &index) const; | |
299 | |
300 // Helper for memory_inputs: Which operand carries the necessary info? | |
301 // By default, returns NULL, which means there is no such operand. | |
302 // If it returns (MachOper*)-1, this means there are multiple memories. | |
303 virtual const MachOper* memory_operand() const { return NULL; } | |
304 | |
305 // Call "get_base_and_disp" to decide which category of memory is used here. | |
306 virtual const class TypePtr *adr_type() const; | |
307 | |
308 // Apply peephole rule(s) to this instruction | |
309 virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ); | |
310 | |
311 // Top-level ideal Opcode matched | |
312 virtual int ideal_Opcode() const { return Op_Node; } | |
313 | |
314 // Adds the label for the case | |
315 virtual void add_case_label( int switch_val, Label* blockLabel); | |
316 | |
317 // Set the absolute address for methods | |
318 virtual void method_set( intptr_t addr ); | |
319 | |
320 // Should we clone rather than spill this instruction? | |
321 bool rematerialize() const; | |
322 | |
323 // Get the pipeline info | |
324 static const Pipeline *pipeline_class(); | |
325 virtual const Pipeline *pipeline() const; | |
326 | |
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327 // Returns true if this node is a check that can be implemented with a trap. |
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328 virtual bool is_TrapBasedCheckNode() const { return false; } |
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329 |
0 | 330 #ifndef PRODUCT |
331 virtual const char *Name() const = 0; // Machine-specific name | |
332 virtual void dump_spec(outputStream *st) const; // Print per-node info | |
333 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual | |
334 #endif | |
335 }; | |
336 | |
337 //------------------------------MachIdealNode---------------------------- | |
338 // Machine specific versions of nodes that must be defined by user. | |
339 // These are not converted by matcher from ideal nodes to machine nodes | |
340 // but are inserted into the code by the compiler. | |
341 class MachIdealNode : public MachNode { | |
342 public: | |
343 MachIdealNode( ) {} | |
344 | |
345 // Define the following defaults for non-matched machine nodes | |
346 virtual uint oper_input_base() const { return 0; } | |
347 virtual uint rule() const { return 9999999; } | |
348 virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); } | |
349 }; | |
350 | |
351 //------------------------------MachTypeNode---------------------------- | |
352 // Machine Nodes that need to retain a known Type. | |
353 class MachTypeNode : public MachNode { | |
354 virtual uint size_of() const { return sizeof(*this); } // Size is bigger | |
355 public: | |
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356 MachTypeNode( ) {} |
0 | 357 const Type *_bottom_type; |
358 | |
359 virtual const class Type *bottom_type() const { return _bottom_type; } | |
360 #ifndef PRODUCT | |
361 virtual void dump_spec(outputStream *st) const; | |
362 #endif | |
363 }; | |
364 | |
365 //------------------------------MachBreakpointNode---------------------------- | |
366 // Machine breakpoint or interrupt Node | |
367 class MachBreakpointNode : public MachIdealNode { | |
368 public: | |
369 MachBreakpointNode( ) {} | |
370 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
371 virtual uint size(PhaseRegAlloc *ra_) const; | |
372 | |
373 #ifndef PRODUCT | |
374 virtual const char *Name() const { return "Breakpoint"; } | |
375 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
376 #endif | |
377 }; | |
378 | |
2008 | 379 //------------------------------MachConstantBaseNode-------------------------- |
380 // Machine node that represents the base address of the constant table. | |
381 class MachConstantBaseNode : public MachIdealNode { | |
382 public: | |
383 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask(). | |
384 | |
385 public: | |
386 MachConstantBaseNode() : MachIdealNode() { | |
387 init_class_id(Class_MachConstantBase); | |
388 } | |
389 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; } | |
390 virtual uint ideal_reg() const { return Op_RegP; } | |
391 virtual uint oper_input_base() const { return 1; } | |
392 | |
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393 virtual bool requires_postalloc_expand() const; |
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394 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_); |
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395 |
2008 | 396 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const; |
397 virtual uint size(PhaseRegAlloc* ra_) const; | |
398 virtual bool pinned() const { return UseRDPCForConstantTableBase; } | |
399 | |
400 static const RegMask& static_out_RegMask() { return _out_RegMask; } | |
401 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); } | |
402 | |
403 #ifndef PRODUCT | |
404 virtual const char* Name() const { return "MachConstantBaseNode"; } | |
405 virtual void format(PhaseRegAlloc*, outputStream* st) const; | |
406 #endif | |
407 }; | |
408 | |
409 //------------------------------MachConstantNode------------------------------- | |
410 // Machine node that holds a constant which is stored in the constant table. | |
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411 class MachConstantNode : public MachTypeNode { |
2008 | 412 protected: |
413 Compile::Constant _constant; // This node's constant. | |
414 | |
415 public: | |
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416 MachConstantNode() : MachTypeNode() { |
2008 | 417 init_class_id(Class_MachConstant); |
418 } | |
419 | |
420 virtual void eval_constant(Compile* C) { | |
421 #ifdef ASSERT | |
422 tty->print("missing MachConstantNode eval_constant function: "); | |
423 dump(); | |
424 #endif | |
425 ShouldNotCallThis(); | |
426 } | |
427 | |
428 virtual const RegMask &in_RegMask(uint idx) const { | |
429 if (idx == mach_constant_base_node_input()) | |
430 return MachConstantBaseNode::static_out_RegMask(); | |
431 return MachNode::in_RegMask(idx); | |
432 } | |
433 | |
434 // Input edge of MachConstantBaseNode. | |
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435 virtual uint mach_constant_base_node_input() const { return req() - 1; } |
2008 | 436 |
437 int constant_offset(); | |
438 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); } | |
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439 // Unchecked version to avoid assertions in debug output. |
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440 int constant_offset_unchecked() const; |
2008 | 441 }; |
442 | |
0 | 443 //------------------------------MachUEPNode----------------------------------- |
444 // Machine Unvalidated Entry Point Node | |
445 class MachUEPNode : public MachIdealNode { | |
446 public: | |
447 MachUEPNode( ) {} | |
448 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
449 virtual uint size(PhaseRegAlloc *ra_) const; | |
450 | |
451 #ifndef PRODUCT | |
452 virtual const char *Name() const { return "Unvalidated-Entry-Point"; } | |
453 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
454 #endif | |
455 }; | |
456 | |
457 //------------------------------MachPrologNode-------------------------------- | |
458 // Machine function Prolog Node | |
459 class MachPrologNode : public MachIdealNode { | |
460 public: | |
461 MachPrologNode( ) {} | |
462 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
463 virtual uint size(PhaseRegAlloc *ra_) const; | |
464 virtual int reloc() const; | |
465 | |
466 #ifndef PRODUCT | |
467 virtual const char *Name() const { return "Prolog"; } | |
468 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
469 #endif | |
470 }; | |
471 | |
472 //------------------------------MachEpilogNode-------------------------------- | |
473 // Machine function Epilog Node | |
474 class MachEpilogNode : public MachIdealNode { | |
475 public: | |
476 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {} | |
477 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
478 virtual uint size(PhaseRegAlloc *ra_) const; | |
479 virtual int reloc() const; | |
480 virtual const Pipeline *pipeline() const; | |
481 | |
482 private: | |
483 bool _do_polling; | |
484 | |
485 public: | |
486 bool do_polling() const { return _do_polling; } | |
487 | |
488 // Offset of safepoint from the beginning of the node | |
489 int safepoint_offset() const; | |
490 | |
491 #ifndef PRODUCT | |
492 virtual const char *Name() const { return "Epilog"; } | |
493 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
494 #endif | |
495 }; | |
496 | |
497 //------------------------------MachNopNode----------------------------------- | |
498 // Machine function Nop Node | |
499 class MachNopNode : public MachIdealNode { | |
500 private: | |
501 int _count; | |
502 public: | |
503 MachNopNode( ) : _count(1) {} | |
504 MachNopNode( int count ) : _count(count) {} | |
505 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
506 virtual uint size(PhaseRegAlloc *ra_) const; | |
507 | |
508 virtual const class Type *bottom_type() const { return Type::CONTROL; } | |
509 | |
510 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp | |
511 virtual const Pipeline *pipeline() const; | |
512 #ifndef PRODUCT | |
513 virtual const char *Name() const { return "Nop"; } | |
514 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
515 virtual void dump_spec(outputStream *st) const { } // No per-operand info | |
516 #endif | |
517 }; | |
518 | |
519 //------------------------------MachSpillCopyNode------------------------------ | |
520 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any | |
521 // location (stack or register). | |
522 class MachSpillCopyNode : public MachIdealNode { | |
523 const RegMask *_in; // RegMask for input | |
524 const RegMask *_out; // RegMask for output | |
525 const Type *_type; | |
526 public: | |
527 MachSpillCopyNode( Node *n, const RegMask &in, const RegMask &out ) : | |
528 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()) { | |
529 init_class_id(Class_MachSpillCopy); | |
530 init_flags(Flag_is_Copy); | |
531 add_req(NULL); | |
532 add_req(n); | |
533 } | |
534 virtual uint size_of() const { return sizeof(*this); } | |
535 void set_out_RegMask(const RegMask &out) { _out = &out; } | |
536 void set_in_RegMask(const RegMask &in) { _in = ∈ } | |
537 virtual const RegMask &out_RegMask() const { return *_out; } | |
538 virtual const RegMask &in_RegMask(uint) const { return *_in; } | |
539 virtual const class Type *bottom_type() const { return _type; } | |
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540 virtual uint ideal_reg() const { return _type->ideal_reg(); } |
0 | 541 virtual uint oper_input_base() const { return 1; } |
542 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const; | |
543 | |
544 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
545 virtual uint size(PhaseRegAlloc *ra_) const; | |
546 | |
547 #ifndef PRODUCT | |
548 virtual const char *Name() const { return "MachSpillCopy"; } | |
549 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
550 #endif | |
551 }; | |
552 | |
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553 //------------------------------MachBranchNode-------------------------------- |
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554 // Abstract machine branch Node |
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555 class MachBranchNode : public MachIdealNode { |
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556 public: |
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557 MachBranchNode() : MachIdealNode() { |
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558 init_class_id(Class_MachBranch); |
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559 } |
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560 virtual void label_set(Label* label, uint block_num) = 0; |
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561 virtual void save_label(Label** label, uint* block_num) = 0; |
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562 |
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563 // Support for short branches |
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564 virtual MachNode *short_branch_version(Compile* C) { return NULL; } |
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565 |
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566 virtual bool pinned() const { return true; }; |
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567 }; |
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568 |
0 | 569 //------------------------------MachNullChkNode-------------------------------- |
570 // Machine-dependent null-pointer-check Node. Points a real MachNode that is | |
571 // also some kind of memory op. Turns the indicated MachNode into a | |
572 // conditional branch with good latency on the ptr-not-null path and awful | |
573 // latency on the pointer-is-null path. | |
574 | |
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575 class MachNullCheckNode : public MachBranchNode { |
0 | 576 public: |
577 const uint _vidx; // Index of memop being tested | |
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578 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) { |
0 | 579 init_class_id(Class_MachNullCheck); |
580 add_req(ctrl); | |
581 add_req(memop); | |
582 } | |
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583 virtual uint size_of() const { return sizeof(*this); } |
0 | 584 |
585 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
3839 | 586 virtual void label_set(Label* label, uint block_num); |
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587 virtual void save_label(Label** label, uint* block_num); |
0 | 588 virtual void negate() { } |
589 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; } | |
590 virtual uint ideal_reg() const { return NotAMachineReg; } | |
591 virtual const RegMask &in_RegMask(uint) const; | |
592 virtual const RegMask &out_RegMask() const { return RegMask::Empty; } | |
593 #ifndef PRODUCT | |
594 virtual const char *Name() const { return "NullCheck"; } | |
595 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
596 #endif | |
597 }; | |
598 | |
599 //------------------------------MachProjNode---------------------------------- | |
600 // Machine-dependent Ideal projections (how is that for an oxymoron). Really | |
601 // just MachNodes made by the Ideal world that replicate simple projections | |
602 // but with machine-dependent input & output register masks. Generally | |
603 // produced as part of calling conventions. Normally I make MachNodes as part | |
604 // of the Matcher process, but the Matcher is ill suited to issues involving | |
605 // frame handling, so frame handling is all done in the Ideal world with | |
606 // occasional callbacks to the machine model for important info. | |
607 class MachProjNode : public ProjNode { | |
608 public: | |
3842 | 609 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) { |
610 init_class_id(Class_MachProj); | |
611 } | |
0 | 612 RegMask _rout; |
613 const uint _ideal_reg; | |
614 enum projType { | |
615 unmatched_proj = 0, // Projs for Control, I/O, memory not matched | |
616 fat_proj = 999 // Projs killing many regs, defined by _rout | |
617 }; | |
618 virtual int Opcode() const; | |
619 virtual const Type *bottom_type() const; | |
620 virtual const TypePtr *adr_type() const; | |
621 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; } | |
622 virtual const RegMask &out_RegMask() const { return _rout; } | |
623 virtual uint ideal_reg() const { return _ideal_reg; } | |
624 // Need size_of() for virtual ProjNode::clone() | |
625 virtual uint size_of() const { return sizeof(MachProjNode); } | |
626 #ifndef PRODUCT | |
627 virtual void dump_spec(outputStream *st) const; | |
628 #endif | |
629 }; | |
630 | |
631 //------------------------------MachIfNode------------------------------------- | |
632 // Machine-specific versions of IfNodes | |
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633 class MachIfNode : public MachBranchNode { |
0 | 634 virtual uint size_of() const { return sizeof(*this); } // Size is bigger |
635 public: | |
636 float _prob; // Probability branch goes either way | |
637 float _fcnt; // Frequency counter | |
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638 MachIfNode() : MachBranchNode() { |
0 | 639 init_class_id(Class_MachIf); |
640 } | |
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641 // Negate conditional branches. |
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642 virtual void negate() = 0; |
0 | 643 #ifndef PRODUCT |
644 virtual void dump_spec(outputStream *st) const; | |
645 #endif | |
646 }; | |
647 | |
3842 | 648 //------------------------------MachGotoNode----------------------------------- |
649 // Machine-specific versions of GotoNodes | |
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650 class MachGotoNode : public MachBranchNode { |
3842 | 651 public: |
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652 MachGotoNode() : MachBranchNode() { |
3842 | 653 init_class_id(Class_MachGoto); |
654 } | |
655 }; | |
656 | |
0 | 657 //------------------------------MachFastLockNode------------------------------------- |
658 // Machine-specific versions of FastLockNodes | |
659 class MachFastLockNode : public MachNode { | |
660 virtual uint size_of() const { return sizeof(*this); } // Size is bigger | |
661 public: | |
662 BiasedLockingCounters* _counters; | |
663 | |
664 MachFastLockNode() : MachNode() {} | |
665 }; | |
666 | |
667 //------------------------------MachReturnNode-------------------------------- | |
668 // Machine-specific versions of subroutine returns | |
669 class MachReturnNode : public MachNode { | |
670 virtual uint size_of() const; // Size is bigger | |
671 public: | |
672 RegMask *_in_rms; // Input register masks, set during allocation | |
673 ReallocMark _nesting; // assertion check for reallocations | |
674 const TypePtr* _adr_type; // memory effects of call or return | |
675 MachReturnNode() : MachNode() { | |
676 init_class_id(Class_MachReturn); | |
677 _adr_type = TypePtr::BOTTOM; // the default: all of memory | |
678 } | |
679 | |
680 void set_adr_type(const TypePtr* atp) { _adr_type = atp; } | |
681 | |
682 virtual const RegMask &in_RegMask(uint) const; | |
683 virtual bool pinned() const { return true; }; | |
684 virtual const TypePtr *adr_type() const; | |
685 }; | |
686 | |
687 //------------------------------MachSafePointNode----------------------------- | |
688 // Machine-specific versions of safepoints | |
689 class MachSafePointNode : public MachReturnNode { | |
690 public: | |
691 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC | |
692 JVMState* _jvms; // Pointer to list of JVM State Objects | |
693 uint _jvmadj; // Extra delta to jvms indexes (mach. args) | |
694 OopMap* oop_map() const { return _oop_map; } | |
695 void set_oop_map(OopMap* om) { _oop_map = om; } | |
696 | |
697 MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) { | |
698 init_class_id(Class_MachSafePoint); | |
699 } | |
700 | |
701 virtual JVMState* jvms() const { return _jvms; } | |
702 void set_jvms(JVMState* s) { | |
703 _jvms = s; | |
704 } | |
705 virtual const Type *bottom_type() const; | |
706 | |
707 virtual const RegMask &in_RegMask(uint) const; | |
708 | |
709 // Functionality from old debug nodes | |
710 Node *returnadr() const { return in(TypeFunc::ReturnAdr); } | |
711 Node *frameptr () const { return in(TypeFunc::FramePtr); } | |
712 | |
713 Node *local(const JVMState* jvms, uint idx) const { | |
714 assert(verify_jvms(jvms), "jvms must match"); | |
715 return in(_jvmadj + jvms->locoff() + idx); | |
716 } | |
717 Node *stack(const JVMState* jvms, uint idx) const { | |
718 assert(verify_jvms(jvms), "jvms must match"); | |
719 return in(_jvmadj + jvms->stkoff() + idx); | |
720 } | |
721 Node *monitor_obj(const JVMState* jvms, uint idx) const { | |
722 assert(verify_jvms(jvms), "jvms must match"); | |
723 return in(_jvmadj + jvms->monitor_obj_offset(idx)); | |
724 } | |
725 Node *monitor_box(const JVMState* jvms, uint idx) const { | |
726 assert(verify_jvms(jvms), "jvms must match"); | |
727 return in(_jvmadj + jvms->monitor_box_offset(idx)); | |
728 } | |
729 void set_local(const JVMState* jvms, uint idx, Node *c) { | |
730 assert(verify_jvms(jvms), "jvms must match"); | |
731 set_req(_jvmadj + jvms->locoff() + idx, c); | |
732 } | |
733 void set_stack(const JVMState* jvms, uint idx, Node *c) { | |
734 assert(verify_jvms(jvms), "jvms must match"); | |
735 set_req(_jvmadj + jvms->stkoff() + idx, c); | |
736 } | |
737 void set_monitor(const JVMState* jvms, uint idx, Node *c) { | |
738 assert(verify_jvms(jvms), "jvms must match"); | |
739 set_req(_jvmadj + jvms->monoff() + idx, c); | |
740 } | |
741 }; | |
742 | |
743 //------------------------------MachCallNode---------------------------------- | |
744 // Machine-specific versions of subroutine calls | |
745 class MachCallNode : public MachSafePointNode { | |
746 protected: | |
747 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash | |
748 virtual uint cmp( const Node &n ) const; | |
749 virtual uint size_of() const = 0; // Size is bigger | |
750 public: | |
751 const TypeFunc *_tf; // Function type | |
752 address _entry_point; // Address of the method being called | |
753 float _cnt; // Estimate of number of times called | |
754 uint _argsize; // Size of argument block on stack | |
755 | |
756 const TypeFunc* tf() const { return _tf; } | |
757 const address entry_point() const { return _entry_point; } | |
758 const float cnt() const { return _cnt; } | |
759 uint argsize() const { return _argsize; } | |
760 | |
761 void set_tf(const TypeFunc* tf) { _tf = tf; } | |
762 void set_entry_point(address p) { _entry_point = p; } | |
763 void set_cnt(float c) { _cnt = c; } | |
764 void set_argsize(int s) { _argsize = s; } | |
765 | |
766 MachCallNode() : MachSafePointNode() { | |
767 init_class_id(Class_MachCall); | |
768 } | |
769 | |
770 virtual const Type *bottom_type() const; | |
771 virtual bool pinned() const { return false; } | |
772 virtual const Type *Value( PhaseTransform *phase ) const; | |
773 virtual const RegMask &in_RegMask(uint) const; | |
774 virtual int ret_addr_offset() { return 0; } | |
775 | |
776 bool returns_long() const { return tf()->return_type() == T_LONG; } | |
777 bool return_value_is_used() const; | |
778 #ifndef PRODUCT | |
779 virtual void dump_spec(outputStream *st) const; | |
780 #endif | |
781 }; | |
782 | |
783 //------------------------------MachCallJavaNode------------------------------ | |
784 // "Base" class for machine-specific versions of subroutine calls | |
785 class MachCallJavaNode : public MachCallNode { | |
786 protected: | |
787 virtual uint cmp( const Node &n ) const; | |
788 virtual uint size_of() const; // Size is bigger | |
789 public: | |
790 ciMethod* _method; // Method being direct called | |
791 int _bci; // Byte Code index of call byte code | |
792 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual | |
1137 | 793 bool _method_handle_invoke; // Tells if the call has to preserve SP |
0 | 794 MachCallJavaNode() : MachCallNode() { |
795 init_class_id(Class_MachCallJava); | |
796 } | |
1137 | 797 |
798 virtual const RegMask &in_RegMask(uint) const; | |
799 | |
0 | 800 #ifndef PRODUCT |
801 virtual void dump_spec(outputStream *st) const; | |
802 #endif | |
803 }; | |
804 | |
805 //------------------------------MachCallStaticJavaNode------------------------ | |
806 // Machine-specific versions of monomorphic subroutine calls | |
807 class MachCallStaticJavaNode : public MachCallJavaNode { | |
808 virtual uint cmp( const Node &n ) const; | |
809 virtual uint size_of() const; // Size is bigger | |
810 public: | |
811 const char *_name; // Runtime wrapper name | |
812 MachCallStaticJavaNode() : MachCallJavaNode() { | |
813 init_class_id(Class_MachCallStaticJava); | |
814 } | |
815 | |
816 // If this is an uncommon trap, return the request code, else zero. | |
817 int uncommon_trap_request() const; | |
818 | |
819 virtual int ret_addr_offset(); | |
820 #ifndef PRODUCT | |
821 virtual void dump_spec(outputStream *st) const; | |
822 void dump_trap_args(outputStream *st) const; | |
823 #endif | |
824 }; | |
825 | |
826 //------------------------------MachCallDynamicJavaNode------------------------ | |
827 // Machine-specific versions of possibly megamorphic subroutine calls | |
828 class MachCallDynamicJavaNode : public MachCallJavaNode { | |
829 public: | |
830 int _vtable_index; | |
831 MachCallDynamicJavaNode() : MachCallJavaNode() { | |
832 init_class_id(Class_MachCallDynamicJava); | |
833 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized | |
834 } | |
835 virtual int ret_addr_offset(); | |
836 #ifndef PRODUCT | |
837 virtual void dump_spec(outputStream *st) const; | |
838 #endif | |
839 }; | |
840 | |
841 //------------------------------MachCallRuntimeNode---------------------------- | |
842 // Machine-specific versions of subroutine calls | |
843 class MachCallRuntimeNode : public MachCallNode { | |
844 virtual uint cmp( const Node &n ) const; | |
845 virtual uint size_of() const; // Size is bigger | |
846 public: | |
847 const char *_name; // Printable name, if _method is NULL | |
848 MachCallRuntimeNode() : MachCallNode() { | |
849 init_class_id(Class_MachCallRuntime); | |
850 } | |
851 virtual int ret_addr_offset(); | |
852 #ifndef PRODUCT | |
853 virtual void dump_spec(outputStream *st) const; | |
854 #endif | |
855 }; | |
856 | |
857 class MachCallLeafNode: public MachCallRuntimeNode { | |
858 public: | |
859 MachCallLeafNode() : MachCallRuntimeNode() { | |
860 init_class_id(Class_MachCallLeaf); | |
861 } | |
862 }; | |
863 | |
864 //------------------------------MachHaltNode----------------------------------- | |
865 // Machine-specific versions of halt nodes | |
866 class MachHaltNode : public MachReturnNode { | |
867 public: | |
868 virtual JVMState* jvms() const; | |
869 }; | |
870 | |
871 | |
872 //------------------------------MachTempNode----------------------------------- | |
873 // Node used by the adlc to construct inputs to represent temporary registers | |
874 class MachTempNode : public MachNode { | |
875 private: | |
876 MachOper *_opnd_array[1]; | |
877 | |
878 public: | |
879 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); } | |
880 virtual uint rule() const { return 9999999; } | |
881 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {} | |
882 | |
883 MachTempNode(MachOper* oper) { | |
884 init_class_id(Class_MachTemp); | |
885 _num_opnds = 1; | |
886 _opnds = _opnd_array; | |
887 add_req(NULL); | |
888 _opnds[0] = oper; | |
889 } | |
890 virtual uint size_of() const { return sizeof(MachTempNode); } | |
891 | |
892 #ifndef PRODUCT | |
893 virtual void format(PhaseRegAlloc *, outputStream *st ) const {} | |
894 virtual const char *Name() const { return "MachTemp";} | |
895 #endif | |
896 }; | |
897 | |
898 | |
899 | |
900 //------------------------------labelOper-------------------------------------- | |
901 // Machine-independent version of label operand | |
902 class labelOper : public MachOper { | |
903 private: | |
904 virtual uint num_edges() const { return 0; } | |
905 public: | |
906 // Supported for fixed size branches | |
907 Label* _label; // Label for branch(es) | |
908 | |
909 uint _block_num; | |
910 | |
911 labelOper() : _block_num(0), _label(0) {} | |
912 | |
913 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {} | |
914 | |
915 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {} | |
916 | |
917 virtual MachOper *clone(Compile* C) const; | |
918 | |
3839 | 919 virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; } |
0 | 920 |
921 virtual uint opcode() const; | |
922 | |
923 virtual uint hash() const; | |
924 virtual uint cmp( const MachOper &oper ) const; | |
925 #ifndef PRODUCT | |
926 virtual const char *Name() const { return "Label";} | |
927 | |
928 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; | |
929 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } | |
930 #endif | |
931 }; | |
932 | |
933 | |
934 //------------------------------methodOper-------------------------------------- | |
935 // Machine-independent version of method operand | |
936 class methodOper : public MachOper { | |
937 private: | |
938 virtual uint num_edges() const { return 0; } | |
939 public: | |
940 intptr_t _method; // Address of method | |
941 methodOper() : _method(0) {} | |
942 methodOper(intptr_t method) : _method(method) {} | |
943 | |
944 virtual MachOper *clone(Compile* C) const; | |
945 | |
946 virtual intptr_t method() const { return _method; } | |
947 | |
948 virtual uint opcode() const; | |
949 | |
950 virtual uint hash() const; | |
951 virtual uint cmp( const MachOper &oper ) const; | |
952 #ifndef PRODUCT | |
953 virtual const char *Name() const { return "Method";} | |
954 | |
955 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; | |
956 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } | |
957 #endif | |
958 }; | |
1972 | 959 |
960 #endif // SHARE_VM_OPTO_MACHNODE_HPP |