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annotate src/cpu/sparc/vm/c1_MacroAssembler_sparc.cpp @ 1661:01b172b8cd7c
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author | never |
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date | Fri, 16 Jul 2010 08:29:42 -0700 |
parents | c18cbe5936b8 |
children | f95d63e2154a |
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0 | 1 /* |
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2 * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
25 #include "incls/_precompiled.incl" | |
26 #include "incls/_c1_MacroAssembler_sparc.cpp.incl" | |
27 | |
28 void C1_MacroAssembler::inline_cache_check(Register receiver, Register iCache) { | |
29 Label L; | |
30 const Register temp_reg = G3_scratch; | |
31 // Note: needs more testing of out-of-line vs. inline slow case | |
32 verify_oop(receiver); | |
33 ld_ptr(receiver, oopDesc::klass_offset_in_bytes(), temp_reg); | |
34 cmp(temp_reg, iCache); | |
35 brx(Assembler::equal, true, Assembler::pt, L); | |
36 delayed()->nop(); | |
727 | 37 AddressLiteral ic_miss(SharedRuntime::get_ic_miss_stub()); |
38 jump_to(ic_miss, temp_reg); | |
0 | 39 delayed()->nop(); |
40 align(CodeEntryAlignment); | |
41 bind(L); | |
42 } | |
43 | |
44 | |
45 void C1_MacroAssembler::explicit_null_check(Register base) { | |
46 Unimplemented(); | |
47 } | |
48 | |
49 | |
50 void C1_MacroAssembler::build_frame(int frame_size_in_bytes) { | |
51 | |
52 generate_stack_overflow_check(frame_size_in_bytes); | |
53 // Create the frame. | |
54 save_frame_c1(frame_size_in_bytes); | |
55 } | |
56 | |
57 | |
58 void C1_MacroAssembler::unverified_entry(Register receiver, Register ic_klass) { | |
59 if (C1Breakpoint) breakpoint_trap(); | |
60 inline_cache_check(receiver, ic_klass); | |
61 } | |
62 | |
63 | |
64 void C1_MacroAssembler::verified_entry() { | |
65 if (C1Breakpoint) breakpoint_trap(); | |
66 // build frame | |
67 verify_FPU(0, "method_entry"); | |
68 } | |
69 | |
70 | |
71 void C1_MacroAssembler::lock_object(Register Rmark, Register Roop, Register Rbox, Register Rscratch, Label& slow_case) { | |
72 assert_different_registers(Rmark, Roop, Rbox, Rscratch); | |
73 | |
74 Label done; | |
75 | |
727 | 76 Address mark_addr(Roop, oopDesc::mark_offset_in_bytes()); |
0 | 77 |
78 // The following move must be the first instruction of emitted since debug | |
79 // information may be generated for it. | |
80 // Load object header | |
81 ld_ptr(mark_addr, Rmark); | |
82 | |
83 verify_oop(Roop); | |
84 | |
85 // save object being locked into the BasicObjectLock | |
86 st_ptr(Roop, Rbox, BasicObjectLock::obj_offset_in_bytes()); | |
87 | |
88 if (UseBiasedLocking) { | |
89 biased_locking_enter(Roop, Rmark, Rscratch, done, &slow_case); | |
90 } | |
91 | |
92 // Save Rbox in Rscratch to be used for the cas operation | |
93 mov(Rbox, Rscratch); | |
94 | |
95 // and mark it unlocked | |
96 or3(Rmark, markOopDesc::unlocked_value, Rmark); | |
97 | |
98 // save unlocked object header into the displaced header location on the stack | |
99 st_ptr(Rmark, Rbox, BasicLock::displaced_header_offset_in_bytes()); | |
100 | |
101 // compare object markOop with Rmark and if equal exchange Rscratch with object markOop | |
102 assert(mark_addr.disp() == 0, "cas must take a zero displacement"); | |
103 casx_under_lock(mark_addr.base(), Rmark, Rscratch, (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr()); | |
104 // if compare/exchange succeeded we found an unlocked object and we now have locked it | |
105 // hence we are done | |
106 cmp(Rmark, Rscratch); | |
107 brx(Assembler::equal, false, Assembler::pt, done); | |
108 delayed()->sub(Rscratch, SP, Rscratch); //pull next instruction into delay slot | |
109 // we did not find an unlocked object so see if this is a recursive case | |
110 // sub(Rscratch, SP, Rscratch); | |
111 assert(os::vm_page_size() > 0xfff, "page size too small - change the constant"); | |
112 andcc(Rscratch, 0xfffff003, Rscratch); | |
113 brx(Assembler::notZero, false, Assembler::pn, slow_case); | |
114 delayed()->st_ptr(Rscratch, Rbox, BasicLock::displaced_header_offset_in_bytes()); | |
115 bind(done); | |
116 } | |
117 | |
118 | |
119 void C1_MacroAssembler::unlock_object(Register Rmark, Register Roop, Register Rbox, Label& slow_case) { | |
120 assert_different_registers(Rmark, Roop, Rbox); | |
121 | |
122 Label done; | |
123 | |
727 | 124 Address mark_addr(Roop, oopDesc::mark_offset_in_bytes()); |
0 | 125 assert(mark_addr.disp() == 0, "cas must take a zero displacement"); |
126 | |
127 if (UseBiasedLocking) { | |
128 // load the object out of the BasicObjectLock | |
129 ld_ptr(Rbox, BasicObjectLock::obj_offset_in_bytes(), Roop); | |
130 verify_oop(Roop); | |
131 biased_locking_exit(mark_addr, Rmark, done); | |
132 } | |
133 // Test first it it is a fast recursive unlock | |
134 ld_ptr(Rbox, BasicLock::displaced_header_offset_in_bytes(), Rmark); | |
135 br_null(Rmark, false, Assembler::pt, done); | |
136 delayed()->nop(); | |
137 if (!UseBiasedLocking) { | |
138 // load object | |
139 ld_ptr(Rbox, BasicObjectLock::obj_offset_in_bytes(), Roop); | |
140 verify_oop(Roop); | |
141 } | |
142 | |
143 // Check if it is still a light weight lock, this is is true if we see | |
144 // the stack address of the basicLock in the markOop of the object | |
145 casx_under_lock(mark_addr.base(), Rbox, Rmark, (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr()); | |
146 cmp(Rbox, Rmark); | |
147 | |
148 brx(Assembler::notEqual, false, Assembler::pn, slow_case); | |
149 delayed()->nop(); | |
150 // Done | |
151 bind(done); | |
152 } | |
153 | |
154 | |
155 void C1_MacroAssembler::try_allocate( | |
156 Register obj, // result: pointer to object after successful allocation | |
157 Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise | |
158 int con_size_in_bytes, // object size in bytes if known at compile time | |
159 Register t1, // temp register | |
160 Register t2, // temp register | |
161 Label& slow_case // continuation point if fast allocation fails | |
162 ) { | |
163 if (UseTLAB) { | |
164 tlab_allocate(obj, var_size_in_bytes, con_size_in_bytes, t1, slow_case); | |
165 } else { | |
166 eden_allocate(obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case); | |
167 } | |
168 } | |
169 | |
170 | |
171 void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register t1, Register t2) { | |
172 assert_different_registers(obj, klass, len, t1, t2); | |
173 if (UseBiasedLocking && !len->is_valid()) { | |
174 ld_ptr(klass, Klass::prototype_header_offset_in_bytes() + klassOopDesc::klass_part_offset_in_bytes(), t1); | |
175 } else { | |
176 set((intx)markOopDesc::prototype(), t1); | |
177 } | |
178 st_ptr(t1 , obj, oopDesc::mark_offset_in_bytes ()); | |
179 st_ptr(klass, obj, oopDesc::klass_offset_in_bytes ()); | |
180 if (len->is_valid()) st(len , obj, arrayOopDesc::length_offset_in_bytes()); | |
181 } | |
182 | |
183 | |
184 void C1_MacroAssembler::initialize_body(Register base, Register index) { | |
185 assert_different_registers(base, index); | |
186 Label loop; | |
187 bind(loop); | |
188 subcc(index, HeapWordSize, index); | |
189 brx(Assembler::greaterEqual, true, Assembler::pt, loop); | |
190 delayed()->st_ptr(G0, base, index); | |
191 } | |
192 | |
193 | |
194 void C1_MacroAssembler::allocate_object( | |
195 Register obj, // result: pointer to object after successful allocation | |
196 Register t1, // temp register | |
197 Register t2, // temp register | |
198 Register t3, // temp register | |
199 int hdr_size, // object header size in words | |
200 int obj_size, // object size in words | |
201 Register klass, // object klass | |
202 Label& slow_case // continuation point if fast allocation fails | |
203 ) { | |
204 assert_different_registers(obj, t1, t2, t3, klass); | |
205 assert(klass == G5, "must be G5"); | |
206 | |
207 // allocate space & initialize header | |
208 if (!is_simm13(obj_size * wordSize)) { | |
209 // would need to use extra register to load | |
210 // object size => go the slow case for now | |
211 br(Assembler::always, false, Assembler::pt, slow_case); | |
212 delayed()->nop(); | |
213 return; | |
214 } | |
215 try_allocate(obj, noreg, obj_size * wordSize, t2, t3, slow_case); | |
216 | |
217 initialize_object(obj, klass, noreg, obj_size * HeapWordSize, t1, t2); | |
218 } | |
219 | |
220 void C1_MacroAssembler::initialize_object( | |
221 Register obj, // result: pointer to object after successful allocation | |
222 Register klass, // object klass | |
223 Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise | |
224 int con_size_in_bytes, // object size in bytes if known at compile time | |
225 Register t1, // temp register | |
226 Register t2 // temp register | |
227 ) { | |
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228 const int hdr_size_in_bytes = instanceOopDesc::base_offset_in_bytes(); |
0 | 229 |
230 initialize_header(obj, klass, noreg, t1, t2); | |
231 | |
232 #ifdef ASSERT | |
233 { | |
234 Label ok; | |
235 ld(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes(), t1); | |
236 if (var_size_in_bytes != noreg) { | |
237 cmp(t1, var_size_in_bytes); | |
238 } else { | |
239 cmp(t1, con_size_in_bytes); | |
240 } | |
241 brx(Assembler::equal, false, Assembler::pt, ok); | |
242 delayed()->nop(); | |
243 stop("bad size in initialize_object"); | |
244 should_not_reach_here(); | |
245 | |
246 bind(ok); | |
247 } | |
248 | |
249 #endif | |
250 | |
251 // initialize body | |
252 const int threshold = 5 * HeapWordSize; // approximate break even point for code size | |
253 if (var_size_in_bytes != noreg) { | |
254 // use a loop | |
255 add(obj, hdr_size_in_bytes, t1); // compute address of first element | |
256 sub(var_size_in_bytes, hdr_size_in_bytes, t2); // compute size of body | |
257 initialize_body(t1, t2); | |
258 #ifndef _LP64 | |
259 } else if (VM_Version::v9_instructions_work() && con_size_in_bytes < threshold * 2) { | |
260 // on v9 we can do double word stores to fill twice as much space. | |
261 assert(hdr_size_in_bytes % 8 == 0, "double word aligned"); | |
262 assert(con_size_in_bytes % 8 == 0, "double word aligned"); | |
263 for (int i = hdr_size_in_bytes; i < con_size_in_bytes; i += 2 * HeapWordSize) stx(G0, obj, i); | |
264 #endif | |
265 } else if (con_size_in_bytes <= threshold) { | |
266 // use explicit NULL stores | |
267 for (int i = hdr_size_in_bytes; i < con_size_in_bytes; i += HeapWordSize) st_ptr(G0, obj, i); | |
268 } else if (con_size_in_bytes > hdr_size_in_bytes) { | |
269 // use a loop | |
270 const Register base = t1; | |
271 const Register index = t2; | |
272 add(obj, hdr_size_in_bytes, base); // compute address of first element | |
273 // compute index = number of words to clear | |
274 set(con_size_in_bytes - hdr_size_in_bytes, index); | |
275 initialize_body(base, index); | |
276 } | |
277 | |
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278 if (CURRENT_ENV->dtrace_alloc_probes()) { |
0 | 279 assert(obj == O0, "must be"); |
280 call(CAST_FROM_FN_PTR(address, Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)), | |
281 relocInfo::runtime_call_type); | |
282 delayed()->nop(); | |
283 } | |
284 | |
285 verify_oop(obj); | |
286 } | |
287 | |
288 | |
289 void C1_MacroAssembler::allocate_array( | |
290 Register obj, // result: pointer to array after successful allocation | |
291 Register len, // array length | |
292 Register t1, // temp register | |
293 Register t2, // temp register | |
294 Register t3, // temp register | |
295 int hdr_size, // object header size in words | |
296 int elt_size, // element size in bytes | |
297 Register klass, // object klass | |
298 Label& slow_case // continuation point if fast allocation fails | |
299 ) { | |
300 assert_different_registers(obj, len, t1, t2, t3, klass); | |
301 assert(klass == G5, "must be G5"); | |
302 assert(t1 == G1, "must be G1"); | |
303 | |
304 // determine alignment mask | |
305 assert(!(BytesPerWord & 1), "must be a multiple of 2 for masking code to work"); | |
306 | |
307 // check for negative or excessive length | |
308 // note: the maximum length allowed is chosen so that arrays of any | |
309 // element size with this length are always smaller or equal | |
310 // to the largest integer (i.e., array size computation will | |
311 // not overflow) | |
312 set(max_array_allocation_length, t1); | |
313 cmp(len, t1); | |
314 br(Assembler::greaterUnsigned, false, Assembler::pn, slow_case); | |
315 | |
316 // compute array size | |
317 // note: if 0 <= len <= max_length, len*elt_size + header + alignment is | |
318 // smaller or equal to the largest integer; also, since top is always | |
319 // aligned, we can do the alignment here instead of at the end address | |
320 // computation | |
321 const Register arr_size = t1; | |
322 switch (elt_size) { | |
323 case 1: delayed()->mov(len, arr_size); break; | |
324 case 2: delayed()->sll(len, 1, arr_size); break; | |
325 case 4: delayed()->sll(len, 2, arr_size); break; | |
326 case 8: delayed()->sll(len, 3, arr_size); break; | |
327 default: ShouldNotReachHere(); | |
328 } | |
329 add(arr_size, hdr_size * wordSize + MinObjAlignmentInBytesMask, arr_size); // add space for header & alignment | |
330 and3(arr_size, ~MinObjAlignmentInBytesMask, arr_size); // align array size | |
331 | |
332 // allocate space & initialize header | |
333 if (UseTLAB) { | |
334 tlab_allocate(obj, arr_size, 0, t2, slow_case); | |
335 } else { | |
336 eden_allocate(obj, arr_size, 0, t2, t3, slow_case); | |
337 } | |
338 initialize_header(obj, klass, len, t2, t3); | |
339 | |
340 // initialize body | |
341 const Register base = t2; | |
342 const Register index = t3; | |
343 add(obj, hdr_size * wordSize, base); // compute address of first element | |
344 sub(arr_size, hdr_size * wordSize, index); // compute index = number of words to clear | |
345 initialize_body(base, index); | |
346 | |
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347 if (CURRENT_ENV->dtrace_alloc_probes()) { |
0 | 348 assert(obj == O0, "must be"); |
349 call(CAST_FROM_FN_PTR(address, Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)), | |
350 relocInfo::runtime_call_type); | |
351 delayed()->nop(); | |
352 } | |
353 | |
354 verify_oop(obj); | |
355 } | |
356 | |
357 | |
358 #ifndef PRODUCT | |
359 | |
360 void C1_MacroAssembler::verify_stack_oop(int stack_offset) { | |
361 if (!VerifyOops) return; | |
727 | 362 verify_oop_addr(Address(SP, stack_offset + STACK_BIAS)); |
0 | 363 } |
364 | |
365 void C1_MacroAssembler::verify_not_null_oop(Register r) { | |
366 Label not_null; | |
367 br_zero(Assembler::notEqual, false, Assembler::pt, r, not_null); | |
368 delayed()->nop(); | |
369 stop("non-null oop required"); | |
370 bind(not_null); | |
371 if (!VerifyOops) return; | |
372 verify_oop(r); | |
373 } | |
374 | |
375 void C1_MacroAssembler::invalidate_registers(bool iregisters, bool lregisters, bool oregisters, | |
376 Register preserve1, Register preserve2) { | |
377 if (iregisters) { | |
378 for (int i = 0; i < 6; i++) { | |
379 Register r = as_iRegister(i); | |
380 if (r != preserve1 && r != preserve2) set(0xdead, r); | |
381 } | |
382 } | |
383 if (oregisters) { | |
384 for (int i = 0; i < 6; i++) { | |
385 Register r = as_oRegister(i); | |
386 if (r != preserve1 && r != preserve2) set(0xdead, r); | |
387 } | |
388 } | |
389 if (lregisters) { | |
390 for (int i = 0; i < 8; i++) { | |
391 Register r = as_lRegister(i); | |
392 if (r != preserve1 && r != preserve2) set(0xdead, r); | |
393 } | |
394 } | |
395 } | |
396 | |
397 | |
398 #endif |