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annotate src/cpu/ppc/vm/icache_ppc.hpp @ 21216:04339fd2c863
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author | Josef Eisl <josef.eisl@jku.at> |
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date | Mon, 20 Apr 2015 14:14:09 +0200 |
parents | 67fa91961822 |
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1 /* |
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2 * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved. |
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3 * Copyright 2012, 2013 SAP AG. All rights reserved. |
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4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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5 * |
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6 * This code is free software; you can redistribute it and/or modify it |
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7 * under the terms of the GNU General Public License version 2 only, as |
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8 * published by the Free Software Foundation. |
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9 * |
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10 * This code is distributed in the hope that it will be useful, but WITHOUT |
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11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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13 * version 2 for more details (a copy is included in the LICENSE file that |
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14 * accompanied this code). |
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15 * |
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16 * You should have received a copy of the GNU General Public License version |
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17 * 2 along with this work; if not, write to the Free Software Foundation, |
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18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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19 * |
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20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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21 * or visit www.oracle.com if you need additional information or have any |
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22 * questions. |
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23 * |
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24 */ |
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25 |
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26 #ifndef CPU_PPC_VM_ICACHE_PPC_HPP |
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27 #define CPU_PPC_VM_ICACHE_PPC_HPP |
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28 |
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29 // Interface for updating the instruction cache. Whenever the VM modifies |
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30 // code, part of the processor instruction cache potentially has to be flushed. |
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31 |
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32 class ICache : public AbstractICache { |
14445 | 33 friend class ICacheStubGenerator; |
34 static int ppc64_flush_icache(address start, int lines, int magic); | |
35 | |
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36 public: |
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37 enum { |
14445 | 38 // Actually, cache line size is 64, but keeping it as it is to be |
39 // on the safe side on ALL PPC64 implementations. | |
40 log2_line_size = 5, | |
41 line_size = 1 << log2_line_size | |
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42 }; |
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43 |
14445 | 44 static void ppc64_flush_icache_bytes(address start, int bytes) { |
45 // Align start address to an icache line boundary and transform | |
46 // nbytes to an icache line count. | |
47 const uint line_offset = mask_address_bits(start, line_size - 1); | |
48 ppc64_flush_icache(start - line_offset, (bytes + line_offset + line_size - 1) >> log2_line_size, 0); | |
49 } | |
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50 }; |
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51 |
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52 #endif // CPU_PPC_VM_ICACHE_PPC_HPP |