Mercurial > hg > truffle
annotate src/os_cpu/windows_x86/vm/orderAccess_windows_x86.inline.hpp @ 1647:079980c86f33
6968646: JVM crashes with SIGFPE during startup
Summary: Check that cpuid returns valid values for processor topology (not zeros).
Reviewed-by: never, twisti
author | kvn |
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date | Wed, 14 Jul 2010 14:29:14 -0700 |
parents | c18cbe5936b8 |
children | a6bff45449bc |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 2003, 2009, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
25 #pragma warning(disable: 4035) // Disables warnings reporting missing return statement | |
26 | |
27 // Implementation of class OrderAccess. | |
28 | |
29 inline void OrderAccess::loadload() { acquire(); } | |
30 inline void OrderAccess::storestore() { release(); } | |
31 inline void OrderAccess::loadstore() { acquire(); } | |
32 inline void OrderAccess::storeload() { fence(); } | |
33 | |
34 inline void OrderAccess::acquire() { | |
35 #ifndef AMD64 | |
36 __asm { | |
37 mov eax, dword ptr [esp]; | |
38 } | |
39 #endif // !AMD64 | |
40 } | |
41 | |
42 inline void OrderAccess::release() { | |
43 // A volatile store has release semantics. | |
44 dummy = 0; | |
45 } | |
46 | |
47 inline void OrderAccess::fence() { | |
48 #ifdef AMD64 | |
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49 StubRoutines_fence(); |
0 | 50 #else |
51 if (os::is_MP()) { | |
52 __asm { | |
53 lock add dword ptr [esp], 0; | |
54 } | |
55 } | |
56 #endif // AMD64 | |
57 } | |
58 | |
59 inline jbyte OrderAccess::load_acquire(volatile jbyte* p) { return *p; } | |
60 inline jshort OrderAccess::load_acquire(volatile jshort* p) { return *p; } | |
61 inline jint OrderAccess::load_acquire(volatile jint* p) { return *p; } | |
62 inline jlong OrderAccess::load_acquire(volatile jlong* p) { return *p; } | |
63 inline jubyte OrderAccess::load_acquire(volatile jubyte* p) { return *p; } | |
64 inline jushort OrderAccess::load_acquire(volatile jushort* p) { return *p; } | |
65 inline juint OrderAccess::load_acquire(volatile juint* p) { return *p; } | |
66 inline julong OrderAccess::load_acquire(volatile julong* p) { return *p; } | |
67 inline jfloat OrderAccess::load_acquire(volatile jfloat* p) { return *p; } | |
68 inline jdouble OrderAccess::load_acquire(volatile jdouble* p) { return *p; } | |
69 | |
70 inline intptr_t OrderAccess::load_ptr_acquire(volatile intptr_t* p) { return *p; } | |
71 inline void* OrderAccess::load_ptr_acquire(volatile void* p) { return *(void* volatile *)p; } | |
72 inline void* OrderAccess::load_ptr_acquire(const volatile void* p) { return *(void* const volatile *)p; } | |
73 | |
74 inline void OrderAccess::release_store(volatile jbyte* p, jbyte v) { *p = v; } | |
75 inline void OrderAccess::release_store(volatile jshort* p, jshort v) { *p = v; } | |
76 inline void OrderAccess::release_store(volatile jint* p, jint v) { *p = v; } | |
77 inline void OrderAccess::release_store(volatile jlong* p, jlong v) { *p = v; } | |
78 inline void OrderAccess::release_store(volatile jubyte* p, jubyte v) { *p = v; } | |
79 inline void OrderAccess::release_store(volatile jushort* p, jushort v) { *p = v; } | |
80 inline void OrderAccess::release_store(volatile juint* p, juint v) { *p = v; } | |
81 inline void OrderAccess::release_store(volatile julong* p, julong v) { *p = v; } | |
82 inline void OrderAccess::release_store(volatile jfloat* p, jfloat v) { *p = v; } | |
83 inline void OrderAccess::release_store(volatile jdouble* p, jdouble v) { *p = v; } | |
84 | |
85 inline void OrderAccess::release_store_ptr(volatile intptr_t* p, intptr_t v) { *p = v; } | |
86 inline void OrderAccess::release_store_ptr(volatile void* p, void* v) { *(void* volatile *)p = v; } | |
87 | |
88 inline void OrderAccess::store_fence(jbyte* p, jbyte v) { | |
89 #ifdef AMD64 | |
90 *p = v; fence(); | |
91 #else | |
92 __asm { | |
93 mov edx, p; | |
94 mov al, v; | |
95 xchg al, byte ptr [edx]; | |
96 } | |
97 #endif // AMD64 | |
98 } | |
99 | |
100 inline void OrderAccess::store_fence(jshort* p, jshort v) { | |
101 #ifdef AMD64 | |
102 *p = v; fence(); | |
103 #else | |
104 __asm { | |
105 mov edx, p; | |
106 mov ax, v; | |
107 xchg ax, word ptr [edx]; | |
108 } | |
109 #endif // AMD64 | |
110 } | |
111 | |
112 inline void OrderAccess::store_fence(jint* p, jint v) { | |
113 #ifdef AMD64 | |
114 *p = v; fence(); | |
115 #else | |
116 __asm { | |
117 mov edx, p; | |
118 mov eax, v; | |
119 xchg eax, dword ptr [edx]; | |
120 } | |
121 #endif // AMD64 | |
122 } | |
123 | |
124 inline void OrderAccess::store_fence(jlong* p, jlong v) { *p = v; fence(); } | |
125 inline void OrderAccess::store_fence(jubyte* p, jubyte v) { store_fence((jbyte*)p, (jbyte)v); } | |
126 inline void OrderAccess::store_fence(jushort* p, jushort v) { store_fence((jshort*)p, (jshort)v); } | |
127 inline void OrderAccess::store_fence(juint* p, juint v) { store_fence((jint*)p, (jint)v); } | |
128 inline void OrderAccess::store_fence(julong* p, julong v) { store_fence((jlong*)p, (jlong)v); } | |
129 inline void OrderAccess::store_fence(jfloat* p, jfloat v) { *p = v; fence(); } | |
130 inline void OrderAccess::store_fence(jdouble* p, jdouble v) { *p = v; fence(); } | |
131 | |
132 inline void OrderAccess::store_ptr_fence(intptr_t* p, intptr_t v) { | |
133 #ifdef AMD64 | |
134 *p = v; fence(); | |
135 #else | |
136 store_fence((jint*)p, (jint)v); | |
137 #endif // AMD64 | |
138 } | |
139 | |
140 inline void OrderAccess::store_ptr_fence(void** p, void* v) { | |
141 #ifdef AMD64 | |
142 *p = v; fence(); | |
143 #else | |
144 store_fence((jint*)p, (jint)v); | |
145 #endif // AMD64 | |
146 } | |
147 | |
148 // Must duplicate definitions instead of calling store_fence because we don't want to cast away volatile. | |
149 inline void OrderAccess::release_store_fence(volatile jbyte* p, jbyte v) { | |
150 #ifdef AMD64 | |
151 *p = v; fence(); | |
152 #else | |
153 __asm { | |
154 mov edx, p; | |
155 mov al, v; | |
156 xchg al, byte ptr [edx]; | |
157 } | |
158 #endif // AMD64 | |
159 } | |
160 | |
161 inline void OrderAccess::release_store_fence(volatile jshort* p, jshort v) { | |
162 #ifdef AMD64 | |
163 *p = v; fence(); | |
164 #else | |
165 __asm { | |
166 mov edx, p; | |
167 mov ax, v; | |
168 xchg ax, word ptr [edx]; | |
169 } | |
170 #endif // AMD64 | |
171 } | |
172 | |
173 inline void OrderAccess::release_store_fence(volatile jint* p, jint v) { | |
174 #ifdef AMD64 | |
175 *p = v; fence(); | |
176 #else | |
177 __asm { | |
178 mov edx, p; | |
179 mov eax, v; | |
180 xchg eax, dword ptr [edx]; | |
181 } | |
182 #endif // AMD64 | |
183 } | |
184 | |
185 inline void OrderAccess::release_store_fence(volatile jlong* p, jlong v) { *p = v; fence(); } | |
186 | |
187 inline void OrderAccess::release_store_fence(volatile jubyte* p, jubyte v) { release_store_fence((volatile jbyte*)p, (jbyte)v); } | |
188 inline void OrderAccess::release_store_fence(volatile jushort* p, jushort v) { release_store_fence((volatile jshort*)p, (jshort)v); } | |
189 inline void OrderAccess::release_store_fence(volatile juint* p, juint v) { release_store_fence((volatile jint*)p, (jint)v); } | |
190 inline void OrderAccess::release_store_fence(volatile julong* p, julong v) { release_store_fence((volatile jlong*)p, (jlong)v); } | |
191 inline void OrderAccess::release_store_fence(volatile jfloat* p, jfloat v) { *p = v; fence(); } | |
192 inline void OrderAccess::release_store_fence(volatile jdouble* p, jdouble v) { *p = v; fence(); } | |
193 | |
194 inline void OrderAccess::release_store_ptr_fence(volatile intptr_t* p, intptr_t v) { | |
195 #ifdef AMD64 | |
196 *p = v; fence(); | |
197 #else | |
198 release_store_fence((volatile jint*)p, (jint)v); | |
199 #endif // AMD64 | |
200 } | |
201 | |
202 inline void OrderAccess::release_store_ptr_fence(volatile void* p, void* v) { | |
203 #ifdef AMD64 | |
204 *(void* volatile *)p = v; fence(); | |
205 #else | |
206 release_store_fence((volatile jint*)p, (jint)v); | |
207 #endif // AMD64 | |
208 } | |
209 | |
210 #pragma warning(default: 4035) // Enables warnings reporting missing return statement |