Mercurial > hg > truffle
annotate src/cpu/x86/vm/assembler_x86.inline.hpp @ 18357:09550eb6ddfb
replace use of '==' with .equals()
author | Doug Simon <doug.simon@oracle.com> |
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date | Wed, 12 Nov 2014 15:33:20 +0100 |
parents | cd3d6a6b95d9 |
children | 90fb04cda7d6 |
rev | line source |
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0 | 1 /* |
1972 | 2 * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #ifndef CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP |
26 #define CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP | |
27 | |
28 #include "asm/assembler.inline.hpp" | |
29 #include "asm/codeBuffer.hpp" | |
30 #include "code/codeCache.hpp" | |
304 | 31 |
32 #ifndef _LP64 | |
33 inline int Assembler::prefix_and_encode(int reg_enc, bool byteinst) { return reg_enc; } | |
34 inline int Assembler::prefixq_and_encode(int reg_enc) { return reg_enc; } | |
35 | |
36 inline int Assembler::prefix_and_encode(int dst_enc, int src_enc, bool byteinst) { return dst_enc << 3 | src_enc; } | |
37 inline int Assembler::prefixq_and_encode(int dst_enc, int src_enc) { return dst_enc << 3 | src_enc; } | |
38 | |
39 inline void Assembler::prefix(Register reg) {} | |
40 inline void Assembler::prefix(Address adr) {} | |
41 inline void Assembler::prefixq(Address adr) {} | |
42 | |
43 inline void Assembler::prefix(Address adr, Register reg, bool byteinst) {} | |
44 inline void Assembler::prefixq(Address adr, Register reg) {} | |
45 | |
46 inline void Assembler::prefix(Address adr, XMMRegister reg) {} | |
4759 | 47 inline void Assembler::prefixq(Address adr, XMMRegister reg) {} |
304 | 48 #endif // _LP64 |
1972 | 49 |
50 #endif // CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP |