Mercurial > hg > truffle
annotate src/cpu/x86/vm/c1_Runtime1_x86.cpp @ 3509:28ba2439034f
recompile upon deoptimizations that are caused by runtime exceptions
author | Lukas Stadler <lukas.stadler@jku.at> |
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date | Mon, 08 Aug 2011 18:24:21 +0200 |
parents | 75a99b4f1c98 |
children | e4616e3d207b |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 1999, 2011, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
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26 #include "asm/assembler.hpp" |
1972 | 27 #include "c1/c1_Defs.hpp" |
28 #include "c1/c1_MacroAssembler.hpp" | |
29 #include "c1/c1_Runtime1.hpp" | |
30 #include "interpreter/interpreter.hpp" | |
31 #include "nativeInst_x86.hpp" | |
32 #include "oops/compiledICHolderOop.hpp" | |
33 #include "oops/oop.inline.hpp" | |
34 #include "prims/jvmtiExport.hpp" | |
35 #include "register_x86.hpp" | |
36 #include "runtime/sharedRuntime.hpp" | |
37 #include "runtime/signature.hpp" | |
38 #include "runtime/vframeArray.hpp" | |
39 #include "vmreg_x86.inline.hpp" | |
0 | 40 |
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41 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true); |
0 | 42 |
43 // Implementation of StubAssembler | |
44 | |
45 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, int args_size) { | |
46 // setup registers | |
304 | 47 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions) |
0 | 48 assert(!(oop_result1->is_valid() || oop_result2->is_valid()) || oop_result1 != oop_result2, "registers must be different"); |
49 assert(oop_result1 != thread && oop_result2 != thread, "registers must be different"); | |
50 assert(args_size >= 0, "illegal args_size"); | |
51 | |
304 | 52 #ifdef _LP64 |
53 mov(c_rarg0, thread); | |
54 set_num_rt_args(0); // Nothing on stack | |
55 #else | |
0 | 56 set_num_rt_args(1 + args_size); |
57 | |
58 // push java thread (becomes first argument of C function) | |
59 get_thread(thread); | |
304 | 60 push(thread); |
61 #endif // _LP64 | |
0 | 62 |
63 set_last_Java_frame(thread, noreg, rbp, NULL); | |
304 | 64 |
0 | 65 // do the call |
66 call(RuntimeAddress(entry)); | |
67 int call_offset = offset(); | |
68 // verify callee-saved register | |
69 #ifdef ASSERT | |
70 guarantee(thread != rax, "change this code"); | |
304 | 71 push(rax); |
0 | 72 { Label L; |
73 get_thread(rax); | |
304 | 74 cmpptr(thread, rax); |
0 | 75 jcc(Assembler::equal, L); |
76 int3(); | |
77 stop("StubAssembler::call_RT: rdi not callee saved?"); | |
78 bind(L); | |
79 } | |
304 | 80 pop(rax); |
0 | 81 #endif |
82 reset_last_Java_frame(thread, true, false); | |
83 | |
84 // discard thread and arguments | |
304 | 85 NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord)); |
0 | 86 |
87 // check for pending exceptions | |
88 { Label L; | |
304 | 89 cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 90 jcc(Assembler::equal, L); |
91 // exception pending => remove activation and forward to exception handler | |
304 | 92 movptr(rax, Address(thread, Thread::pending_exception_offset())); |
0 | 93 // make sure that the vm_results are cleared |
94 if (oop_result1->is_valid()) { | |
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95 movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
0 | 96 } |
97 if (oop_result2->is_valid()) { | |
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98 movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); |
0 | 99 } |
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100 // (tw) Deoptimize in case of an exception. |
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101 restore_live_registers(this, false); |
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102 movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); |
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103 leave(); |
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104 movl(rscratch1, 2); // InvalidateRecompile |
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105 jump(RuntimeAddress(SharedRuntime::deopt_blob()->uncommon_trap())); |
0 | 106 bind(L); |
107 } | |
108 // get oop results if there are any and reset the values in the thread | |
109 if (oop_result1->is_valid()) { | |
304 | 110 movptr(oop_result1, Address(thread, JavaThread::vm_result_offset())); |
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111 movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
0 | 112 verify_oop(oop_result1); |
113 } | |
114 if (oop_result2->is_valid()) { | |
304 | 115 movptr(oop_result2, Address(thread, JavaThread::vm_result_2_offset())); |
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116 movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); |
0 | 117 verify_oop(oop_result2); |
118 } | |
119 return call_offset; | |
120 } | |
121 | |
122 | |
123 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1) { | |
304 | 124 #ifdef _LP64 |
125 mov(c_rarg1, arg1); | |
126 #else | |
127 push(arg1); | |
128 #endif // _LP64 | |
0 | 129 return call_RT(oop_result1, oop_result2, entry, 1); |
130 } | |
131 | |
132 | |
133 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2) { | |
304 | 134 #ifdef _LP64 |
135 if (c_rarg1 == arg2) { | |
136 if (c_rarg2 == arg1) { | |
137 xchgq(arg1, arg2); | |
138 } else { | |
139 mov(c_rarg2, arg2); | |
140 mov(c_rarg1, arg1); | |
141 } | |
142 } else { | |
143 mov(c_rarg1, arg1); | |
144 mov(c_rarg2, arg2); | |
145 } | |
146 #else | |
147 push(arg2); | |
148 push(arg1); | |
149 #endif // _LP64 | |
0 | 150 return call_RT(oop_result1, oop_result2, entry, 2); |
151 } | |
152 | |
153 | |
154 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2, Register arg3) { | |
304 | 155 #ifdef _LP64 |
156 // if there is any conflict use the stack | |
157 if (arg1 == c_rarg2 || arg1 == c_rarg3 || | |
158 arg2 == c_rarg1 || arg1 == c_rarg3 || | |
159 arg3 == c_rarg1 || arg1 == c_rarg2) { | |
160 push(arg3); | |
161 push(arg2); | |
162 push(arg1); | |
163 pop(c_rarg1); | |
164 pop(c_rarg2); | |
165 pop(c_rarg3); | |
166 } else { | |
167 mov(c_rarg1, arg1); | |
168 mov(c_rarg2, arg2); | |
169 mov(c_rarg3, arg3); | |
170 } | |
171 #else | |
172 push(arg3); | |
173 push(arg2); | |
174 push(arg1); | |
175 #endif // _LP64 | |
0 | 176 return call_RT(oop_result1, oop_result2, entry, 3); |
177 } | |
178 | |
179 | |
180 // Implementation of StubFrame | |
181 | |
182 class StubFrame: public StackObj { | |
183 private: | |
184 StubAssembler* _sasm; | |
185 | |
186 public: | |
187 StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments); | |
188 void load_argument(int offset_in_words, Register reg); | |
189 | |
190 ~StubFrame(); | |
191 }; | |
192 | |
193 | |
194 #define __ _sasm-> | |
195 | |
196 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) { | |
197 _sasm = sasm; | |
198 __ set_info(name, must_gc_arguments); | |
199 __ enter(); | |
200 } | |
201 | |
202 // load parameters that were stored with LIR_Assembler::store_parameter | |
203 // Note: offsets for store_parameter and load_argument must match | |
204 void StubFrame::load_argument(int offset_in_words, Register reg) { | |
205 // rbp, + 0: link | |
206 // + 1: return address | |
207 // + 2: argument with offset 0 | |
208 // + 3: argument with offset 1 | |
209 // + 4: ... | |
210 | |
304 | 211 __ movptr(reg, Address(rbp, (offset_in_words + 2) * BytesPerWord)); |
0 | 212 } |
213 | |
214 | |
215 StubFrame::~StubFrame() { | |
216 __ leave(); | |
217 __ ret(0); | |
218 } | |
219 | |
220 #undef __ | |
221 | |
222 | |
223 // Implementation of Runtime1 | |
224 | |
225 #define __ sasm-> | |
226 | |
304 | 227 const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2; |
228 const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2; | |
0 | 229 |
230 // Stack layout for saving/restoring all the registers needed during a runtime | |
231 // call (this includes deoptimization) | |
232 // Note: note that users of this frame may well have arguments to some runtime | |
233 // while these values are on the stack. These positions neglect those arguments | |
234 // but the code in save_live_registers will take the argument count into | |
235 // account. | |
236 // | |
304 | 237 #ifdef _LP64 |
238 #define SLOT2(x) x, | |
239 #define SLOT_PER_WORD 2 | |
240 #else | |
241 #define SLOT2(x) | |
242 #define SLOT_PER_WORD 1 | |
243 #endif // _LP64 | |
244 | |
0 | 245 enum reg_save_layout { |
304 | 246 // 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that |
247 // happen and will assert if the stack size we create is misaligned | |
248 #ifdef _LP64 | |
249 align_dummy_0, align_dummy_1, | |
250 #endif // _LP64 | |
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251 #ifdef _WIN64 |
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252 // Windows always allocates space for it's argument registers (see |
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253 // frame::arg_reg_save_area_bytes). |
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254 arg_reg_save_1, arg_reg_save_1H, // 0, 4 |
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255 arg_reg_save_2, arg_reg_save_2H, // 8, 12 |
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256 arg_reg_save_3, arg_reg_save_3H, // 16, 20 |
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257 arg_reg_save_4, arg_reg_save_4H, // 24, 28 |
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258 #endif // _WIN64 |
304 | 259 xmm_regs_as_doubles_off, // 32 |
260 float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots, // 160 | |
261 fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots, // 224 | |
262 // fpu_state_end_off is exclusive | |
263 fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD), // 352 | |
264 marker = fpu_state_end_off, SLOT2(markerH) // 352, 356 | |
265 extra_space_offset, // 360 | |
266 #ifdef _LP64 | |
267 r15_off = extra_space_offset, r15H_off, // 360, 364 | |
268 r14_off, r14H_off, // 368, 372 | |
269 r13_off, r13H_off, // 376, 380 | |
270 r12_off, r12H_off, // 384, 388 | |
271 r11_off, r11H_off, // 392, 396 | |
272 r10_off, r10H_off, // 400, 404 | |
273 r9_off, r9H_off, // 408, 412 | |
274 r8_off, r8H_off, // 416, 420 | |
275 rdi_off, rdiH_off, // 424, 428 | |
276 #else | |
0 | 277 rdi_off = extra_space_offset, |
304 | 278 #endif // _LP64 |
279 rsi_off, SLOT2(rsiH_off) // 432, 436 | |
280 rbp_off, SLOT2(rbpH_off) // 440, 444 | |
281 rsp_off, SLOT2(rspH_off) // 448, 452 | |
282 rbx_off, SLOT2(rbxH_off) // 456, 460 | |
283 rdx_off, SLOT2(rdxH_off) // 464, 468 | |
284 rcx_off, SLOT2(rcxH_off) // 472, 476 | |
285 rax_off, SLOT2(raxH_off) // 480, 484 | |
286 saved_rbp_off, SLOT2(saved_rbpH_off) // 488, 492 | |
287 return_off, SLOT2(returnH_off) // 496, 500 | |
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288 reg_save_frame_size // As noted: neglects any parameters to runtime // 504 |
0 | 289 }; |
290 | |
291 | |
292 | |
293 // Save off registers which might be killed by calls into the runtime. | |
294 // Tries to smart of about FP registers. In particular we separate | |
295 // saving and describing the FPU registers for deoptimization since we | |
296 // have to save the FPU registers twice if we describe them and on P4 | |
297 // saving FPU registers which don't contain anything appears | |
298 // expensive. The deopt blob is the only thing which needs to | |
299 // describe FPU registers. In all other cases it should be sufficient | |
300 // to simply save their current value. | |
301 | |
302 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args, | |
303 bool save_fpu_registers = true) { | |
304 | 304 |
305 // In 64bit all the args are in regs so there are no additional stack slots | |
306 LP64_ONLY(num_rt_args = 0); | |
307 LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");) | |
308 int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread | |
309 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word ); | |
0 | 310 |
311 // record saved value locations in an OopMap | |
312 // locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread | |
304 | 313 OopMap* map = new OopMap(frame_size_in_slots, 0); |
0 | 314 map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg()); |
315 map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg()); | |
316 map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg()); | |
317 map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg()); | |
318 map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg()); | |
319 map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg()); | |
304 | 320 #ifdef _LP64 |
321 map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args), r8->as_VMReg()); | |
322 map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args), r9->as_VMReg()); | |
323 map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg()); | |
324 map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg()); | |
325 map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg()); | |
326 map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg()); | |
327 map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg()); | |
328 map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg()); | |
329 | |
330 // This is stupid but needed. | |
331 map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next()); | |
332 map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next()); | |
333 map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next()); | |
334 map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next()); | |
335 map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next()); | |
336 map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next()); | |
337 | |
338 map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args), r8->as_VMReg()->next()); | |
339 map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args), r9->as_VMReg()->next()); | |
340 map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next()); | |
341 map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next()); | |
342 map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next()); | |
343 map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next()); | |
344 map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next()); | |
345 map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next()); | |
346 #endif // _LP64 | |
0 | 347 |
348 if (save_fpu_registers) { | |
349 if (UseSSE < 2) { | |
350 int fpu_off = float_regs_as_doubles_off; | |
351 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) { | |
352 VMReg fpu_name_0 = FrameMap::fpu_regname(n); | |
353 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + num_rt_args), fpu_name_0); | |
354 // %%% This is really a waste but we'll keep things as they were for now | |
355 if (true) { | |
356 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next()); | |
357 } | |
358 fpu_off += 2; | |
359 } | |
360 assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots"); | |
361 } | |
362 | |
363 if (UseSSE >= 2) { | |
364 int xmm_off = xmm_regs_as_doubles_off; | |
365 for (int n = 0; n < FrameMap::nof_xmm_regs; n++) { | |
366 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg(); | |
367 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0); | |
368 // %%% This is really a waste but we'll keep things as they were for now | |
369 if (true) { | |
370 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next()); | |
371 } | |
372 xmm_off += 2; | |
373 } | |
374 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers"); | |
375 | |
376 } else if (UseSSE == 1) { | |
377 int xmm_off = xmm_regs_as_doubles_off; | |
378 for (int n = 0; n < FrameMap::nof_xmm_regs; n++) { | |
379 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg(); | |
380 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0); | |
381 xmm_off += 2; | |
382 } | |
383 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers"); | |
384 } | |
385 } | |
386 | |
387 return map; | |
388 } | |
389 | |
390 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args, | |
391 bool save_fpu_registers = true) { | |
392 __ block_comment("save_live_registers"); | |
393 | |
304 | 394 __ pusha(); // integer registers |
0 | 395 |
396 // assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset"); | |
397 // assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset"); | |
398 | |
304 | 399 __ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size); |
0 | 400 |
401 #ifdef ASSERT | |
304 | 402 __ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef); |
0 | 403 #endif |
404 | |
405 if (save_fpu_registers) { | |
406 if (UseSSE < 2) { | |
407 // save FPU stack | |
304 | 408 __ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); |
0 | 409 __ fwait(); |
410 | |
411 #ifdef ASSERT | |
412 Label ok; | |
304 | 413 __ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std()); |
0 | 414 __ jccb(Assembler::equal, ok); |
415 __ stop("corrupted control word detected"); | |
416 __ bind(ok); | |
417 #endif | |
418 | |
419 // Reset the control word to guard against exceptions being unmasked | |
420 // since fstp_d can cause FPU stack underflow exceptions. Write it | |
421 // into the on stack copy and then reload that to make sure that the | |
422 // current and future values are correct. | |
304 | 423 __ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std()); |
424 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); | |
0 | 425 |
426 // Save the FPU registers in de-opt-able form | |
304 | 427 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); |
428 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); | |
429 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); | |
430 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); | |
431 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); | |
432 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); | |
433 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); | |
434 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); | |
0 | 435 } |
436 | |
437 if (UseSSE >= 2) { | |
438 // save XMM registers | |
439 // XMM registers can contain float or double values, but this is not known here, | |
440 // so always save them as doubles. | |
441 // note that float values are _not_ converted automatically, so for float values | |
442 // the second word contains only garbage data. | |
304 | 443 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0); |
444 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1); | |
445 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2); | |
446 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3); | |
447 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4); | |
448 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5); | |
449 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6); | |
450 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7); | |
451 #ifdef _LP64 | |
452 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64), xmm8); | |
453 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72), xmm9); | |
454 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80), xmm10); | |
455 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88), xmm11); | |
456 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96), xmm12); | |
457 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104), xmm13); | |
458 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112), xmm14); | |
459 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120), xmm15); | |
460 #endif // _LP64 | |
0 | 461 } else if (UseSSE == 1) { |
462 // save XMM registers as float because double not supported without SSE2 | |
304 | 463 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0); |
464 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1); | |
465 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2); | |
466 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3); | |
467 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4); | |
468 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5); | |
469 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6); | |
470 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7); | |
0 | 471 } |
472 } | |
473 | |
474 // FPU stack must be empty now | |
475 __ verify_FPU(0, "save_live_registers"); | |
476 | |
477 return generate_oop_map(sasm, num_rt_args, save_fpu_registers); | |
478 } | |
479 | |
480 | |
481 static void restore_fpu(StubAssembler* sasm, bool restore_fpu_registers = true) { | |
482 if (restore_fpu_registers) { | |
483 if (UseSSE >= 2) { | |
484 // restore XMM registers | |
304 | 485 __ movdbl(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); |
486 __ movdbl(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); | |
487 __ movdbl(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); | |
488 __ movdbl(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); | |
489 __ movdbl(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); | |
490 __ movdbl(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); | |
491 __ movdbl(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); | |
492 __ movdbl(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); | |
493 #ifdef _LP64 | |
494 __ movdbl(xmm8, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64)); | |
495 __ movdbl(xmm9, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72)); | |
496 __ movdbl(xmm10, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80)); | |
497 __ movdbl(xmm11, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88)); | |
498 __ movdbl(xmm12, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96)); | |
499 __ movdbl(xmm13, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104)); | |
500 __ movdbl(xmm14, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112)); | |
501 __ movdbl(xmm15, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120)); | |
502 #endif // _LP64 | |
0 | 503 } else if (UseSSE == 1) { |
504 // restore XMM registers | |
304 | 505 __ movflt(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); |
506 __ movflt(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); | |
507 __ movflt(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); | |
508 __ movflt(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); | |
509 __ movflt(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); | |
510 __ movflt(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); | |
511 __ movflt(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); | |
512 __ movflt(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); | |
0 | 513 } |
514 | |
515 if (UseSSE < 2) { | |
304 | 516 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); |
0 | 517 } else { |
518 // check that FPU stack is really empty | |
519 __ verify_FPU(0, "restore_live_registers"); | |
520 } | |
521 | |
522 } else { | |
523 // check that FPU stack is really empty | |
524 __ verify_FPU(0, "restore_live_registers"); | |
525 } | |
526 | |
527 #ifdef ASSERT | |
528 { | |
529 Label ok; | |
304 | 530 __ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef); |
0 | 531 __ jcc(Assembler::equal, ok); |
532 __ stop("bad offsets in frame"); | |
533 __ bind(ok); | |
534 } | |
304 | 535 #endif // ASSERT |
0 | 536 |
304 | 537 __ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size); |
0 | 538 } |
539 | |
540 | |
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541 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers/* = true*/) { |
0 | 542 __ block_comment("restore_live_registers"); |
543 | |
544 restore_fpu(sasm, restore_fpu_registers); | |
304 | 545 __ popa(); |
0 | 546 } |
547 | |
548 | |
549 static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) { | |
550 __ block_comment("restore_live_registers_except_rax"); | |
551 | |
552 restore_fpu(sasm, restore_fpu_registers); | |
553 | |
304 | 554 #ifdef _LP64 |
555 __ movptr(r15, Address(rsp, 0)); | |
556 __ movptr(r14, Address(rsp, wordSize)); | |
557 __ movptr(r13, Address(rsp, 2 * wordSize)); | |
558 __ movptr(r12, Address(rsp, 3 * wordSize)); | |
559 __ movptr(r11, Address(rsp, 4 * wordSize)); | |
560 __ movptr(r10, Address(rsp, 5 * wordSize)); | |
561 __ movptr(r9, Address(rsp, 6 * wordSize)); | |
562 __ movptr(r8, Address(rsp, 7 * wordSize)); | |
563 __ movptr(rdi, Address(rsp, 8 * wordSize)); | |
564 __ movptr(rsi, Address(rsp, 9 * wordSize)); | |
565 __ movptr(rbp, Address(rsp, 10 * wordSize)); | |
566 // skip rsp | |
567 __ movptr(rbx, Address(rsp, 12 * wordSize)); | |
568 __ movptr(rdx, Address(rsp, 13 * wordSize)); | |
569 __ movptr(rcx, Address(rsp, 14 * wordSize)); | |
570 | |
571 __ addptr(rsp, 16 * wordSize); | |
572 #else | |
573 | |
574 __ pop(rdi); | |
575 __ pop(rsi); | |
576 __ pop(rbp); | |
577 __ pop(rbx); // skip this value | |
578 __ pop(rbx); | |
579 __ pop(rdx); | |
580 __ pop(rcx); | |
581 __ addptr(rsp, BytesPerWord); | |
582 #endif // _LP64 | |
0 | 583 } |
584 | |
585 | |
586 void Runtime1::initialize_pd() { | |
587 // nothing to do | |
588 } | |
589 | |
590 | |
591 // target: the entry point of the method that creates and posts the exception oop | |
592 // has_argument: true if the exception needs an argument (passed on stack because registers must be preserved) | |
593 | |
594 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) { | |
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595 OopMapSet* oop_maps = new OopMapSet(); |
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596 if (UseGraal) { |
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597 // graal passes the argument in r10 |
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598 OopMap* oop_map = save_live_registers(sasm, 1); |
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599 |
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600 // now all registers are saved and can be used freely |
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601 // verify that no old value is used accidentally |
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602 __ invalidate_registers(true, true, true, true, true, true); |
0 | 603 |
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604 // registers used by this stub |
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605 const Register temp_reg = rbx; |
0 | 606 |
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607 // load argument for exception that is passed as an argument into the stub |
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608 if (has_argument) { |
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609 __ movptr(c_rarg1, r10); |
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610 } |
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611 int call_offset = __ call_RT(noreg, noreg, target, has_argument ? 1 : 0); |
0 | 612 |
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613 oop_maps->add_gc_map(call_offset, oop_map); |
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614 } else { |
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615 // preserve all registers |
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616 int num_rt_args = has_argument ? 2 : 1; |
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617 OopMap* oop_map = save_live_registers(sasm, num_rt_args); |
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618 |
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619 // now all registers are saved and can be used freely |
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620 // verify that no old value is used accidentally |
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621 __ invalidate_registers(true, true, true, true, true, true); |
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622 |
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623 // registers used by this stub |
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624 const Register temp_reg = rbx; |
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625 |
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626 // load argument for exception that is passed as an argument into the stub |
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627 if (has_argument) { |
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628 #ifdef _LP64 |
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629 __ movptr(c_rarg1, Address(rbp, 2*BytesPerWord)); |
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630 #else |
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631 __ movptr(temp_reg, Address(rbp, 2*BytesPerWord)); |
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632 __ push(temp_reg); |
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633 #endif // _LP64 |
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634 } |
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635 int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1); |
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636 |
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637 oop_maps->add_gc_map(call_offset, oop_map); |
0 | 638 } |
639 | |
640 __ stop("should not reach here"); | |
641 | |
642 return oop_maps; | |
643 } | |
644 | |
645 | |
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646 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) { |
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647 __ block_comment("generate_handle_exception"); |
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648 |
0 | 649 // incoming parameters |
650 const Register exception_oop = rax; | |
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651 const Register exception_pc = rdx; |
0 | 652 // other registers used in this stub |
304 | 653 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); |
0 | 654 |
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655 // Save registers, if required. |
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656 OopMapSet* oop_maps = new OopMapSet(); |
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657 OopMap* oop_map = NULL; |
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658 switch (id) { |
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659 case forward_exception_id: |
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660 // We're handling an exception in the context of a compiled frame. |
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661 // The registers have been saved in the standard places. Perform |
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662 // an exception lookup in the caller and dispatch to the handler |
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663 // if found. Otherwise unwind and dispatch to the callers |
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664 // exception handler. |
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665 oop_map = generate_oop_map(sasm, 1 /*thread*/); |
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666 |
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667 // load and clear pending exception oop into RAX |
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668 __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset())); |
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669 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); |
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670 |
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671 // load issuing PC (the return address for this stub) into rdx |
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672 __ movptr(exception_pc, Address(rbp, 1*BytesPerWord)); |
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673 |
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674 // make sure that the vm_results are cleared (may be unnecessary) |
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675 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
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676 __ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); |
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677 break; |
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678 case handle_exception_nofpu_id: |
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679 case handle_exception_id: |
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680 // At this point all registers MAY be live. |
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681 oop_map = save_live_registers(sasm, 1 /*thread*/, id == handle_exception_nofpu_id); |
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682 break; |
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683 case handle_exception_from_callee_id: { |
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684 // At this point all registers except exception oop (RAX) and |
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685 // exception pc (RDX) are dead. |
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686 const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/) WIN64_ONLY(+ frame::arg_reg_save_area_bytes / BytesPerWord); |
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687 oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0); |
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688 sasm->set_frame_size(frame_size); |
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689 WIN64_ONLY(__ subq(rsp, frame::arg_reg_save_area_bytes)); |
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690 break; |
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691 } |
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692 default: ShouldNotReachHere(); |
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693 } |
0 | 694 |
695 #ifdef TIERED | |
696 // C2 can leave the fpu stack dirty | |
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697 if (UseSSE < 2) { |
0 | 698 __ empty_FPU_stack(); |
699 } | |
700 #endif // TIERED | |
701 | |
702 // verify that only rax, and rdx is valid at this time | |
703 __ invalidate_registers(false, true, true, false, true, true); | |
704 // verify that rax, contains a valid exception | |
705 __ verify_not_null_oop(exception_oop); | |
706 | |
707 // load address of JavaThread object for thread-local data | |
304 | 708 NOT_LP64(__ get_thread(thread);) |
0 | 709 |
710 #ifdef ASSERT | |
711 // check that fields in JavaThread for exception oop and issuing pc are | |
712 // empty before writing to them | |
713 Label oop_empty; | |
304 | 714 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD); |
0 | 715 __ jcc(Assembler::equal, oop_empty); |
716 __ stop("exception oop already set"); | |
717 __ bind(oop_empty); | |
718 | |
719 Label pc_empty; | |
304 | 720 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); |
0 | 721 __ jcc(Assembler::equal, pc_empty); |
722 __ stop("exception pc already set"); | |
723 __ bind(pc_empty); | |
724 #endif | |
725 | |
726 // save exception oop and issuing pc into JavaThread | |
727 // (exception handler will load it from here) | |
304 | 728 __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop); |
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729 __ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc); |
0 | 730 |
731 // patch throwing pc into return address (has bci & oop map) | |
304 | 732 __ movptr(Address(rbp, 1*BytesPerWord), exception_pc); |
0 | 733 |
734 // compute the exception handler. | |
735 // the exception oop and the throwing pc are read from the fields in JavaThread | |
736 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc)); | |
737 oop_maps->add_gc_map(call_offset, oop_map); | |
738 | |
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739 // rax: handler address |
0 | 740 // will be the deopt blob if nmethod was deoptimized while we looked up |
741 // handler regardless of whether handler existed in the nmethod. | |
742 | |
743 // only rax, is valid at this time, all other registers have been destroyed by the runtime call | |
744 __ invalidate_registers(false, true, true, true, true, true); | |
745 | |
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746 // patch the return address, this stub will directly return to the exception handler |
304 | 747 __ movptr(Address(rbp, 1*BytesPerWord), rax); |
0 | 748 |
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749 switch (id) { |
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750 case forward_exception_id: |
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751 case handle_exception_nofpu_id: |
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752 case handle_exception_id: |
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753 // Restore the registers that were saved at the beginning. |
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754 restore_live_registers(sasm, id == handle_exception_nofpu_id); |
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755 break; |
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756 case handle_exception_from_callee_id: |
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757 // WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP |
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758 // since we do a leave anyway. |
0 | 759 |
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760 // Pop the return address since we are possibly changing SP (restoring from BP). |
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761 __ leave(); |
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762 __ pop(rcx); |
0 | 763 |
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764 // Restore SP from BP if the exception PC is a method handle call site. |
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765 NOT_LP64(__ get_thread(thread);) |
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766 __ cmpl(Address(thread, JavaThread::is_method_handle_return_offset()), 0); |
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767 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
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768 __ jmp(rcx); // jump to exception handler |
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769 break; |
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770 default: ShouldNotReachHere(); |
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771 } |
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772 |
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773 return oop_maps; |
0 | 774 } |
775 | |
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776 void Runtime1::graal_generate_handle_exception(StubAssembler *sasm, OopMapSet* oop_maps, OopMap* oop_map) { |
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777 NOT_LP64(fatal("64 bit only")); |
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778 // incoming parameters |
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779 const Register exception_oop = j_rarg0; |
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780 // other registers used in this stub |
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781 const Register exception_pc = j_rarg1; |
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782 const Register thread = r15_thread; |
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783 |
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784 __ block_comment("graal_generate_handle_exception"); |
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785 |
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786 // verify that rax, contains a valid exception |
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787 __ verify_not_null_oop(exception_oop); |
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788 |
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789 #ifdef ASSERT |
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790 // check that fields in JavaThread for exception oop and issuing pc are |
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791 // empty before writing to them |
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792 Label oop_empty; |
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793 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD); |
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794 __ jcc(Assembler::equal, oop_empty); |
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795 __ stop("exception oop already set"); |
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796 __ bind(oop_empty); |
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797 |
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798 Label pc_empty; |
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799 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); |
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800 __ jcc(Assembler::equal, pc_empty); |
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801 __ stop("exception pc already set"); |
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802 __ bind(pc_empty); |
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803 #endif |
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804 |
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805 // save exception oop and issuing pc into JavaThread |
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806 // (exception handler will load it from here) |
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807 __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop); |
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808 __ movptr(exception_pc, Address(rbp, 1*BytesPerWord)); |
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809 __ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc); |
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810 |
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811 // compute the exception handler. |
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812 // the exception oop and the throwing pc are read from the fields in JavaThread |
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813 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc)); |
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814 oop_maps->add_gc_map(call_offset, oop_map); |
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815 |
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816 // rax,: handler address |
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817 // will be the deopt blob if nmethod was deoptimized while we looked up |
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818 // handler regardless of whether handler existed in the nmethod. |
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819 |
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820 // only rax, is valid at this time, all other registers have been destroyed by the runtime call |
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821 __ invalidate_registers(false, true, true, true, true, true); |
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822 |
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823 #ifdef ASSERT |
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824 // Do we have an exception handler in the nmethod? |
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825 Label done; |
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826 __ testptr(rax, rax); |
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827 __ jcc(Assembler::notZero, done); |
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828 __ stop("no handler found"); |
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829 __ bind(done); |
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830 #endif |
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831 |
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832 // exception handler found |
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833 // patch the return address -> the stub will directly return to the exception handler |
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834 __ movptr(Address(rbp, 1*BytesPerWord), rax); |
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835 |
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836 // restore registers |
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837 restore_live_registers(sasm, false); |
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838 |
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839 // return to exception handler |
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840 __ leave(); |
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841 __ ret(0); |
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842 } |
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843 |
0 | 844 |
845 void Runtime1::generate_unwind_exception(StubAssembler *sasm) { | |
846 // incoming parameters | |
847 const Register exception_oop = rax; | |
1295 | 848 // callee-saved copy of exception_oop during runtime call |
849 const Register exception_oop_callee_saved = NOT_LP64(rsi) LP64_ONLY(r14); | |
0 | 850 // other registers used in this stub |
851 const Register exception_pc = rdx; | |
852 const Register handler_addr = rbx; | |
304 | 853 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); |
0 | 854 |
855 // verify that only rax, is valid at this time | |
856 __ invalidate_registers(false, true, true, true, true, true); | |
857 | |
858 #ifdef ASSERT | |
859 // check that fields in JavaThread for exception oop and issuing pc are empty | |
304 | 860 NOT_LP64(__ get_thread(thread);) |
0 | 861 Label oop_empty; |
304 | 862 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0); |
0 | 863 __ jcc(Assembler::equal, oop_empty); |
864 __ stop("exception oop must be empty"); | |
865 __ bind(oop_empty); | |
866 | |
867 Label pc_empty; | |
304 | 868 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); |
0 | 869 __ jcc(Assembler::equal, pc_empty); |
870 __ stop("exception pc must be empty"); | |
871 __ bind(pc_empty); | |
872 #endif | |
873 | |
874 // clear the FPU stack in case any FPU results are left behind | |
875 __ empty_FPU_stack(); | |
876 | |
1295 | 877 // save exception_oop in callee-saved register to preserve it during runtime calls |
878 __ verify_not_null_oop(exception_oop); | |
879 __ movptr(exception_oop_callee_saved, exception_oop); | |
880 | |
881 NOT_LP64(__ get_thread(thread);) | |
882 // Get return address (is on top of stack after leave). | |
304 | 883 __ movptr(exception_pc, Address(rsp, 0)); |
0 | 884 |
1295 | 885 // search the exception handler address of the caller (using the return address) |
886 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc); | |
887 // rax: exception handler address of the caller | |
0 | 888 |
1295 | 889 // Only RAX and RSI are valid at this time, all other registers have been destroyed by the call. |
890 __ invalidate_registers(false, true, true, true, false, true); | |
0 | 891 |
892 // move result of call into correct register | |
304 | 893 __ movptr(handler_addr, rax); |
0 | 894 |
1295 | 895 // Restore exception oop to RAX (required convention of exception handler). |
896 __ movptr(exception_oop, exception_oop_callee_saved); | |
0 | 897 |
1295 | 898 // verify that there is really a valid exception in rax |
899 __ verify_not_null_oop(exception_oop); | |
0 | 900 |
901 // get throwing pc (= return address). | |
902 // rdx has been destroyed by the call, so it must be set again | |
903 // the pop is also necessary to simulate the effect of a ret(0) | |
304 | 904 __ pop(exception_pc); |
0 | 905 |
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906 // Restore SP from BP if the exception PC is a method handle call site. |
1295 | 907 NOT_LP64(__ get_thread(thread);) |
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908 __ cmpl(Address(thread, JavaThread::is_method_handle_return_offset()), 0); |
1564 | 909 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
0 | 910 |
911 // continue at exception handler (return address removed) | |
912 // note: do *not* remove arguments when unwinding the | |
913 // activation since the caller assumes having | |
914 // all arguments on the stack when entering the | |
915 // runtime to determine the exception handler | |
916 // (GC happens at call site with arguments!) | |
1295 | 917 // rax: exception oop |
0 | 918 // rdx: throwing pc |
1295 | 919 // rbx: exception handler |
0 | 920 __ jmp(handler_addr); |
921 } | |
922 | |
923 | |
924 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) { | |
925 // use the maximum number of runtime-arguments here because it is difficult to | |
926 // distinguish each RT-Call. | |
927 // Note: This number affects also the RT-Call in generate_handle_exception because | |
928 // the oop-map is shared for all calls. | |
929 const int num_rt_args = 2; // thread + dummy | |
930 | |
931 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob(); | |
932 assert(deopt_blob != NULL, "deoptimization blob must have been created"); | |
933 | |
934 OopMap* oop_map = save_live_registers(sasm, num_rt_args); | |
935 | |
304 | 936 #ifdef _LP64 |
937 const Register thread = r15_thread; | |
938 // No need to worry about dummy | |
939 __ mov(c_rarg0, thread); | |
940 #else | |
941 __ push(rax); // push dummy | |
0 | 942 |
943 const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions) | |
944 // push java thread (becomes first argument of C function) | |
945 __ get_thread(thread); | |
304 | 946 __ push(thread); |
947 #endif // _LP64 | |
0 | 948 __ set_last_Java_frame(thread, noreg, rbp, NULL); |
949 // do the call | |
950 __ call(RuntimeAddress(target)); | |
951 OopMapSet* oop_maps = new OopMapSet(); | |
952 oop_maps->add_gc_map(__ offset(), oop_map); | |
953 // verify callee-saved register | |
954 #ifdef ASSERT | |
955 guarantee(thread != rax, "change this code"); | |
304 | 956 __ push(rax); |
0 | 957 { Label L; |
958 __ get_thread(rax); | |
304 | 959 __ cmpptr(thread, rax); |
0 | 960 __ jcc(Assembler::equal, L); |
304 | 961 __ stop("StubAssembler::call_RT: rdi/r15 not callee saved?"); |
0 | 962 __ bind(L); |
963 } | |
304 | 964 __ pop(rax); |
0 | 965 #endif |
966 __ reset_last_Java_frame(thread, true, false); | |
304 | 967 #ifndef _LP64 |
968 __ pop(rcx); // discard thread arg | |
969 __ pop(rcx); // discard dummy | |
970 #endif // _LP64 | |
0 | 971 |
972 // check for pending exceptions | |
973 { Label L; | |
304 | 974 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 975 __ jcc(Assembler::equal, L); |
976 // exception pending => remove activation and forward to exception handler | |
977 | |
304 | 978 __ testptr(rax, rax); // have we deoptimized? |
0 | 979 __ jump_cc(Assembler::equal, |
980 RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id))); | |
981 | |
982 // the deopt blob expects exceptions in the special fields of | |
983 // JavaThread, so copy and clear pending exception. | |
984 | |
985 // load and clear pending exception | |
304 | 986 __ movptr(rax, Address(thread, Thread::pending_exception_offset())); |
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987 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); |
0 | 988 |
989 // check that there is really a valid exception | |
990 __ verify_not_null_oop(rax); | |
991 | |
992 // load throwing pc: this is the return address of the stub | |
304 | 993 __ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size)); |
0 | 994 |
995 #ifdef ASSERT | |
996 // check that fields in JavaThread for exception oop and issuing pc are empty | |
997 Label oop_empty; | |
304 | 998 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); |
0 | 999 __ jcc(Assembler::equal, oop_empty); |
1000 __ stop("exception oop must be empty"); | |
1001 __ bind(oop_empty); | |
1002 | |
1003 Label pc_empty; | |
304 | 1004 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); |
0 | 1005 __ jcc(Assembler::equal, pc_empty); |
1006 __ stop("exception pc must be empty"); | |
1007 __ bind(pc_empty); | |
1008 #endif | |
1009 | |
1010 // store exception oop and throwing pc to JavaThread | |
304 | 1011 __ movptr(Address(thread, JavaThread::exception_oop_offset()), rax); |
1012 __ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx); | |
0 | 1013 |
1014 restore_live_registers(sasm); | |
1015 | |
1016 __ leave(); | |
304 | 1017 __ addptr(rsp, BytesPerWord); // remove return address from stack |
0 | 1018 |
1019 // Forward the exception directly to deopt blob. We can blow no | |
1020 // registers and must leave throwing pc on the stack. A patch may | |
1021 // have values live in registers so the entry point with the | |
1022 // exception in tls. | |
1023 __ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls())); | |
1024 | |
1025 __ bind(L); | |
1026 } | |
1027 | |
1028 | |
1029 // Runtime will return true if the nmethod has been deoptimized during | |
1030 // the patching process. In that case we must do a deopt reexecute instead. | |
1031 | |
1032 Label reexecuteEntry, cont; | |
1033 | |
304 | 1034 __ testptr(rax, rax); // have we deoptimized? |
0 | 1035 __ jcc(Assembler::equal, cont); // no |
1036 | |
1037 // Will reexecute. Proper return address is already on the stack we just restore | |
1038 // registers, pop all of our frame but the return address and jump to the deopt blob | |
1039 restore_live_registers(sasm); | |
1040 __ leave(); | |
1041 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution())); | |
1042 | |
1043 __ bind(cont); | |
1044 restore_live_registers(sasm); | |
1045 __ leave(); | |
1046 __ ret(0); | |
1047 | |
1048 return oop_maps; | |
1049 } | |
1050 | |
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1051 JRT_ENTRY(void, graal_create_null_exception(JavaThread* thread)) |
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1052 thread->set_vm_result(Exceptions::new_exception(thread, vmSymbols::java_lang_NullPointerException(), NULL)()); |
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1053 JRT_END |
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1056 |
0 | 1057 |
1058 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) { | |
1059 | |
1060 // for better readability | |
1061 const bool must_gc_arguments = true; | |
1062 const bool dont_gc_arguments = false; | |
1063 | |
1064 // default value; overwritten for some optimized stubs that are called from methods that do not use the fpu | |
1065 bool save_fpu_registers = true; | |
1066 | |
1067 // stub code & info for the different stubs | |
1068 OopMapSet* oop_maps = NULL; | |
1069 switch (id) { | |
1070 case forward_exception_id: | |
1071 { | |
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1072 oop_maps = generate_handle_exception(id, sasm); |
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1073 __ leave(); |
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1074 __ ret(0); |
0 | 1075 } |
1076 break; | |
1077 | |
1078 case new_instance_id: | |
1079 case fast_new_instance_id: | |
1080 case fast_new_instance_init_check_id: | |
1081 { | |
1082 Register klass = rdx; // Incoming | |
1083 Register obj = rax; // Result | |
1084 | |
1085 if (id == new_instance_id) { | |
1086 __ set_info("new_instance", dont_gc_arguments); | |
1087 } else if (id == fast_new_instance_id) { | |
1088 __ set_info("fast new_instance", dont_gc_arguments); | |
1089 } else { | |
1090 assert(id == fast_new_instance_init_check_id, "bad StubID"); | |
1091 __ set_info("fast new_instance init check", dont_gc_arguments); | |
1092 } | |
1093 | |
1094 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) && | |
1095 UseTLAB && FastTLABRefill) { | |
1096 Label slow_path; | |
1097 Register obj_size = rcx; | |
1098 Register t1 = rbx; | |
1099 Register t2 = rsi; | |
1100 assert_different_registers(klass, obj, obj_size, t1, t2); | |
1101 | |
304 | 1102 __ push(rdi); |
1103 __ push(rbx); | |
0 | 1104 |
1105 if (id == fast_new_instance_init_check_id) { | |
1106 // make sure the klass is initialized | |
1107 __ cmpl(Address(klass, instanceKlass::init_state_offset_in_bytes() + sizeof(oopDesc)), instanceKlass::fully_initialized); | |
1108 __ jcc(Assembler::notEqual, slow_path); | |
1109 } | |
1110 | |
1111 #ifdef ASSERT | |
1112 // assert object can be fast path allocated | |
1113 { | |
1114 Label ok, not_ok; | |
1115 __ movl(obj_size, Address(klass, Klass::layout_helper_offset_in_bytes() + sizeof(oopDesc))); | |
1116 __ cmpl(obj_size, 0); // make sure it's an instance (LH > 0) | |
1117 __ jcc(Assembler::lessEqual, not_ok); | |
1118 __ testl(obj_size, Klass::_lh_instance_slow_path_bit); | |
1119 __ jcc(Assembler::zero, ok); | |
1120 __ bind(not_ok); | |
1121 __ stop("assert(can be fast path allocated)"); | |
1122 __ should_not_reach_here(); | |
1123 __ bind(ok); | |
1124 } | |
1125 #endif // ASSERT | |
1126 | |
1127 // if we got here then the TLAB allocation failed, so try | |
1128 // refilling the TLAB or allocating directly from eden. | |
1129 Label retry_tlab, try_eden; | |
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1130 const Register thread = |
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1131 __ tlab_refill(retry_tlab, try_eden, slow_path); // does not destroy rdx (klass), returns rdi |
0 | 1132 |
1133 __ bind(retry_tlab); | |
1134 | |
304 | 1135 // get the instance size (size is postive so movl is fine for 64bit) |
0 | 1136 __ movl(obj_size, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); |
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1137 |
0 | 1138 __ tlab_allocate(obj, obj_size, 0, t1, t2, slow_path); |
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1139 |
0 | 1140 __ initialize_object(obj, klass, obj_size, 0, t1, t2); |
1141 __ verify_oop(obj); | |
304 | 1142 __ pop(rbx); |
1143 __ pop(rdi); | |
0 | 1144 __ ret(0); |
1145 | |
1146 __ bind(try_eden); | |
304 | 1147 // get the instance size (size is postive so movl is fine for 64bit) |
0 | 1148 __ movl(obj_size, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); |
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1149 |
0 | 1150 __ eden_allocate(obj, obj_size, 0, t1, slow_path); |
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1151 __ incr_allocated_bytes(thread, obj_size, 0); |
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1152 |
0 | 1153 __ initialize_object(obj, klass, obj_size, 0, t1, t2); |
1154 __ verify_oop(obj); | |
304 | 1155 __ pop(rbx); |
1156 __ pop(rdi); | |
0 | 1157 __ ret(0); |
1158 | |
1159 __ bind(slow_path); | |
304 | 1160 __ pop(rbx); |
1161 __ pop(rdi); | |
0 | 1162 } |
1163 | |
1164 __ enter(); | |
1165 OopMap* map = save_live_registers(sasm, 2); | |
1166 int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass); | |
1167 oop_maps = new OopMapSet(); | |
1168 oop_maps->add_gc_map(call_offset, map); | |
1169 restore_live_registers_except_rax(sasm); | |
1170 __ verify_oop(obj); | |
1171 __ leave(); | |
1172 __ ret(0); | |
1173 | |
1174 // rax,: new instance | |
1175 } | |
1176 | |
1177 break; | |
1178 | |
1179 case counter_overflow_id: | |
1180 { | |
1783 | 1181 Register bci = rax, method = rbx; |
0 | 1182 __ enter(); |
1783 | 1183 OopMap* map = save_live_registers(sasm, 3); |
0 | 1184 // Retrieve bci |
1185 __ movl(bci, Address(rbp, 2*BytesPerWord)); | |
1783 | 1186 // And a pointer to the methodOop |
1187 __ movptr(method, Address(rbp, 3*BytesPerWord)); | |
1188 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method); | |
0 | 1189 oop_maps = new OopMapSet(); |
1190 oop_maps->add_gc_map(call_offset, map); | |
1191 restore_live_registers(sasm); | |
1192 __ leave(); | |
1193 __ ret(0); | |
1194 } | |
1195 break; | |
1196 | |
1197 case new_type_array_id: | |
1198 case new_object_array_id: | |
1199 { | |
1200 Register length = rbx; // Incoming | |
1201 Register klass = rdx; // Incoming | |
1202 Register obj = rax; // Result | |
1203 | |
1204 if (id == new_type_array_id) { | |
1205 __ set_info("new_type_array", dont_gc_arguments); | |
1206 } else { | |
1207 __ set_info("new_object_array", dont_gc_arguments); | |
1208 } | |
1209 | |
1210 #ifdef ASSERT | |
1211 // assert object type is really an array of the proper kind | |
1212 { | |
1213 Label ok; | |
1214 Register t0 = obj; | |
1215 __ movl(t0, Address(klass, Klass::layout_helper_offset_in_bytes() + sizeof(oopDesc))); | |
1216 __ sarl(t0, Klass::_lh_array_tag_shift); | |
1217 int tag = ((id == new_type_array_id) | |
1218 ? Klass::_lh_array_tag_type_value | |
1219 : Klass::_lh_array_tag_obj_value); | |
1220 __ cmpl(t0, tag); | |
1221 __ jcc(Assembler::equal, ok); | |
1222 __ stop("assert(is an array klass)"); | |
1223 __ should_not_reach_here(); | |
1224 __ bind(ok); | |
1225 } | |
1226 #endif // ASSERT | |
1227 | |
1228 if (UseTLAB && FastTLABRefill) { | |
1229 Register arr_size = rsi; | |
1230 Register t1 = rcx; // must be rcx for use as shift count | |
1231 Register t2 = rdi; | |
1232 Label slow_path; | |
1233 assert_different_registers(length, klass, obj, arr_size, t1, t2); | |
1234 | |
1235 // check that array length is small enough for fast path. | |
1236 __ cmpl(length, C1_MacroAssembler::max_array_allocation_length); | |
1237 __ jcc(Assembler::above, slow_path); | |
1238 | |
1239 // if we got here then the TLAB allocation failed, so try | |
1240 // refilling the TLAB or allocating directly from eden. | |
1241 Label retry_tlab, try_eden; | |
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1242 const Register thread = |
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1243 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves rbx & rdx, returns rdi |
0 | 1244 |
1245 __ bind(retry_tlab); | |
1246 | |
1247 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) | |
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1248 // since size is positive movl does right thing on 64bit |
0 | 1249 __ movl(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); |
304 | 1250 // since size is postive movl does right thing on 64bit |
0 | 1251 __ movl(arr_size, length); |
1252 assert(t1 == rcx, "fixed register usage"); | |
304 | 1253 __ shlptr(arr_size /* by t1=rcx, mod 32 */); |
1254 __ shrptr(t1, Klass::_lh_header_size_shift); | |
1255 __ andptr(t1, Klass::_lh_header_size_mask); | |
1256 __ addptr(arr_size, t1); | |
1257 __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up | |
1258 __ andptr(arr_size, ~MinObjAlignmentInBytesMask); | |
0 | 1259 |
1260 __ tlab_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size | |
1261 | |
1262 __ initialize_header(obj, klass, length, t1, t2); | |
1263 __ movb(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() + (Klass::_lh_header_size_shift / BitsPerByte))); | |
1264 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); | |
1265 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); | |
304 | 1266 __ andptr(t1, Klass::_lh_header_size_mask); |
1267 __ subptr(arr_size, t1); // body length | |
1268 __ addptr(t1, obj); // body start | |
0 | 1269 __ initialize_body(t1, arr_size, 0, t2); |
1270 __ verify_oop(obj); | |
1271 __ ret(0); | |
1272 | |
1273 __ bind(try_eden); | |
1274 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) | |
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1275 // since size is positive movl does right thing on 64bit |
0 | 1276 __ movl(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); |
304 | 1277 // since size is postive movl does right thing on 64bit |
0 | 1278 __ movl(arr_size, length); |
1279 assert(t1 == rcx, "fixed register usage"); | |
304 | 1280 __ shlptr(arr_size /* by t1=rcx, mod 32 */); |
1281 __ shrptr(t1, Klass::_lh_header_size_shift); | |
1282 __ andptr(t1, Klass::_lh_header_size_mask); | |
1283 __ addptr(arr_size, t1); | |
1284 __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up | |
1285 __ andptr(arr_size, ~MinObjAlignmentInBytesMask); | |
0 | 1286 |
1287 __ eden_allocate(obj, arr_size, 0, t1, slow_path); // preserves arr_size | |
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1288 __ incr_allocated_bytes(thread, arr_size, 0); |
0 | 1289 |
1290 __ initialize_header(obj, klass, length, t1, t2); | |
1291 __ movb(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() + (Klass::_lh_header_size_shift / BitsPerByte))); | |
1292 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); | |
1293 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); | |
304 | 1294 __ andptr(t1, Klass::_lh_header_size_mask); |
1295 __ subptr(arr_size, t1); // body length | |
1296 __ addptr(t1, obj); // body start | |
0 | 1297 __ initialize_body(t1, arr_size, 0, t2); |
1298 __ verify_oop(obj); | |
1299 __ ret(0); | |
1300 | |
1301 __ bind(slow_path); | |
1302 } | |
1303 | |
1304 __ enter(); | |
1305 OopMap* map = save_live_registers(sasm, 3); | |
1306 int call_offset; | |
1307 if (id == new_type_array_id) { | |
1308 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length); | |
1309 } else { | |
1310 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length); | |
1311 } | |
1312 | |
1313 oop_maps = new OopMapSet(); | |
1314 oop_maps->add_gc_map(call_offset, map); | |
1315 restore_live_registers_except_rax(sasm); | |
1316 | |
1317 __ verify_oop(obj); | |
1318 __ leave(); | |
1319 __ ret(0); | |
1320 | |
1321 // rax,: new array | |
1322 } | |
1323 break; | |
1324 | |
1325 case new_multi_array_id: | |
1326 { StubFrame f(sasm, "new_multi_array", dont_gc_arguments); | |
1327 // rax,: klass | |
1328 // rbx,: rank | |
1329 // rcx: address of 1st dimension | |
1330 OopMap* map = save_live_registers(sasm, 4); | |
1331 int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx); | |
1332 | |
1333 oop_maps = new OopMapSet(); | |
1334 oop_maps->add_gc_map(call_offset, map); | |
1335 restore_live_registers_except_rax(sasm); | |
1336 | |
1337 // rax,: new multi array | |
1338 __ verify_oop(rax); | |
1339 } | |
1340 break; | |
1341 | |
1342 case register_finalizer_id: | |
1343 { | |
1344 __ set_info("register_finalizer", dont_gc_arguments); | |
1345 | |
304 | 1346 // This is called via call_runtime so the arguments |
1347 // will be place in C abi locations | |
1348 | |
1349 #ifdef _LP64 | |
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1350 __ verify_oop((UseGraal) ? j_rarg0 : c_rarg0); |
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1351 __ mov(rax, (UseGraal) ? j_rarg0 : c_rarg0); |
304 | 1352 #else |
0 | 1353 // The object is passed on the stack and we haven't pushed a |
1354 // frame yet so it's one work away from top of stack. | |
304 | 1355 __ movptr(rax, Address(rsp, 1 * BytesPerWord)); |
0 | 1356 __ verify_oop(rax); |
304 | 1357 #endif // _LP64 |
0 | 1358 |
1359 // load the klass and check the has finalizer flag | |
1360 Label register_finalizer; | |
1361 Register t = rsi; | |
2002 | 1362 __ load_klass(t, rax); |
0 | 1363 __ movl(t, Address(t, Klass::access_flags_offset_in_bytes() + sizeof(oopDesc))); |
1364 __ testl(t, JVM_ACC_HAS_FINALIZER); | |
1365 __ jcc(Assembler::notZero, register_finalizer); | |
1366 __ ret(0); | |
1367 | |
1368 __ bind(register_finalizer); | |
1369 __ enter(); | |
1370 OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */); | |
1371 int call_offset = __ call_RT(noreg, noreg, | |
1372 CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax); | |
1373 oop_maps = new OopMapSet(); | |
1374 oop_maps->add_gc_map(call_offset, oop_map); | |
1375 | |
1376 // Now restore all the live registers | |
1377 restore_live_registers(sasm); | |
1378 | |
1379 __ leave(); | |
1380 __ ret(0); | |
1381 } | |
1382 break; | |
1383 | |
1384 case throw_range_check_failed_id: | |
1385 { StubFrame f(sasm, "range_check_failed", dont_gc_arguments); | |
1386 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true); | |
1387 } | |
1388 break; | |
1389 | |
1390 case throw_index_exception_id: | |
1391 { StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments); | |
1392 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true); | |
1393 } | |
1394 break; | |
1395 | |
1396 case throw_div0_exception_id: | |
1397 { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments); | |
1398 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false); | |
1399 } | |
1400 break; | |
1401 | |
1402 case throw_null_pointer_exception_id: | |
1403 { StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments); | |
1404 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false); | |
1405 } | |
1406 break; | |
1407 | |
1408 case handle_exception_nofpu_id: | |
1409 case handle_exception_id: | |
1410 { StubFrame f(sasm, "handle_exception", dont_gc_arguments); | |
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1411 oop_maps = generate_handle_exception(id, sasm); |
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1412 } |
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1413 break; |
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1414 |
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1415 case handle_exception_from_callee_id: |
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1416 { StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments); |
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1417 oop_maps = generate_handle_exception(id, sasm); |
0 | 1418 } |
1419 break; | |
1420 | |
1421 case unwind_exception_id: | |
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1422 { |
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1423 __ set_info("unwind_exception", dont_gc_arguments); |
0 | 1424 // note: no stubframe since we are about to leave the current |
1425 // activation and we are calling a leaf VM function only. | |
1426 generate_unwind_exception(sasm); | |
1427 } | |
1428 break; | |
1429 | |
1430 case throw_array_store_exception_id: | |
1431 { StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments); | |
1432 // tos + 0: link | |
1433 // + 1: return address | |
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1434 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true); |
0 | 1435 } |
1436 break; | |
1437 | |
1438 case throw_class_cast_exception_id: | |
1439 { StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments); | |
1440 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true); | |
1441 } | |
1442 break; | |
1443 | |
1444 case throw_incompatible_class_change_error_id: | |
1445 { StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments); | |
1446 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false); | |
1447 } | |
1448 break; | |
1449 | |
1450 case slow_subtype_check_id: | |
1451 { | |
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1452 // Typical calling sequence: |
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1453 // __ push(klass_RInfo); // object klass or other subclass |
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1454 // __ push(sup_k_RInfo); // array element klass or other superclass |
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1455 // __ call(slow_subtype_check); |
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1456 // Note that the subclass is pushed first, and is therefore deepest. |
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1457 // Previous versions of this code reversed the names 'sub' and 'super'. |
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1458 // This was operationally harmless but made the code unreadable. |
0 | 1459 enum layout { |
304 | 1460 rax_off, SLOT2(raxH_off) |
1461 rcx_off, SLOT2(rcxH_off) | |
1462 rsi_off, SLOT2(rsiH_off) | |
1463 rdi_off, SLOT2(rdiH_off) | |
1464 // saved_rbp_off, SLOT2(saved_rbpH_off) | |
1465 return_off, SLOT2(returnH_off) | |
644
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1466 sup_k_off, SLOT2(sup_kH_off) |
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1467 klass_off, SLOT2(superH_off) |
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1468 framesize, |
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1469 result_off = klass_off // deepest argument is also the return value |
0 | 1470 }; |
1471 | |
1472 __ set_info("slow_subtype_check", dont_gc_arguments); | |
304 | 1473 __ push(rdi); |
1474 __ push(rsi); | |
1475 __ push(rcx); | |
1476 __ push(rax); | |
0 | 1477 |
304 | 1478 // This is called by pushing args and not with C abi |
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1479 __ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass |
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1480 __ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass |
0 | 1481 |
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1482 Label success; |
0 | 1483 Label miss; |
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1484 if (UseGraal) { |
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1485 // TODO this should really be within the XirSnippets |
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1486 __ check_klass_subtype_fast_path(rsi, rax, rcx, &success, &miss, NULL); |
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1487 }; |
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1488 |
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1489 __ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, NULL, &miss); |
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1490 |
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1491 // fallthrough on success: |
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1492 __ bind(success); |
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1493 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result |
304 | 1494 __ pop(rax); |
1495 __ pop(rcx); | |
1496 __ pop(rsi); | |
1497 __ pop(rdi); | |
0 | 1498 __ ret(0); |
1499 | |
1500 __ bind(miss); | |
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1501 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result |
304 | 1502 __ pop(rax); |
1503 __ pop(rcx); | |
1504 __ pop(rsi); | |
1505 __ pop(rdi); | |
0 | 1506 __ ret(0); |
1507 } | |
1508 break; | |
1509 | |
1510 case monitorenter_nofpu_id: | |
1511 save_fpu_registers = false; | |
1512 // fall through | |
1513 case monitorenter_id: | |
1514 { | |
1515 StubFrame f(sasm, "monitorenter", dont_gc_arguments); | |
1516 OopMap* map = save_live_registers(sasm, 3, save_fpu_registers); | |
1517 | |
304 | 1518 // Called with store_parameter and not C abi |
1519 | |
0 | 1520 f.load_argument(1, rax); // rax,: object |
1521 f.load_argument(0, rbx); // rbx,: lock address | |
1522 | |
1523 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx); | |
1524 | |
1525 oop_maps = new OopMapSet(); | |
1526 oop_maps->add_gc_map(call_offset, map); | |
1527 restore_live_registers(sasm, save_fpu_registers); | |
1528 } | |
1529 break; | |
1530 | |
1531 case monitorexit_nofpu_id: | |
1532 save_fpu_registers = false; | |
1533 // fall through | |
1534 case monitorexit_id: | |
1535 { | |
1536 StubFrame f(sasm, "monitorexit", dont_gc_arguments); | |
1537 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers); | |
1538 | |
304 | 1539 // Called with store_parameter and not C abi |
1540 | |
0 | 1541 f.load_argument(0, rax); // rax,: lock address |
1542 | |
1543 // note: really a leaf routine but must setup last java sp | |
1544 // => use call_RT for now (speed can be improved by | |
1545 // doing last java sp setup manually) | |
1546 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax); | |
1547 | |
1548 oop_maps = new OopMapSet(); | |
1549 oop_maps->add_gc_map(call_offset, map); | |
1550 restore_live_registers(sasm, save_fpu_registers); | |
1551 | |
1552 } | |
1553 break; | |
1554 | |
1555 case access_field_patching_id: | |
1556 { StubFrame f(sasm, "access_field_patching", dont_gc_arguments); | |
1557 // we should set up register map | |
1558 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching)); | |
1559 } | |
1560 break; | |
1561 | |
1562 case load_klass_patching_id: | |
1563 { StubFrame f(sasm, "load_klass_patching", dont_gc_arguments); | |
1564 // we should set up register map | |
1565 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching)); | |
1566 } | |
1567 break; | |
1568 | |
1569 case jvmti_exception_throw_id: | |
1570 { // rax,: exception oop | |
1571 StubFrame f(sasm, "jvmti_exception_throw", dont_gc_arguments); | |
1572 // Preserve all registers across this potentially blocking call | |
1573 const int num_rt_args = 2; // thread, exception oop | |
1574 OopMap* map = save_live_registers(sasm, num_rt_args); | |
1575 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, Runtime1::post_jvmti_exception_throw), rax); | |
1576 oop_maps = new OopMapSet(); | |
1577 oop_maps->add_gc_map(call_offset, map); | |
1578 restore_live_registers(sasm); | |
1579 } | |
1580 break; | |
1581 | |
1582 case dtrace_object_alloc_id: | |
1583 { // rax,: object | |
1584 StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments); | |
1585 // we can't gc here so skip the oopmap but make sure that all | |
1586 // the live registers get saved. | |
1587 save_live_registers(sasm, 1); | |
1588 | |
304 | 1589 __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax)); |
0 | 1590 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc))); |
304 | 1591 NOT_LP64(__ pop(rax)); |
0 | 1592 |
1593 restore_live_registers(sasm); | |
1594 } | |
1595 break; | |
1596 | |
1597 case fpu2long_stub_id: | |
1598 { | |
1599 // rax, and rdx are destroyed, but should be free since the result is returned there | |
1600 // preserve rsi,ecx | |
304 | 1601 __ push(rsi); |
1602 __ push(rcx); | |
1603 LP64_ONLY(__ push(rdx);) | |
0 | 1604 |
1605 // check for NaN | |
1606 Label return0, do_return, return_min_jlong, do_convert; | |
1607 | |
304 | 1608 Address value_high_word(rsp, wordSize + 4); |
1609 Address value_low_word(rsp, wordSize); | |
1610 Address result_high_word(rsp, 3*wordSize + 4); | |
1611 Address result_low_word(rsp, 3*wordSize); | |
0 | 1612 |
304 | 1613 __ subptr(rsp, 32); // more than enough on 32bit |
0 | 1614 __ fst_d(value_low_word); |
1615 __ movl(rax, value_high_word); | |
1616 __ andl(rax, 0x7ff00000); | |
1617 __ cmpl(rax, 0x7ff00000); | |
1618 __ jcc(Assembler::notEqual, do_convert); | |
1619 __ movl(rax, value_high_word); | |
1620 __ andl(rax, 0xfffff); | |
1621 __ orl(rax, value_low_word); | |
1622 __ jcc(Assembler::notZero, return0); | |
1623 | |
1624 __ bind(do_convert); | |
1625 __ fnstcw(Address(rsp, 0)); | |
304 | 1626 __ movzwl(rax, Address(rsp, 0)); |
0 | 1627 __ orl(rax, 0xc00); |
1628 __ movw(Address(rsp, 2), rax); | |
1629 __ fldcw(Address(rsp, 2)); | |
1630 __ fwait(); | |
1631 __ fistp_d(result_low_word); | |
1632 __ fldcw(Address(rsp, 0)); | |
1633 __ fwait(); | |
304 | 1634 // This gets the entire long in rax on 64bit |
1635 __ movptr(rax, result_low_word); | |
1636 // testing of high bits | |
0 | 1637 __ movl(rdx, result_high_word); |
304 | 1638 __ mov(rcx, rax); |
0 | 1639 // What the heck is the point of the next instruction??? |
1640 __ xorl(rcx, 0x0); | |
1641 __ movl(rsi, 0x80000000); | |
1642 __ xorl(rsi, rdx); | |
1643 __ orl(rcx, rsi); | |
1644 __ jcc(Assembler::notEqual, do_return); | |
1645 __ fldz(); | |
1646 __ fcomp_d(value_low_word); | |
1647 __ fnstsw_ax(); | |
304 | 1648 #ifdef _LP64 |
1649 __ testl(rax, 0x4100); // ZF & CF == 0 | |
1650 __ jcc(Assembler::equal, return_min_jlong); | |
1651 #else | |
0 | 1652 __ sahf(); |
1653 __ jcc(Assembler::above, return_min_jlong); | |
304 | 1654 #endif // _LP64 |
0 | 1655 // return max_jlong |
304 | 1656 #ifndef _LP64 |
0 | 1657 __ movl(rdx, 0x7fffffff); |
1658 __ movl(rax, 0xffffffff); | |
304 | 1659 #else |
1660 __ mov64(rax, CONST64(0x7fffffffffffffff)); | |
1661 #endif // _LP64 | |
0 | 1662 __ jmp(do_return); |
1663 | |
1664 __ bind(return_min_jlong); | |
304 | 1665 #ifndef _LP64 |
0 | 1666 __ movl(rdx, 0x80000000); |
1667 __ xorl(rax, rax); | |
304 | 1668 #else |
1669 __ mov64(rax, CONST64(0x8000000000000000)); | |
1670 #endif // _LP64 | |
0 | 1671 __ jmp(do_return); |
1672 | |
1673 __ bind(return0); | |
1674 __ fpop(); | |
304 | 1675 #ifndef _LP64 |
1676 __ xorptr(rdx,rdx); | |
1677 __ xorptr(rax,rax); | |
1678 #else | |
1679 __ xorptr(rax, rax); | |
1680 #endif // _LP64 | |
0 | 1681 |
1682 __ bind(do_return); | |
304 | 1683 __ addptr(rsp, 32); |
1684 LP64_ONLY(__ pop(rdx);) | |
1685 __ pop(rcx); | |
1686 __ pop(rsi); | |
0 | 1687 __ ret(0); |
1688 } | |
1689 break; | |
1690 | |
342 | 1691 #ifndef SERIALGC |
1692 case g1_pre_barrier_slow_id: | |
1693 { | |
1694 StubFrame f(sasm, "g1_pre_barrier", dont_gc_arguments); | |
1695 // arg0 : previous value of memory | |
1696 | |
1697 BarrierSet* bs = Universe::heap()->barrier_set(); | |
1698 if (bs->kind() != BarrierSet::G1SATBCTLogging) { | |
362 | 1699 __ movptr(rax, (int)id); |
342 | 1700 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax); |
1701 __ should_not_reach_here(); | |
1702 break; | |
1703 } | |
362 | 1704 __ push(rax); |
1705 __ push(rdx); | |
342 | 1706 |
1707 const Register pre_val = rax; | |
362 | 1708 const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread); |
342 | 1709 const Register tmp = rdx; |
1710 | |
362 | 1711 NOT_LP64(__ get_thread(thread);) |
342 | 1712 |
1713 Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() + | |
1714 PtrQueue::byte_offset_of_active())); | |
1715 | |
1716 Address queue_index(thread, in_bytes(JavaThread::satb_mark_queue_offset() + | |
1717 PtrQueue::byte_offset_of_index())); | |
1718 Address buffer(thread, in_bytes(JavaThread::satb_mark_queue_offset() + | |
1719 PtrQueue::byte_offset_of_buf())); | |
1720 | |
1721 | |
1722 Label done; | |
1723 Label runtime; | |
1724 | |
1725 // Can we store original value in the thread's buffer? | |
1726 | |
362 | 1727 #ifdef _LP64 |
1572 | 1728 __ movslq(tmp, queue_index); |
362 | 1729 __ cmpq(tmp, 0); |
1730 #else | |
342 | 1731 __ cmpl(queue_index, 0); |
362 | 1732 #endif |
342 | 1733 __ jcc(Assembler::equal, runtime); |
362 | 1734 #ifdef _LP64 |
1735 __ subq(tmp, wordSize); | |
1736 __ movl(queue_index, tmp); | |
1737 __ addq(tmp, buffer); | |
1738 #else | |
342 | 1739 __ subl(queue_index, wordSize); |
1740 __ movl(tmp, buffer); | |
1741 __ addl(tmp, queue_index); | |
362 | 1742 #endif |
1743 | |
342 | 1744 // prev_val (rax) |
1745 f.load_argument(0, pre_val); | |
362 | 1746 __ movptr(Address(tmp, 0), pre_val); |
342 | 1747 __ jmp(done); |
1748 | |
1749 __ bind(runtime); | |
1572 | 1750 __ push(rcx); |
1751 #ifdef _LP64 | |
1752 __ push(r8); | |
1753 __ push(r9); | |
1754 __ push(r10); | |
1755 __ push(r11); | |
1756 # ifndef _WIN64 | |
1757 __ push(rdi); | |
1758 __ push(rsi); | |
1759 # endif | |
1760 #endif | |
342 | 1761 // load the pre-value |
1762 f.load_argument(0, rcx); | |
1763 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), rcx, thread); | |
1572 | 1764 #ifdef _LP64 |
1765 # ifndef _WIN64 | |
1766 __ pop(rsi); | |
1767 __ pop(rdi); | |
1768 # endif | |
1769 __ pop(r11); | |
1770 __ pop(r10); | |
1771 __ pop(r9); | |
1772 __ pop(r8); | |
1773 #endif | |
362 | 1774 __ pop(rcx); |
1572 | 1775 __ bind(done); |
342 | 1776 |
362 | 1777 __ pop(rdx); |
1778 __ pop(rax); | |
342 | 1779 } |
1780 break; | |
1781 | |
1782 case g1_post_barrier_slow_id: | |
1783 { | |
1784 StubFrame f(sasm, "g1_post_barrier", dont_gc_arguments); | |
1785 | |
1786 | |
1787 // arg0: store_address | |
1788 Address store_addr(rbp, 2*BytesPerWord); | |
1789 | |
1790 BarrierSet* bs = Universe::heap()->barrier_set(); | |
1791 CardTableModRefBS* ct = (CardTableModRefBS*)bs; | |
1792 Label done; | |
1793 Label runtime; | |
1794 | |
1795 // At this point we know new_value is non-NULL and the new_value crosses regsion. | |
1796 // Must check to see if card is already dirty | |
1797 | |
362 | 1798 const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread); |
342 | 1799 |
1800 Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() + | |
1801 PtrQueue::byte_offset_of_index())); | |
1802 Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() + | |
1803 PtrQueue::byte_offset_of_buf())); | |
1804 | |
362 | 1805 __ push(rax); |
1572 | 1806 __ push(rcx); |
342 | 1807 |
362 | 1808 NOT_LP64(__ get_thread(thread);) |
1809 ExternalAddress cardtable((address)ct->byte_map_base); | |
342 | 1810 assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); |
1811 | |
1572 | 1812 const Register card_addr = rcx; |
362 | 1813 #ifdef _LP64 |
1814 const Register tmp = rscratch1; | |
1815 f.load_argument(0, card_addr); | |
1816 __ shrq(card_addr, CardTableModRefBS::card_shift); | |
1817 __ lea(tmp, cardtable); | |
1818 // get the address of the card | |
1819 __ addq(card_addr, tmp); | |
1820 #else | |
1572 | 1821 const Register card_index = rcx; |
362 | 1822 f.load_argument(0, card_index); |
1823 __ shrl(card_index, CardTableModRefBS::card_shift); | |
1824 | |
342 | 1825 Address index(noreg, card_index, Address::times_1); |
1826 __ leal(card_addr, __ as_Address(ArrayAddress(cardtable, index))); | |
362 | 1827 #endif |
1828 | |
342 | 1829 __ cmpb(Address(card_addr, 0), 0); |
1830 __ jcc(Assembler::equal, done); | |
1831 | |
1832 // storing region crossing non-NULL, card is clean. | |
1833 // dirty card and log. | |
1834 | |
1835 __ movb(Address(card_addr, 0), 0); | |
1836 | |
1837 __ cmpl(queue_index, 0); | |
1838 __ jcc(Assembler::equal, runtime); | |
1839 __ subl(queue_index, wordSize); | |
1840 | |
1841 const Register buffer_addr = rbx; | |
362 | 1842 __ push(rbx); |
1843 | |
1844 __ movptr(buffer_addr, buffer); | |
342 | 1845 |
362 | 1846 #ifdef _LP64 |
1847 __ movslq(rscratch1, queue_index); | |
1848 __ addptr(buffer_addr, rscratch1); | |
1849 #else | |
1850 __ addptr(buffer_addr, queue_index); | |
1851 #endif | |
1852 __ movptr(Address(buffer_addr, 0), card_addr); | |
1853 | |
1854 __ pop(rbx); | |
342 | 1855 __ jmp(done); |
1856 | |
1857 __ bind(runtime); | |
1572 | 1858 __ push(rdx); |
1859 #ifdef _LP64 | |
1860 __ push(r8); | |
1861 __ push(r9); | |
1862 __ push(r10); | |
1863 __ push(r11); | |
1864 # ifndef _WIN64 | |
1865 __ push(rdi); | |
1866 __ push(rsi); | |
1867 # endif | |
1868 #endif | |
342 | 1869 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread); |
1572 | 1870 #ifdef _LP64 |
1871 # ifndef _WIN64 | |
1872 __ pop(rsi); | |
1873 __ pop(rdi); | |
1874 # endif | |
1875 __ pop(r11); | |
1876 __ pop(r10); | |
1877 __ pop(r9); | |
1878 __ pop(r8); | |
1879 #endif | |
1880 __ pop(rdx); | |
1881 __ bind(done); | |
342 | 1882 |
1572 | 1883 __ pop(rcx); |
362 | 1884 __ pop(rax); |
342 | 1885 |
1886 } | |
1887 break; | |
1888 #endif // !SERIALGC | |
1889 | |
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75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
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changeset
|
1890 case graal_unwind_exception_call_id: { |
1434
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1891 // remove the frame from the stack |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1892 __ movptr(rsp, rbp); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1893 __ pop(rbp); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1894 // exception_oop is passed using ordinary java calling conventions |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1895 __ movptr(rax, j_rarg0); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1896 |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1897 Label nonNullExceptionOop; |
72cfb36c6bb2
* enabled all jtt tests
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changeset
|
1898 __ testptr(rax, rax); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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|
1899 __ jcc(Assembler::notZero, nonNullExceptionOop); |
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
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diff
changeset
|
1900 { |
1434
72cfb36c6bb2
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parents:
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diff
changeset
|
1901 __ enter(); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
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|
1902 oop_maps = new OopMapSet(); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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|
1903 OopMap* oop_map = save_live_registers(sasm, 0); |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
1904 int call_offset = __ call_RT(rax, noreg, (address)graal_create_null_exception, 0); |
1434
72cfb36c6bb2
* enabled all jtt tests
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parents:
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|
1905 oop_maps->add_gc_map(call_offset, oop_map); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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changeset
|
1906 __ leave(); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1907 } |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1908 __ bind(nonNullExceptionOop); |
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
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diff
changeset
|
1909 |
1434
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
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|
1910 __ set_info("unwind_exception", dont_gc_arguments); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1911 // note: no stubframe since we are about to leave the current |
72cfb36c6bb2
* enabled all jtt tests
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|
1912 // activation and we are calling a leaf VM function only. |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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|
1913 generate_unwind_exception(sasm); |
72cfb36c6bb2
* enabled all jtt tests
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|
1914 __ should_not_reach_here(); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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changeset
|
1915 break; |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1916 } |
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
1917 |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
1918 case graal_handle_exception_id: { |
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
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diff
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|
1919 StubFrame f(sasm, "graal_handle_exception", dont_gc_arguments); |
1434
72cfb36c6bb2
* enabled all jtt tests
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1920 oop_maps = new OopMapSet(); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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|
1921 OopMap* oop_map = save_live_registers(sasm, 1, false); |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
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diff
changeset
|
1922 graal_generate_handle_exception(sasm, oop_maps, oop_map); |
1434
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1923 break; |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1924 } |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1925 |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
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diff
changeset
|
1926 case graal_slow_subtype_check_id: { |
1434
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1927 Label success; |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1928 Label miss; |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1929 |
72cfb36c6bb2
* enabled all jtt tests
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diff
changeset
|
1930 // TODO this should really be within the XirSnippets |
72cfb36c6bb2
* enabled all jtt tests
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diff
changeset
|
1931 __ check_klass_subtype_fast_path(j_rarg0, j_rarg1, j_rarg2, &success, &miss, NULL); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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changeset
|
1932 __ check_klass_subtype_slow_path(j_rarg0, j_rarg1, j_rarg2, j_rarg3, NULL, &miss); |
72cfb36c6bb2
* enabled all jtt tests
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changeset
|
1933 |
72cfb36c6bb2
* enabled all jtt tests
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changeset
|
1934 // fallthrough on success: |
72cfb36c6bb2
* enabled all jtt tests
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|
1935 __ bind(success); |
72cfb36c6bb2
* enabled all jtt tests
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changeset
|
1936 __ movptr(rax, 1); |
72cfb36c6bb2
* enabled all jtt tests
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changeset
|
1937 __ ret(0); |
72cfb36c6bb2
* enabled all jtt tests
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diff
changeset
|
1938 |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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changeset
|
1939 __ bind(miss); |
72cfb36c6bb2
* enabled all jtt tests
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changeset
|
1940 __ movptr(rax, NULL_WORD); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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changeset
|
1941 __ ret(0); |
72cfb36c6bb2
* enabled all jtt tests
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changeset
|
1942 break; |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1943 } |
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
1944 |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
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parents:
2662
diff
changeset
|
1945 case graal_verify_pointer_id: { |
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
1946 __ verify_oop(r13, "graal verify pointer"); |
1449
8cfe3537a0d3
Pointer verification stub. Two loose oop fixes in C1X C++ part. Logging which methods have been compiled.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1434
diff
changeset
|
1947 __ ret(0); |
8cfe3537a0d3
Pointer verification stub. Two loose oop fixes in C1X C++ part. Logging which methods have been compiled.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1434
diff
changeset
|
1948 break; |
8cfe3537a0d3
Pointer verification stub. Two loose oop fixes in C1X C++ part. Logging which methods have been compiled.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1434
diff
changeset
|
1949 } |
8cfe3537a0d3
Pointer verification stub. Two loose oop fixes in C1X C++ part. Logging which methods have been compiled.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1434
diff
changeset
|
1950 |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
1951 case graal_arithmetic_frem_id: { |
1434
72cfb36c6bb2
* enabled all jtt tests
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diff
changeset
|
1952 __ subptr(rsp, 8); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1953 __ movflt(Address(rsp, 0), xmm1); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1954 __ fld_s(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1955 __ movflt(Address(rsp, 0), xmm0); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1956 __ fld_s(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
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diff
changeset
|
1957 Label L; |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1958 __ bind(L); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1959 __ fprem(); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1960 __ fwait(); |
72cfb36c6bb2
* enabled all jtt tests
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diff
changeset
|
1961 __ fnstsw_ax(); |
72cfb36c6bb2
* enabled all jtt tests
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changeset
|
1962 __ testl(rax, 0x400); |
72cfb36c6bb2
* enabled all jtt tests
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diff
changeset
|
1963 __ jcc(Assembler::notZero, L); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1964 __ fxch(1); |
72cfb36c6bb2
* enabled all jtt tests
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diff
changeset
|
1965 __ fpop(); |
72cfb36c6bb2
* enabled all jtt tests
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diff
changeset
|
1966 __ fstp_s(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1967 __ movflt(xmm0, Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1968 __ addptr(rsp, 8); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1969 __ ret(0); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1970 break; |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1971 } |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
1972 case graal_arithmetic_drem_id: { |
1434
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1973 __ subptr(rsp, 8); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1974 __ movdbl(Address(rsp, 0), xmm1); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1975 __ fld_d(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1976 __ movdbl(Address(rsp, 0), xmm0); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1977 __ fld_d(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1978 Label L; |
72cfb36c6bb2
* enabled all jtt tests
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parents:
1429
diff
changeset
|
1979 __ bind(L); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1980 __ fprem(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1981 __ fwait(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1982 __ fnstsw_ax(); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1983 __ testl(rax, 0x400); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1984 __ jcc(Assembler::notZero, L); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
1429
diff
changeset
|
1985 __ fxch(1); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
1429
diff
changeset
|
1986 __ fpop(); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1987 __ fstp_d(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
1429
diff
changeset
|
1988 __ movdbl(xmm0, Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1989 __ addptr(rsp, 8); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1990 __ ret(0); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1991 break; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1992 } |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
1993 case graal_monitorenter_id: { |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1994 Label slow_case; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1995 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1996 Register obj = j_rarg0; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1997 Register lock = j_rarg1; |
72cfb36c6bb2
* enabled all jtt tests
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parents:
1429
diff
changeset
|
1998 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1999 Register scratch1 = rax; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2000 Register scratch2 = rbx; |
1942
00bc9eaf0e24
Support for -XX:+UseFastLocking flag. Fixed monitor enter XIR template for correct debug info at the runtime call.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1930
diff
changeset
|
2001 assert_different_registers(obj, lock, scratch1, scratch2); |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2002 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2003 // copied from LIR_Assembler::emit_lock |
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2004 if (UseFastLocking) { |
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2005 assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header"); |
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2006 __ lock_object(scratch1, obj, lock, scratch2, slow_case); |
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2007 __ ret(0); |
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2008 } |
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2009 |
1434
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2010 __ bind(slow_case); |
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2011 { |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
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2012 StubFrame f(sasm, "graal_monitorenter", dont_gc_arguments); |
1434
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2013 OopMap* map = save_live_registers(sasm, 1, save_fpu_registers); |
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2014 |
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2015 // Called with store_parameter and not C abi |
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2016 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), obj, lock); |
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2017 |
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2018 oop_maps = new OopMapSet(); |
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2019 oop_maps->add_gc_map(call_offset, map); |
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2020 restore_live_registers(sasm, save_fpu_registers); |
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2021 } |
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2022 __ ret(0); |
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2023 break; |
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2024 } |
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2025 case graal_monitorexit_id: { |
1434
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2026 Label slow_case; |
1429
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2027 |
1434
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2028 Register obj = j_rarg0; |
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2029 Register lock = j_rarg1; |
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2030 |
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2031 // needed in rax later on... |
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2032 Register lock2 = rax; |
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2033 __ mov(lock2, lock); |
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2034 Register scratch1 = rbx; |
1942
00bc9eaf0e24
Support for -XX:+UseFastLocking flag. Fixed monitor enter XIR template for correct debug info at the runtime call.
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2035 assert_different_registers(obj, lock, scratch1, lock2); |
1434
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2036 |
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2037 // copied from LIR_Assembler::emit_lock |
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2038 if (UseFastLocking) { |
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2039 assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header"); |
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2040 __ unlock_object(scratch1, obj, lock2, slow_case); |
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2041 __ ret(0); |
1429
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2042 } |
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2043 |
1434
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2044 __ bind(slow_case); |
1429
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|
2045 { |
2891
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2662
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|
2046 StubFrame f(sasm, "graal_monitorexit", dont_gc_arguments); |
1434
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|
2047 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers); |
1429
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|
2048 |
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|
2049 // note: really a leaf routine but must setup last java sp |
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|
2050 // => use call_RT for now (speed can be improved by |
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diff
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|
2051 // doing last java sp setup manually) |
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|
2052 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), lock); |
1429
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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diff
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|
2053 |
1434
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diff
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|
2054 oop_maps = new OopMapSet(); |
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|
2055 oop_maps->add_gc_map(call_offset, map); |
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|
2056 restore_live_registers(sasm, save_fpu_registers); |
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|
2057 } |
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|
2058 __ ret(0); |
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|
2059 break; |
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|
2060 } |
1429
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|
2061 |
1434
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|
2062 |
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|
2063 |
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2064 |
0 | 2065 default: |
2066 { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments); | |
304 | 2067 __ movptr(rax, (int)id); |
0 | 2068 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax); |
2069 __ should_not_reach_here(); | |
2070 } | |
2071 break; | |
2072 } | |
2073 return oop_maps; | |
2074 } | |
2075 | |
2076 #undef __ | |
1681
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6953477: Increase portability and flexibility of building Hotspot
bobv
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|
2077 |
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|
2078 const char *Runtime1::pd_name_for_address(address entry) { |
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diff
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|
2079 return "<unknown function>"; |
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|
2080 } |