Mercurial > hg > truffle
annotate src/cpu/x86/vm/relocInfo_x86.cpp @ 7212:291ffc492eb6
Merge with http://hg.openjdk.java.net/hsx/hsx25/hotspot/
| author | Doug Simon <doug.simon@oracle.com> |
|---|---|
| date | Fri, 14 Dec 2012 14:35:13 +0100 |
| parents | cd3d6a6b95d9 |
| children | 589aa23334ea |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 1998, 2012, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #include "precompiled.hpp" |
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26 #include "asm/macroAssembler.hpp" |
| 1972 | 27 #include "code/relocInfo.hpp" |
| 28 #include "nativeInst_x86.hpp" | |
| 29 #include "oops/oop.inline.hpp" | |
| 30 #include "runtime/safepoint.hpp" | |
| 0 | 31 |
| 32 | |
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33 void Relocation::pd_set_data_value(address x, intptr_t o, bool verify_only) { |
| 0 | 34 #ifdef AMD64 |
| 35 x += o; | |
| 36 typedef Assembler::WhichOperand WhichOperand; | |
| 304 | 37 WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm, call32, narrow oop |
| 0 | 38 assert(which == Assembler::disp32_operand || |
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39 which == Assembler::narrow_oop_operand || |
| 304 | 40 which == Assembler::imm_operand, "format unpacks ok"); |
| 41 if (which == Assembler::imm_operand) { | |
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42 if (verify_only) { |
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43 assert(*pd_address_in_code() == x, "instructions must match"); |
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44 } else { |
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45 *pd_address_in_code() = x; |
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46 } |
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47 } else if (which == Assembler::narrow_oop_operand) { |
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48 address disp = Assembler::locate_operand(addr(), which); |
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49 // both compressed oops and compressed classes look the same |
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50 if (Universe::heap()->is_in_reserved((oop)x)) { |
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51 if (verify_only) { |
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52 assert(*(uint32_t*) disp == oopDesc::encode_heap_oop((oop)x), "instructions must match"); |
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53 } else { |
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54 *(int32_t*) disp = oopDesc::encode_heap_oop((oop)x); |
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55 } |
| 0 | 56 } else { |
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57 if (verify_only) { |
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58 assert(*(uint32_t*) disp == oopDesc::encode_klass((Klass*)x), "instructions must match"); |
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59 } else { |
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60 *(int32_t*) disp = oopDesc::encode_klass((Klass*)x); |
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61 } |
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62 } |
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63 } else { |
| 0 | 64 // Note: Use runtime_call_type relocations for call32_operand. |
| 65 address ip = addr(); | |
| 66 address disp = Assembler::locate_operand(ip, which); | |
| 67 address next_ip = Assembler::locate_next_instruction(ip); | |
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68 if (verify_only) { |
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69 assert(*(int32_t*) disp == (x - next_ip), "instructions must match"); |
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70 } else { |
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71 *(int32_t*) disp = x - next_ip; |
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72 } |
| 0 | 73 } |
| 74 #else | |
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75 if (verify_only) { |
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76 assert(*pd_address_in_code() == (x + o), "instructions must match"); |
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77 } else { |
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78 *pd_address_in_code() = x + o; |
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79 } |
| 0 | 80 #endif // AMD64 |
| 81 } | |
| 82 | |
| 83 | |
| 84 address Relocation::pd_call_destination(address orig_addr) { | |
| 85 intptr_t adj = 0; | |
| 86 if (orig_addr != NULL) { | |
| 87 // We just moved this call instruction from orig_addr to addr(). | |
| 88 // This means its target will appear to have grown by addr() - orig_addr. | |
| 89 adj = -( addr() - orig_addr ); | |
| 90 } | |
| 91 NativeInstruction* ni = nativeInstruction_at(addr()); | |
| 92 if (ni->is_call()) { | |
| 93 return nativeCall_at(addr())->destination() + adj; | |
| 94 } else if (ni->is_jump()) { | |
| 95 return nativeJump_at(addr())->jump_destination() + adj; | |
| 96 } else if (ni->is_cond_jump()) { | |
| 97 return nativeGeneralJump_at(addr())->jump_destination() + adj; | |
| 98 } else if (ni->is_mov_literal64()) { | |
| 99 return (address) ((NativeMovConstReg*)ni)->data(); | |
| 100 } else { | |
| 101 ShouldNotReachHere(); | |
| 102 return NULL; | |
| 103 } | |
| 104 } | |
| 105 | |
| 106 | |
| 107 void Relocation::pd_set_call_destination(address x) { | |
| 108 NativeInstruction* ni = nativeInstruction_at(addr()); | |
| 109 if (ni->is_call()) { | |
| 110 nativeCall_at(addr())->set_destination(x); | |
| 111 } else if (ni->is_jump()) { | |
| 112 NativeJump* nj = nativeJump_at(addr()); | |
| 304 | 113 |
| 114 // Unresolved jumps are recognized by a destination of -1 | |
| 115 // However 64bit can't actually produce such an address | |
| 116 // and encodes a jump to self but jump_destination will | |
| 117 // return a -1 as the signal. We must not relocate this | |
| 118 // jmp or the ic code will not see it as unresolved. | |
| 119 | |
| 0 | 120 if (nj->jump_destination() == (address) -1) { |
| 304 | 121 x = addr(); // jump to self |
| 0 | 122 } |
| 123 nj->set_jump_destination(x); | |
| 124 } else if (ni->is_cond_jump()) { | |
| 125 // %%%% kludge this, for now, until we get a jump_destination method | |
| 126 address old_dest = nativeGeneralJump_at(addr())->jump_destination(); | |
| 127 address disp = Assembler::locate_operand(addr(), Assembler::call32_operand); | |
| 128 *(jint*)disp += (x - old_dest); | |
| 129 } else if (ni->is_mov_literal64()) { | |
| 130 ((NativeMovConstReg*)ni)->set_data((intptr_t)x); | |
| 131 } else { | |
| 132 ShouldNotReachHere(); | |
| 133 } | |
| 134 } | |
| 135 | |
| 136 | |
| 137 address* Relocation::pd_address_in_code() { | |
| 138 // All embedded Intel addresses are stored in 32-bit words. | |
| 139 // Since the addr points at the start of the instruction, | |
| 140 // we must parse the instruction a bit to find the embedded word. | |
| 141 assert(is_data(), "must be a DataRelocation"); | |
| 142 typedef Assembler::WhichOperand WhichOperand; | |
| 304 | 143 WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm/imm32 |
| 0 | 144 #ifdef AMD64 |
| 145 assert(which == Assembler::disp32_operand || | |
| 146 which == Assembler::call32_operand || | |
| 304 | 147 which == Assembler::imm_operand, "format unpacks ok"); |
| 148 if (which != Assembler::imm_operand) { | |
| 0 | 149 // The "address" in the code is a displacement can't return it as |
| 150 // and address* since it is really a jint* | |
| 151 ShouldNotReachHere(); | |
| 152 return NULL; | |
| 153 } | |
| 154 #else | |
| 304 | 155 assert(which == Assembler::disp32_operand || which == Assembler::imm_operand, "format unpacks ok"); |
| 0 | 156 #endif // AMD64 |
| 157 return (address*) Assembler::locate_operand(addr(), which); | |
| 158 } | |
| 159 | |
| 160 | |
| 161 address Relocation::pd_get_address_from_code() { | |
| 162 #ifdef AMD64 | |
| 163 // All embedded Intel addresses are stored in 32-bit words. | |
| 164 // Since the addr points at the start of the instruction, | |
| 165 // we must parse the instruction a bit to find the embedded word. | |
| 166 assert(is_data(), "must be a DataRelocation"); | |
| 167 typedef Assembler::WhichOperand WhichOperand; | |
| 304 | 168 WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm/imm32 |
| 0 | 169 assert(which == Assembler::disp32_operand || |
| 170 which == Assembler::call32_operand || | |
| 304 | 171 which == Assembler::imm_operand, "format unpacks ok"); |
| 172 if (which != Assembler::imm_operand) { | |
| 0 | 173 address ip = addr(); |
| 174 address disp = Assembler::locate_operand(ip, which); | |
| 175 address next_ip = Assembler::locate_next_instruction(ip); | |
| 176 address a = next_ip + *(int32_t*) disp; | |
| 177 return a; | |
| 178 } | |
| 179 #endif // AMD64 | |
| 180 return *pd_address_in_code(); | |
| 181 } | |
| 182 | |
| 183 int Relocation::pd_breakpoint_size() { | |
| 184 // minimum breakpoint size, in short words | |
| 185 return NativeIllegalInstruction::instruction_size / sizeof(short); | |
| 186 } | |
| 187 | |
| 188 void Relocation::pd_swap_in_breakpoint(address x, short* instrs, int instrlen) { | |
| 189 Untested("pd_swap_in_breakpoint"); | |
| 190 if (instrs != NULL) { | |
| 191 assert(instrlen * sizeof(short) == NativeIllegalInstruction::instruction_size, "enough instrlen in reloc. data"); | |
| 192 for (int i = 0; i < instrlen; i++) { | |
| 193 instrs[i] = ((short*)x)[i]; | |
| 194 } | |
| 195 } | |
| 196 NativeIllegalInstruction::insert(x); | |
| 197 } | |
| 198 | |
| 199 | |
| 200 void Relocation::pd_swap_out_breakpoint(address x, short* instrs, int instrlen) { | |
| 201 Untested("pd_swap_out_breakpoint"); | |
| 202 assert(NativeIllegalInstruction::instruction_size == sizeof(short), "right address unit for update"); | |
| 203 NativeInstruction* ni = nativeInstruction_at(x); | |
| 204 *(short*)ni->addr_at(0) = instrs[0]; | |
| 205 } | |
| 304 | 206 |
| 207 void poll_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) { | |
| 208 #ifdef _LP64 | |
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209 if (!Assembler::is_polling_page_far()) { |
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210 typedef Assembler::WhichOperand WhichOperand; |
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211 WhichOperand which = (WhichOperand) format(); |
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212 // This format is imm but it is really disp32 |
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213 which = Assembler::disp32_operand; |
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214 address orig_addr = old_addr_for(addr(), src, dest); |
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215 NativeInstruction* oni = nativeInstruction_at(orig_addr); |
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216 int32_t* orig_disp = (int32_t*) Assembler::locate_operand(orig_addr, which); |
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217 // This poll_addr is incorrect by the size of the instruction it is irrelevant |
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218 intptr_t poll_addr = (intptr_t)oni + *orig_disp; |
| 304 | 219 |
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220 NativeInstruction* ni = nativeInstruction_at(addr()); |
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221 intptr_t new_disp = poll_addr - (intptr_t) ni; |
| 304 | 222 |
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223 int32_t* disp = (int32_t*) Assembler::locate_operand(addr(), which); |
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224 * disp = (int32_t)new_disp; |
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225 } |
| 304 | 226 #endif // _LP64 |
| 227 } | |
| 228 | |
| 229 void poll_return_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) { | |
| 230 #ifdef _LP64 | |
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231 if (!Assembler::is_polling_page_far()) { |
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232 typedef Assembler::WhichOperand WhichOperand; |
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233 WhichOperand which = (WhichOperand) format(); |
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234 // This format is imm but it is really disp32 |
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235 which = Assembler::disp32_operand; |
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236 address orig_addr = old_addr_for(addr(), src, dest); |
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237 NativeInstruction* oni = nativeInstruction_at(orig_addr); |
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238 int32_t* orig_disp = (int32_t*) Assembler::locate_operand(orig_addr, which); |
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239 // This poll_addr is incorrect by the size of the instruction it is irrelevant |
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240 intptr_t poll_addr = (intptr_t)oni + *orig_disp; |
| 304 | 241 |
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242 NativeInstruction* ni = nativeInstruction_at(addr()); |
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243 intptr_t new_disp = poll_addr - (intptr_t) ni; |
| 304 | 244 |
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245 int32_t* disp = (int32_t*) Assembler::locate_operand(addr(), which); |
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246 * disp = (int32_t)new_disp; |
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247 } |
| 304 | 248 #endif // _LP64 |
| 249 } | |
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250 |
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251 void metadata_Relocation::pd_fix_value(address x) { |
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252 } |