annotate src/cpu/x86/vm/stubGenerator_x86_64.cpp @ 7212:291ffc492eb6

Merge with http://hg.openjdk.java.net/hsx/hsx25/hotspot/
author Doug Simon <doug.simon@oracle.com>
date Fri, 14 Dec 2012 14:35:13 +0100
parents e522a00b91aa d2f8c38e543d
children 989155e2d07a
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1 /*
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2 * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #include "precompiled.hpp"
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26 #include "asm/macroAssembler.hpp"
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27 #include "asm/macroAssembler.inline.hpp"
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28 #include "interpreter/interpreter.hpp"
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29 #include "nativeInst_x86.hpp"
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30 #include "oops/instanceOop.hpp"
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31 #include "oops/method.hpp"
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32 #include "oops/objArrayKlass.hpp"
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33 #include "oops/oop.inline.hpp"
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34 #include "prims/methodHandles.hpp"
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35 #include "runtime/frame.inline.hpp"
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36 #include "runtime/handles.inline.hpp"
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37 #include "runtime/sharedRuntime.hpp"
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38 #include "runtime/stubCodeGenerator.hpp"
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39 #include "runtime/stubRoutines.hpp"
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40 #include "runtime/thread.inline.hpp"
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41 #include "utilities/top.hpp"
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42 #ifdef COMPILER2
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43 #include "opto/runtime.hpp"
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44 #endif
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45
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46 // Declaration and definition of StubGenerator (no .hpp file).
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47 // For a more detailed description of the stub routine structure
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48 // see the comment in stubRoutines.hpp
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49
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50 #define __ _masm->
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51 #define TIMES_OOP (UseCompressedOops ? Address::times_4 : Address::times_8)
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52 #define a__ ((Assembler*)_masm)->
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53
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54 #ifdef PRODUCT
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55 #define BLOCK_COMMENT(str) /* nothing */
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56 #else
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57 #define BLOCK_COMMENT(str) __ block_comment(str)
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58 #endif
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59
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60 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
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61 const int MXCSR_MASK = 0xFFC0; // Mask out any pending exceptions
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62
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63 // Stub Code definitions
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64
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65 static address handle_unsafe_access() {
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66 JavaThread* thread = JavaThread::current();
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67 address pc = thread->saved_exception_pc();
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68 // pc is the instruction which we must emulate
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69 // doing a no-op is fine: return garbage from the load
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70 // therefore, compute npc
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71 address npc = Assembler::locate_next_instruction(pc);
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72
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73 // request an async exception
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74 thread->set_pending_unsafe_access_error();
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75
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76 // return address of next instruction to execute
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77 return npc;
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78 }
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79
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80 class StubGenerator: public StubCodeGenerator {
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81 private:
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82
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83 #ifdef PRODUCT
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84 #define inc_counter_np(counter) (0)
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85 #else
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86 void inc_counter_np_(int& counter) {
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87 // This can destroy rscratch1 if counter is far from the code cache
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88 __ incrementl(ExternalAddress((address)&counter));
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89 }
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90 #define inc_counter_np(counter) \
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91 BLOCK_COMMENT("inc_counter " #counter); \
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92 inc_counter_np_(counter);
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93 #endif
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94
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95 // Call stubs are used to call Java from C
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96 //
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97 // Linux Arguments:
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98 // c_rarg0: call wrapper address address
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99 // c_rarg1: result address
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100 // c_rarg2: result type BasicType
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101 // c_rarg3: method Method*
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102 // c_rarg4: (interpreter) entry point address
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103 // c_rarg5: parameters intptr_t*
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104 // 16(rbp): parameter size (in words) int
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105 // 24(rbp): thread Thread*
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106 //
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107 // [ return_from_Java ] <--- rsp
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108 // [ argument word n ]
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109 // ...
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110 // -12 [ argument word 1 ]
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111 // -11 [ saved r15 ] <--- rsp_after_call
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112 // -10 [ saved r14 ]
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113 // -9 [ saved r13 ]
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114 // -8 [ saved r12 ]
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115 // -7 [ saved rbx ]
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116 // -6 [ call wrapper ]
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117 // -5 [ result ]
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118 // -4 [ result type ]
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119 // -3 [ method ]
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120 // -2 [ entry point ]
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121 // -1 [ parameters ]
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122 // 0 [ saved rbp ] <--- rbp
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123 // 1 [ return address ]
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124 // 2 [ parameter size ]
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125 // 3 [ thread ]
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126 //
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127 // Windows Arguments:
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128 // c_rarg0: call wrapper address address
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129 // c_rarg1: result address
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130 // c_rarg2: result type BasicType
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131 // c_rarg3: method Method*
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132 // 48(rbp): (interpreter) entry point address
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133 // 56(rbp): parameters intptr_t*
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134 // 64(rbp): parameter size (in words) int
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135 // 72(rbp): thread Thread*
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136 //
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137 // [ return_from_Java ] <--- rsp
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138 // [ argument word n ]
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139 // ...
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140 // -28 [ argument word 1 ]
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141 // -27 [ saved xmm15 ] <--- rsp_after_call
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142 // [ saved xmm7-xmm14 ]
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143 // -9 [ saved xmm6 ] (each xmm register takes 2 slots)
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144 // -7 [ saved r15 ]
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145 // -6 [ saved r14 ]
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146 // -5 [ saved r13 ]
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147 // -4 [ saved r12 ]
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148 // -3 [ saved rdi ]
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149 // -2 [ saved rsi ]
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150 // -1 [ saved rbx ]
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151 // 0 [ saved rbp ] <--- rbp
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152 // 1 [ return address ]
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153 // 2 [ call wrapper ]
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154 // 3 [ result ]
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155 // 4 [ result type ]
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156 // 5 [ method ]
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157 // 6 [ entry point ]
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158 // 7 [ parameters ]
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159 // 8 [ parameter size ]
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160 // 9 [ thread ]
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161 //
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162 // Windows reserves the callers stack space for arguments 1-4.
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163 // We spill c_rarg0-c_rarg3 to this space.
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164
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165 // Call stub stack layout word offsets from rbp
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166 enum call_stub_layout {
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167 #ifdef _WIN64
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168 xmm_save_first = 6, // save from xmm6
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169 xmm_save_last = 15, // to xmm15
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170 xmm_save_base = -9,
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171 rsp_after_call_off = xmm_save_base - 2 * (xmm_save_last - xmm_save_first), // -27
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172 r15_off = -7,
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173 r14_off = -6,
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174 r13_off = -5,
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175 r12_off = -4,
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176 rdi_off = -3,
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177 rsi_off = -2,
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178 rbx_off = -1,
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179 rbp_off = 0,
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180 retaddr_off = 1,
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181 call_wrapper_off = 2,
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182 result_off = 3,
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183 result_type_off = 4,
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184 method_off = 5,
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185 entry_point_off = 6,
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186 parameters_off = 7,
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187 parameter_size_off = 8,
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188 thread_off = 9
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189 #else
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190 rsp_after_call_off = -12,
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191 mxcsr_off = rsp_after_call_off,
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192 r15_off = -11,
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193 r14_off = -10,
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194 r13_off = -9,
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195 r12_off = -8,
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196 rbx_off = -7,
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197 call_wrapper_off = -6,
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198 result_off = -5,
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199 result_type_off = -4,
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200 method_off = -3,
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201 entry_point_off = -2,
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202 parameters_off = -1,
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203 rbp_off = 0,
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204 retaddr_off = 1,
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205 parameter_size_off = 2,
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206 thread_off = 3
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207 #endif
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208 };
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209
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210 #ifdef _WIN64
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211 Address xmm_save(int reg) {
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212 assert(reg >= xmm_save_first && reg <= xmm_save_last, "XMM register number out of range");
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213 return Address(rbp, (xmm_save_base - (reg - xmm_save_first) * 2) * wordSize);
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214 }
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215 #endif
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216
0
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217 address generate_call_stub(address& return_address) {
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218 assert((int)frame::entry_frame_after_call_words == -(int)rsp_after_call_off + 1 &&
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219 (int)frame::entry_frame_call_wrapper_offset == (int)call_wrapper_off,
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220 "adjust this code");
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221 StubCodeMark mark(this, "StubRoutines", "call_stub");
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222 address start = __ pc();
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223
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224 // same as in generate_catch_exception()!
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225 const Address rsp_after_call(rbp, rsp_after_call_off * wordSize);
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226
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227 const Address call_wrapper (rbp, call_wrapper_off * wordSize);
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228 const Address result (rbp, result_off * wordSize);
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229 const Address result_type (rbp, result_type_off * wordSize);
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230 const Address method (rbp, method_off * wordSize);
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231 const Address entry_point (rbp, entry_point_off * wordSize);
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232 const Address parameters (rbp, parameters_off * wordSize);
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233 const Address parameter_size(rbp, parameter_size_off * wordSize);
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234
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235 // same as in generate_catch_exception()!
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236 const Address thread (rbp, thread_off * wordSize);
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237
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238 const Address r15_save(rbp, r15_off * wordSize);
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239 const Address r14_save(rbp, r14_off * wordSize);
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240 const Address r13_save(rbp, r13_off * wordSize);
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241 const Address r12_save(rbp, r12_off * wordSize);
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242 const Address rbx_save(rbp, rbx_off * wordSize);
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243
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244 // stub code
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245 __ enter();
304
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246 __ subptr(rsp, -rsp_after_call_off * wordSize);
0
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247
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248 // save register parameters
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249 #ifndef _WIN64
304
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250 __ movptr(parameters, c_rarg5); // parameters
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251 __ movptr(entry_point, c_rarg4); // entry_point
0
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252 #endif
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253
304
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254 __ movptr(method, c_rarg3); // method
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255 __ movl(result_type, c_rarg2); // result type
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256 __ movptr(result, c_rarg1); // result
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257 __ movptr(call_wrapper, c_rarg0); // call wrapper
0
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258
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259 // save regs belonging to calling function
304
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260 __ movptr(rbx_save, rbx);
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261 __ movptr(r12_save, r12);
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262 __ movptr(r13_save, r13);
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263 __ movptr(r14_save, r14);
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264 __ movptr(r15_save, r15);
0
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265 #ifdef _WIN64
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266 for (int i = 6; i <= 15; i++) {
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267 __ movdqu(xmm_save(i), as_XMMRegister(i));
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268 }
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269
0
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270 const Address rdi_save(rbp, rdi_off * wordSize);
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271 const Address rsi_save(rbp, rsi_off * wordSize);
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272
304
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273 __ movptr(rsi_save, rsi);
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274 __ movptr(rdi_save, rdi);
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275 #else
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276 const Address mxcsr_save(rbp, mxcsr_off * wordSize);
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277 {
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278 Label skip_ldmx;
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279 __ stmxcsr(mxcsr_save);
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280 __ movl(rax, mxcsr_save);
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281 __ andl(rax, MXCSR_MASK); // Only check control and mask bits
304
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282 ExternalAddress mxcsr_std(StubRoutines::x86::mxcsr_std());
0
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283 __ cmp32(rax, mxcsr_std);
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284 __ jcc(Assembler::equal, skip_ldmx);
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285 __ ldmxcsr(mxcsr_std);
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286 __ bind(skip_ldmx);
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287 }
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288 #endif
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289
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290 // Load up thread register
304
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291 __ movptr(r15_thread, thread);
113
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292 __ reinit_heapbase();
0
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293
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294 #ifdef ASSERT
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295 // make sure we have no pending exceptions
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296 {
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297 Label L;
304
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298 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
0
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299 __ jcc(Assembler::equal, L);
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300 __ stop("StubRoutines::call_stub: entered with pending exception");
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301 __ bind(L);
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302 }
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303 #endif
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304
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305 // pass parameters if any
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306 BLOCK_COMMENT("pass parameters if any");
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307 Label parameters_done;
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308 __ movl(c_rarg3, parameter_size);
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309 __ testl(c_rarg3, c_rarg3);
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310 __ jcc(Assembler::zero, parameters_done);
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311
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312 Label loop;
304
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313 __ movptr(c_rarg2, parameters); // parameter pointer
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314 __ movl(c_rarg1, c_rarg3); // parameter counter is in c_rarg1
0
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315 __ BIND(loop);
304
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316 __ movptr(rax, Address(c_rarg2, 0));// get parameter
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317 __ addptr(c_rarg2, wordSize); // advance to next parameter
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318 __ decrementl(c_rarg1); // decrement counter
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319 __ push(rax); // pass parameter
0
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320 __ jcc(Assembler::notZero, loop);
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321
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322 // call Java function
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323 __ BIND(parameters_done);
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324 __ movptr(rbx, method); // get Method*
304
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325 __ movptr(c_rarg1, entry_point); // get entry_point
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326 __ mov(r13, rsp); // set sender sp
0
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327 BLOCK_COMMENT("call Java function");
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328 __ call(c_rarg1);
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329
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330 BLOCK_COMMENT("call_stub_return_address:");
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331 return_address = __ pc();
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332
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333 // store result depending on type (everything that is not
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334 // T_OBJECT, T_LONG, T_FLOAT or T_DOUBLE is treated as T_INT)
304
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335 __ movptr(c_rarg0, result);
0
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336 Label is_long, is_float, is_double, exit;
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337 __ movl(c_rarg1, result_type);
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338 __ cmpl(c_rarg1, T_OBJECT);
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339 __ jcc(Assembler::equal, is_long);
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340 __ cmpl(c_rarg1, T_LONG);
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341 __ jcc(Assembler::equal, is_long);
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342 __ cmpl(c_rarg1, T_FLOAT);
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343 __ jcc(Assembler::equal, is_float);
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344 __ cmpl(c_rarg1, T_DOUBLE);
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345 __ jcc(Assembler::equal, is_double);
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346
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347 // handle T_INT case
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348 __ movl(Address(c_rarg0, 0), rax);
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349
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350 __ BIND(exit);
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351
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352 // pop parameters
304
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353 __ lea(rsp, rsp_after_call);
0
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354
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355 #ifdef ASSERT
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356 // verify that threads correspond
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357 {
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358 Label L, S;
304
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359 __ cmpptr(r15_thread, thread);
0
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360 __ jcc(Assembler::notEqual, S);
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361 __ get_thread(rbx);
304
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diff changeset
362 __ cmpptr(r15_thread, rbx);
0
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363 __ jcc(Assembler::equal, L);
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364 __ bind(S);
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365 __ jcc(Assembler::equal, L);
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366 __ stop("StubRoutines::call_stub: threads must correspond");
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367 __ bind(L);
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368 }
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369 #endif
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370
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371 // restore regs belonging to calling function
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372 #ifdef _WIN64
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373 for (int i = 15; i >= 6; i--) {
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374 __ movdqu(as_XMMRegister(i), xmm_save(i));
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375 }
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376 #endif
304
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parents: 249
diff changeset
377 __ movptr(r15, r15_save);
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parents: 249
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378 __ movptr(r14, r14_save);
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parents: 249
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379 __ movptr(r13, r13_save);
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parents: 249
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380 __ movptr(r12, r12_save);
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parents: 249
diff changeset
381 __ movptr(rbx, rbx_save);
0
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382
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383 #ifdef _WIN64
304
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parents: 249
diff changeset
384 __ movptr(rdi, rdi_save);
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385 __ movptr(rsi, rsi_save);
0
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386 #else
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387 __ ldmxcsr(mxcsr_save);
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388 #endif
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389
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390 // restore rsp
304
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parents: 249
diff changeset
391 __ addptr(rsp, -rsp_after_call_off * wordSize);
0
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392
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393 // return
304
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parents: 249
diff changeset
394 __ pop(rbp);
0
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395 __ ret(0);
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396
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397 // handle return types different from T_INT
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398 __ BIND(is_long);
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399 __ movq(Address(c_rarg0, 0), rax);
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400 __ jmp(exit);
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401
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402 __ BIND(is_float);
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parents:
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403 __ movflt(Address(c_rarg0, 0), xmm0);
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parents:
diff changeset
404 __ jmp(exit);
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parents:
diff changeset
405
a61af66fc99e Initial load
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parents:
diff changeset
406 __ BIND(is_double);
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parents:
diff changeset
407 __ movdbl(Address(c_rarg0, 0), xmm0);
a61af66fc99e Initial load
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parents:
diff changeset
408 __ jmp(exit);
a61af66fc99e Initial load
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parents:
diff changeset
409
a61af66fc99e Initial load
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parents:
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410 return start;
a61af66fc99e Initial load
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parents:
diff changeset
411 }
a61af66fc99e Initial load
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parents:
diff changeset
412
a61af66fc99e Initial load
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parents:
diff changeset
413 // Return point for a Java call if there's an exception thrown in
a61af66fc99e Initial load
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parents:
diff changeset
414 // Java code. The exception is caught and transformed into a
a61af66fc99e Initial load
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parents:
diff changeset
415 // pending exception stored in JavaThread that can be tested from
a61af66fc99e Initial load
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parents:
diff changeset
416 // within the VM.
a61af66fc99e Initial load
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parents:
diff changeset
417 //
a61af66fc99e Initial load
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parents:
diff changeset
418 // Note: Usually the parameters are removed by the callee. In case
a61af66fc99e Initial load
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parents:
diff changeset
419 // of an exception crossing an activation frame boundary, that is
a61af66fc99e Initial load
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parents:
diff changeset
420 // not the case if the callee is compiled code => need to setup the
a61af66fc99e Initial load
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parents:
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421 // rsp.
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parents:
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422 //
a61af66fc99e Initial load
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parents:
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423 // rax: exception oop
a61af66fc99e Initial load
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parents:
diff changeset
424
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parents:
diff changeset
425 address generate_catch_exception() {
a61af66fc99e Initial load
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parents:
diff changeset
426 StubCodeMark mark(this, "StubRoutines", "catch_exception");
a61af66fc99e Initial load
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parents:
diff changeset
427 address start = __ pc();
a61af66fc99e Initial load
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parents:
diff changeset
428
a61af66fc99e Initial load
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parents:
diff changeset
429 // same as in generate_call_stub():
a61af66fc99e Initial load
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parents:
diff changeset
430 const Address rsp_after_call(rbp, rsp_after_call_off * wordSize);
a61af66fc99e Initial load
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parents:
diff changeset
431 const Address thread (rbp, thread_off * wordSize);
a61af66fc99e Initial load
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parents:
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432
a61af66fc99e Initial load
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parents:
diff changeset
433 #ifdef ASSERT
a61af66fc99e Initial load
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parents:
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434 // verify that threads correspond
a61af66fc99e Initial load
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parents:
diff changeset
435 {
a61af66fc99e Initial load
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parents:
diff changeset
436 Label L, S;
304
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parents: 249
diff changeset
437 __ cmpptr(r15_thread, thread);
0
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parents:
diff changeset
438 __ jcc(Assembler::notEqual, S);
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parents:
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439 __ get_thread(rbx);
304
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parents: 249
diff changeset
440 __ cmpptr(r15_thread, rbx);
0
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parents:
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441 __ jcc(Assembler::equal, L);
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parents:
diff changeset
442 __ bind(S);
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parents:
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443 __ stop("StubRoutines::catch_exception: threads must correspond");
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parents:
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444 __ bind(L);
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parents:
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445 }
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parents:
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446 #endif
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parents:
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447
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448 // set pending exception
a61af66fc99e Initial load
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parents:
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449 __ verify_oop(rax);
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450
304
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diff changeset
451 __ movptr(Address(r15_thread, Thread::pending_exception_offset()), rax);
0
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452 __ lea(rscratch1, ExternalAddress((address)__FILE__));
304
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parents: 249
diff changeset
453 __ movptr(Address(r15_thread, Thread::exception_file_offset()), rscratch1);
0
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parents:
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454 __ movl(Address(r15_thread, Thread::exception_line_offset()), (int) __LINE__);
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parents:
diff changeset
455
a61af66fc99e Initial load
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parents:
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456 // complete return to VM
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parents:
diff changeset
457 assert(StubRoutines::_call_stub_return_address != NULL,
a61af66fc99e Initial load
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parents:
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458 "_call_stub_return_address must have been generated before");
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parents:
diff changeset
459 __ jump(RuntimeAddress(StubRoutines::_call_stub_return_address));
a61af66fc99e Initial load
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parents:
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460
a61af66fc99e Initial load
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parents:
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461 return start;
a61af66fc99e Initial load
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parents:
diff changeset
462 }
a61af66fc99e Initial load
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parents:
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463
a61af66fc99e Initial load
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parents:
diff changeset
464 // Continuation point for runtime calls returning with a pending
a61af66fc99e Initial load
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parents:
diff changeset
465 // exception. The pending exception check happened in the runtime
a61af66fc99e Initial load
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parents:
diff changeset
466 // or native call stub. The pending exception in Thread is
a61af66fc99e Initial load
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parents:
diff changeset
467 // converted into a Java-level exception.
a61af66fc99e Initial load
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parents:
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468 //
a61af66fc99e Initial load
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parents:
diff changeset
469 // Contract with Java-level exception handlers:
a61af66fc99e Initial load
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parents:
diff changeset
470 // rax: exception
a61af66fc99e Initial load
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parents:
diff changeset
471 // rdx: throwing pc
a61af66fc99e Initial load
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parents:
diff changeset
472 //
a61af66fc99e Initial load
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parents:
diff changeset
473 // NOTE: At entry of this stub, exception-pc must be on stack !!
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parents:
diff changeset
474
a61af66fc99e Initial load
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parents:
diff changeset
475 address generate_forward_exception() {
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parents:
diff changeset
476 StubCodeMark mark(this, "StubRoutines", "forward exception");
a61af66fc99e Initial load
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parents:
diff changeset
477 address start = __ pc();
a61af66fc99e Initial load
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parents:
diff changeset
478
a61af66fc99e Initial load
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parents:
diff changeset
479 // Upon entry, the sp points to the return address returning into
a61af66fc99e Initial load
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parents:
diff changeset
480 // Java (interpreted or compiled) code; i.e., the return address
a61af66fc99e Initial load
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parents:
diff changeset
481 // becomes the throwing pc.
a61af66fc99e Initial load
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parents:
diff changeset
482 //
a61af66fc99e Initial load
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parents:
diff changeset
483 // Arguments pushed before the runtime call are still on the stack
a61af66fc99e Initial load
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parents:
diff changeset
484 // but the exception handler will reset the stack pointer ->
a61af66fc99e Initial load
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parents:
diff changeset
485 // ignore them. A potential result in registers can be ignored as
a61af66fc99e Initial load
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parents:
diff changeset
486 // well.
a61af66fc99e Initial load
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parents:
diff changeset
487
a61af66fc99e Initial load
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parents:
diff changeset
488 #ifdef ASSERT
a61af66fc99e Initial load
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parents:
diff changeset
489 // make sure this code is only executed if there is a pending exception
a61af66fc99e Initial load
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parents:
diff changeset
490 {
a61af66fc99e Initial load
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parents:
diff changeset
491 Label L;
304
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parents: 249
diff changeset
492 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t) NULL);
0
a61af66fc99e Initial load
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parents:
diff changeset
493 __ jcc(Assembler::notEqual, L);
a61af66fc99e Initial load
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parents:
diff changeset
494 __ stop("StubRoutines::forward exception: no pending exception (1)");
a61af66fc99e Initial load
duke
parents:
diff changeset
495 __ bind(L);
a61af66fc99e Initial load
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parents:
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496 }
a61af66fc99e Initial load
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parents:
diff changeset
497 #endif
a61af66fc99e Initial load
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parents:
diff changeset
498
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parents:
diff changeset
499 // compute exception handler into rbx
304
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diff changeset
500 __ movptr(c_rarg0, Address(rsp, 0));
0
a61af66fc99e Initial load
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parents:
diff changeset
501 BLOCK_COMMENT("call exception_handler_for_return_address");
a61af66fc99e Initial load
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parents:
diff changeset
502 __ call_VM_leaf(CAST_FROM_FN_PTR(address,
a61af66fc99e Initial load
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parents:
diff changeset
503 SharedRuntime::exception_handler_for_return_address),
1295
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1192
diff changeset
504 r15_thread, c_rarg0);
304
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parents: 249
diff changeset
505 __ mov(rbx, rax);
0
a61af66fc99e Initial load
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parents:
diff changeset
506
a61af66fc99e Initial load
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parents:
diff changeset
507 // setup rax & rdx, remove return address & clear pending exception
304
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parents: 249
diff changeset
508 __ pop(rdx);
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parents: 249
diff changeset
509 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
512
db4caa99ef11 6787106: Hotspot 32 bit build fails on platforms having different definitions for intptr_t & int32_t
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parents: 405
diff changeset
510 __ movptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
511
a61af66fc99e Initial load
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parents:
diff changeset
512 #ifdef ASSERT
a61af66fc99e Initial load
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parents:
diff changeset
513 // make sure exception is set
a61af66fc99e Initial load
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parents:
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514 {
a61af66fc99e Initial load
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parents:
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515 Label L;
304
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parents: 249
diff changeset
516 __ testptr(rax, rax);
0
a61af66fc99e Initial load
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parents:
diff changeset
517 __ jcc(Assembler::notEqual, L);
a61af66fc99e Initial load
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parents:
diff changeset
518 __ stop("StubRoutines::forward exception: no pending exception (2)");
a61af66fc99e Initial load
duke
parents:
diff changeset
519 __ bind(L);
a61af66fc99e Initial load
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parents:
diff changeset
520 }
a61af66fc99e Initial load
duke
parents:
diff changeset
521 #endif
a61af66fc99e Initial load
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parents:
diff changeset
522
a61af66fc99e Initial load
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parents:
diff changeset
523 // continue at exception handler (return address removed)
a61af66fc99e Initial load
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parents:
diff changeset
524 // rax: exception
a61af66fc99e Initial load
duke
parents:
diff changeset
525 // rbx: exception handler
a61af66fc99e Initial load
duke
parents:
diff changeset
526 // rdx: throwing pc
a61af66fc99e Initial load
duke
parents:
diff changeset
527 __ verify_oop(rax);
a61af66fc99e Initial load
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parents:
diff changeset
528 __ jmp(rbx);
a61af66fc99e Initial load
duke
parents:
diff changeset
529
a61af66fc99e Initial load
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parents:
diff changeset
530 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
531 }
a61af66fc99e Initial load
duke
parents:
diff changeset
532
a61af66fc99e Initial load
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parents:
diff changeset
533 // Support for jint atomic::xchg(jint exchange_value, volatile jint* dest)
a61af66fc99e Initial load
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parents:
diff changeset
534 //
a61af66fc99e Initial load
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parents:
diff changeset
535 // Arguments :
a61af66fc99e Initial load
duke
parents:
diff changeset
536 // c_rarg0: exchange_value
a61af66fc99e Initial load
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parents:
diff changeset
537 // c_rarg0: dest
a61af66fc99e Initial load
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parents:
diff changeset
538 //
a61af66fc99e Initial load
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parents:
diff changeset
539 // Result:
a61af66fc99e Initial load
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parents:
diff changeset
540 // *dest <- ex, return (orig *dest)
a61af66fc99e Initial load
duke
parents:
diff changeset
541 address generate_atomic_xchg() {
a61af66fc99e Initial load
duke
parents:
diff changeset
542 StubCodeMark mark(this, "StubRoutines", "atomic_xchg");
a61af66fc99e Initial load
duke
parents:
diff changeset
543 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
544
a61af66fc99e Initial load
duke
parents:
diff changeset
545 __ movl(rax, c_rarg0); // Copy to eax we need a return value anyhow
a61af66fc99e Initial load
duke
parents:
diff changeset
546 __ xchgl(rax, Address(c_rarg1, 0)); // automatic LOCK
a61af66fc99e Initial load
duke
parents:
diff changeset
547 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
548
a61af66fc99e Initial load
duke
parents:
diff changeset
549 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
550 }
a61af66fc99e Initial load
duke
parents:
diff changeset
551
a61af66fc99e Initial load
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parents:
diff changeset
552 // Support for intptr_t atomic::xchg_ptr(intptr_t exchange_value, volatile intptr_t* dest)
a61af66fc99e Initial load
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parents:
diff changeset
553 //
a61af66fc99e Initial load
duke
parents:
diff changeset
554 // Arguments :
a61af66fc99e Initial load
duke
parents:
diff changeset
555 // c_rarg0: exchange_value
a61af66fc99e Initial load
duke
parents:
diff changeset
556 // c_rarg1: dest
a61af66fc99e Initial load
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parents:
diff changeset
557 //
a61af66fc99e Initial load
duke
parents:
diff changeset
558 // Result:
a61af66fc99e Initial load
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parents:
diff changeset
559 // *dest <- ex, return (orig *dest)
a61af66fc99e Initial load
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parents:
diff changeset
560 address generate_atomic_xchg_ptr() {
a61af66fc99e Initial load
duke
parents:
diff changeset
561 StubCodeMark mark(this, "StubRoutines", "atomic_xchg_ptr");
a61af66fc99e Initial load
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parents:
diff changeset
562 address start = __ pc();
a61af66fc99e Initial load
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parents:
diff changeset
563
304
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parents: 249
diff changeset
564 __ movptr(rax, c_rarg0); // Copy to eax we need a return value anyhow
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parents: 249
diff changeset
565 __ xchgptr(rax, Address(c_rarg1, 0)); // automatic LOCK
0
a61af66fc99e Initial load
duke
parents:
diff changeset
566 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
567
a61af66fc99e Initial load
duke
parents:
diff changeset
568 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
569 }
a61af66fc99e Initial load
duke
parents:
diff changeset
570
a61af66fc99e Initial load
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parents:
diff changeset
571 // Support for jint atomic::atomic_cmpxchg(jint exchange_value, volatile jint* dest,
a61af66fc99e Initial load
duke
parents:
diff changeset
572 // jint compare_value)
a61af66fc99e Initial load
duke
parents:
diff changeset
573 //
a61af66fc99e Initial load
duke
parents:
diff changeset
574 // Arguments :
a61af66fc99e Initial load
duke
parents:
diff changeset
575 // c_rarg0: exchange_value
a61af66fc99e Initial load
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parents:
diff changeset
576 // c_rarg1: dest
a61af66fc99e Initial load
duke
parents:
diff changeset
577 // c_rarg2: compare_value
a61af66fc99e Initial load
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parents:
diff changeset
578 //
a61af66fc99e Initial load
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parents:
diff changeset
579 // Result:
a61af66fc99e Initial load
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parents:
diff changeset
580 // if ( compare_value == *dest ) {
a61af66fc99e Initial load
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parents:
diff changeset
581 // *dest = exchange_value
a61af66fc99e Initial load
duke
parents:
diff changeset
582 // return compare_value;
a61af66fc99e Initial load
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parents:
diff changeset
583 // else
a61af66fc99e Initial load
duke
parents:
diff changeset
584 // return *dest;
a61af66fc99e Initial load
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parents:
diff changeset
585 address generate_atomic_cmpxchg() {
a61af66fc99e Initial load
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parents:
diff changeset
586 StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg");
a61af66fc99e Initial load
duke
parents:
diff changeset
587 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
588
a61af66fc99e Initial load
duke
parents:
diff changeset
589 __ movl(rax, c_rarg2);
a61af66fc99e Initial load
duke
parents:
diff changeset
590 if ( os::is_MP() ) __ lock();
a61af66fc99e Initial load
duke
parents:
diff changeset
591 __ cmpxchgl(c_rarg0, Address(c_rarg1, 0));
a61af66fc99e Initial load
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parents:
diff changeset
592 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
593
a61af66fc99e Initial load
duke
parents:
diff changeset
594 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
595 }
a61af66fc99e Initial load
duke
parents:
diff changeset
596
a61af66fc99e Initial load
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parents:
diff changeset
597 // Support for jint atomic::atomic_cmpxchg_long(jlong exchange_value,
a61af66fc99e Initial load
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parents:
diff changeset
598 // volatile jlong* dest,
a61af66fc99e Initial load
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parents:
diff changeset
599 // jlong compare_value)
a61af66fc99e Initial load
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parents:
diff changeset
600 // Arguments :
a61af66fc99e Initial load
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parents:
diff changeset
601 // c_rarg0: exchange_value
a61af66fc99e Initial load
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parents:
diff changeset
602 // c_rarg1: dest
a61af66fc99e Initial load
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parents:
diff changeset
603 // c_rarg2: compare_value
a61af66fc99e Initial load
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parents:
diff changeset
604 //
a61af66fc99e Initial load
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parents:
diff changeset
605 // Result:
a61af66fc99e Initial load
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parents:
diff changeset
606 // if ( compare_value == *dest ) {
a61af66fc99e Initial load
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parents:
diff changeset
607 // *dest = exchange_value
a61af66fc99e Initial load
duke
parents:
diff changeset
608 // return compare_value;
a61af66fc99e Initial load
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parents:
diff changeset
609 // else
a61af66fc99e Initial load
duke
parents:
diff changeset
610 // return *dest;
a61af66fc99e Initial load
duke
parents:
diff changeset
611 address generate_atomic_cmpxchg_long() {
a61af66fc99e Initial load
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parents:
diff changeset
612 StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg_long");
a61af66fc99e Initial load
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parents:
diff changeset
613 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
614
a61af66fc99e Initial load
duke
parents:
diff changeset
615 __ movq(rax, c_rarg2);
a61af66fc99e Initial load
duke
parents:
diff changeset
616 if ( os::is_MP() ) __ lock();
a61af66fc99e Initial load
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parents:
diff changeset
617 __ cmpxchgq(c_rarg0, Address(c_rarg1, 0));
a61af66fc99e Initial load
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parents:
diff changeset
618 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
619
a61af66fc99e Initial load
duke
parents:
diff changeset
620 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
621 }
a61af66fc99e Initial load
duke
parents:
diff changeset
622
a61af66fc99e Initial load
duke
parents:
diff changeset
623 // Support for jint atomic::add(jint add_value, volatile jint* dest)
a61af66fc99e Initial load
duke
parents:
diff changeset
624 //
a61af66fc99e Initial load
duke
parents:
diff changeset
625 // Arguments :
a61af66fc99e Initial load
duke
parents:
diff changeset
626 // c_rarg0: add_value
a61af66fc99e Initial load
duke
parents:
diff changeset
627 // c_rarg1: dest
a61af66fc99e Initial load
duke
parents:
diff changeset
628 //
a61af66fc99e Initial load
duke
parents:
diff changeset
629 // Result:
a61af66fc99e Initial load
duke
parents:
diff changeset
630 // *dest += add_value
a61af66fc99e Initial load
duke
parents:
diff changeset
631 // return *dest;
a61af66fc99e Initial load
duke
parents:
diff changeset
632 address generate_atomic_add() {
a61af66fc99e Initial load
duke
parents:
diff changeset
633 StubCodeMark mark(this, "StubRoutines", "atomic_add");
a61af66fc99e Initial load
duke
parents:
diff changeset
634 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
635
a61af66fc99e Initial load
duke
parents:
diff changeset
636 __ movl(rax, c_rarg0);
a61af66fc99e Initial load
duke
parents:
diff changeset
637 if ( os::is_MP() ) __ lock();
a61af66fc99e Initial load
duke
parents:
diff changeset
638 __ xaddl(Address(c_rarg1, 0), c_rarg0);
a61af66fc99e Initial load
duke
parents:
diff changeset
639 __ addl(rax, c_rarg0);
a61af66fc99e Initial load
duke
parents:
diff changeset
640 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
641
a61af66fc99e Initial load
duke
parents:
diff changeset
642 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
643 }
a61af66fc99e Initial load
duke
parents:
diff changeset
644
a61af66fc99e Initial load
duke
parents:
diff changeset
645 // Support for intptr_t atomic::add_ptr(intptr_t add_value, volatile intptr_t* dest)
a61af66fc99e Initial load
duke
parents:
diff changeset
646 //
a61af66fc99e Initial load
duke
parents:
diff changeset
647 // Arguments :
a61af66fc99e Initial load
duke
parents:
diff changeset
648 // c_rarg0: add_value
a61af66fc99e Initial load
duke
parents:
diff changeset
649 // c_rarg1: dest
a61af66fc99e Initial load
duke
parents:
diff changeset
650 //
a61af66fc99e Initial load
duke
parents:
diff changeset
651 // Result:
a61af66fc99e Initial load
duke
parents:
diff changeset
652 // *dest += add_value
a61af66fc99e Initial load
duke
parents:
diff changeset
653 // return *dest;
a61af66fc99e Initial load
duke
parents:
diff changeset
654 address generate_atomic_add_ptr() {
a61af66fc99e Initial load
duke
parents:
diff changeset
655 StubCodeMark mark(this, "StubRoutines", "atomic_add_ptr");
a61af66fc99e Initial load
duke
parents:
diff changeset
656 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
657
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
658 __ movptr(rax, c_rarg0); // Copy to eax we need a return value anyhow
0
a61af66fc99e Initial load
duke
parents:
diff changeset
659 if ( os::is_MP() ) __ lock();
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
660 __ xaddptr(Address(c_rarg1, 0), c_rarg0);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
661 __ addptr(rax, c_rarg0);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
662 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
663
a61af66fc99e Initial load
duke
parents:
diff changeset
664 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
665 }
a61af66fc99e Initial load
duke
parents:
diff changeset
666
a61af66fc99e Initial load
duke
parents:
diff changeset
667 // Support for intptr_t OrderAccess::fence()
a61af66fc99e Initial load
duke
parents:
diff changeset
668 //
a61af66fc99e Initial load
duke
parents:
diff changeset
669 // Arguments :
a61af66fc99e Initial load
duke
parents:
diff changeset
670 //
a61af66fc99e Initial load
duke
parents:
diff changeset
671 // Result:
a61af66fc99e Initial load
duke
parents:
diff changeset
672 address generate_orderaccess_fence() {
a61af66fc99e Initial load
duke
parents:
diff changeset
673 StubCodeMark mark(this, "StubRoutines", "orderaccess_fence");
a61af66fc99e Initial load
duke
parents:
diff changeset
674 address start = __ pc();
671
d0994e5bebce 6822204: volatile fences should prefer lock:addl to actual mfence instructions
never
parents: 647
diff changeset
675 __ membar(Assembler::StoreLoad);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
676 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
677
a61af66fc99e Initial load
duke
parents:
diff changeset
678 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
679 }
a61af66fc99e Initial load
duke
parents:
diff changeset
680
a61af66fc99e Initial load
duke
parents:
diff changeset
681 // Support for intptr_t get_previous_fp()
a61af66fc99e Initial load
duke
parents:
diff changeset
682 //
a61af66fc99e Initial load
duke
parents:
diff changeset
683 // This routine is used to find the previous frame pointer for the
a61af66fc99e Initial load
duke
parents:
diff changeset
684 // caller (current_frame_guess). This is used as part of debugging
a61af66fc99e Initial load
duke
parents:
diff changeset
685 // ps() is seemingly lost trying to find frames.
a61af66fc99e Initial load
duke
parents:
diff changeset
686 // This code assumes that caller current_frame_guess) has a frame.
a61af66fc99e Initial load
duke
parents:
diff changeset
687 address generate_get_previous_fp() {
a61af66fc99e Initial load
duke
parents:
diff changeset
688 StubCodeMark mark(this, "StubRoutines", "get_previous_fp");
a61af66fc99e Initial load
duke
parents:
diff changeset
689 const Address old_fp(rbp, 0);
a61af66fc99e Initial load
duke
parents:
diff changeset
690 const Address older_fp(rax, 0);
a61af66fc99e Initial load
duke
parents:
diff changeset
691 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
692
a61af66fc99e Initial load
duke
parents:
diff changeset
693 __ enter();
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
694 __ movptr(rax, old_fp); // callers fp
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
695 __ movptr(rax, older_fp); // the frame for ps()
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
696 __ pop(rbp);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
697 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
698
a61af66fc99e Initial load
duke
parents:
diff changeset
699 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
700 }
a61af66fc99e Initial load
duke
parents:
diff changeset
701
5903
da4be62fb889 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 4941
diff changeset
702 // Support for intptr_t get_previous_sp()
da4be62fb889 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 4941
diff changeset
703 //
da4be62fb889 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 4941
diff changeset
704 // This routine is used to find the previous stack pointer for the
da4be62fb889 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 4941
diff changeset
705 // caller.
da4be62fb889 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 4941
diff changeset
706 address generate_get_previous_sp() {
da4be62fb889 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 4941
diff changeset
707 StubCodeMark mark(this, "StubRoutines", "get_previous_sp");
da4be62fb889 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 4941
diff changeset
708 address start = __ pc();
da4be62fb889 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 4941
diff changeset
709
da4be62fb889 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 4941
diff changeset
710 __ movptr(rax, rsp);
da4be62fb889 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 4941
diff changeset
711 __ addptr(rax, 8); // return address is at the top of the stack.
da4be62fb889 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 4941
diff changeset
712 __ ret(0);
da4be62fb889 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 4941
diff changeset
713
da4be62fb889 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 4941
diff changeset
714 return start;
da4be62fb889 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 4941
diff changeset
715 }
da4be62fb889 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 4941
diff changeset
716
0
a61af66fc99e Initial load
duke
parents:
diff changeset
717 //----------------------------------------------------------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
718 // Support for void verify_mxcsr()
a61af66fc99e Initial load
duke
parents:
diff changeset
719 //
a61af66fc99e Initial load
duke
parents:
diff changeset
720 // This routine is used with -Xcheck:jni to verify that native
a61af66fc99e Initial load
duke
parents:
diff changeset
721 // JNI code does not return to Java code without restoring the
a61af66fc99e Initial load
duke
parents:
diff changeset
722 // MXCSR register to our expected state.
a61af66fc99e Initial load
duke
parents:
diff changeset
723
a61af66fc99e Initial load
duke
parents:
diff changeset
724 address generate_verify_mxcsr() {
a61af66fc99e Initial load
duke
parents:
diff changeset
725 StubCodeMark mark(this, "StubRoutines", "verify_mxcsr");
a61af66fc99e Initial load
duke
parents:
diff changeset
726 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
727
a61af66fc99e Initial load
duke
parents:
diff changeset
728 const Address mxcsr_save(rsp, 0);
a61af66fc99e Initial load
duke
parents:
diff changeset
729
a61af66fc99e Initial load
duke
parents:
diff changeset
730 if (CheckJNICalls) {
a61af66fc99e Initial load
duke
parents:
diff changeset
731 Label ok_ret;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
732 __ push(rax);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
733 __ subptr(rsp, wordSize); // allocate a temp location
0
a61af66fc99e Initial load
duke
parents:
diff changeset
734 __ stmxcsr(mxcsr_save);
a61af66fc99e Initial load
duke
parents:
diff changeset
735 __ movl(rax, mxcsr_save);
a61af66fc99e Initial load
duke
parents:
diff changeset
736 __ andl(rax, MXCSR_MASK); // Only check control and mask bits
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
737 __ cmpl(rax, *(int *)(StubRoutines::x86::mxcsr_std()));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
738 __ jcc(Assembler::equal, ok_ret);
a61af66fc99e Initial load
duke
parents:
diff changeset
739
a61af66fc99e Initial load
duke
parents:
diff changeset
740 __ warn("MXCSR changed by native JNI code, use -XX:+RestoreMXCSROnJNICall");
a61af66fc99e Initial load
duke
parents:
diff changeset
741
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
742 __ ldmxcsr(ExternalAddress(StubRoutines::x86::mxcsr_std()));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
743
a61af66fc99e Initial load
duke
parents:
diff changeset
744 __ bind(ok_ret);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
745 __ addptr(rsp, wordSize);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
746 __ pop(rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
747 }
a61af66fc99e Initial load
duke
parents:
diff changeset
748
a61af66fc99e Initial load
duke
parents:
diff changeset
749 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
750
a61af66fc99e Initial load
duke
parents:
diff changeset
751 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
752 }
a61af66fc99e Initial load
duke
parents:
diff changeset
753
a61af66fc99e Initial load
duke
parents:
diff changeset
754 address generate_f2i_fixup() {
a61af66fc99e Initial load
duke
parents:
diff changeset
755 StubCodeMark mark(this, "StubRoutines", "f2i_fixup");
a61af66fc99e Initial load
duke
parents:
diff changeset
756 Address inout(rsp, 5 * wordSize); // return address + 4 saves
a61af66fc99e Initial load
duke
parents:
diff changeset
757
a61af66fc99e Initial load
duke
parents:
diff changeset
758 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
759
a61af66fc99e Initial load
duke
parents:
diff changeset
760 Label L;
a61af66fc99e Initial load
duke
parents:
diff changeset
761
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
762 __ push(rax);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
763 __ push(c_rarg3);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
764 __ push(c_rarg2);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
765 __ push(c_rarg1);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
766
a61af66fc99e Initial load
duke
parents:
diff changeset
767 __ movl(rax, 0x7f800000);
a61af66fc99e Initial load
duke
parents:
diff changeset
768 __ xorl(c_rarg3, c_rarg3);
a61af66fc99e Initial load
duke
parents:
diff changeset
769 __ movl(c_rarg2, inout);
a61af66fc99e Initial load
duke
parents:
diff changeset
770 __ movl(c_rarg1, c_rarg2);
a61af66fc99e Initial load
duke
parents:
diff changeset
771 __ andl(c_rarg1, 0x7fffffff);
a61af66fc99e Initial load
duke
parents:
diff changeset
772 __ cmpl(rax, c_rarg1); // NaN? -> 0
a61af66fc99e Initial load
duke
parents:
diff changeset
773 __ jcc(Assembler::negative, L);
a61af66fc99e Initial load
duke
parents:
diff changeset
774 __ testl(c_rarg2, c_rarg2); // signed ? min_jint : max_jint
a61af66fc99e Initial load
duke
parents:
diff changeset
775 __ movl(c_rarg3, 0x80000000);
a61af66fc99e Initial load
duke
parents:
diff changeset
776 __ movl(rax, 0x7fffffff);
a61af66fc99e Initial load
duke
parents:
diff changeset
777 __ cmovl(Assembler::positive, c_rarg3, rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
778
a61af66fc99e Initial load
duke
parents:
diff changeset
779 __ bind(L);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
780 __ movptr(inout, c_rarg3);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
781
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
782 __ pop(c_rarg1);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
783 __ pop(c_rarg2);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
784 __ pop(c_rarg3);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
785 __ pop(rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
786
a61af66fc99e Initial load
duke
parents:
diff changeset
787 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
788
a61af66fc99e Initial load
duke
parents:
diff changeset
789 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
790 }
a61af66fc99e Initial load
duke
parents:
diff changeset
791
a61af66fc99e Initial load
duke
parents:
diff changeset
792 address generate_f2l_fixup() {
a61af66fc99e Initial load
duke
parents:
diff changeset
793 StubCodeMark mark(this, "StubRoutines", "f2l_fixup");
a61af66fc99e Initial load
duke
parents:
diff changeset
794 Address inout(rsp, 5 * wordSize); // return address + 4 saves
a61af66fc99e Initial load
duke
parents:
diff changeset
795 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
796
a61af66fc99e Initial load
duke
parents:
diff changeset
797 Label L;
a61af66fc99e Initial load
duke
parents:
diff changeset
798
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
799 __ push(rax);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
800 __ push(c_rarg3);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
801 __ push(c_rarg2);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
802 __ push(c_rarg1);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
803
a61af66fc99e Initial load
duke
parents:
diff changeset
804 __ movl(rax, 0x7f800000);
a61af66fc99e Initial load
duke
parents:
diff changeset
805 __ xorl(c_rarg3, c_rarg3);
a61af66fc99e Initial load
duke
parents:
diff changeset
806 __ movl(c_rarg2, inout);
a61af66fc99e Initial load
duke
parents:
diff changeset
807 __ movl(c_rarg1, c_rarg2);
a61af66fc99e Initial load
duke
parents:
diff changeset
808 __ andl(c_rarg1, 0x7fffffff);
a61af66fc99e Initial load
duke
parents:
diff changeset
809 __ cmpl(rax, c_rarg1); // NaN? -> 0
a61af66fc99e Initial load
duke
parents:
diff changeset
810 __ jcc(Assembler::negative, L);
a61af66fc99e Initial load
duke
parents:
diff changeset
811 __ testl(c_rarg2, c_rarg2); // signed ? min_jlong : max_jlong
a61af66fc99e Initial load
duke
parents:
diff changeset
812 __ mov64(c_rarg3, 0x8000000000000000);
a61af66fc99e Initial load
duke
parents:
diff changeset
813 __ mov64(rax, 0x7fffffffffffffff);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
814 __ cmov(Assembler::positive, c_rarg3, rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
815
a61af66fc99e Initial load
duke
parents:
diff changeset
816 __ bind(L);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
817 __ movptr(inout, c_rarg3);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
818
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
819 __ pop(c_rarg1);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
820 __ pop(c_rarg2);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
821 __ pop(c_rarg3);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
822 __ pop(rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
823
a61af66fc99e Initial load
duke
parents:
diff changeset
824 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
825
a61af66fc99e Initial load
duke
parents:
diff changeset
826 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
827 }
a61af66fc99e Initial load
duke
parents:
diff changeset
828
a61af66fc99e Initial load
duke
parents:
diff changeset
829 address generate_d2i_fixup() {
a61af66fc99e Initial load
duke
parents:
diff changeset
830 StubCodeMark mark(this, "StubRoutines", "d2i_fixup");
a61af66fc99e Initial load
duke
parents:
diff changeset
831 Address inout(rsp, 6 * wordSize); // return address + 5 saves
a61af66fc99e Initial load
duke
parents:
diff changeset
832
a61af66fc99e Initial load
duke
parents:
diff changeset
833 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
834
a61af66fc99e Initial load
duke
parents:
diff changeset
835 Label L;
a61af66fc99e Initial load
duke
parents:
diff changeset
836
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
837 __ push(rax);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
838 __ push(c_rarg3);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
839 __ push(c_rarg2);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
840 __ push(c_rarg1);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
841 __ push(c_rarg0);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
842
a61af66fc99e Initial load
duke
parents:
diff changeset
843 __ movl(rax, 0x7ff00000);
a61af66fc99e Initial load
duke
parents:
diff changeset
844 __ movq(c_rarg2, inout);
a61af66fc99e Initial load
duke
parents:
diff changeset
845 __ movl(c_rarg3, c_rarg2);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
846 __ mov(c_rarg1, c_rarg2);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
847 __ mov(c_rarg0, c_rarg2);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
848 __ negl(c_rarg3);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
849 __ shrptr(c_rarg1, 0x20);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
850 __ orl(c_rarg3, c_rarg2);
a61af66fc99e Initial load
duke
parents:
diff changeset
851 __ andl(c_rarg1, 0x7fffffff);
a61af66fc99e Initial load
duke
parents:
diff changeset
852 __ xorl(c_rarg2, c_rarg2);
a61af66fc99e Initial load
duke
parents:
diff changeset
853 __ shrl(c_rarg3, 0x1f);
a61af66fc99e Initial load
duke
parents:
diff changeset
854 __ orl(c_rarg1, c_rarg3);
a61af66fc99e Initial load
duke
parents:
diff changeset
855 __ cmpl(rax, c_rarg1);
a61af66fc99e Initial load
duke
parents:
diff changeset
856 __ jcc(Assembler::negative, L); // NaN -> 0
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
857 __ testptr(c_rarg0, c_rarg0); // signed ? min_jint : max_jint
0
a61af66fc99e Initial load
duke
parents:
diff changeset
858 __ movl(c_rarg2, 0x80000000);
a61af66fc99e Initial load
duke
parents:
diff changeset
859 __ movl(rax, 0x7fffffff);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
860 __ cmov(Assembler::positive, c_rarg2, rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
861
a61af66fc99e Initial load
duke
parents:
diff changeset
862 __ bind(L);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
863 __ movptr(inout, c_rarg2);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
864
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
865 __ pop(c_rarg0);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
866 __ pop(c_rarg1);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
867 __ pop(c_rarg2);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
868 __ pop(c_rarg3);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
869 __ pop(rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
870
a61af66fc99e Initial load
duke
parents:
diff changeset
871 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
872
a61af66fc99e Initial load
duke
parents:
diff changeset
873 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
874 }
a61af66fc99e Initial load
duke
parents:
diff changeset
875
a61af66fc99e Initial load
duke
parents:
diff changeset
876 address generate_d2l_fixup() {
a61af66fc99e Initial load
duke
parents:
diff changeset
877 StubCodeMark mark(this, "StubRoutines", "d2l_fixup");
a61af66fc99e Initial load
duke
parents:
diff changeset
878 Address inout(rsp, 6 * wordSize); // return address + 5 saves
a61af66fc99e Initial load
duke
parents:
diff changeset
879
a61af66fc99e Initial load
duke
parents:
diff changeset
880 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
881
a61af66fc99e Initial load
duke
parents:
diff changeset
882 Label L;
a61af66fc99e Initial load
duke
parents:
diff changeset
883
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
884 __ push(rax);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
885 __ push(c_rarg3);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
886 __ push(c_rarg2);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
887 __ push(c_rarg1);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
888 __ push(c_rarg0);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
889
a61af66fc99e Initial load
duke
parents:
diff changeset
890 __ movl(rax, 0x7ff00000);
a61af66fc99e Initial load
duke
parents:
diff changeset
891 __ movq(c_rarg2, inout);
a61af66fc99e Initial load
duke
parents:
diff changeset
892 __ movl(c_rarg3, c_rarg2);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
893 __ mov(c_rarg1, c_rarg2);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
894 __ mov(c_rarg0, c_rarg2);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
895 __ negl(c_rarg3);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
896 __ shrptr(c_rarg1, 0x20);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
897 __ orl(c_rarg3, c_rarg2);
a61af66fc99e Initial load
duke
parents:
diff changeset
898 __ andl(c_rarg1, 0x7fffffff);
a61af66fc99e Initial load
duke
parents:
diff changeset
899 __ xorl(c_rarg2, c_rarg2);
a61af66fc99e Initial load
duke
parents:
diff changeset
900 __ shrl(c_rarg3, 0x1f);
a61af66fc99e Initial load
duke
parents:
diff changeset
901 __ orl(c_rarg1, c_rarg3);
a61af66fc99e Initial load
duke
parents:
diff changeset
902 __ cmpl(rax, c_rarg1);
a61af66fc99e Initial load
duke
parents:
diff changeset
903 __ jcc(Assembler::negative, L); // NaN -> 0
a61af66fc99e Initial load
duke
parents:
diff changeset
904 __ testq(c_rarg0, c_rarg0); // signed ? min_jlong : max_jlong
a61af66fc99e Initial load
duke
parents:
diff changeset
905 __ mov64(c_rarg2, 0x8000000000000000);
a61af66fc99e Initial load
duke
parents:
diff changeset
906 __ mov64(rax, 0x7fffffffffffffff);
a61af66fc99e Initial load
duke
parents:
diff changeset
907 __ cmovq(Assembler::positive, c_rarg2, rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
908
a61af66fc99e Initial load
duke
parents:
diff changeset
909 __ bind(L);
a61af66fc99e Initial load
duke
parents:
diff changeset
910 __ movq(inout, c_rarg2);
a61af66fc99e Initial load
duke
parents:
diff changeset
911
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
912 __ pop(c_rarg0);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
913 __ pop(c_rarg1);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
914 __ pop(c_rarg2);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
915 __ pop(c_rarg3);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
916 __ pop(rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
917
a61af66fc99e Initial load
duke
parents:
diff changeset
918 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
919
a61af66fc99e Initial load
duke
parents:
diff changeset
920 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
921 }
a61af66fc99e Initial load
duke
parents:
diff changeset
922
a61af66fc99e Initial load
duke
parents:
diff changeset
923 address generate_fp_mask(const char *stub_name, int64_t mask) {
1365
6476042f815c 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 1299
diff changeset
924 __ align(CodeEntryAlignment);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
925 StubCodeMark mark(this, "StubRoutines", stub_name);
a61af66fc99e Initial load
duke
parents:
diff changeset
926 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
927
a61af66fc99e Initial load
duke
parents:
diff changeset
928 __ emit_data64( mask, relocInfo::none );
a61af66fc99e Initial load
duke
parents:
diff changeset
929 __ emit_data64( mask, relocInfo::none );
a61af66fc99e Initial load
duke
parents:
diff changeset
930
a61af66fc99e Initial load
duke
parents:
diff changeset
931 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
932 }
a61af66fc99e Initial load
duke
parents:
diff changeset
933
a61af66fc99e Initial load
duke
parents:
diff changeset
934 // The following routine generates a subroutine to throw an
a61af66fc99e Initial load
duke
parents:
diff changeset
935 // asynchronous UnknownError when an unsafe access gets a fault that
a61af66fc99e Initial load
duke
parents:
diff changeset
936 // could not be reasonably prevented by the programmer. (Example:
a61af66fc99e Initial load
duke
parents:
diff changeset
937 // SIGBUS/OBJERR.)
a61af66fc99e Initial load
duke
parents:
diff changeset
938 address generate_handler_for_unsafe_access() {
a61af66fc99e Initial load
duke
parents:
diff changeset
939 StubCodeMark mark(this, "StubRoutines", "handler_for_unsafe_access");
a61af66fc99e Initial load
duke
parents:
diff changeset
940 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
941
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
942 __ push(0); // hole for return address-to-be
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
943 __ pusha(); // push registers
0
a61af66fc99e Initial load
duke
parents:
diff changeset
944 Address next_pc(rsp, RegisterImpl::number_of_registers * BytesPerWord);
a61af66fc99e Initial load
duke
parents:
diff changeset
945
3937
c565834fb592 7088020: SEGV in JNIHandleBlock::release_block
never
parents: 3451
diff changeset
946 // FIXME: this probably needs alignment logic
c565834fb592 7088020: SEGV in JNIHandleBlock::release_block
never
parents: 3451
diff changeset
947
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
948 __ subptr(rsp, frame::arg_reg_save_area_bytes);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
949 BLOCK_COMMENT("call handle_unsafe_access");
a61af66fc99e Initial load
duke
parents:
diff changeset
950 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, handle_unsafe_access)));
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
951 __ addptr(rsp, frame::arg_reg_save_area_bytes);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
952
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
953 __ movptr(next_pc, rax); // stuff next address
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
954 __ popa();
0
a61af66fc99e Initial load
duke
parents:
diff changeset
955 __ ret(0); // jump to next address
a61af66fc99e Initial load
duke
parents:
diff changeset
956
a61af66fc99e Initial load
duke
parents:
diff changeset
957 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
958 }
a61af66fc99e Initial load
duke
parents:
diff changeset
959
a61af66fc99e Initial load
duke
parents:
diff changeset
960 // Non-destructive plausibility checks for oops
a61af66fc99e Initial load
duke
parents:
diff changeset
961 //
a61af66fc99e Initial load
duke
parents:
diff changeset
962 // Arguments:
a61af66fc99e Initial load
duke
parents:
diff changeset
963 // all args on stack!
a61af66fc99e Initial load
duke
parents:
diff changeset
964 //
a61af66fc99e Initial load
duke
parents:
diff changeset
965 // Stack after saving c_rarg3:
a61af66fc99e Initial load
duke
parents:
diff changeset
966 // [tos + 0]: saved c_rarg3
a61af66fc99e Initial load
duke
parents:
diff changeset
967 // [tos + 1]: saved c_rarg2
124
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
968 // [tos + 2]: saved r12 (several TemplateTable methods use it)
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
969 // [tos + 3]: saved flags
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
970 // [tos + 4]: return address
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
971 // * [tos + 5]: error message (char*)
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
972 // * [tos + 6]: object to verify (oop)
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
973 // * [tos + 7]: saved rax - saved by caller and bashed
1583
02e771df338e 6958254: -XX:+VerifyOops is broken on x86
kvn
parents: 1552
diff changeset
974 // * [tos + 8]: saved r10 (rscratch1) - saved by caller
0
a61af66fc99e Initial load
duke
parents:
diff changeset
975 // * = popped on exit
a61af66fc99e Initial load
duke
parents:
diff changeset
976 address generate_verify_oop() {
a61af66fc99e Initial load
duke
parents:
diff changeset
977 StubCodeMark mark(this, "StubRoutines", "verify_oop");
a61af66fc99e Initial load
duke
parents:
diff changeset
978 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
979
a61af66fc99e Initial load
duke
parents:
diff changeset
980 Label exit, error;
a61af66fc99e Initial load
duke
parents:
diff changeset
981
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
982 __ pushf();
0
a61af66fc99e Initial load
duke
parents:
diff changeset
983 __ incrementl(ExternalAddress((address) StubRoutines::verify_oop_count_addr()));
a61af66fc99e Initial load
duke
parents:
diff changeset
984
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
985 __ push(r12);
124
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
986
0
a61af66fc99e Initial load
duke
parents:
diff changeset
987 // save c_rarg2 and c_rarg3
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
988 __ push(c_rarg2);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
989 __ push(c_rarg3);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
990
124
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
991 enum {
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
992 // After previous pushes.
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
993 oop_to_verify = 6 * wordSize,
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
994 saved_rax = 7 * wordSize,
1583
02e771df338e 6958254: -XX:+VerifyOops is broken on x86
kvn
parents: 1552
diff changeset
995 saved_r10 = 8 * wordSize,
124
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
996
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
997 // Before the call to MacroAssembler::debug(), see below.
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
998 return_addr = 16 * wordSize,
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
999 error_msg = 17 * wordSize
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
1000 };
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
1001
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1002 // get object
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1003 __ movptr(rax, Address(rsp, oop_to_verify));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1004
a61af66fc99e Initial load
duke
parents:
diff changeset
1005 // make sure object is 'reasonable'
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1006 __ testptr(rax, rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1007 __ jcc(Assembler::zero, exit); // if obj is NULL it is OK
a61af66fc99e Initial load
duke
parents:
diff changeset
1008 // Check if the oop is in the right area of memory
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1009 __ movptr(c_rarg2, rax);
512
db4caa99ef11 6787106: Hotspot 32 bit build fails on platforms having different definitions for intptr_t & int32_t
xlu
parents: 405
diff changeset
1010 __ movptr(c_rarg3, (intptr_t) Universe::verify_oop_mask());
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1011 __ andptr(c_rarg2, c_rarg3);
512
db4caa99ef11 6787106: Hotspot 32 bit build fails on platforms having different definitions for intptr_t & int32_t
xlu
parents: 405
diff changeset
1012 __ movptr(c_rarg3, (intptr_t) Universe::verify_oop_bits());
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1013 __ cmpptr(c_rarg2, c_rarg3);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1014 __ jcc(Assembler::notZero, error);
a61af66fc99e Initial load
duke
parents:
diff changeset
1015
124
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
1016 // set r12 to heapbase for load_klass()
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
1017 __ reinit_heapbase();
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
1018
6725
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6266
diff changeset
1019 // make sure klass is 'reasonable', which is not zero.
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1020 __ load_klass(rax, rax); // get klass
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1021 __ testptr(rax, rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1022 __ jcc(Assembler::zero, error); // if klass is NULL it is broken
6725
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6266
diff changeset
1023 // TODO: Future assert that klass is lower 4g memory for UseCompressedKlassPointers
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1024
a61af66fc99e Initial load
duke
parents:
diff changeset
1025 // return if everything seems ok
a61af66fc99e Initial load
duke
parents:
diff changeset
1026 __ bind(exit);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1027 __ movptr(rax, Address(rsp, saved_rax)); // get saved rax back
1583
02e771df338e 6958254: -XX:+VerifyOops is broken on x86
kvn
parents: 1552
diff changeset
1028 __ movptr(rscratch1, Address(rsp, saved_r10)); // get saved r10 back
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1029 __ pop(c_rarg3); // restore c_rarg3
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1030 __ pop(c_rarg2); // restore c_rarg2
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1031 __ pop(r12); // restore r12
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1032 __ popf(); // restore flags
1583
02e771df338e 6958254: -XX:+VerifyOops is broken on x86
kvn
parents: 1552
diff changeset
1033 __ ret(4 * wordSize); // pop caller saved stuff
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1034
a61af66fc99e Initial load
duke
parents:
diff changeset
1035 // handle errors
a61af66fc99e Initial load
duke
parents:
diff changeset
1036 __ bind(error);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1037 __ movptr(rax, Address(rsp, saved_rax)); // get saved rax back
1583
02e771df338e 6958254: -XX:+VerifyOops is broken on x86
kvn
parents: 1552
diff changeset
1038 __ movptr(rscratch1, Address(rsp, saved_r10)); // get saved r10 back
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1039 __ pop(c_rarg3); // get saved c_rarg3 back
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1040 __ pop(c_rarg2); // get saved c_rarg2 back
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1041 __ pop(r12); // get saved r12 back
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1042 __ popf(); // get saved flags off stack --
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1043 // will be ignored
a61af66fc99e Initial load
duke
parents:
diff changeset
1044
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1045 __ pusha(); // push registers
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1046 // (rip is already
a61af66fc99e Initial load
duke
parents:
diff changeset
1047 // already pushed)
124
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
1048 // debug(char* msg, int64_t pc, int64_t regs[])
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1049 // We've popped the registers we'd saved (c_rarg3, c_rarg2 and flags), and
a61af66fc99e Initial load
duke
parents:
diff changeset
1050 // pushed all the registers, so now the stack looks like:
a61af66fc99e Initial load
duke
parents:
diff changeset
1051 // [tos + 0] 16 saved registers
a61af66fc99e Initial load
duke
parents:
diff changeset
1052 // [tos + 16] return address
124
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
1053 // * [tos + 17] error message (char*)
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
1054 // * [tos + 18] object to verify (oop)
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
1055 // * [tos + 19] saved rax - saved by caller and bashed
1583
02e771df338e 6958254: -XX:+VerifyOops is broken on x86
kvn
parents: 1552
diff changeset
1056 // * [tos + 20] saved r10 (rscratch1) - saved by caller
124
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
1057 // * = popped on exit
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
1058
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1059 __ movptr(c_rarg0, Address(rsp, error_msg)); // pass address of error message
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1060 __ movptr(c_rarg1, Address(rsp, return_addr)); // pass return address
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1061 __ movq(c_rarg2, rsp); // pass address of regs on stack
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1062 __ mov(r12, rsp); // remember rsp
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1063 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1064 __ andptr(rsp, -16); // align stack as required by ABI
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1065 BLOCK_COMMENT("call MacroAssembler::debug");
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1066 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, MacroAssembler::debug64)));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1067 __ mov(rsp, r12); // restore rsp
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1068 __ popa(); // pop registers (includes r12)
1583
02e771df338e 6958254: -XX:+VerifyOops is broken on x86
kvn
parents: 1552
diff changeset
1069 __ ret(4 * wordSize); // pop caller saved stuff
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1070
a61af66fc99e Initial load
duke
parents:
diff changeset
1071 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
1072 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1073
a61af66fc99e Initial load
duke
parents:
diff changeset
1074 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1075 // Verify that a register contains clean 32-bits positive value
a61af66fc99e Initial load
duke
parents:
diff changeset
1076 // (high 32-bits are 0) so it could be used in 64-bits shifts.
a61af66fc99e Initial load
duke
parents:
diff changeset
1077 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1078 // Input:
a61af66fc99e Initial load
duke
parents:
diff changeset
1079 // Rint - 32-bits value
a61af66fc99e Initial load
duke
parents:
diff changeset
1080 // Rtmp - scratch
a61af66fc99e Initial load
duke
parents:
diff changeset
1081 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1082 void assert_clean_int(Register Rint, Register Rtmp) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1083 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
1084 Label L;
a61af66fc99e Initial load
duke
parents:
diff changeset
1085 assert_different_registers(Rtmp, Rint);
a61af66fc99e Initial load
duke
parents:
diff changeset
1086 __ movslq(Rtmp, Rint);
a61af66fc99e Initial load
duke
parents:
diff changeset
1087 __ cmpq(Rtmp, Rint);
124
b130b98db9cf 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 113
diff changeset
1088 __ jcc(Assembler::equal, L);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1089 __ stop("high 32-bits of int value are not 0");
a61af66fc99e Initial load
duke
parents:
diff changeset
1090 __ bind(L);
a61af66fc99e Initial load
duke
parents:
diff changeset
1091 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1092 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1093
a61af66fc99e Initial load
duke
parents:
diff changeset
1094 // Generate overlap test for array copy stubs
a61af66fc99e Initial load
duke
parents:
diff changeset
1095 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1096 // Input:
a61af66fc99e Initial load
duke
parents:
diff changeset
1097 // c_rarg0 - from
a61af66fc99e Initial load
duke
parents:
diff changeset
1098 // c_rarg1 - to
a61af66fc99e Initial load
duke
parents:
diff changeset
1099 // c_rarg2 - element count
a61af66fc99e Initial load
duke
parents:
diff changeset
1100 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1101 // Output:
a61af66fc99e Initial load
duke
parents:
diff changeset
1102 // rax - &from[element count - 1]
a61af66fc99e Initial load
duke
parents:
diff changeset
1103 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1104 void array_overlap_test(address no_overlap_target, Address::ScaleFactor sf) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1105 assert(no_overlap_target != NULL, "must be generated");
a61af66fc99e Initial load
duke
parents:
diff changeset
1106 array_overlap_test(no_overlap_target, NULL, sf);
a61af66fc99e Initial load
duke
parents:
diff changeset
1107 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1108 void array_overlap_test(Label& L_no_overlap, Address::ScaleFactor sf) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1109 array_overlap_test(NULL, &L_no_overlap, sf);
a61af66fc99e Initial load
duke
parents:
diff changeset
1110 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1111 void array_overlap_test(address no_overlap_target, Label* NOLp, Address::ScaleFactor sf) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1112 const Register from = c_rarg0;
a61af66fc99e Initial load
duke
parents:
diff changeset
1113 const Register to = c_rarg1;
a61af66fc99e Initial load
duke
parents:
diff changeset
1114 const Register count = c_rarg2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1115 const Register end_from = rax;
a61af66fc99e Initial load
duke
parents:
diff changeset
1116
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1117 __ cmpptr(to, from);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1118 __ lea(end_from, Address(from, count, sf, 0));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1119 if (NOLp == NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1120 ExternalAddress no_overlap(no_overlap_target);
a61af66fc99e Initial load
duke
parents:
diff changeset
1121 __ jump_cc(Assembler::belowEqual, no_overlap);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1122 __ cmpptr(to, end_from);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1123 __ jump_cc(Assembler::aboveEqual, no_overlap);
a61af66fc99e Initial load
duke
parents:
diff changeset
1124 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1125 __ jcc(Assembler::belowEqual, (*NOLp));
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1126 __ cmpptr(to, end_from);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1127 __ jcc(Assembler::aboveEqual, (*NOLp));
a61af66fc99e Initial load
duke
parents:
diff changeset
1128 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1129 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1130
a61af66fc99e Initial load
duke
parents:
diff changeset
1131 // Shuffle first three arg regs on Windows into Linux/Solaris locations.
a61af66fc99e Initial load
duke
parents:
diff changeset
1132 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1133 // Outputs:
a61af66fc99e Initial load
duke
parents:
diff changeset
1134 // rdi - rcx
a61af66fc99e Initial load
duke
parents:
diff changeset
1135 // rsi - rdx
a61af66fc99e Initial load
duke
parents:
diff changeset
1136 // rdx - r8
a61af66fc99e Initial load
duke
parents:
diff changeset
1137 // rcx - r9
a61af66fc99e Initial load
duke
parents:
diff changeset
1138 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1139 // Registers r9 and r10 are used to save rdi and rsi on Windows, which latter
a61af66fc99e Initial load
duke
parents:
diff changeset
1140 // are non-volatile. r9 and r10 should not be used by the caller.
a61af66fc99e Initial load
duke
parents:
diff changeset
1141 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1142 void setup_arg_regs(int nargs = 3) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1143 const Register saved_rdi = r9;
a61af66fc99e Initial load
duke
parents:
diff changeset
1144 const Register saved_rsi = r10;
a61af66fc99e Initial load
duke
parents:
diff changeset
1145 assert(nargs == 3 || nargs == 4, "else fix");
a61af66fc99e Initial load
duke
parents:
diff changeset
1146 #ifdef _WIN64
a61af66fc99e Initial load
duke
parents:
diff changeset
1147 assert(c_rarg0 == rcx && c_rarg1 == rdx && c_rarg2 == r8 && c_rarg3 == r9,
a61af66fc99e Initial load
duke
parents:
diff changeset
1148 "unexpected argument registers");
a61af66fc99e Initial load
duke
parents:
diff changeset
1149 if (nargs >= 4)
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1150 __ mov(rax, r9); // r9 is also saved_rdi
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1151 __ movptr(saved_rdi, rdi);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1152 __ movptr(saved_rsi, rsi);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1153 __ mov(rdi, rcx); // c_rarg0
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1154 __ mov(rsi, rdx); // c_rarg1
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1155 __ mov(rdx, r8); // c_rarg2
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1156 if (nargs >= 4)
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1157 __ mov(rcx, rax); // c_rarg3 (via rax)
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1158 #else
a61af66fc99e Initial load
duke
parents:
diff changeset
1159 assert(c_rarg0 == rdi && c_rarg1 == rsi && c_rarg2 == rdx && c_rarg3 == rcx,
a61af66fc99e Initial load
duke
parents:
diff changeset
1160 "unexpected argument registers");
a61af66fc99e Initial load
duke
parents:
diff changeset
1161 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1162 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1163
a61af66fc99e Initial load
duke
parents:
diff changeset
1164 void restore_arg_regs() {
a61af66fc99e Initial load
duke
parents:
diff changeset
1165 const Register saved_rdi = r9;
a61af66fc99e Initial load
duke
parents:
diff changeset
1166 const Register saved_rsi = r10;
a61af66fc99e Initial load
duke
parents:
diff changeset
1167 #ifdef _WIN64
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1168 __ movptr(rdi, saved_rdi);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1169 __ movptr(rsi, saved_rsi);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1170 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1171 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1172
a61af66fc99e Initial load
duke
parents:
diff changeset
1173 // Generate code for an array write pre barrier
a61af66fc99e Initial load
duke
parents:
diff changeset
1174 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1175 // addr - starting address
2324
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1176 // count - element count
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1177 // tmp - scratch register
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1178 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1179 // Destroy no registers!
a61af66fc99e Initial load
duke
parents:
diff changeset
1180 //
2324
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1181 void gen_write_ref_array_pre_barrier(Register addr, Register count, bool dest_uninitialized) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1182 BarrierSet* bs = Universe::heap()->barrier_set();
a61af66fc99e Initial load
duke
parents:
diff changeset
1183 switch (bs->kind()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1184 case BarrierSet::G1SATBCT:
a61af66fc99e Initial load
duke
parents:
diff changeset
1185 case BarrierSet::G1SATBCTLogging:
2324
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1186 // With G1, don't generate the call if we statically know that the target in uninitialized
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1187 if (!dest_uninitialized) {
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1188 __ pusha(); // push registers
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1189 if (count == c_rarg0) {
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1190 if (addr == c_rarg1) {
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1191 // exactly backwards!!
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1192 __ xchgptr(c_rarg1, c_rarg0);
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1193 } else {
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1194 __ movptr(c_rarg1, count);
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1195 __ movptr(c_rarg0, addr);
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1196 }
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1197 } else {
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1198 __ movptr(c_rarg0, addr);
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1199 __ movptr(c_rarg1, count);
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1200 }
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1201 __ call_VM_leaf(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_pre), 2);
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1202 __ popa();
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1203 }
2324
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1204 break;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1205 case BarrierSet::CardTableModRef:
a61af66fc99e Initial load
duke
parents:
diff changeset
1206 case BarrierSet::CardTableExtension:
a61af66fc99e Initial load
duke
parents:
diff changeset
1207 case BarrierSet::ModRef:
a61af66fc99e Initial load
duke
parents:
diff changeset
1208 break;
342
37f87013dfd8 6711316: Open source the Garbage-First garbage collector
ysr
parents: 124
diff changeset
1209 default:
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1210 ShouldNotReachHere();
a61af66fc99e Initial load
duke
parents:
diff changeset
1211
a61af66fc99e Initial load
duke
parents:
diff changeset
1212 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1213 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1214
a61af66fc99e Initial load
duke
parents:
diff changeset
1215 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1216 // Generate code for an array write post barrier
a61af66fc99e Initial load
duke
parents:
diff changeset
1217 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1218 // Input:
a61af66fc99e Initial load
duke
parents:
diff changeset
1219 // start - register containing starting address of destination array
a61af66fc99e Initial load
duke
parents:
diff changeset
1220 // end - register containing ending address of destination array
a61af66fc99e Initial load
duke
parents:
diff changeset
1221 // scratch - scratch register
a61af66fc99e Initial load
duke
parents:
diff changeset
1222 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1223 // The input registers are overwritten.
a61af66fc99e Initial load
duke
parents:
diff changeset
1224 // The ending address is inclusive.
a61af66fc99e Initial load
duke
parents:
diff changeset
1225 void gen_write_ref_array_post_barrier(Register start, Register end, Register scratch) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1226 assert_different_registers(start, end, scratch);
a61af66fc99e Initial load
duke
parents:
diff changeset
1227 BarrierSet* bs = Universe::heap()->barrier_set();
a61af66fc99e Initial load
duke
parents:
diff changeset
1228 switch (bs->kind()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1229 case BarrierSet::G1SATBCT:
a61af66fc99e Initial load
duke
parents:
diff changeset
1230 case BarrierSet::G1SATBCTLogging:
a61af66fc99e Initial load
duke
parents:
diff changeset
1231
a61af66fc99e Initial load
duke
parents:
diff changeset
1232 {
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1233 __ pusha(); // push registers (overkill)
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1234 // must compute element count unless barrier set interface is changed (other platforms supply count)
a61af66fc99e Initial load
duke
parents:
diff changeset
1235 assert_different_registers(start, end, scratch);
845
df6caf649ff7 6700789: G1: Enable use of compressed oops with G1 heaps
ysr
parents: 671
diff changeset
1236 __ lea(scratch, Address(end, BytesPerHeapOop));
df6caf649ff7 6700789: G1: Enable use of compressed oops with G1 heaps
ysr
parents: 671
diff changeset
1237 __ subptr(scratch, start); // subtract start to get #bytes
df6caf649ff7 6700789: G1: Enable use of compressed oops with G1 heaps
ysr
parents: 671
diff changeset
1238 __ shrptr(scratch, LogBytesPerHeapOop); // convert to element count
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1239 __ mov(c_rarg0, start);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1240 __ mov(c_rarg1, scratch);
1192
776fb94f33cc 6918006: G1: spill space must be reserved on the stack for barrier calls on Windows x64
apetrusenko
parents: 1174
diff changeset
1241 __ call_VM_leaf(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_post), 2);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1242 __ popa();
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1243 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1244 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1245 case BarrierSet::CardTableModRef:
a61af66fc99e Initial load
duke
parents:
diff changeset
1246 case BarrierSet::CardTableExtension:
a61af66fc99e Initial load
duke
parents:
diff changeset
1247 {
a61af66fc99e Initial load
duke
parents:
diff changeset
1248 CardTableModRefBS* ct = (CardTableModRefBS*)bs;
a61af66fc99e Initial load
duke
parents:
diff changeset
1249 assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
a61af66fc99e Initial load
duke
parents:
diff changeset
1250
a61af66fc99e Initial load
duke
parents:
diff changeset
1251 Label L_loop;
a61af66fc99e Initial load
duke
parents:
diff changeset
1252
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1253 __ shrptr(start, CardTableModRefBS::card_shift);
845
df6caf649ff7 6700789: G1: Enable use of compressed oops with G1 heaps
ysr
parents: 671
diff changeset
1254 __ addptr(end, BytesPerHeapOop);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1255 __ shrptr(end, CardTableModRefBS::card_shift);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1256 __ subptr(end, start); // number of bytes to copy
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1257
249
910a4cb98e9e 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 196
diff changeset
1258 intptr_t disp = (intptr_t) ct->byte_map_base;
4114
6729bbc1fcd6 7003454: order constants in constant table by number of references in code
twisti
parents: 3960
diff changeset
1259 if (Assembler::is_simm32(disp)) {
249
910a4cb98e9e 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 196
diff changeset
1260 Address cardtable(noreg, noreg, Address::no_scale, disp);
910a4cb98e9e 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 196
diff changeset
1261 __ lea(scratch, cardtable);
910a4cb98e9e 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 196
diff changeset
1262 } else {
910a4cb98e9e 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 196
diff changeset
1263 ExternalAddress cardtable((address)disp);
910a4cb98e9e 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 196
diff changeset
1264 __ lea(scratch, cardtable);
910a4cb98e9e 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 196
diff changeset
1265 }
910a4cb98e9e 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 196
diff changeset
1266
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1267 const Register count = end; // 'end' register contains bytes count now
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1268 __ addptr(start, scratch);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1269 __ BIND(L_loop);
a61af66fc99e Initial load
duke
parents:
diff changeset
1270 __ movb(Address(start, count, Address::times_1), 0);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1271 __ decrement(count);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1272 __ jcc(Assembler::greaterEqual, L_loop);
a61af66fc99e Initial load
duke
parents:
diff changeset
1273 }
342
37f87013dfd8 6711316: Open source the Garbage-First garbage collector
ysr
parents: 124
diff changeset
1274 break;
37f87013dfd8 6711316: Open source the Garbage-First garbage collector
ysr
parents: 124
diff changeset
1275 default:
37f87013dfd8 6711316: Open source the Garbage-First garbage collector
ysr
parents: 124
diff changeset
1276 ShouldNotReachHere();
37f87013dfd8 6711316: Open source the Garbage-First garbage collector
ysr
parents: 124
diff changeset
1277
37f87013dfd8 6711316: Open source the Garbage-First garbage collector
ysr
parents: 124
diff changeset
1278 }
37f87013dfd8 6711316: Open source the Garbage-First garbage collector
ysr
parents: 124
diff changeset
1279 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1280
405
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1281
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1282 // Copy big chunks forward
a61af66fc99e Initial load
duke
parents:
diff changeset
1283 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1284 // Inputs:
a61af66fc99e Initial load
duke
parents:
diff changeset
1285 // end_from - source arrays end address
a61af66fc99e Initial load
duke
parents:
diff changeset
1286 // end_to - destination array end address
a61af66fc99e Initial load
duke
parents:
diff changeset
1287 // qword_count - 64-bits element count, negative
a61af66fc99e Initial load
duke
parents:
diff changeset
1288 // to - scratch
a61af66fc99e Initial load
duke
parents:
diff changeset
1289 // L_copy_32_bytes - entry label
a61af66fc99e Initial load
duke
parents:
diff changeset
1290 // L_copy_8_bytes - exit label
a61af66fc99e Initial load
duke
parents:
diff changeset
1291 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1292 void copy_32_bytes_forward(Register end_from, Register end_to,
a61af66fc99e Initial load
duke
parents:
diff changeset
1293 Register qword_count, Register to,
a61af66fc99e Initial load
duke
parents:
diff changeset
1294 Label& L_copy_32_bytes, Label& L_copy_8_bytes) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1295 DEBUG_ONLY(__ stop("enter at entry label, not here"));
a61af66fc99e Initial load
duke
parents:
diff changeset
1296 Label L_loop;
1365
6476042f815c 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 1299
diff changeset
1297 __ align(OptoLoopAlignment);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1298 __ BIND(L_loop);
405
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1299 if(UseUnalignedLoadStores) {
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1300 __ movdqu(xmm0, Address(end_from, qword_count, Address::times_8, -24));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1301 __ movdqu(Address(end_to, qword_count, Address::times_8, -24), xmm0);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1302 __ movdqu(xmm1, Address(end_from, qword_count, Address::times_8, - 8));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1303 __ movdqu(Address(end_to, qword_count, Address::times_8, - 8), xmm1);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1304
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1305 } else {
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1306 __ movq(to, Address(end_from, qword_count, Address::times_8, -24));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1307 __ movq(Address(end_to, qword_count, Address::times_8, -24), to);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1308 __ movq(to, Address(end_from, qword_count, Address::times_8, -16));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1309 __ movq(Address(end_to, qword_count, Address::times_8, -16), to);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1310 __ movq(to, Address(end_from, qword_count, Address::times_8, - 8));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1311 __ movq(Address(end_to, qword_count, Address::times_8, - 8), to);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1312 __ movq(to, Address(end_from, qword_count, Address::times_8, - 0));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1313 __ movq(Address(end_to, qword_count, Address::times_8, - 0), to);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1314 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1315 __ BIND(L_copy_32_bytes);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1316 __ addptr(qword_count, 4);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1317 __ jcc(Assembler::lessEqual, L_loop);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1318 __ subptr(qword_count, 4);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1319 __ jcc(Assembler::less, L_copy_8_bytes); // Copy trailing qwords
a61af66fc99e Initial load
duke
parents:
diff changeset
1320 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1321
a61af66fc99e Initial load
duke
parents:
diff changeset
1322
a61af66fc99e Initial load
duke
parents:
diff changeset
1323 // Copy big chunks backward
a61af66fc99e Initial load
duke
parents:
diff changeset
1324 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1325 // Inputs:
a61af66fc99e Initial load
duke
parents:
diff changeset
1326 // from - source arrays address
a61af66fc99e Initial load
duke
parents:
diff changeset
1327 // dest - destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1328 // qword_count - 64-bits element count
a61af66fc99e Initial load
duke
parents:
diff changeset
1329 // to - scratch
a61af66fc99e Initial load
duke
parents:
diff changeset
1330 // L_copy_32_bytes - entry label
a61af66fc99e Initial load
duke
parents:
diff changeset
1331 // L_copy_8_bytes - exit label
a61af66fc99e Initial load
duke
parents:
diff changeset
1332 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1333 void copy_32_bytes_backward(Register from, Register dest,
a61af66fc99e Initial load
duke
parents:
diff changeset
1334 Register qword_count, Register to,
a61af66fc99e Initial load
duke
parents:
diff changeset
1335 Label& L_copy_32_bytes, Label& L_copy_8_bytes) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1336 DEBUG_ONLY(__ stop("enter at entry label, not here"));
a61af66fc99e Initial load
duke
parents:
diff changeset
1337 Label L_loop;
1365
6476042f815c 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 1299
diff changeset
1338 __ align(OptoLoopAlignment);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1339 __ BIND(L_loop);
405
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1340 if(UseUnalignedLoadStores) {
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1341 __ movdqu(xmm0, Address(from, qword_count, Address::times_8, 16));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1342 __ movdqu(Address(dest, qword_count, Address::times_8, 16), xmm0);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1343 __ movdqu(xmm1, Address(from, qword_count, Address::times_8, 0));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1344 __ movdqu(Address(dest, qword_count, Address::times_8, 0), xmm1);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1345
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1346 } else {
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1347 __ movq(to, Address(from, qword_count, Address::times_8, 24));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1348 __ movq(Address(dest, qword_count, Address::times_8, 24), to);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1349 __ movq(to, Address(from, qword_count, Address::times_8, 16));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1350 __ movq(Address(dest, qword_count, Address::times_8, 16), to);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1351 __ movq(to, Address(from, qword_count, Address::times_8, 8));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1352 __ movq(Address(dest, qword_count, Address::times_8, 8), to);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1353 __ movq(to, Address(from, qword_count, Address::times_8, 0));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1354 __ movq(Address(dest, qword_count, Address::times_8, 0), to);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1355 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1356 __ BIND(L_copy_32_bytes);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1357 __ subptr(qword_count, 4);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1358 __ jcc(Assembler::greaterEqual, L_loop);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1359 __ addptr(qword_count, 4);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1360 __ jcc(Assembler::greater, L_copy_8_bytes); // Copy trailing qwords
a61af66fc99e Initial load
duke
parents:
diff changeset
1361 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1362
a61af66fc99e Initial load
duke
parents:
diff changeset
1363
a61af66fc99e Initial load
duke
parents:
diff changeset
1364 // Arguments:
a61af66fc99e Initial load
duke
parents:
diff changeset
1365 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
a61af66fc99e Initial load
duke
parents:
diff changeset
1366 // ignored
a61af66fc99e Initial load
duke
parents:
diff changeset
1367 // name - stub name string
a61af66fc99e Initial load
duke
parents:
diff changeset
1368 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1369 // Inputs:
a61af66fc99e Initial load
duke
parents:
diff changeset
1370 // c_rarg0 - source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1371 // c_rarg1 - destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1372 // c_rarg2 - element count, treated as ssize_t, can be zero
a61af66fc99e Initial load
duke
parents:
diff changeset
1373 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1374 // If 'from' and/or 'to' are aligned on 4-, 2-, or 1-byte boundaries,
a61af66fc99e Initial load
duke
parents:
diff changeset
1375 // we let the hardware handle it. The one to eight bytes within words,
a61af66fc99e Initial load
duke
parents:
diff changeset
1376 // dwords or qwords that span cache line boundaries will still be loaded
a61af66fc99e Initial load
duke
parents:
diff changeset
1377 // and stored atomically.
a61af66fc99e Initial load
duke
parents:
diff changeset
1378 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1379 // Side Effects:
a61af66fc99e Initial load
duke
parents:
diff changeset
1380 // disjoint_byte_copy_entry is set to the no-overlap entry point
a61af66fc99e Initial load
duke
parents:
diff changeset
1381 // used by generate_conjoint_byte_copy().
a61af66fc99e Initial load
duke
parents:
diff changeset
1382 //
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1383 address generate_disjoint_byte_copy(bool aligned, address* entry, const char *name) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1384 __ align(CodeEntryAlignment);
a61af66fc99e Initial load
duke
parents:
diff changeset
1385 StubCodeMark mark(this, "StubRoutines", name);
a61af66fc99e Initial load
duke
parents:
diff changeset
1386 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
1387
a61af66fc99e Initial load
duke
parents:
diff changeset
1388 Label L_copy_32_bytes, L_copy_8_bytes, L_copy_4_bytes, L_copy_2_bytes;
a61af66fc99e Initial load
duke
parents:
diff changeset
1389 Label L_copy_byte, L_exit;
a61af66fc99e Initial load
duke
parents:
diff changeset
1390 const Register from = rdi; // source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1391 const Register to = rsi; // destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1392 const Register count = rdx; // elements count
a61af66fc99e Initial load
duke
parents:
diff changeset
1393 const Register byte_count = rcx;
a61af66fc99e Initial load
duke
parents:
diff changeset
1394 const Register qword_count = count;
a61af66fc99e Initial load
duke
parents:
diff changeset
1395 const Register end_from = from; // source array end address
a61af66fc99e Initial load
duke
parents:
diff changeset
1396 const Register end_to = to; // destination array end address
a61af66fc99e Initial load
duke
parents:
diff changeset
1397 // End pointers are inclusive, and if count is not zero they point
a61af66fc99e Initial load
duke
parents:
diff changeset
1398 // to the last unit copied: end_to[0] := end_from[0]
a61af66fc99e Initial load
duke
parents:
diff changeset
1399
a61af66fc99e Initial load
duke
parents:
diff changeset
1400 __ enter(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
1401 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
a61af66fc99e Initial load
duke
parents:
diff changeset
1402
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1403 if (entry != NULL) {
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1404 *entry = __ pc();
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1405 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1406 BLOCK_COMMENT("Entry:");
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1407 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1408
a61af66fc99e Initial load
duke
parents:
diff changeset
1409 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
a61af66fc99e Initial load
duke
parents:
diff changeset
1410 // r9 and r10 may be used to save non-volatile registers
a61af66fc99e Initial load
duke
parents:
diff changeset
1411
a61af66fc99e Initial load
duke
parents:
diff changeset
1412 // 'from', 'to' and 'count' are now valid
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1413 __ movptr(byte_count, count);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1414 __ shrptr(count, 3); // count => qword_count
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1415
a61af66fc99e Initial load
duke
parents:
diff changeset
1416 // Copy from low to high addresses. Use 'to' as scratch.
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1417 __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1418 __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1419 __ negptr(qword_count); // make the count negative
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1420 __ jmp(L_copy_32_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1421
a61af66fc99e Initial load
duke
parents:
diff changeset
1422 // Copy trailing qwords
a61af66fc99e Initial load
duke
parents:
diff changeset
1423 __ BIND(L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1424 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
a61af66fc99e Initial load
duke
parents:
diff changeset
1425 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1426 __ increment(qword_count);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1427 __ jcc(Assembler::notZero, L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1428
a61af66fc99e Initial load
duke
parents:
diff changeset
1429 // Check for and copy trailing dword
a61af66fc99e Initial load
duke
parents:
diff changeset
1430 __ BIND(L_copy_4_bytes);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1431 __ testl(byte_count, 4);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1432 __ jccb(Assembler::zero, L_copy_2_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1433 __ movl(rax, Address(end_from, 8));
a61af66fc99e Initial load
duke
parents:
diff changeset
1434 __ movl(Address(end_to, 8), rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
1435
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1436 __ addptr(end_from, 4);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1437 __ addptr(end_to, 4);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1438
a61af66fc99e Initial load
duke
parents:
diff changeset
1439 // Check for and copy trailing word
a61af66fc99e Initial load
duke
parents:
diff changeset
1440 __ BIND(L_copy_2_bytes);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1441 __ testl(byte_count, 2);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1442 __ jccb(Assembler::zero, L_copy_byte);
a61af66fc99e Initial load
duke
parents:
diff changeset
1443 __ movw(rax, Address(end_from, 8));
a61af66fc99e Initial load
duke
parents:
diff changeset
1444 __ movw(Address(end_to, 8), rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
1445
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1446 __ addptr(end_from, 2);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1447 __ addptr(end_to, 2);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1448
a61af66fc99e Initial load
duke
parents:
diff changeset
1449 // Check for and copy trailing byte
a61af66fc99e Initial load
duke
parents:
diff changeset
1450 __ BIND(L_copy_byte);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1451 __ testl(byte_count, 1);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1452 __ jccb(Assembler::zero, L_exit);
a61af66fc99e Initial load
duke
parents:
diff changeset
1453 __ movb(rax, Address(end_from, 8));
a61af66fc99e Initial load
duke
parents:
diff changeset
1454 __ movb(Address(end_to, 8), rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
1455
a61af66fc99e Initial load
duke
parents:
diff changeset
1456 __ BIND(L_exit);
a61af66fc99e Initial load
duke
parents:
diff changeset
1457 restore_arg_regs();
4118
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
1458 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr); // Update counter after rscratch1 is free
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1459 __ xorptr(rax, rax); // return 0
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1460 __ leave(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
1461 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1462
a61af66fc99e Initial load
duke
parents:
diff changeset
1463 // Copy in 32-bytes chunks
a61af66fc99e Initial load
duke
parents:
diff changeset
1464 copy_32_bytes_forward(end_from, end_to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1465 __ jmp(L_copy_4_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1466
a61af66fc99e Initial load
duke
parents:
diff changeset
1467 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
1468 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1469
a61af66fc99e Initial load
duke
parents:
diff changeset
1470 // Arguments:
a61af66fc99e Initial load
duke
parents:
diff changeset
1471 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
a61af66fc99e Initial load
duke
parents:
diff changeset
1472 // ignored
a61af66fc99e Initial load
duke
parents:
diff changeset
1473 // name - stub name string
a61af66fc99e Initial load
duke
parents:
diff changeset
1474 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1475 // Inputs:
a61af66fc99e Initial load
duke
parents:
diff changeset
1476 // c_rarg0 - source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1477 // c_rarg1 - destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1478 // c_rarg2 - element count, treated as ssize_t, can be zero
a61af66fc99e Initial load
duke
parents:
diff changeset
1479 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1480 // If 'from' and/or 'to' are aligned on 4-, 2-, or 1-byte boundaries,
a61af66fc99e Initial load
duke
parents:
diff changeset
1481 // we let the hardware handle it. The one to eight bytes within words,
a61af66fc99e Initial load
duke
parents:
diff changeset
1482 // dwords or qwords that span cache line boundaries will still be loaded
a61af66fc99e Initial load
duke
parents:
diff changeset
1483 // and stored atomically.
a61af66fc99e Initial load
duke
parents:
diff changeset
1484 //
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1485 address generate_conjoint_byte_copy(bool aligned, address nooverlap_target,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1486 address* entry, const char *name) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1487 __ align(CodeEntryAlignment);
a61af66fc99e Initial load
duke
parents:
diff changeset
1488 StubCodeMark mark(this, "StubRoutines", name);
a61af66fc99e Initial load
duke
parents:
diff changeset
1489 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
1490
a61af66fc99e Initial load
duke
parents:
diff changeset
1491 Label L_copy_32_bytes, L_copy_8_bytes, L_copy_4_bytes, L_copy_2_bytes;
a61af66fc99e Initial load
duke
parents:
diff changeset
1492 const Register from = rdi; // source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1493 const Register to = rsi; // destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1494 const Register count = rdx; // elements count
a61af66fc99e Initial load
duke
parents:
diff changeset
1495 const Register byte_count = rcx;
a61af66fc99e Initial load
duke
parents:
diff changeset
1496 const Register qword_count = count;
a61af66fc99e Initial load
duke
parents:
diff changeset
1497
a61af66fc99e Initial load
duke
parents:
diff changeset
1498 __ enter(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
1499 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
a61af66fc99e Initial load
duke
parents:
diff changeset
1500
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1501 if (entry != NULL) {
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1502 *entry = __ pc();
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1503 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1504 BLOCK_COMMENT("Entry:");
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1505 }
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1506
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1507 array_overlap_test(nooverlap_target, Address::times_1);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1508 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
a61af66fc99e Initial load
duke
parents:
diff changeset
1509 // r9 and r10 may be used to save non-volatile registers
a61af66fc99e Initial load
duke
parents:
diff changeset
1510
a61af66fc99e Initial load
duke
parents:
diff changeset
1511 // 'from', 'to' and 'count' are now valid
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1512 __ movptr(byte_count, count);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1513 __ shrptr(count, 3); // count => qword_count
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1514
a61af66fc99e Initial load
duke
parents:
diff changeset
1515 // Copy from high to low addresses.
a61af66fc99e Initial load
duke
parents:
diff changeset
1516
a61af66fc99e Initial load
duke
parents:
diff changeset
1517 // Check for and copy trailing byte
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1518 __ testl(byte_count, 1);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1519 __ jcc(Assembler::zero, L_copy_2_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1520 __ movb(rax, Address(from, byte_count, Address::times_1, -1));
a61af66fc99e Initial load
duke
parents:
diff changeset
1521 __ movb(Address(to, byte_count, Address::times_1, -1), rax);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1522 __ decrement(byte_count); // Adjust for possible trailing word
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1523
a61af66fc99e Initial load
duke
parents:
diff changeset
1524 // Check for and copy trailing word
a61af66fc99e Initial load
duke
parents:
diff changeset
1525 __ BIND(L_copy_2_bytes);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1526 __ testl(byte_count, 2);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1527 __ jcc(Assembler::zero, L_copy_4_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1528 __ movw(rax, Address(from, byte_count, Address::times_1, -2));
a61af66fc99e Initial load
duke
parents:
diff changeset
1529 __ movw(Address(to, byte_count, Address::times_1, -2), rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
1530
a61af66fc99e Initial load
duke
parents:
diff changeset
1531 // Check for and copy trailing dword
a61af66fc99e Initial load
duke
parents:
diff changeset
1532 __ BIND(L_copy_4_bytes);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1533 __ testl(byte_count, 4);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1534 __ jcc(Assembler::zero, L_copy_32_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1535 __ movl(rax, Address(from, qword_count, Address::times_8));
a61af66fc99e Initial load
duke
parents:
diff changeset
1536 __ movl(Address(to, qword_count, Address::times_8), rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
1537 __ jmp(L_copy_32_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1538
a61af66fc99e Initial load
duke
parents:
diff changeset
1539 // Copy trailing qwords
a61af66fc99e Initial load
duke
parents:
diff changeset
1540 __ BIND(L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1541 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
a61af66fc99e Initial load
duke
parents:
diff changeset
1542 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1543 __ decrement(qword_count);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1544 __ jcc(Assembler::notZero, L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1545
a61af66fc99e Initial load
duke
parents:
diff changeset
1546 restore_arg_regs();
4118
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
1547 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr); // Update counter after rscratch1 is free
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1548 __ xorptr(rax, rax); // return 0
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1549 __ leave(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
1550 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1551
a61af66fc99e Initial load
duke
parents:
diff changeset
1552 // Copy in 32-bytes chunks
a61af66fc99e Initial load
duke
parents:
diff changeset
1553 copy_32_bytes_backward(from, to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1554
a61af66fc99e Initial load
duke
parents:
diff changeset
1555 restore_arg_regs();
4118
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
1556 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr); // Update counter after rscratch1 is free
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1557 __ xorptr(rax, rax); // return 0
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1558 __ leave(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
1559 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1560
a61af66fc99e Initial load
duke
parents:
diff changeset
1561 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
1562 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1563
a61af66fc99e Initial load
duke
parents:
diff changeset
1564 // Arguments:
a61af66fc99e Initial load
duke
parents:
diff changeset
1565 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
a61af66fc99e Initial load
duke
parents:
diff changeset
1566 // ignored
a61af66fc99e Initial load
duke
parents:
diff changeset
1567 // name - stub name string
a61af66fc99e Initial load
duke
parents:
diff changeset
1568 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1569 // Inputs:
a61af66fc99e Initial load
duke
parents:
diff changeset
1570 // c_rarg0 - source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1571 // c_rarg1 - destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1572 // c_rarg2 - element count, treated as ssize_t, can be zero
a61af66fc99e Initial load
duke
parents:
diff changeset
1573 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1574 // If 'from' and/or 'to' are aligned on 4- or 2-byte boundaries, we
a61af66fc99e Initial load
duke
parents:
diff changeset
1575 // let the hardware handle it. The two or four words within dwords
a61af66fc99e Initial load
duke
parents:
diff changeset
1576 // or qwords that span cache line boundaries will still be loaded
a61af66fc99e Initial load
duke
parents:
diff changeset
1577 // and stored atomically.
a61af66fc99e Initial load
duke
parents:
diff changeset
1578 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1579 // Side Effects:
a61af66fc99e Initial load
duke
parents:
diff changeset
1580 // disjoint_short_copy_entry is set to the no-overlap entry point
a61af66fc99e Initial load
duke
parents:
diff changeset
1581 // used by generate_conjoint_short_copy().
a61af66fc99e Initial load
duke
parents:
diff changeset
1582 //
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1583 address generate_disjoint_short_copy(bool aligned, address *entry, const char *name) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1584 __ align(CodeEntryAlignment);
a61af66fc99e Initial load
duke
parents:
diff changeset
1585 StubCodeMark mark(this, "StubRoutines", name);
a61af66fc99e Initial load
duke
parents:
diff changeset
1586 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
1587
a61af66fc99e Initial load
duke
parents:
diff changeset
1588 Label L_copy_32_bytes, L_copy_8_bytes, L_copy_4_bytes,L_copy_2_bytes,L_exit;
a61af66fc99e Initial load
duke
parents:
diff changeset
1589 const Register from = rdi; // source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1590 const Register to = rsi; // destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1591 const Register count = rdx; // elements count
a61af66fc99e Initial load
duke
parents:
diff changeset
1592 const Register word_count = rcx;
a61af66fc99e Initial load
duke
parents:
diff changeset
1593 const Register qword_count = count;
a61af66fc99e Initial load
duke
parents:
diff changeset
1594 const Register end_from = from; // source array end address
a61af66fc99e Initial load
duke
parents:
diff changeset
1595 const Register end_to = to; // destination array end address
a61af66fc99e Initial load
duke
parents:
diff changeset
1596 // End pointers are inclusive, and if count is not zero they point
a61af66fc99e Initial load
duke
parents:
diff changeset
1597 // to the last unit copied: end_to[0] := end_from[0]
a61af66fc99e Initial load
duke
parents:
diff changeset
1598
a61af66fc99e Initial load
duke
parents:
diff changeset
1599 __ enter(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
1600 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
a61af66fc99e Initial load
duke
parents:
diff changeset
1601
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1602 if (entry != NULL) {
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1603 *entry = __ pc();
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1604 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1605 BLOCK_COMMENT("Entry:");
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1606 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1607
a61af66fc99e Initial load
duke
parents:
diff changeset
1608 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
a61af66fc99e Initial load
duke
parents:
diff changeset
1609 // r9 and r10 may be used to save non-volatile registers
a61af66fc99e Initial load
duke
parents:
diff changeset
1610
a61af66fc99e Initial load
duke
parents:
diff changeset
1611 // 'from', 'to' and 'count' are now valid
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1612 __ movptr(word_count, count);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1613 __ shrptr(count, 2); // count => qword_count
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1614
a61af66fc99e Initial load
duke
parents:
diff changeset
1615 // Copy from low to high addresses. Use 'to' as scratch.
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1616 __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1617 __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1618 __ negptr(qword_count);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1619 __ jmp(L_copy_32_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1620
a61af66fc99e Initial load
duke
parents:
diff changeset
1621 // Copy trailing qwords
a61af66fc99e Initial load
duke
parents:
diff changeset
1622 __ BIND(L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1623 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
a61af66fc99e Initial load
duke
parents:
diff changeset
1624 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1625 __ increment(qword_count);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1626 __ jcc(Assembler::notZero, L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1627
a61af66fc99e Initial load
duke
parents:
diff changeset
1628 // Original 'dest' is trashed, so we can't use it as a
a61af66fc99e Initial load
duke
parents:
diff changeset
1629 // base register for a possible trailing word copy
a61af66fc99e Initial load
duke
parents:
diff changeset
1630
a61af66fc99e Initial load
duke
parents:
diff changeset
1631 // Check for and copy trailing dword
a61af66fc99e Initial load
duke
parents:
diff changeset
1632 __ BIND(L_copy_4_bytes);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1633 __ testl(word_count, 2);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1634 __ jccb(Assembler::zero, L_copy_2_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1635 __ movl(rax, Address(end_from, 8));
a61af66fc99e Initial load
duke
parents:
diff changeset
1636 __ movl(Address(end_to, 8), rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
1637
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1638 __ addptr(end_from, 4);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1639 __ addptr(end_to, 4);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1640
a61af66fc99e Initial load
duke
parents:
diff changeset
1641 // Check for and copy trailing word
a61af66fc99e Initial load
duke
parents:
diff changeset
1642 __ BIND(L_copy_2_bytes);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1643 __ testl(word_count, 1);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1644 __ jccb(Assembler::zero, L_exit);
a61af66fc99e Initial load
duke
parents:
diff changeset
1645 __ movw(rax, Address(end_from, 8));
a61af66fc99e Initial load
duke
parents:
diff changeset
1646 __ movw(Address(end_to, 8), rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
1647
a61af66fc99e Initial load
duke
parents:
diff changeset
1648 __ BIND(L_exit);
a61af66fc99e Initial load
duke
parents:
diff changeset
1649 restore_arg_regs();
4118
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
1650 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr); // Update counter after rscratch1 is free
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1651 __ xorptr(rax, rax); // return 0
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1652 __ leave(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
1653 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1654
a61af66fc99e Initial load
duke
parents:
diff changeset
1655 // Copy in 32-bytes chunks
a61af66fc99e Initial load
duke
parents:
diff changeset
1656 copy_32_bytes_forward(end_from, end_to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1657 __ jmp(L_copy_4_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1658
a61af66fc99e Initial load
duke
parents:
diff changeset
1659 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
1660 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1661
1763
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
1662 address generate_fill(BasicType t, bool aligned, const char *name) {
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
1663 __ align(CodeEntryAlignment);
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
1664 StubCodeMark mark(this, "StubRoutines", name);
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
1665 address start = __ pc();
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
1666
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
1667 BLOCK_COMMENT("Entry:");
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
1668
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
1669 const Register to = c_rarg0; // source array address
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
1670 const Register value = c_rarg1; // value
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
1671 const Register count = c_rarg2; // elements count
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
1672
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
1673 __ enter(); // required for proper stackwalking of RuntimeStub frame
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
1674
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
1675 __ generate_fill(t, aligned, to, value, count, rax, xmm0);
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
1676
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
1677 __ leave(); // required for proper stackwalking of RuntimeStub frame
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
1678 __ ret(0);
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
1679 return start;
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
1680 }
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
1681
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1682 // Arguments:
a61af66fc99e Initial load
duke
parents:
diff changeset
1683 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
a61af66fc99e Initial load
duke
parents:
diff changeset
1684 // ignored
a61af66fc99e Initial load
duke
parents:
diff changeset
1685 // name - stub name string
a61af66fc99e Initial load
duke
parents:
diff changeset
1686 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1687 // Inputs:
a61af66fc99e Initial load
duke
parents:
diff changeset
1688 // c_rarg0 - source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1689 // c_rarg1 - destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1690 // c_rarg2 - element count, treated as ssize_t, can be zero
a61af66fc99e Initial load
duke
parents:
diff changeset
1691 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1692 // If 'from' and/or 'to' are aligned on 4- or 2-byte boundaries, we
a61af66fc99e Initial load
duke
parents:
diff changeset
1693 // let the hardware handle it. The two or four words within dwords
a61af66fc99e Initial load
duke
parents:
diff changeset
1694 // or qwords that span cache line boundaries will still be loaded
a61af66fc99e Initial load
duke
parents:
diff changeset
1695 // and stored atomically.
a61af66fc99e Initial load
duke
parents:
diff changeset
1696 //
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1697 address generate_conjoint_short_copy(bool aligned, address nooverlap_target,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1698 address *entry, const char *name) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1699 __ align(CodeEntryAlignment);
a61af66fc99e Initial load
duke
parents:
diff changeset
1700 StubCodeMark mark(this, "StubRoutines", name);
a61af66fc99e Initial load
duke
parents:
diff changeset
1701 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
1702
a61af66fc99e Initial load
duke
parents:
diff changeset
1703 Label L_copy_32_bytes, L_copy_8_bytes, L_copy_4_bytes;
a61af66fc99e Initial load
duke
parents:
diff changeset
1704 const Register from = rdi; // source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1705 const Register to = rsi; // destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1706 const Register count = rdx; // elements count
a61af66fc99e Initial load
duke
parents:
diff changeset
1707 const Register word_count = rcx;
a61af66fc99e Initial load
duke
parents:
diff changeset
1708 const Register qword_count = count;
a61af66fc99e Initial load
duke
parents:
diff changeset
1709
a61af66fc99e Initial load
duke
parents:
diff changeset
1710 __ enter(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
1711 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
a61af66fc99e Initial load
duke
parents:
diff changeset
1712
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1713 if (entry != NULL) {
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1714 *entry = __ pc();
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1715 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1716 BLOCK_COMMENT("Entry:");
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1717 }
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1718
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1719 array_overlap_test(nooverlap_target, Address::times_2);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1720 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
a61af66fc99e Initial load
duke
parents:
diff changeset
1721 // r9 and r10 may be used to save non-volatile registers
a61af66fc99e Initial load
duke
parents:
diff changeset
1722
a61af66fc99e Initial load
duke
parents:
diff changeset
1723 // 'from', 'to' and 'count' are now valid
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1724 __ movptr(word_count, count);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1725 __ shrptr(count, 2); // count => qword_count
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1726
a61af66fc99e Initial load
duke
parents:
diff changeset
1727 // Copy from high to low addresses. Use 'to' as scratch.
a61af66fc99e Initial load
duke
parents:
diff changeset
1728
a61af66fc99e Initial load
duke
parents:
diff changeset
1729 // Check for and copy trailing word
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1730 __ testl(word_count, 1);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1731 __ jccb(Assembler::zero, L_copy_4_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1732 __ movw(rax, Address(from, word_count, Address::times_2, -2));
a61af66fc99e Initial load
duke
parents:
diff changeset
1733 __ movw(Address(to, word_count, Address::times_2, -2), rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
1734
a61af66fc99e Initial load
duke
parents:
diff changeset
1735 // Check for and copy trailing dword
a61af66fc99e Initial load
duke
parents:
diff changeset
1736 __ BIND(L_copy_4_bytes);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1737 __ testl(word_count, 2);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1738 __ jcc(Assembler::zero, L_copy_32_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1739 __ movl(rax, Address(from, qword_count, Address::times_8));
a61af66fc99e Initial load
duke
parents:
diff changeset
1740 __ movl(Address(to, qword_count, Address::times_8), rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
1741 __ jmp(L_copy_32_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1742
a61af66fc99e Initial load
duke
parents:
diff changeset
1743 // Copy trailing qwords
a61af66fc99e Initial load
duke
parents:
diff changeset
1744 __ BIND(L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1745 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
a61af66fc99e Initial load
duke
parents:
diff changeset
1746 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1747 __ decrement(qword_count);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1748 __ jcc(Assembler::notZero, L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1749
a61af66fc99e Initial load
duke
parents:
diff changeset
1750 restore_arg_regs();
4118
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
1751 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr); // Update counter after rscratch1 is free
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1752 __ xorptr(rax, rax); // return 0
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1753 __ leave(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
1754 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1755
a61af66fc99e Initial load
duke
parents:
diff changeset
1756 // Copy in 32-bytes chunks
a61af66fc99e Initial load
duke
parents:
diff changeset
1757 copy_32_bytes_backward(from, to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1758
a61af66fc99e Initial load
duke
parents:
diff changeset
1759 restore_arg_regs();
4118
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
1760 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr); // Update counter after rscratch1 is free
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1761 __ xorptr(rax, rax); // return 0
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1762 __ leave(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
1763 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1764
a61af66fc99e Initial load
duke
parents:
diff changeset
1765 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
1766 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1767
a61af66fc99e Initial load
duke
parents:
diff changeset
1768 // Arguments:
a61af66fc99e Initial load
duke
parents:
diff changeset
1769 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
a61af66fc99e Initial load
duke
parents:
diff changeset
1770 // ignored
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1771 // is_oop - true => oop array, so generate store check code
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1772 // name - stub name string
a61af66fc99e Initial load
duke
parents:
diff changeset
1773 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1774 // Inputs:
a61af66fc99e Initial load
duke
parents:
diff changeset
1775 // c_rarg0 - source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1776 // c_rarg1 - destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1777 // c_rarg2 - element count, treated as ssize_t, can be zero
a61af66fc99e Initial load
duke
parents:
diff changeset
1778 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1779 // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let
a61af66fc99e Initial load
duke
parents:
diff changeset
1780 // the hardware handle it. The two dwords within qwords that span
a61af66fc99e Initial load
duke
parents:
diff changeset
1781 // cache line boundaries will still be loaded and stored atomicly.
a61af66fc99e Initial load
duke
parents:
diff changeset
1782 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1783 // Side Effects:
a61af66fc99e Initial load
duke
parents:
diff changeset
1784 // disjoint_int_copy_entry is set to the no-overlap entry point
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1785 // used by generate_conjoint_int_oop_copy().
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1786 //
2324
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1787 address generate_disjoint_int_oop_copy(bool aligned, bool is_oop, address* entry,
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1788 const char *name, bool dest_uninitialized = false) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1789 __ align(CodeEntryAlignment);
a61af66fc99e Initial load
duke
parents:
diff changeset
1790 StubCodeMark mark(this, "StubRoutines", name);
a61af66fc99e Initial load
duke
parents:
diff changeset
1791 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
1792
a61af66fc99e Initial load
duke
parents:
diff changeset
1793 Label L_copy_32_bytes, L_copy_8_bytes, L_copy_4_bytes, L_exit;
a61af66fc99e Initial load
duke
parents:
diff changeset
1794 const Register from = rdi; // source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1795 const Register to = rsi; // destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1796 const Register count = rdx; // elements count
a61af66fc99e Initial load
duke
parents:
diff changeset
1797 const Register dword_count = rcx;
a61af66fc99e Initial load
duke
parents:
diff changeset
1798 const Register qword_count = count;
a61af66fc99e Initial load
duke
parents:
diff changeset
1799 const Register end_from = from; // source array end address
a61af66fc99e Initial load
duke
parents:
diff changeset
1800 const Register end_to = to; // destination array end address
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1801 const Register saved_to = r11; // saved destination array address
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1802 // End pointers are inclusive, and if count is not zero they point
a61af66fc99e Initial load
duke
parents:
diff changeset
1803 // to the last unit copied: end_to[0] := end_from[0]
a61af66fc99e Initial load
duke
parents:
diff changeset
1804
a61af66fc99e Initial load
duke
parents:
diff changeset
1805 __ enter(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
1806 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
a61af66fc99e Initial load
duke
parents:
diff changeset
1807
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1808 if (entry != NULL) {
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1809 *entry = __ pc();
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1810 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1811 BLOCK_COMMENT("Entry:");
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1812 }
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1813
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1814 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
a61af66fc99e Initial load
duke
parents:
diff changeset
1815 // r9 and r10 may be used to save non-volatile registers
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1816 if (is_oop) {
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1817 __ movq(saved_to, to);
2324
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1818 gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1819 }
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1820
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1821 // 'from', 'to' and 'count' are now valid
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1822 __ movptr(dword_count, count);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1823 __ shrptr(count, 1); // count => qword_count
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1824
a61af66fc99e Initial load
duke
parents:
diff changeset
1825 // Copy from low to high addresses. Use 'to' as scratch.
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1826 __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1827 __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1828 __ negptr(qword_count);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1829 __ jmp(L_copy_32_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1830
a61af66fc99e Initial load
duke
parents:
diff changeset
1831 // Copy trailing qwords
a61af66fc99e Initial load
duke
parents:
diff changeset
1832 __ BIND(L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1833 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
a61af66fc99e Initial load
duke
parents:
diff changeset
1834 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1835 __ increment(qword_count);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1836 __ jcc(Assembler::notZero, L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1837
a61af66fc99e Initial load
duke
parents:
diff changeset
1838 // Check for and copy trailing dword
a61af66fc99e Initial load
duke
parents:
diff changeset
1839 __ BIND(L_copy_4_bytes);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1840 __ testl(dword_count, 1); // Only byte test since the value is 0 or 1
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1841 __ jccb(Assembler::zero, L_exit);
a61af66fc99e Initial load
duke
parents:
diff changeset
1842 __ movl(rax, Address(end_from, 8));
a61af66fc99e Initial load
duke
parents:
diff changeset
1843 __ movl(Address(end_to, 8), rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
1844
a61af66fc99e Initial load
duke
parents:
diff changeset
1845 __ BIND(L_exit);
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1846 if (is_oop) {
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1847 __ leaq(end_to, Address(saved_to, dword_count, Address::times_4, -4));
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1848 gen_write_ref_array_post_barrier(saved_to, end_to, rax);
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1849 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1850 restore_arg_regs();
4118
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
1851 inc_counter_np(SharedRuntime::_jint_array_copy_ctr); // Update counter after rscratch1 is free
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1852 __ xorptr(rax, rax); // return 0
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1853 __ leave(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
1854 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1855
a61af66fc99e Initial load
duke
parents:
diff changeset
1856 // Copy 32-bytes chunks
a61af66fc99e Initial load
duke
parents:
diff changeset
1857 copy_32_bytes_forward(end_from, end_to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1858 __ jmp(L_copy_4_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1859
a61af66fc99e Initial load
duke
parents:
diff changeset
1860 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
1861 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1862
a61af66fc99e Initial load
duke
parents:
diff changeset
1863 // Arguments:
a61af66fc99e Initial load
duke
parents:
diff changeset
1864 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
a61af66fc99e Initial load
duke
parents:
diff changeset
1865 // ignored
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1866 // is_oop - true => oop array, so generate store check code
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1867 // name - stub name string
a61af66fc99e Initial load
duke
parents:
diff changeset
1868 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1869 // Inputs:
a61af66fc99e Initial load
duke
parents:
diff changeset
1870 // c_rarg0 - source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1871 // c_rarg1 - destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1872 // c_rarg2 - element count, treated as ssize_t, can be zero
a61af66fc99e Initial load
duke
parents:
diff changeset
1873 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1874 // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let
a61af66fc99e Initial load
duke
parents:
diff changeset
1875 // the hardware handle it. The two dwords within qwords that span
a61af66fc99e Initial load
duke
parents:
diff changeset
1876 // cache line boundaries will still be loaded and stored atomicly.
a61af66fc99e Initial load
duke
parents:
diff changeset
1877 //
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1878 address generate_conjoint_int_oop_copy(bool aligned, bool is_oop, address nooverlap_target,
2324
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1879 address *entry, const char *name,
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1880 bool dest_uninitialized = false) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1881 __ align(CodeEntryAlignment);
a61af66fc99e Initial load
duke
parents:
diff changeset
1882 StubCodeMark mark(this, "StubRoutines", name);
a61af66fc99e Initial load
duke
parents:
diff changeset
1883 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
1884
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1885 Label L_copy_32_bytes, L_copy_8_bytes, L_copy_2_bytes, L_exit;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1886 const Register from = rdi; // source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1887 const Register to = rsi; // destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1888 const Register count = rdx; // elements count
a61af66fc99e Initial load
duke
parents:
diff changeset
1889 const Register dword_count = rcx;
a61af66fc99e Initial load
duke
parents:
diff changeset
1890 const Register qword_count = count;
a61af66fc99e Initial load
duke
parents:
diff changeset
1891
a61af66fc99e Initial load
duke
parents:
diff changeset
1892 __ enter(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
1893 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
a61af66fc99e Initial load
duke
parents:
diff changeset
1894
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1895 if (entry != NULL) {
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1896 *entry = __ pc();
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1897 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1898 BLOCK_COMMENT("Entry:");
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1899 }
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1900
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1901 array_overlap_test(nooverlap_target, Address::times_4);
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1902 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1903 // r9 and r10 may be used to save non-volatile registers
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1904
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1905 if (is_oop) {
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1906 // no registers are destroyed by this call
2324
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1907 gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1908 }
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1909
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1910 assert_clean_int(count, rax); // Make sure 'count' is clean int.
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1911 // 'from', 'to' and 'count' are now valid
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1912 __ movptr(dword_count, count);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1913 __ shrptr(count, 1); // count => qword_count
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1914
a61af66fc99e Initial load
duke
parents:
diff changeset
1915 // Copy from high to low addresses. Use 'to' as scratch.
a61af66fc99e Initial load
duke
parents:
diff changeset
1916
a61af66fc99e Initial load
duke
parents:
diff changeset
1917 // Check for and copy trailing dword
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1918 __ testl(dword_count, 1);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1919 __ jcc(Assembler::zero, L_copy_32_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1920 __ movl(rax, Address(from, dword_count, Address::times_4, -4));
a61af66fc99e Initial load
duke
parents:
diff changeset
1921 __ movl(Address(to, dword_count, Address::times_4, -4), rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
1922 __ jmp(L_copy_32_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1923
a61af66fc99e Initial load
duke
parents:
diff changeset
1924 // Copy trailing qwords
a61af66fc99e Initial load
duke
parents:
diff changeset
1925 __ BIND(L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1926 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
a61af66fc99e Initial load
duke
parents:
diff changeset
1927 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1928 __ decrement(qword_count);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1929 __ jcc(Assembler::notZero, L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1930
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1931 if (is_oop) {
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1932 __ jmp(L_exit);
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1933 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1934 restore_arg_regs();
4118
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
1935 inc_counter_np(SharedRuntime::_jint_array_copy_ctr); // Update counter after rscratch1 is free
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1936 __ xorptr(rax, rax); // return 0
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1937 __ leave(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
1938 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1939
a61af66fc99e Initial load
duke
parents:
diff changeset
1940 // Copy in 32-bytes chunks
a61af66fc99e Initial load
duke
parents:
diff changeset
1941 copy_32_bytes_backward(from, to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1942
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1943 __ bind(L_exit);
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1944 if (is_oop) {
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1945 Register end_to = rdx;
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1946 __ leaq(end_to, Address(to, dword_count, Address::times_4, -4));
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1947 gen_write_ref_array_post_barrier(to, end_to, rax);
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1948 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1949 restore_arg_regs();
4118
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
1950 inc_counter_np(SharedRuntime::_jint_array_copy_ctr); // Update counter after rscratch1 is free
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1951 __ xorptr(rax, rax); // return 0
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1952 __ leave(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
1953 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1954
a61af66fc99e Initial load
duke
parents:
diff changeset
1955 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
1956 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1957
a61af66fc99e Initial load
duke
parents:
diff changeset
1958 // Arguments:
a61af66fc99e Initial load
duke
parents:
diff changeset
1959 // aligned - true => Input and output aligned on a HeapWord boundary == 8 bytes
a61af66fc99e Initial load
duke
parents:
diff changeset
1960 // ignored
a61af66fc99e Initial load
duke
parents:
diff changeset
1961 // is_oop - true => oop array, so generate store check code
a61af66fc99e Initial load
duke
parents:
diff changeset
1962 // name - stub name string
a61af66fc99e Initial load
duke
parents:
diff changeset
1963 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1964 // Inputs:
a61af66fc99e Initial load
duke
parents:
diff changeset
1965 // c_rarg0 - source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1966 // c_rarg1 - destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1967 // c_rarg2 - element count, treated as ssize_t, can be zero
a61af66fc99e Initial load
duke
parents:
diff changeset
1968 //
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
1969 // Side Effects:
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1970 // disjoint_oop_copy_entry or disjoint_long_copy_entry is set to the
a61af66fc99e Initial load
duke
parents:
diff changeset
1971 // no-overlap entry point used by generate_conjoint_long_oop_copy().
a61af66fc99e Initial load
duke
parents:
diff changeset
1972 //
2324
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1973 address generate_disjoint_long_oop_copy(bool aligned, bool is_oop, address *entry,
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
1974 const char *name, bool dest_uninitialized = false) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1975 __ align(CodeEntryAlignment);
a61af66fc99e Initial load
duke
parents:
diff changeset
1976 StubCodeMark mark(this, "StubRoutines", name);
a61af66fc99e Initial load
duke
parents:
diff changeset
1977 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
1978
a61af66fc99e Initial load
duke
parents:
diff changeset
1979 Label L_copy_32_bytes, L_copy_8_bytes, L_exit;
a61af66fc99e Initial load
duke
parents:
diff changeset
1980 const Register from = rdi; // source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1981 const Register to = rsi; // destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1982 const Register qword_count = rdx; // elements count
a61af66fc99e Initial load
duke
parents:
diff changeset
1983 const Register end_from = from; // source array end address
a61af66fc99e Initial load
duke
parents:
diff changeset
1984 const Register end_to = rcx; // destination array end address
a61af66fc99e Initial load
duke
parents:
diff changeset
1985 const Register saved_to = to;
a61af66fc99e Initial load
duke
parents:
diff changeset
1986 // End pointers are inclusive, and if count is not zero they point
a61af66fc99e Initial load
duke
parents:
diff changeset
1987 // to the last unit copied: end_to[0] := end_from[0]
a61af66fc99e Initial load
duke
parents:
diff changeset
1988
a61af66fc99e Initial load
duke
parents:
diff changeset
1989 __ enter(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
1990 // Save no-overlap entry point for generate_conjoint_long_oop_copy()
a61af66fc99e Initial load
duke
parents:
diff changeset
1991 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
a61af66fc99e Initial load
duke
parents:
diff changeset
1992
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1993 if (entry != NULL) {
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1994 *entry = __ pc();
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1995 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
1996 BLOCK_COMMENT("Entry:");
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1997 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1998
a61af66fc99e Initial load
duke
parents:
diff changeset
1999 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
a61af66fc99e Initial load
duke
parents:
diff changeset
2000 // r9 and r10 may be used to save non-volatile registers
a61af66fc99e Initial load
duke
parents:
diff changeset
2001 // 'from', 'to' and 'qword_count' are now valid
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2002 if (is_oop) {
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2003 // no registers are destroyed by this call
2324
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2004 gen_write_ref_array_pre_barrier(to, qword_count, dest_uninitialized);
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2005 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2006
a61af66fc99e Initial load
duke
parents:
diff changeset
2007 // Copy from low to high addresses. Use 'to' as scratch.
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2008 __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2009 __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2010 __ negptr(qword_count);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2011 __ jmp(L_copy_32_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
2012
a61af66fc99e Initial load
duke
parents:
diff changeset
2013 // Copy trailing qwords
a61af66fc99e Initial load
duke
parents:
diff changeset
2014 __ BIND(L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
2015 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
a61af66fc99e Initial load
duke
parents:
diff changeset
2016 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2017 __ increment(qword_count);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2018 __ jcc(Assembler::notZero, L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
2019
a61af66fc99e Initial load
duke
parents:
diff changeset
2020 if (is_oop) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2021 __ jmp(L_exit);
a61af66fc99e Initial load
duke
parents:
diff changeset
2022 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
2023 restore_arg_regs();
4118
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
2024 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2025 __ xorptr(rax, rax); // return 0
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2026 __ leave(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
2027 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
2028 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2029
a61af66fc99e Initial load
duke
parents:
diff changeset
2030 // Copy 64-byte chunks
a61af66fc99e Initial load
duke
parents:
diff changeset
2031 copy_32_bytes_forward(end_from, end_to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
2032
a61af66fc99e Initial load
duke
parents:
diff changeset
2033 if (is_oop) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2034 __ BIND(L_exit);
a61af66fc99e Initial load
duke
parents:
diff changeset
2035 gen_write_ref_array_post_barrier(saved_to, end_to, rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
2036 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2037 restore_arg_regs();
4118
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
2038 if (is_oop) {
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
2039 inc_counter_np(SharedRuntime::_oop_array_copy_ctr); // Update counter after rscratch1 is free
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
2040 } else {
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
2041 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
2042 }
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2043 __ xorptr(rax, rax); // return 0
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2044 __ leave(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
2045 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
2046
a61af66fc99e Initial load
duke
parents:
diff changeset
2047 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
2048 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2049
a61af66fc99e Initial load
duke
parents:
diff changeset
2050 // Arguments:
a61af66fc99e Initial load
duke
parents:
diff changeset
2051 // aligned - true => Input and output aligned on a HeapWord boundary == 8 bytes
a61af66fc99e Initial load
duke
parents:
diff changeset
2052 // ignored
a61af66fc99e Initial load
duke
parents:
diff changeset
2053 // is_oop - true => oop array, so generate store check code
a61af66fc99e Initial load
duke
parents:
diff changeset
2054 // name - stub name string
a61af66fc99e Initial load
duke
parents:
diff changeset
2055 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2056 // Inputs:
a61af66fc99e Initial load
duke
parents:
diff changeset
2057 // c_rarg0 - source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
2058 // c_rarg1 - destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
2059 // c_rarg2 - element count, treated as ssize_t, can be zero
a61af66fc99e Initial load
duke
parents:
diff changeset
2060 //
2324
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2061 address generate_conjoint_long_oop_copy(bool aligned, bool is_oop,
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2062 address nooverlap_target, address *entry,
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2063 const char *name, bool dest_uninitialized = false) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2064 __ align(CodeEntryAlignment);
a61af66fc99e Initial load
duke
parents:
diff changeset
2065 StubCodeMark mark(this, "StubRoutines", name);
a61af66fc99e Initial load
duke
parents:
diff changeset
2066 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
2067
a61af66fc99e Initial load
duke
parents:
diff changeset
2068 Label L_copy_32_bytes, L_copy_8_bytes, L_exit;
a61af66fc99e Initial load
duke
parents:
diff changeset
2069 const Register from = rdi; // source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
2070 const Register to = rsi; // destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
2071 const Register qword_count = rdx; // elements count
a61af66fc99e Initial load
duke
parents:
diff changeset
2072 const Register saved_count = rcx;
a61af66fc99e Initial load
duke
parents:
diff changeset
2073
a61af66fc99e Initial load
duke
parents:
diff changeset
2074 __ enter(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
2075 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
a61af66fc99e Initial load
duke
parents:
diff changeset
2076
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2077 if (entry != NULL) {
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2078 *entry = __ pc();
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2079 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2080 BLOCK_COMMENT("Entry:");
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2081 }
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2082
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2083 array_overlap_test(nooverlap_target, Address::times_8);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2084 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
a61af66fc99e Initial load
duke
parents:
diff changeset
2085 // r9 and r10 may be used to save non-volatile registers
a61af66fc99e Initial load
duke
parents:
diff changeset
2086 // 'from', 'to' and 'qword_count' are now valid
a61af66fc99e Initial load
duke
parents:
diff changeset
2087 if (is_oop) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2088 // Save to and count for store barrier
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2089 __ movptr(saved_count, qword_count);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2090 // No registers are destroyed by this call
2324
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2091 gen_write_ref_array_pre_barrier(to, saved_count, dest_uninitialized);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2092 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2093
a61af66fc99e Initial load
duke
parents:
diff changeset
2094 __ jmp(L_copy_32_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
2095
a61af66fc99e Initial load
duke
parents:
diff changeset
2096 // Copy trailing qwords
a61af66fc99e Initial load
duke
parents:
diff changeset
2097 __ BIND(L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
2098 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
a61af66fc99e Initial load
duke
parents:
diff changeset
2099 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2100 __ decrement(qword_count);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2101 __ jcc(Assembler::notZero, L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
2102
a61af66fc99e Initial load
duke
parents:
diff changeset
2103 if (is_oop) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2104 __ jmp(L_exit);
a61af66fc99e Initial load
duke
parents:
diff changeset
2105 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
2106 restore_arg_regs();
4118
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
2107 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2108 __ xorptr(rax, rax); // return 0
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2109 __ leave(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
2110 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
2111 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2112
a61af66fc99e Initial load
duke
parents:
diff changeset
2113 // Copy in 32-bytes chunks
a61af66fc99e Initial load
duke
parents:
diff changeset
2114 copy_32_bytes_backward(from, to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
2115
a61af66fc99e Initial load
duke
parents:
diff changeset
2116 if (is_oop) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2117 __ BIND(L_exit);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2118 __ lea(rcx, Address(to, saved_count, Address::times_8, -8));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2119 gen_write_ref_array_post_barrier(to, rcx, rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
2120 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2121 restore_arg_regs();
4118
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
2122 if (is_oop) {
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
2123 inc_counter_np(SharedRuntime::_oop_array_copy_ctr); // Update counter after rscratch1 is free
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
2124 } else {
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
2125 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
2126 }
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2127 __ xorptr(rax, rax); // return 0
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2128 __ leave(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
2129 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
2130
a61af66fc99e Initial load
duke
parents:
diff changeset
2131 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
2132 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2133
a61af66fc99e Initial load
duke
parents:
diff changeset
2134
a61af66fc99e Initial load
duke
parents:
diff changeset
2135 // Helper for generating a dynamic type check.
a61af66fc99e Initial load
duke
parents:
diff changeset
2136 // Smashes no registers.
a61af66fc99e Initial load
duke
parents:
diff changeset
2137 void generate_type_check(Register sub_klass,
a61af66fc99e Initial load
duke
parents:
diff changeset
2138 Register super_check_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
2139 Register super_klass,
a61af66fc99e Initial load
duke
parents:
diff changeset
2140 Label& L_success) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2141 assert_different_registers(sub_klass, super_check_offset, super_klass);
a61af66fc99e Initial load
duke
parents:
diff changeset
2142
a61af66fc99e Initial load
duke
parents:
diff changeset
2143 BLOCK_COMMENT("type_check:");
a61af66fc99e Initial load
duke
parents:
diff changeset
2144
a61af66fc99e Initial load
duke
parents:
diff changeset
2145 Label L_miss;
a61af66fc99e Initial load
duke
parents:
diff changeset
2146
644
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 512
diff changeset
2147 __ check_klass_subtype_fast_path(sub_klass, super_klass, noreg, &L_success, &L_miss, NULL,
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 512
diff changeset
2148 super_check_offset);
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 512
diff changeset
2149 __ check_klass_subtype_slow_path(sub_klass, super_klass, noreg, noreg, &L_success, NULL);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2150
a61af66fc99e Initial load
duke
parents:
diff changeset
2151 // Fall through on failure!
a61af66fc99e Initial load
duke
parents:
diff changeset
2152 __ BIND(L_miss);
a61af66fc99e Initial load
duke
parents:
diff changeset
2153 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2154
a61af66fc99e Initial load
duke
parents:
diff changeset
2155 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2156 // Generate checkcasting array copy stub
a61af66fc99e Initial load
duke
parents:
diff changeset
2157 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2158 // Input:
a61af66fc99e Initial load
duke
parents:
diff changeset
2159 // c_rarg0 - source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
2160 // c_rarg1 - destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
2161 // c_rarg2 - element count, treated as ssize_t, can be zero
a61af66fc99e Initial load
duke
parents:
diff changeset
2162 // c_rarg3 - size_t ckoff (super_check_offset)
a61af66fc99e Initial load
duke
parents:
diff changeset
2163 // not Win64
a61af66fc99e Initial load
duke
parents:
diff changeset
2164 // c_rarg4 - oop ckval (super_klass)
a61af66fc99e Initial load
duke
parents:
diff changeset
2165 // Win64
a61af66fc99e Initial load
duke
parents:
diff changeset
2166 // rsp+40 - oop ckval (super_klass)
a61af66fc99e Initial load
duke
parents:
diff changeset
2167 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2168 // Output:
a61af66fc99e Initial load
duke
parents:
diff changeset
2169 // rax == 0 - success
a61af66fc99e Initial load
duke
parents:
diff changeset
2170 // rax == -1^K - failure, where K is partial transfer count
a61af66fc99e Initial load
duke
parents:
diff changeset
2171 //
2324
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2172 address generate_checkcast_copy(const char *name, address *entry,
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2173 bool dest_uninitialized = false) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2174
a61af66fc99e Initial load
duke
parents:
diff changeset
2175 Label L_load_element, L_store_element, L_do_card_marks, L_done;
a61af66fc99e Initial load
duke
parents:
diff changeset
2176
a61af66fc99e Initial load
duke
parents:
diff changeset
2177 // Input registers (after setup_arg_regs)
a61af66fc99e Initial load
duke
parents:
diff changeset
2178 const Register from = rdi; // source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
2179 const Register to = rsi; // destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
2180 const Register length = rdx; // elements count
a61af66fc99e Initial load
duke
parents:
diff changeset
2181 const Register ckoff = rcx; // super_check_offset
a61af66fc99e Initial load
duke
parents:
diff changeset
2182 const Register ckval = r8; // super_klass
a61af66fc99e Initial load
duke
parents:
diff changeset
2183
a61af66fc99e Initial load
duke
parents:
diff changeset
2184 // Registers used as temps (r13, r14 are save-on-entry)
a61af66fc99e Initial load
duke
parents:
diff changeset
2185 const Register end_from = from; // source array end address
a61af66fc99e Initial load
duke
parents:
diff changeset
2186 const Register end_to = r13; // destination array end address
a61af66fc99e Initial load
duke
parents:
diff changeset
2187 const Register count = rdx; // -(count_remaining)
a61af66fc99e Initial load
duke
parents:
diff changeset
2188 const Register r14_length = r14; // saved copy of length
a61af66fc99e Initial load
duke
parents:
diff changeset
2189 // End pointers are inclusive, and if length is not zero they point
a61af66fc99e Initial load
duke
parents:
diff changeset
2190 // to the last unit copied: end_to[0] := end_from[0]
a61af66fc99e Initial load
duke
parents:
diff changeset
2191
a61af66fc99e Initial load
duke
parents:
diff changeset
2192 const Register rax_oop = rax; // actual oop copied
a61af66fc99e Initial load
duke
parents:
diff changeset
2193 const Register r11_klass = r11; // oop._klass
a61af66fc99e Initial load
duke
parents:
diff changeset
2194
a61af66fc99e Initial load
duke
parents:
diff changeset
2195 //---------------------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
2196 // Assembler stub will be used for this call to arraycopy
a61af66fc99e Initial load
duke
parents:
diff changeset
2197 // if the two arrays are subtypes of Object[] but the
a61af66fc99e Initial load
duke
parents:
diff changeset
2198 // destination array type is not equal to or a supertype
a61af66fc99e Initial load
duke
parents:
diff changeset
2199 // of the source type. Each element must be separately
a61af66fc99e Initial load
duke
parents:
diff changeset
2200 // checked.
a61af66fc99e Initial load
duke
parents:
diff changeset
2201
a61af66fc99e Initial load
duke
parents:
diff changeset
2202 __ align(CodeEntryAlignment);
a61af66fc99e Initial load
duke
parents:
diff changeset
2203 StubCodeMark mark(this, "StubRoutines", name);
a61af66fc99e Initial load
duke
parents:
diff changeset
2204 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
2205
a61af66fc99e Initial load
duke
parents:
diff changeset
2206 __ enter(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
2207
a61af66fc99e Initial load
duke
parents:
diff changeset
2208 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
2209 // caller guarantees that the arrays really are different
a61af66fc99e Initial load
duke
parents:
diff changeset
2210 // otherwise, we would have to make conjoint checks
a61af66fc99e Initial load
duke
parents:
diff changeset
2211 { Label L;
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
2212 array_overlap_test(L, TIMES_OOP);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2213 __ stop("checkcast_copy within a single array");
a61af66fc99e Initial load
duke
parents:
diff changeset
2214 __ bind(L);
a61af66fc99e Initial load
duke
parents:
diff changeset
2215 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2216 #endif //ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
2217
a61af66fc99e Initial load
duke
parents:
diff changeset
2218 setup_arg_regs(4); // from => rdi, to => rsi, length => rdx
a61af66fc99e Initial load
duke
parents:
diff changeset
2219 // ckoff => rcx, ckval => r8
a61af66fc99e Initial load
duke
parents:
diff changeset
2220 // r9 and r10 may be used to save non-volatile registers
a61af66fc99e Initial load
duke
parents:
diff changeset
2221 #ifdef _WIN64
a61af66fc99e Initial load
duke
parents:
diff changeset
2222 // last argument (#4) is on stack on Win64
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2223 __ movptr(ckval, Address(rsp, 6 * wordSize));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2224 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
2225
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2226 // Caller of this entry point must set up the argument registers.
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2227 if (entry != NULL) {
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2228 *entry = __ pc();
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2229 BLOCK_COMMENT("Entry:");
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2230 }
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2231
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2232 // allocate spill slots for r13, r14
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2233 enum {
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2234 saved_r13_offset,
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2235 saved_r14_offset,
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2236 saved_rbp_offset
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2237 };
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2238 __ subptr(rsp, saved_rbp_offset * wordSize);
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2239 __ movptr(Address(rsp, saved_r13_offset * wordSize), r13);
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2240 __ movptr(Address(rsp, saved_r14_offset * wordSize), r14);
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2241
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2242 // check that int operands are properly extended to size_t
a61af66fc99e Initial load
duke
parents:
diff changeset
2243 assert_clean_int(length, rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
2244 assert_clean_int(ckoff, rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
2245
a61af66fc99e Initial load
duke
parents:
diff changeset
2246 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
2247 BLOCK_COMMENT("assert consistent ckoff/ckval");
a61af66fc99e Initial load
duke
parents:
diff changeset
2248 // The ckoff and ckval must be mutually consistent,
a61af66fc99e Initial load
duke
parents:
diff changeset
2249 // even though caller generates both.
a61af66fc99e Initial load
duke
parents:
diff changeset
2250 { Label L;
4762
069ab3f976d3 7118863: Move sizeof(klassOopDesc) into the *Klass::*_offset_in_bytes() functions
stefank
parents: 4118
diff changeset
2251 int sco_offset = in_bytes(Klass::super_check_offset_offset());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2252 __ cmpl(ckoff, Address(ckval, sco_offset));
a61af66fc99e Initial load
duke
parents:
diff changeset
2253 __ jcc(Assembler::equal, L);
a61af66fc99e Initial load
duke
parents:
diff changeset
2254 __ stop("super_check_offset inconsistent");
a61af66fc99e Initial load
duke
parents:
diff changeset
2255 __ bind(L);
a61af66fc99e Initial load
duke
parents:
diff changeset
2256 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2257 #endif //ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
2258
a61af66fc99e Initial load
duke
parents:
diff changeset
2259 // Loop-invariant addresses. They are exclusive end pointers.
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
2260 Address end_from_addr(from, length, TIMES_OOP, 0);
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
2261 Address end_to_addr(to, length, TIMES_OOP, 0);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2262 // Loop-variant addresses. They assume post-incremented count < 0.
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
2263 Address from_element_addr(end_from, count, TIMES_OOP, 0);
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
2264 Address to_element_addr(end_to, count, TIMES_OOP, 0);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2265
2324
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2266 gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2267
a61af66fc99e Initial load
duke
parents:
diff changeset
2268 // Copy from low to high addresses, indexed from the end of each array.
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2269 __ lea(end_from, end_from_addr);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2270 __ lea(end_to, end_to_addr);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2271 __ movptr(r14_length, length); // save a copy of the length
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2272 assert(length == count, ""); // else fix next line:
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2273 __ negptr(count); // negate and test the length
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2274 __ jcc(Assembler::notZero, L_load_element);
a61af66fc99e Initial load
duke
parents:
diff changeset
2275
a61af66fc99e Initial load
duke
parents:
diff changeset
2276 // Empty array: Nothing to do.
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2277 __ xorptr(rax, rax); // return 0 on (trivial) success
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2278 __ jmp(L_done);
a61af66fc99e Initial load
duke
parents:
diff changeset
2279
a61af66fc99e Initial load
duke
parents:
diff changeset
2280 // ======== begin loop ========
a61af66fc99e Initial load
duke
parents:
diff changeset
2281 // (Loop is rotated; its entry is L_load_element.)
a61af66fc99e Initial load
duke
parents:
diff changeset
2282 // Loop control:
a61af66fc99e Initial load
duke
parents:
diff changeset
2283 // for (count = -count; count != 0; count++)
a61af66fc99e Initial load
duke
parents:
diff changeset
2284 // Base pointers src, dst are biased by 8*(count-1),to last element.
1365
6476042f815c 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 1299
diff changeset
2285 __ align(OptoLoopAlignment);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2286
a61af66fc99e Initial load
duke
parents:
diff changeset
2287 __ BIND(L_store_element);
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
2288 __ store_heap_oop(to_element_addr, rax_oop); // store the oop
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2289 __ increment(count); // increment the count toward zero
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2290 __ jcc(Assembler::zero, L_do_card_marks);
a61af66fc99e Initial load
duke
parents:
diff changeset
2291
a61af66fc99e Initial load
duke
parents:
diff changeset
2292 // ======== loop entry is here ========
a61af66fc99e Initial load
duke
parents:
diff changeset
2293 __ BIND(L_load_element);
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
2294 __ load_heap_oop(rax_oop, from_element_addr); // load the oop
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2295 __ testptr(rax_oop, rax_oop);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2296 __ jcc(Assembler::zero, L_store_element);
a61af66fc99e Initial load
duke
parents:
diff changeset
2297
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
2298 __ load_klass(r11_klass, rax_oop);// query the object klass
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2299 generate_type_check(r11_klass, ckoff, ckval, L_store_element);
a61af66fc99e Initial load
duke
parents:
diff changeset
2300 // ======== end loop ========
a61af66fc99e Initial load
duke
parents:
diff changeset
2301
a61af66fc99e Initial load
duke
parents:
diff changeset
2302 // It was a real error; we must depend on the caller to finish the job.
a61af66fc99e Initial load
duke
parents:
diff changeset
2303 // Register rdx = -1 * number of *remaining* oops, r14 = *total* oops.
a61af66fc99e Initial load
duke
parents:
diff changeset
2304 // Emit GC store barriers for the oops we have copied (r14 + rdx),
a61af66fc99e Initial load
duke
parents:
diff changeset
2305 // and report their number to the caller.
a61af66fc99e Initial load
duke
parents:
diff changeset
2306 assert_different_registers(rax, r14_length, count, to, end_to, rcx);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2307 __ lea(end_to, to_element_addr);
845
df6caf649ff7 6700789: G1: Enable use of compressed oops with G1 heaps
ysr
parents: 671
diff changeset
2308 __ addptr(end_to, -heapOopSize); // make an inclusive end pointer
362
apetrusenko
parents: 304 356
diff changeset
2309 gen_write_ref_array_post_barrier(to, end_to, rscratch1);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2310 __ movptr(rax, r14_length); // original oops
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2311 __ addptr(rax, count); // K = (original - remaining) oops
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2312 __ notptr(rax); // report (-1^K) to caller
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2313 __ jmp(L_done);
a61af66fc99e Initial load
duke
parents:
diff changeset
2314
a61af66fc99e Initial load
duke
parents:
diff changeset
2315 // Come here on success only.
a61af66fc99e Initial load
duke
parents:
diff changeset
2316 __ BIND(L_do_card_marks);
845
df6caf649ff7 6700789: G1: Enable use of compressed oops with G1 heaps
ysr
parents: 671
diff changeset
2317 __ addptr(end_to, -heapOopSize); // make an inclusive end pointer
362
apetrusenko
parents: 304 356
diff changeset
2318 gen_write_ref_array_post_barrier(to, end_to, rscratch1);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2319 __ xorptr(rax, rax); // return 0 on success
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2320
a61af66fc99e Initial load
duke
parents:
diff changeset
2321 // Common exit point (success or failure).
a61af66fc99e Initial load
duke
parents:
diff changeset
2322 __ BIND(L_done);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2323 __ movptr(r13, Address(rsp, saved_r13_offset * wordSize));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2324 __ movptr(r14, Address(rsp, saved_r14_offset * wordSize));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2325 restore_arg_regs();
4118
59bc0d4d9ea3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 4114
diff changeset
2326 inc_counter_np(SharedRuntime::_checkcast_array_copy_ctr); // Update counter after rscratch1 is free
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2327 __ leave(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
2328 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
2329
a61af66fc99e Initial load
duke
parents:
diff changeset
2330 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
2331 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2332
a61af66fc99e Initial load
duke
parents:
diff changeset
2333 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2334 // Generate 'unsafe' array copy stub
a61af66fc99e Initial load
duke
parents:
diff changeset
2335 // Though just as safe as the other stubs, it takes an unscaled
a61af66fc99e Initial load
duke
parents:
diff changeset
2336 // size_t argument instead of an element count.
a61af66fc99e Initial load
duke
parents:
diff changeset
2337 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2338 // Input:
a61af66fc99e Initial load
duke
parents:
diff changeset
2339 // c_rarg0 - source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
2340 // c_rarg1 - destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
2341 // c_rarg2 - byte count, treated as ssize_t, can be zero
a61af66fc99e Initial load
duke
parents:
diff changeset
2342 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2343 // Examines the alignment of the operands and dispatches
a61af66fc99e Initial load
duke
parents:
diff changeset
2344 // to a long, int, short, or byte copy loop.
a61af66fc99e Initial load
duke
parents:
diff changeset
2345 //
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2346 address generate_unsafe_copy(const char *name,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2347 address byte_copy_entry, address short_copy_entry,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2348 address int_copy_entry, address long_copy_entry) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2349
a61af66fc99e Initial load
duke
parents:
diff changeset
2350 Label L_long_aligned, L_int_aligned, L_short_aligned;
a61af66fc99e Initial load
duke
parents:
diff changeset
2351
a61af66fc99e Initial load
duke
parents:
diff changeset
2352 // Input registers (before setup_arg_regs)
a61af66fc99e Initial load
duke
parents:
diff changeset
2353 const Register from = c_rarg0; // source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
2354 const Register to = c_rarg1; // destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
2355 const Register size = c_rarg2; // byte count (size_t)
a61af66fc99e Initial load
duke
parents:
diff changeset
2356
a61af66fc99e Initial load
duke
parents:
diff changeset
2357 // Register used as a temp
a61af66fc99e Initial load
duke
parents:
diff changeset
2358 const Register bits = rax; // test copy of low bits
a61af66fc99e Initial load
duke
parents:
diff changeset
2359
a61af66fc99e Initial load
duke
parents:
diff changeset
2360 __ align(CodeEntryAlignment);
a61af66fc99e Initial load
duke
parents:
diff changeset
2361 StubCodeMark mark(this, "StubRoutines", name);
a61af66fc99e Initial load
duke
parents:
diff changeset
2362 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
2363
a61af66fc99e Initial load
duke
parents:
diff changeset
2364 __ enter(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
2365
a61af66fc99e Initial load
duke
parents:
diff changeset
2366 // bump this on entry, not on exit:
a61af66fc99e Initial load
duke
parents:
diff changeset
2367 inc_counter_np(SharedRuntime::_unsafe_array_copy_ctr);
a61af66fc99e Initial load
duke
parents:
diff changeset
2368
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2369 __ mov(bits, from);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2370 __ orptr(bits, to);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2371 __ orptr(bits, size);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2372
a61af66fc99e Initial load
duke
parents:
diff changeset
2373 __ testb(bits, BytesPerLong-1);
a61af66fc99e Initial load
duke
parents:
diff changeset
2374 __ jccb(Assembler::zero, L_long_aligned);
a61af66fc99e Initial load
duke
parents:
diff changeset
2375
a61af66fc99e Initial load
duke
parents:
diff changeset
2376 __ testb(bits, BytesPerInt-1);
a61af66fc99e Initial load
duke
parents:
diff changeset
2377 __ jccb(Assembler::zero, L_int_aligned);
a61af66fc99e Initial load
duke
parents:
diff changeset
2378
a61af66fc99e Initial load
duke
parents:
diff changeset
2379 __ testb(bits, BytesPerShort-1);
a61af66fc99e Initial load
duke
parents:
diff changeset
2380 __ jump_cc(Assembler::notZero, RuntimeAddress(byte_copy_entry));
a61af66fc99e Initial load
duke
parents:
diff changeset
2381
a61af66fc99e Initial load
duke
parents:
diff changeset
2382 __ BIND(L_short_aligned);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2383 __ shrptr(size, LogBytesPerShort); // size => short_count
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2384 __ jump(RuntimeAddress(short_copy_entry));
a61af66fc99e Initial load
duke
parents:
diff changeset
2385
a61af66fc99e Initial load
duke
parents:
diff changeset
2386 __ BIND(L_int_aligned);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2387 __ shrptr(size, LogBytesPerInt); // size => int_count
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2388 __ jump(RuntimeAddress(int_copy_entry));
a61af66fc99e Initial load
duke
parents:
diff changeset
2389
a61af66fc99e Initial load
duke
parents:
diff changeset
2390 __ BIND(L_long_aligned);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2391 __ shrptr(size, LogBytesPerLong); // size => qword_count
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2392 __ jump(RuntimeAddress(long_copy_entry));
a61af66fc99e Initial load
duke
parents:
diff changeset
2393
a61af66fc99e Initial load
duke
parents:
diff changeset
2394 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
2395 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2396
a61af66fc99e Initial load
duke
parents:
diff changeset
2397 // Perform range checks on the proposed arraycopy.
a61af66fc99e Initial load
duke
parents:
diff changeset
2398 // Kills temp, but nothing else.
a61af66fc99e Initial load
duke
parents:
diff changeset
2399 // Also, clean the sign bits of src_pos and dst_pos.
a61af66fc99e Initial load
duke
parents:
diff changeset
2400 void arraycopy_range_checks(Register src, // source array oop (c_rarg0)
a61af66fc99e Initial load
duke
parents:
diff changeset
2401 Register src_pos, // source position (c_rarg1)
a61af66fc99e Initial load
duke
parents:
diff changeset
2402 Register dst, // destination array oo (c_rarg2)
a61af66fc99e Initial load
duke
parents:
diff changeset
2403 Register dst_pos, // destination position (c_rarg3)
a61af66fc99e Initial load
duke
parents:
diff changeset
2404 Register length,
a61af66fc99e Initial load
duke
parents:
diff changeset
2405 Register temp,
a61af66fc99e Initial load
duke
parents:
diff changeset
2406 Label& L_failed) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2407 BLOCK_COMMENT("arraycopy_range_checks:");
a61af66fc99e Initial load
duke
parents:
diff changeset
2408
a61af66fc99e Initial load
duke
parents:
diff changeset
2409 // if (src_pos + length > arrayOop(src)->length()) FAIL;
a61af66fc99e Initial load
duke
parents:
diff changeset
2410 __ movl(temp, length);
a61af66fc99e Initial load
duke
parents:
diff changeset
2411 __ addl(temp, src_pos); // src_pos + length
a61af66fc99e Initial load
duke
parents:
diff changeset
2412 __ cmpl(temp, Address(src, arrayOopDesc::length_offset_in_bytes()));
a61af66fc99e Initial load
duke
parents:
diff changeset
2413 __ jcc(Assembler::above, L_failed);
a61af66fc99e Initial load
duke
parents:
diff changeset
2414
a61af66fc99e Initial load
duke
parents:
diff changeset
2415 // if (dst_pos + length > arrayOop(dst)->length()) FAIL;
a61af66fc99e Initial load
duke
parents:
diff changeset
2416 __ movl(temp, length);
a61af66fc99e Initial load
duke
parents:
diff changeset
2417 __ addl(temp, dst_pos); // dst_pos + length
a61af66fc99e Initial load
duke
parents:
diff changeset
2418 __ cmpl(temp, Address(dst, arrayOopDesc::length_offset_in_bytes()));
a61af66fc99e Initial load
duke
parents:
diff changeset
2419 __ jcc(Assembler::above, L_failed);
a61af66fc99e Initial load
duke
parents:
diff changeset
2420
a61af66fc99e Initial load
duke
parents:
diff changeset
2421 // Have to clean up high 32-bits of 'src_pos' and 'dst_pos'.
a61af66fc99e Initial load
duke
parents:
diff changeset
2422 // Move with sign extension can be used since they are positive.
a61af66fc99e Initial load
duke
parents:
diff changeset
2423 __ movslq(src_pos, src_pos);
a61af66fc99e Initial load
duke
parents:
diff changeset
2424 __ movslq(dst_pos, dst_pos);
a61af66fc99e Initial load
duke
parents:
diff changeset
2425
a61af66fc99e Initial load
duke
parents:
diff changeset
2426 BLOCK_COMMENT("arraycopy_range_checks done");
a61af66fc99e Initial load
duke
parents:
diff changeset
2427 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2428
a61af66fc99e Initial load
duke
parents:
diff changeset
2429 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2430 // Generate generic array copy stubs
a61af66fc99e Initial load
duke
parents:
diff changeset
2431 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2432 // Input:
a61af66fc99e Initial load
duke
parents:
diff changeset
2433 // c_rarg0 - src oop
a61af66fc99e Initial load
duke
parents:
diff changeset
2434 // c_rarg1 - src_pos (32-bits)
a61af66fc99e Initial load
duke
parents:
diff changeset
2435 // c_rarg2 - dst oop
a61af66fc99e Initial load
duke
parents:
diff changeset
2436 // c_rarg3 - dst_pos (32-bits)
a61af66fc99e Initial load
duke
parents:
diff changeset
2437 // not Win64
a61af66fc99e Initial load
duke
parents:
diff changeset
2438 // c_rarg4 - element count (32-bits)
a61af66fc99e Initial load
duke
parents:
diff changeset
2439 // Win64
a61af66fc99e Initial load
duke
parents:
diff changeset
2440 // rsp+40 - element count (32-bits)
a61af66fc99e Initial load
duke
parents:
diff changeset
2441 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2442 // Output:
a61af66fc99e Initial load
duke
parents:
diff changeset
2443 // rax == 0 - success
a61af66fc99e Initial load
duke
parents:
diff changeset
2444 // rax == -1^K - failure, where K is partial transfer count
a61af66fc99e Initial load
duke
parents:
diff changeset
2445 //
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2446 address generate_generic_copy(const char *name,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2447 address byte_copy_entry, address short_copy_entry,
2409
348c0df561a9 7026307: DEBUG MESSAGE: broken null klass on amd64
iveresov
parents: 2407
diff changeset
2448 address int_copy_entry, address oop_copy_entry,
348c0df561a9 7026307: DEBUG MESSAGE: broken null klass on amd64
iveresov
parents: 2407
diff changeset
2449 address long_copy_entry, address checkcast_copy_entry) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2450
a61af66fc99e Initial load
duke
parents:
diff changeset
2451 Label L_failed, L_failed_0, L_objArray;
a61af66fc99e Initial load
duke
parents:
diff changeset
2452 Label L_copy_bytes, L_copy_shorts, L_copy_ints, L_copy_longs;
a61af66fc99e Initial load
duke
parents:
diff changeset
2453
a61af66fc99e Initial load
duke
parents:
diff changeset
2454 // Input registers
a61af66fc99e Initial load
duke
parents:
diff changeset
2455 const Register src = c_rarg0; // source array oop
a61af66fc99e Initial load
duke
parents:
diff changeset
2456 const Register src_pos = c_rarg1; // source position
a61af66fc99e Initial load
duke
parents:
diff changeset
2457 const Register dst = c_rarg2; // destination array oop
a61af66fc99e Initial load
duke
parents:
diff changeset
2458 const Register dst_pos = c_rarg3; // destination position
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2459 #ifndef _WIN64
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2460 const Register length = c_rarg4;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2461 #else
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2462 const Address length(rsp, 6 * wordSize); // elements count is on stack on Win64
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2463 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
2464
a61af66fc99e Initial load
duke
parents:
diff changeset
2465 { int modulus = CodeEntryAlignment;
a61af66fc99e Initial load
duke
parents:
diff changeset
2466 int target = modulus - 5; // 5 = sizeof jmp(L_failed)
a61af66fc99e Initial load
duke
parents:
diff changeset
2467 int advance = target - (__ offset() % modulus);
a61af66fc99e Initial load
duke
parents:
diff changeset
2468 if (advance < 0) advance += modulus;
a61af66fc99e Initial load
duke
parents:
diff changeset
2469 if (advance > 0) __ nop(advance);
a61af66fc99e Initial load
duke
parents:
diff changeset
2470 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2471 StubCodeMark mark(this, "StubRoutines", name);
a61af66fc99e Initial load
duke
parents:
diff changeset
2472
a61af66fc99e Initial load
duke
parents:
diff changeset
2473 // Short-hop target to L_failed. Makes for denser prologue code.
a61af66fc99e Initial load
duke
parents:
diff changeset
2474 __ BIND(L_failed_0);
a61af66fc99e Initial load
duke
parents:
diff changeset
2475 __ jmp(L_failed);
a61af66fc99e Initial load
duke
parents:
diff changeset
2476 assert(__ offset() % CodeEntryAlignment == 0, "no further alignment needed");
a61af66fc99e Initial load
duke
parents:
diff changeset
2477
a61af66fc99e Initial load
duke
parents:
diff changeset
2478 __ align(CodeEntryAlignment);
a61af66fc99e Initial load
duke
parents:
diff changeset
2479 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
2480
a61af66fc99e Initial load
duke
parents:
diff changeset
2481 __ enter(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
2482
a61af66fc99e Initial load
duke
parents:
diff changeset
2483 // bump this on entry, not on exit:
a61af66fc99e Initial load
duke
parents:
diff changeset
2484 inc_counter_np(SharedRuntime::_generic_array_copy_ctr);
a61af66fc99e Initial load
duke
parents:
diff changeset
2485
a61af66fc99e Initial load
duke
parents:
diff changeset
2486 //-----------------------------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
2487 // Assembler stub will be used for this call to arraycopy
a61af66fc99e Initial load
duke
parents:
diff changeset
2488 // if the following conditions are met:
a61af66fc99e Initial load
duke
parents:
diff changeset
2489 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2490 // (1) src and dst must not be null.
a61af66fc99e Initial load
duke
parents:
diff changeset
2491 // (2) src_pos must not be negative.
a61af66fc99e Initial load
duke
parents:
diff changeset
2492 // (3) dst_pos must not be negative.
a61af66fc99e Initial load
duke
parents:
diff changeset
2493 // (4) length must not be negative.
a61af66fc99e Initial load
duke
parents:
diff changeset
2494 // (5) src klass and dst klass should be the same and not NULL.
a61af66fc99e Initial load
duke
parents:
diff changeset
2495 // (6) src and dst should be arrays.
a61af66fc99e Initial load
duke
parents:
diff changeset
2496 // (7) src_pos + length must not exceed length of src.
a61af66fc99e Initial load
duke
parents:
diff changeset
2497 // (8) dst_pos + length must not exceed length of dst.
a61af66fc99e Initial load
duke
parents:
diff changeset
2498 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2499
a61af66fc99e Initial load
duke
parents:
diff changeset
2500 // if (src == NULL) return -1;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2501 __ testptr(src, src); // src oop
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2502 size_t j1off = __ offset();
a61af66fc99e Initial load
duke
parents:
diff changeset
2503 __ jccb(Assembler::zero, L_failed_0);
a61af66fc99e Initial load
duke
parents:
diff changeset
2504
a61af66fc99e Initial load
duke
parents:
diff changeset
2505 // if (src_pos < 0) return -1;
a61af66fc99e Initial load
duke
parents:
diff changeset
2506 __ testl(src_pos, src_pos); // src_pos (32-bits)
a61af66fc99e Initial load
duke
parents:
diff changeset
2507 __ jccb(Assembler::negative, L_failed_0);
a61af66fc99e Initial load
duke
parents:
diff changeset
2508
a61af66fc99e Initial load
duke
parents:
diff changeset
2509 // if (dst == NULL) return -1;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2510 __ testptr(dst, dst); // dst oop
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2511 __ jccb(Assembler::zero, L_failed_0);
a61af66fc99e Initial load
duke
parents:
diff changeset
2512
a61af66fc99e Initial load
duke
parents:
diff changeset
2513 // if (dst_pos < 0) return -1;
a61af66fc99e Initial load
duke
parents:
diff changeset
2514 __ testl(dst_pos, dst_pos); // dst_pos (32-bits)
a61af66fc99e Initial load
duke
parents:
diff changeset
2515 size_t j4off = __ offset();
a61af66fc99e Initial load
duke
parents:
diff changeset
2516 __ jccb(Assembler::negative, L_failed_0);
a61af66fc99e Initial load
duke
parents:
diff changeset
2517
a61af66fc99e Initial load
duke
parents:
diff changeset
2518 // The first four tests are very dense code,
a61af66fc99e Initial load
duke
parents:
diff changeset
2519 // but not quite dense enough to put four
a61af66fc99e Initial load
duke
parents:
diff changeset
2520 // jumps in a 16-byte instruction fetch buffer.
a61af66fc99e Initial load
duke
parents:
diff changeset
2521 // That's good, because some branch predicters
a61af66fc99e Initial load
duke
parents:
diff changeset
2522 // do not like jumps so close together.
a61af66fc99e Initial load
duke
parents:
diff changeset
2523 // Make sure of this.
a61af66fc99e Initial load
duke
parents:
diff changeset
2524 guarantee(((j1off ^ j4off) & ~15) != 0, "I$ line of 1st & 4th jumps");
a61af66fc99e Initial load
duke
parents:
diff changeset
2525
a61af66fc99e Initial load
duke
parents:
diff changeset
2526 // registers used as temp
a61af66fc99e Initial load
duke
parents:
diff changeset
2527 const Register r11_length = r11; // elements count to copy
a61af66fc99e Initial load
duke
parents:
diff changeset
2528 const Register r10_src_klass = r10; // array klass
a61af66fc99e Initial load
duke
parents:
diff changeset
2529
a61af66fc99e Initial load
duke
parents:
diff changeset
2530 // if (length < 0) return -1;
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2531 __ movl(r11_length, length); // length (elements count, 32-bits value)
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2532 __ testl(r11_length, r11_length);
a61af66fc99e Initial load
duke
parents:
diff changeset
2533 __ jccb(Assembler::negative, L_failed_0);
a61af66fc99e Initial load
duke
parents:
diff changeset
2534
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
2535 __ load_klass(r10_src_klass, src);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2536 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
2537 // assert(src->klass() != NULL);
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2538 {
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2539 BLOCK_COMMENT("assert klasses not null {");
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2540 Label L1, L2;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2541 __ testptr(r10_src_klass, r10_src_klass);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2542 __ jcc(Assembler::notZero, L2); // it is broken if klass is NULL
a61af66fc99e Initial load
duke
parents:
diff changeset
2543 __ bind(L1);
a61af66fc99e Initial load
duke
parents:
diff changeset
2544 __ stop("broken null klass");
a61af66fc99e Initial load
duke
parents:
diff changeset
2545 __ bind(L2);
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2546 __ load_klass(rax, dst);
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2547 __ cmpq(rax, 0);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2548 __ jcc(Assembler::equal, L1); // this would be broken also
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2549 BLOCK_COMMENT("} assert klasses not null done");
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2550 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2551 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
2552
a61af66fc99e Initial load
duke
parents:
diff changeset
2553 // Load layout helper (32-bits)
a61af66fc99e Initial load
duke
parents:
diff changeset
2554 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2555 // |array_tag| | header_size | element_type | |log2_element_size|
a61af66fc99e Initial load
duke
parents:
diff changeset
2556 // 32 30 24 16 8 2 0
a61af66fc99e Initial load
duke
parents:
diff changeset
2557 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2558 // array_tag: typeArray = 0x3, objArray = 0x2, non-array = 0x0
a61af66fc99e Initial load
duke
parents:
diff changeset
2559 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2560
4762
069ab3f976d3 7118863: Move sizeof(klassOopDesc) into the *Klass::*_offset_in_bytes() functions
stefank
parents: 4118
diff changeset
2561 const int lh_offset = in_bytes(Klass::layout_helper_offset());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2562
a61af66fc99e Initial load
duke
parents:
diff changeset
2563 // Handle objArrays completely differently...
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2564 const jint objArray_lh = Klass::array_layout_helper(T_OBJECT);
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2565 __ cmpl(Address(r10_src_klass, lh_offset), objArray_lh);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2566 __ jcc(Assembler::equal, L_objArray);
a61af66fc99e Initial load
duke
parents:
diff changeset
2567
a61af66fc99e Initial load
duke
parents:
diff changeset
2568 // if (src->klass() != dst->klass()) return -1;
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2569 __ load_klass(rax, dst);
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2570 __ cmpq(r10_src_klass, rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2571 __ jcc(Assembler::notEqual, L_failed);
a61af66fc99e Initial load
duke
parents:
diff changeset
2572
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2573 const Register rax_lh = rax; // layout helper
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2574 __ movl(rax_lh, Address(r10_src_klass, lh_offset));
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2575
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2576 // if (!src->is_Array()) return -1;
a61af66fc99e Initial load
duke
parents:
diff changeset
2577 __ cmpl(rax_lh, Klass::_lh_neutral_value);
a61af66fc99e Initial load
duke
parents:
diff changeset
2578 __ jcc(Assembler::greaterEqual, L_failed);
a61af66fc99e Initial load
duke
parents:
diff changeset
2579
a61af66fc99e Initial load
duke
parents:
diff changeset
2580 // At this point, it is known to be a typeArray (array_tag 0x3).
a61af66fc99e Initial load
duke
parents:
diff changeset
2581 #ifdef ASSERT
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2582 {
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2583 BLOCK_COMMENT("assert primitive array {");
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2584 Label L;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2585 __ cmpl(rax_lh, (Klass::_lh_array_tag_type_value << Klass::_lh_array_tag_shift));
a61af66fc99e Initial load
duke
parents:
diff changeset
2586 __ jcc(Assembler::greaterEqual, L);
a61af66fc99e Initial load
duke
parents:
diff changeset
2587 __ stop("must be a primitive array");
a61af66fc99e Initial load
duke
parents:
diff changeset
2588 __ bind(L);
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2589 BLOCK_COMMENT("} assert primitive array done");
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2590 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2591 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
2592
a61af66fc99e Initial load
duke
parents:
diff changeset
2593 arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
a61af66fc99e Initial load
duke
parents:
diff changeset
2594 r10, L_failed);
a61af66fc99e Initial load
duke
parents:
diff changeset
2595
6831
d8ce2825b193 8000213: NPG: Should have renamed arrayKlass and typeArrayKlass
coleenp
parents: 6725
diff changeset
2596 // TypeArrayKlass
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2597 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2598 // src_addr = (src + array_header_in_bytes()) + (src_pos << log2elemsize);
a61af66fc99e Initial load
duke
parents:
diff changeset
2599 // dst_addr = (dst + array_header_in_bytes()) + (dst_pos << log2elemsize);
a61af66fc99e Initial load
duke
parents:
diff changeset
2600 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2601
a61af66fc99e Initial load
duke
parents:
diff changeset
2602 const Register r10_offset = r10; // array offset
a61af66fc99e Initial load
duke
parents:
diff changeset
2603 const Register rax_elsize = rax_lh; // element size
a61af66fc99e Initial load
duke
parents:
diff changeset
2604
a61af66fc99e Initial load
duke
parents:
diff changeset
2605 __ movl(r10_offset, rax_lh);
a61af66fc99e Initial load
duke
parents:
diff changeset
2606 __ shrl(r10_offset, Klass::_lh_header_size_shift);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2607 __ andptr(r10_offset, Klass::_lh_header_size_mask); // array_offset
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2608 __ addptr(src, r10_offset); // src array offset
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2609 __ addptr(dst, r10_offset); // dst array offset
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2610 BLOCK_COMMENT("choose copy loop based on element size");
a61af66fc99e Initial load
duke
parents:
diff changeset
2611 __ andl(rax_lh, Klass::_lh_log2_element_size_mask); // rax_lh -> rax_elsize
a61af66fc99e Initial load
duke
parents:
diff changeset
2612
a61af66fc99e Initial load
duke
parents:
diff changeset
2613 // next registers should be set before the jump to corresponding stub
a61af66fc99e Initial load
duke
parents:
diff changeset
2614 const Register from = c_rarg0; // source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
2615 const Register to = c_rarg1; // destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
2616 const Register count = c_rarg2; // elements count
a61af66fc99e Initial load
duke
parents:
diff changeset
2617
a61af66fc99e Initial load
duke
parents:
diff changeset
2618 // 'from', 'to', 'count' registers should be set in such order
a61af66fc99e Initial load
duke
parents:
diff changeset
2619 // since they are the same as 'src', 'src_pos', 'dst'.
a61af66fc99e Initial load
duke
parents:
diff changeset
2620
a61af66fc99e Initial load
duke
parents:
diff changeset
2621 __ BIND(L_copy_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
2622 __ cmpl(rax_elsize, 0);
a61af66fc99e Initial load
duke
parents:
diff changeset
2623 __ jccb(Assembler::notEqual, L_copy_shorts);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2624 __ lea(from, Address(src, src_pos, Address::times_1, 0));// src_addr
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2625 __ lea(to, Address(dst, dst_pos, Address::times_1, 0));// dst_addr
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2626 __ movl2ptr(count, r11_length); // length
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2627 __ jump(RuntimeAddress(byte_copy_entry));
a61af66fc99e Initial load
duke
parents:
diff changeset
2628
a61af66fc99e Initial load
duke
parents:
diff changeset
2629 __ BIND(L_copy_shorts);
a61af66fc99e Initial load
duke
parents:
diff changeset
2630 __ cmpl(rax_elsize, LogBytesPerShort);
a61af66fc99e Initial load
duke
parents:
diff changeset
2631 __ jccb(Assembler::notEqual, L_copy_ints);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2632 __ lea(from, Address(src, src_pos, Address::times_2, 0));// src_addr
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2633 __ lea(to, Address(dst, dst_pos, Address::times_2, 0));// dst_addr
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2634 __ movl2ptr(count, r11_length); // length
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2635 __ jump(RuntimeAddress(short_copy_entry));
a61af66fc99e Initial load
duke
parents:
diff changeset
2636
a61af66fc99e Initial load
duke
parents:
diff changeset
2637 __ BIND(L_copy_ints);
a61af66fc99e Initial load
duke
parents:
diff changeset
2638 __ cmpl(rax_elsize, LogBytesPerInt);
a61af66fc99e Initial load
duke
parents:
diff changeset
2639 __ jccb(Assembler::notEqual, L_copy_longs);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2640 __ lea(from, Address(src, src_pos, Address::times_4, 0));// src_addr
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2641 __ lea(to, Address(dst, dst_pos, Address::times_4, 0));// dst_addr
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2642 __ movl2ptr(count, r11_length); // length
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2643 __ jump(RuntimeAddress(int_copy_entry));
a61af66fc99e Initial load
duke
parents:
diff changeset
2644
a61af66fc99e Initial load
duke
parents:
diff changeset
2645 __ BIND(L_copy_longs);
a61af66fc99e Initial load
duke
parents:
diff changeset
2646 #ifdef ASSERT
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2647 {
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2648 BLOCK_COMMENT("assert long copy {");
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2649 Label L;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2650 __ cmpl(rax_elsize, LogBytesPerLong);
a61af66fc99e Initial load
duke
parents:
diff changeset
2651 __ jcc(Assembler::equal, L);
a61af66fc99e Initial load
duke
parents:
diff changeset
2652 __ stop("must be long copy, but elsize is wrong");
a61af66fc99e Initial load
duke
parents:
diff changeset
2653 __ bind(L);
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2654 BLOCK_COMMENT("} assert long copy done");
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2655 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2656 #endif
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2657 __ lea(from, Address(src, src_pos, Address::times_8, 0));// src_addr
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2658 __ lea(to, Address(dst, dst_pos, Address::times_8, 0));// dst_addr
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2659 __ movl2ptr(count, r11_length); // length
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2660 __ jump(RuntimeAddress(long_copy_entry));
a61af66fc99e Initial load
duke
parents:
diff changeset
2661
6831
d8ce2825b193 8000213: NPG: Should have renamed arrayKlass and typeArrayKlass
coleenp
parents: 6725
diff changeset
2662 // ObjArrayKlass
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2663 __ BIND(L_objArray);
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2664 // live at this point: r10_src_klass, r11_length, src[_pos], dst[_pos]
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2665
a61af66fc99e Initial load
duke
parents:
diff changeset
2666 Label L_plain_copy, L_checkcast_copy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2667 // test array classes for subtyping
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2668 __ load_klass(rax, dst);
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2669 __ cmpq(r10_src_klass, rax); // usual case is exact equality
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2670 __ jcc(Assembler::notEqual, L_checkcast_copy);
a61af66fc99e Initial load
duke
parents:
diff changeset
2671
a61af66fc99e Initial load
duke
parents:
diff changeset
2672 // Identically typed arrays can be copied without element-wise checks.
a61af66fc99e Initial load
duke
parents:
diff changeset
2673 arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
a61af66fc99e Initial load
duke
parents:
diff changeset
2674 r10, L_failed);
a61af66fc99e Initial load
duke
parents:
diff changeset
2675
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2676 __ lea(from, Address(src, src_pos, TIMES_OOP,
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2677 arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // src_addr
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2678 __ lea(to, Address(dst, dst_pos, TIMES_OOP,
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2679 arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // dst_addr
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2680 __ movl2ptr(count, r11_length); // length
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2681 __ BIND(L_plain_copy);
a61af66fc99e Initial load
duke
parents:
diff changeset
2682 __ jump(RuntimeAddress(oop_copy_entry));
a61af66fc99e Initial load
duke
parents:
diff changeset
2683
a61af66fc99e Initial load
duke
parents:
diff changeset
2684 __ BIND(L_checkcast_copy);
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2685 // live at this point: r10_src_klass, r11_length, rax (dst_klass)
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2686 {
a61af66fc99e Initial load
duke
parents:
diff changeset
2687 // Before looking at dst.length, make sure dst is also an objArray.
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2688 __ cmpl(Address(rax, lh_offset), objArray_lh);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2689 __ jcc(Assembler::notEqual, L_failed);
a61af66fc99e Initial load
duke
parents:
diff changeset
2690
a61af66fc99e Initial load
duke
parents:
diff changeset
2691 // It is safe to examine both src.length and dst.length.
a61af66fc99e Initial load
duke
parents:
diff changeset
2692 arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
a61af66fc99e Initial load
duke
parents:
diff changeset
2693 rax, L_failed);
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2694
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2695 const Register r11_dst_klass = r11;
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
2696 __ load_klass(r11_dst_klass, dst); // reload
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2697
a61af66fc99e Initial load
duke
parents:
diff changeset
2698 // Marshal the base address arguments now, freeing registers.
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2699 __ lea(from, Address(src, src_pos, TIMES_OOP,
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2700 arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2701 __ lea(to, Address(dst, dst_pos, TIMES_OOP,
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2702 arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2703 __ movl(count, length); // length (reloaded)
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2704 Register sco_temp = c_rarg3; // this register is free now
a61af66fc99e Initial load
duke
parents:
diff changeset
2705 assert_different_registers(from, to, count, sco_temp,
a61af66fc99e Initial load
duke
parents:
diff changeset
2706 r11_dst_klass, r10_src_klass);
a61af66fc99e Initial load
duke
parents:
diff changeset
2707 assert_clean_int(count, sco_temp);
a61af66fc99e Initial load
duke
parents:
diff changeset
2708
a61af66fc99e Initial load
duke
parents:
diff changeset
2709 // Generate the type check.
4762
069ab3f976d3 7118863: Move sizeof(klassOopDesc) into the *Klass::*_offset_in_bytes() functions
stefank
parents: 4118
diff changeset
2710 const int sco_offset = in_bytes(Klass::super_check_offset_offset());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2711 __ movl(sco_temp, Address(r11_dst_klass, sco_offset));
a61af66fc99e Initial load
duke
parents:
diff changeset
2712 assert_clean_int(sco_temp, rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
2713 generate_type_check(r10_src_klass, sco_temp, r11_dst_klass, L_plain_copy);
a61af66fc99e Initial load
duke
parents:
diff changeset
2714
6831
d8ce2825b193 8000213: NPG: Should have renamed arrayKlass and typeArrayKlass
coleenp
parents: 6725
diff changeset
2715 // Fetch destination element klass from the ObjArrayKlass header.
d8ce2825b193 8000213: NPG: Should have renamed arrayKlass and typeArrayKlass
coleenp
parents: 6725
diff changeset
2716 int ek_offset = in_bytes(ObjArrayKlass::element_klass_offset());
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2717 __ movptr(r11_dst_klass, Address(r11_dst_klass, ek_offset));
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2718 __ movl( sco_temp, Address(r11_dst_klass, sco_offset));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2719 assert_clean_int(sco_temp, rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
2720
a61af66fc99e Initial load
duke
parents:
diff changeset
2721 // the checkcast_copy loop needs two extra arguments:
a61af66fc99e Initial load
duke
parents:
diff changeset
2722 assert(c_rarg3 == sco_temp, "#3 already in place");
2006
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2723 // Set up arguments for checkcast_copy_entry.
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2724 setup_arg_regs(4);
bbefa3ca1543 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 1972
diff changeset
2725 __ movptr(r8, r11_dst_klass); // dst.klass.element_klass, r8 is c_rarg4 on Linux/Solaris
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2726 __ jump(RuntimeAddress(checkcast_copy_entry));
a61af66fc99e Initial load
duke
parents:
diff changeset
2727 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2728
a61af66fc99e Initial load
duke
parents:
diff changeset
2729 __ BIND(L_failed);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2730 __ xorptr(rax, rax);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2731 __ notptr(rax); // return -1
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2732 __ leave(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
2733 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
2734
a61af66fc99e Initial load
duke
parents:
diff changeset
2735 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
2736 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2737
a61af66fc99e Initial load
duke
parents:
diff changeset
2738 void generate_arraycopy_stubs() {
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2739 address entry;
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2740 address entry_jbyte_arraycopy;
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2741 address entry_jshort_arraycopy;
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2742 address entry_jint_arraycopy;
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2743 address entry_oop_arraycopy;
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2744 address entry_jlong_arraycopy;
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2745 address entry_checkcast_arraycopy;
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2746
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2747 StubRoutines::_jbyte_disjoint_arraycopy = generate_disjoint_byte_copy(false, &entry,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2748 "jbyte_disjoint_arraycopy");
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2749 StubRoutines::_jbyte_arraycopy = generate_conjoint_byte_copy(false, entry, &entry_jbyte_arraycopy,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2750 "jbyte_arraycopy");
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2751
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2752 StubRoutines::_jshort_disjoint_arraycopy = generate_disjoint_short_copy(false, &entry,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2753 "jshort_disjoint_arraycopy");
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2754 StubRoutines::_jshort_arraycopy = generate_conjoint_short_copy(false, entry, &entry_jshort_arraycopy,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2755 "jshort_arraycopy");
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2756
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2757 StubRoutines::_jint_disjoint_arraycopy = generate_disjoint_int_oop_copy(false, false, &entry,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2758 "jint_disjoint_arraycopy");
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2759 StubRoutines::_jint_arraycopy = generate_conjoint_int_oop_copy(false, false, entry,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2760 &entry_jint_arraycopy, "jint_arraycopy");
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2761
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2762 StubRoutines::_jlong_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, false, &entry,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2763 "jlong_disjoint_arraycopy");
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2764 StubRoutines::_jlong_arraycopy = generate_conjoint_long_oop_copy(false, false, entry,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2765 &entry_jlong_arraycopy, "jlong_arraycopy");
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2766
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
2767
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
2768 if (UseCompressedOops) {
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2769 StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_int_oop_copy(false, true, &entry,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2770 "oop_disjoint_arraycopy");
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2771 StubRoutines::_oop_arraycopy = generate_conjoint_int_oop_copy(false, true, entry,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2772 &entry_oop_arraycopy, "oop_arraycopy");
2324
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2773 StubRoutines::_oop_disjoint_arraycopy_uninit = generate_disjoint_int_oop_copy(false, true, &entry,
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2774 "oop_disjoint_arraycopy_uninit",
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2775 /*dest_uninitialized*/true);
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2776 StubRoutines::_oop_arraycopy_uninit = generate_conjoint_int_oop_copy(false, true, entry,
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2777 NULL, "oop_arraycopy_uninit",
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2778 /*dest_uninitialized*/true);
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
2779 } else {
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2780 StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, true, &entry,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2781 "oop_disjoint_arraycopy");
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2782 StubRoutines::_oop_arraycopy = generate_conjoint_long_oop_copy(false, true, entry,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2783 &entry_oop_arraycopy, "oop_arraycopy");
2324
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2784 StubRoutines::_oop_disjoint_arraycopy_uninit = generate_disjoint_long_oop_copy(false, true, &entry,
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2785 "oop_disjoint_arraycopy_uninit",
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2786 /*dest_uninitialized*/true);
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2787 StubRoutines::_oop_arraycopy_uninit = generate_conjoint_long_oop_copy(false, true, entry,
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2788 NULL, "oop_arraycopy_uninit",
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2789 /*dest_uninitialized*/true);
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 16
diff changeset
2790 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2791
2324
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2792 StubRoutines::_checkcast_arraycopy = generate_checkcast_copy("checkcast_arraycopy", &entry_checkcast_arraycopy);
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2793 StubRoutines::_checkcast_arraycopy_uninit = generate_checkcast_copy("checkcast_arraycopy_uninit", NULL,
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2794 /*dest_uninitialized*/true);
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2795
2313
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2796 StubRoutines::_unsafe_arraycopy = generate_unsafe_copy("unsafe_arraycopy",
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2797 entry_jbyte_arraycopy,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2798 entry_jshort_arraycopy,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2799 entry_jint_arraycopy,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2800 entry_jlong_arraycopy);
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2801 StubRoutines::_generic_arraycopy = generate_generic_copy("generic_arraycopy",
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2802 entry_jbyte_arraycopy,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2803 entry_jshort_arraycopy,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2804 entry_jint_arraycopy,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2805 entry_oop_arraycopy,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2806 entry_jlong_arraycopy,
d89a22843c62 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 2006
diff changeset
2807 entry_checkcast_arraycopy);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2808
1763
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
2809 StubRoutines::_jbyte_fill = generate_fill(T_BYTE, false, "jbyte_fill");
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
2810 StubRoutines::_jshort_fill = generate_fill(T_SHORT, false, "jshort_fill");
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
2811 StubRoutines::_jint_fill = generate_fill(T_INT, false, "jint_fill");
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
2812 StubRoutines::_arrayof_jbyte_fill = generate_fill(T_BYTE, true, "arrayof_jbyte_fill");
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
2813 StubRoutines::_arrayof_jshort_fill = generate_fill(T_SHORT, true, "arrayof_jshort_fill");
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
2814 StubRoutines::_arrayof_jint_fill = generate_fill(T_INT, true, "arrayof_jint_fill");
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1583
diff changeset
2815
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2816 // We don't generate specialized code for HeapWord-aligned source
a61af66fc99e Initial load
duke
parents:
diff changeset
2817 // arrays, so just use the code we've already generated
a61af66fc99e Initial load
duke
parents:
diff changeset
2818 StubRoutines::_arrayof_jbyte_disjoint_arraycopy = StubRoutines::_jbyte_disjoint_arraycopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2819 StubRoutines::_arrayof_jbyte_arraycopy = StubRoutines::_jbyte_arraycopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2820
a61af66fc99e Initial load
duke
parents:
diff changeset
2821 StubRoutines::_arrayof_jshort_disjoint_arraycopy = StubRoutines::_jshort_disjoint_arraycopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2822 StubRoutines::_arrayof_jshort_arraycopy = StubRoutines::_jshort_arraycopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2823
a61af66fc99e Initial load
duke
parents:
diff changeset
2824 StubRoutines::_arrayof_jint_disjoint_arraycopy = StubRoutines::_jint_disjoint_arraycopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2825 StubRoutines::_arrayof_jint_arraycopy = StubRoutines::_jint_arraycopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2826
a61af66fc99e Initial load
duke
parents:
diff changeset
2827 StubRoutines::_arrayof_jlong_disjoint_arraycopy = StubRoutines::_jlong_disjoint_arraycopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2828 StubRoutines::_arrayof_jlong_arraycopy = StubRoutines::_jlong_arraycopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2829
a61af66fc99e Initial load
duke
parents:
diff changeset
2830 StubRoutines::_arrayof_oop_disjoint_arraycopy = StubRoutines::_oop_disjoint_arraycopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2831 StubRoutines::_arrayof_oop_arraycopy = StubRoutines::_oop_arraycopy;
2324
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2832
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2833 StubRoutines::_arrayof_oop_disjoint_arraycopy_uninit = StubRoutines::_oop_disjoint_arraycopy_uninit;
0ac769a57c64 6627983: G1: Bad oop deference during marking
iveresov
parents: 2313
diff changeset
2834 StubRoutines::_arrayof_oop_arraycopy_uninit = StubRoutines::_oop_arraycopy_uninit;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2835 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2836
1174
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2837 void generate_math_stubs() {
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2838 {
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2839 StubCodeMark mark(this, "StubRoutines", "log");
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2840 StubRoutines::_intrinsic_log = (double (*)(double)) __ pc();
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2841
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2842 __ subq(rsp, 8);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2843 __ movdbl(Address(rsp, 0), xmm0);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2844 __ fld_d(Address(rsp, 0));
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2845 __ flog();
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2846 __ fstp_d(Address(rsp, 0));
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2847 __ movdbl(xmm0, Address(rsp, 0));
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2848 __ addq(rsp, 8);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2849 __ ret(0);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2850 }
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2851 {
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2852 StubCodeMark mark(this, "StubRoutines", "log10");
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2853 StubRoutines::_intrinsic_log10 = (double (*)(double)) __ pc();
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2854
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2855 __ subq(rsp, 8);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2856 __ movdbl(Address(rsp, 0), xmm0);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2857 __ fld_d(Address(rsp, 0));
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2858 __ flog10();
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2859 __ fstp_d(Address(rsp, 0));
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2860 __ movdbl(xmm0, Address(rsp, 0));
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2861 __ addq(rsp, 8);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2862 __ ret(0);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2863 }
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2864 {
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2865 StubCodeMark mark(this, "StubRoutines", "sin");
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2866 StubRoutines::_intrinsic_sin = (double (*)(double)) __ pc();
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2867
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2868 __ subq(rsp, 8);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2869 __ movdbl(Address(rsp, 0), xmm0);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2870 __ fld_d(Address(rsp, 0));
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2871 __ trigfunc('s');
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2872 __ fstp_d(Address(rsp, 0));
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2873 __ movdbl(xmm0, Address(rsp, 0));
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2874 __ addq(rsp, 8);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2875 __ ret(0);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2876 }
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2877 {
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2878 StubCodeMark mark(this, "StubRoutines", "cos");
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2879 StubRoutines::_intrinsic_cos = (double (*)(double)) __ pc();
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2880
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2881 __ subq(rsp, 8);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2882 __ movdbl(Address(rsp, 0), xmm0);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2883 __ fld_d(Address(rsp, 0));
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2884 __ trigfunc('c');
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2885 __ fstp_d(Address(rsp, 0));
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2886 __ movdbl(xmm0, Address(rsp, 0));
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2887 __ addq(rsp, 8);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2888 __ ret(0);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2889 }
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2890 {
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2891 StubCodeMark mark(this, "StubRoutines", "tan");
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2892 StubRoutines::_intrinsic_tan = (double (*)(double)) __ pc();
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2893
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2894 __ subq(rsp, 8);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2895 __ movdbl(Address(rsp, 0), xmm0);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2896 __ fld_d(Address(rsp, 0));
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2897 __ trigfunc('t');
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2898 __ fstp_d(Address(rsp, 0));
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2899 __ movdbl(xmm0, Address(rsp, 0));
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2900 __ addq(rsp, 8);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2901 __ ret(0);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2902 }
6084
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2903 {
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2904 StubCodeMark mark(this, "StubRoutines", "exp");
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2905 StubRoutines::_intrinsic_exp = (double (*)(double)) __ pc();
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2906
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2907 __ subq(rsp, 8);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2908 __ movdbl(Address(rsp, 0), xmm0);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2909 __ fld_d(Address(rsp, 0));
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2910 __ exp_with_fallback(0);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2911 __ fstp_d(Address(rsp, 0));
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2912 __ movdbl(xmm0, Address(rsp, 0));
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2913 __ addq(rsp, 8);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2914 __ ret(0);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2915 }
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2916 {
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2917 StubCodeMark mark(this, "StubRoutines", "pow");
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2918 StubRoutines::_intrinsic_pow = (double (*)(double,double)) __ pc();
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2919
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2920 __ subq(rsp, 8);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2921 __ movdbl(Address(rsp, 0), xmm1);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2922 __ fld_d(Address(rsp, 0));
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2923 __ movdbl(Address(rsp, 0), xmm0);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2924 __ fld_d(Address(rsp, 0));
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2925 __ pow_with_fallback(0);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2926 __ fstp_d(Address(rsp, 0));
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2927 __ movdbl(xmm0, Address(rsp, 0));
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2928 __ addq(rsp, 8);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2929 __ ret(0);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 5903
diff changeset
2930 }
1174
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2931 }
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
2932
6894
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2933 // AES intrinsic stubs
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2934 enum {AESBlockSize = 16};
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2935
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2936 address generate_key_shuffle_mask() {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2937 __ align(16);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2938 StubCodeMark mark(this, "StubRoutines", "key_shuffle_mask");
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2939 address start = __ pc();
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2940 __ emit_data64( 0x0405060700010203, relocInfo::none );
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2941 __ emit_data64( 0x0c0d0e0f08090a0b, relocInfo::none );
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2942 return start;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2943 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2944
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2945 // Utility routine for loading a 128-bit key word in little endian format
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2946 // can optionally specify that the shuffle mask is already in an xmmregister
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2947 void load_key(XMMRegister xmmdst, Register key, int offset, XMMRegister xmm_shuf_mask=NULL) {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2948 __ movdqu(xmmdst, Address(key, offset));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2949 if (xmm_shuf_mask != NULL) {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2950 __ pshufb(xmmdst, xmm_shuf_mask);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2951 } else {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2952 __ pshufb(xmmdst, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2953 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2954 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2955
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2956 // aesenc using specified key+offset
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2957 // can optionally specify that the shuffle mask is already in an xmmregister
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2958 void aes_enc_key(XMMRegister xmmdst, XMMRegister xmmtmp, Register key, int offset, XMMRegister xmm_shuf_mask=NULL) {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2959 load_key(xmmtmp, key, offset, xmm_shuf_mask);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2960 __ aesenc(xmmdst, xmmtmp);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2961 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2962
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2963 // aesdec using specified key+offset
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2964 // can optionally specify that the shuffle mask is already in an xmmregister
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2965 void aes_dec_key(XMMRegister xmmdst, XMMRegister xmmtmp, Register key, int offset, XMMRegister xmm_shuf_mask=NULL) {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2966 load_key(xmmtmp, key, offset, xmm_shuf_mask);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2967 __ aesdec(xmmdst, xmmtmp);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2968 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2969
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2970
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2971 // Arguments:
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2972 //
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2973 // Inputs:
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2974 // c_rarg0 - source byte array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2975 // c_rarg1 - destination byte array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2976 // c_rarg2 - K (key) in little endian int array
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2977 //
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2978 address generate_aescrypt_encryptBlock() {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2979 assert(UseAES && (UseAVX > 0), "need AES instructions and misaligned SSE support");
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2980 __ align(CodeEntryAlignment);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2981 StubCodeMark mark(this, "StubRoutines", "aescrypt_encryptBlock");
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2982 Label L_doLast;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2983 address start = __ pc();
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2984
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2985 const Register from = c_rarg0; // source array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2986 const Register to = c_rarg1; // destination array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2987 const Register key = c_rarg2; // key array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2988 const Register keylen = rax;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2989
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2990 const XMMRegister xmm_result = xmm0;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2991 const XMMRegister xmm_temp = xmm1;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2992 const XMMRegister xmm_key_shuf_mask = xmm2;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2993
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2994 __ enter(); // required for proper stackwalking of RuntimeStub frame
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2995
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2996 __ movl(keylen, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2997 // keylen = # of 32-bit words, convert to 128-bit words
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2998 __ shrl(keylen, 2);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
2999 __ subl(keylen, 11); // every key has at least 11 128-bit words, some have more
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3000
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3001 __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3002 __ movdqu(xmm_result, Address(from, 0)); // get 16 bytes of input
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3003
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3004 // For encryption, the java expanded key ordering is just what we need
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3005 // we don't know if the key is aligned, hence not using load-execute form
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3006
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3007 load_key(xmm_temp, key, 0x00, xmm_key_shuf_mask);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3008 __ pxor(xmm_result, xmm_temp);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3009 for (int offset = 0x10; offset <= 0x90; offset += 0x10) {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3010 aes_enc_key(xmm_result, xmm_temp, key, offset, xmm_key_shuf_mask);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3011 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3012 load_key (xmm_temp, key, 0xa0, xmm_key_shuf_mask);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3013 __ cmpl(keylen, 0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3014 __ jcc(Assembler::equal, L_doLast);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3015 __ aesenc(xmm_result, xmm_temp); // only in 192 and 256 bit keys
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3016 aes_enc_key(xmm_result, xmm_temp, key, 0xb0, xmm_key_shuf_mask);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3017 load_key(xmm_temp, key, 0xc0, xmm_key_shuf_mask);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3018 __ subl(keylen, 2);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3019 __ jcc(Assembler::equal, L_doLast);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3020 __ aesenc(xmm_result, xmm_temp); // only in 256 bit keys
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3021 aes_enc_key(xmm_result, xmm_temp, key, 0xd0, xmm_key_shuf_mask);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3022 load_key(xmm_temp, key, 0xe0, xmm_key_shuf_mask);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3023
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3024 __ BIND(L_doLast);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3025 __ aesenclast(xmm_result, xmm_temp);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3026 __ movdqu(Address(to, 0), xmm_result); // store the result
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3027 __ xorptr(rax, rax); // return 0
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3028 __ leave(); // required for proper stackwalking of RuntimeStub frame
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3029 __ ret(0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3030
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3031 return start;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3032 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3033
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3034
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3035 // Arguments:
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3036 //
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3037 // Inputs:
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3038 // c_rarg0 - source byte array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3039 // c_rarg1 - destination byte array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3040 // c_rarg2 - K (key) in little endian int array
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3041 //
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3042 address generate_aescrypt_decryptBlock() {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3043 assert(UseAES && (UseAVX > 0), "need AES instructions and misaligned SSE support");
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3044 __ align(CodeEntryAlignment);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3045 StubCodeMark mark(this, "StubRoutines", "aescrypt_decryptBlock");
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3046 Label L_doLast;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3047 address start = __ pc();
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3048
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3049 const Register from = c_rarg0; // source array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3050 const Register to = c_rarg1; // destination array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3051 const Register key = c_rarg2; // key array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3052 const Register keylen = rax;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3053
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3054 const XMMRegister xmm_result = xmm0;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3055 const XMMRegister xmm_temp = xmm1;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3056 const XMMRegister xmm_key_shuf_mask = xmm2;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3057
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3058 __ enter(); // required for proper stackwalking of RuntimeStub frame
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3059
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3060 __ movl(keylen, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3061 // keylen = # of 32-bit words, convert to 128-bit words
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3062 __ shrl(keylen, 2);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3063 __ subl(keylen, 11); // every key has at least 11 128-bit words, some have more
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3064
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3065 __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3066 __ movdqu(xmm_result, Address(from, 0));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3067
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3068 // for decryption java expanded key ordering is rotated one position from what we want
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3069 // so we start from 0x10 here and hit 0x00 last
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3070 // we don't know if the key is aligned, hence not using load-execute form
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3071 load_key(xmm_temp, key, 0x10, xmm_key_shuf_mask);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3072 __ pxor (xmm_result, xmm_temp);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3073 for (int offset = 0x20; offset <= 0xa0; offset += 0x10) {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3074 aes_dec_key(xmm_result, xmm_temp, key, offset, xmm_key_shuf_mask);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3075 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3076 __ cmpl(keylen, 0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3077 __ jcc(Assembler::equal, L_doLast);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3078 // only in 192 and 256 bit keys
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3079 aes_dec_key(xmm_result, xmm_temp, key, 0xb0, xmm_key_shuf_mask);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3080 aes_dec_key(xmm_result, xmm_temp, key, 0xc0, xmm_key_shuf_mask);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3081 __ subl(keylen, 2);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3082 __ jcc(Assembler::equal, L_doLast);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3083 // only in 256 bit keys
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3084 aes_dec_key(xmm_result, xmm_temp, key, 0xd0, xmm_key_shuf_mask);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3085 aes_dec_key(xmm_result, xmm_temp, key, 0xe0, xmm_key_shuf_mask);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3086
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3087 __ BIND(L_doLast);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3088 // for decryption the aesdeclast operation is always on key+0x00
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3089 load_key(xmm_temp, key, 0x00, xmm_key_shuf_mask);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3090 __ aesdeclast(xmm_result, xmm_temp);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3091
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3092 __ movdqu(Address(to, 0), xmm_result); // store the result
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3093
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3094 __ xorptr(rax, rax); // return 0
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3095 __ leave(); // required for proper stackwalking of RuntimeStub frame
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3096 __ ret(0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3097
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3098 return start;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3099 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3100
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3101
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3102 // Arguments:
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3103 //
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3104 // Inputs:
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3105 // c_rarg0 - source byte array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3106 // c_rarg1 - destination byte array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3107 // c_rarg2 - K (key) in little endian int array
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3108 // c_rarg3 - r vector byte array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3109 // c_rarg4 - input length
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3110 //
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3111 address generate_cipherBlockChaining_encryptAESCrypt() {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3112 assert(UseAES && (UseAVX > 0), "need AES instructions and misaligned SSE support");
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3113 __ align(CodeEntryAlignment);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3114 StubCodeMark mark(this, "StubRoutines", "cipherBlockChaining_encryptAESCrypt");
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3115 address start = __ pc();
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3116
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3117 Label L_exit, L_key_192_256, L_key_256, L_loopTop_128, L_loopTop_192, L_loopTop_256;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3118 const Register from = c_rarg0; // source array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3119 const Register to = c_rarg1; // destination array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3120 const Register key = c_rarg2; // key array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3121 const Register rvec = c_rarg3; // r byte array initialized from initvector array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3122 // and left with the results of the last encryption block
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3123 #ifndef _WIN64
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3124 const Register len_reg = c_rarg4; // src len (must be multiple of blocksize 16)
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3125 #else
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3126 const Address len_mem(rsp, 6 * wordSize); // length is on stack on Win64
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3127 const Register len_reg = r10; // pick the first volatile windows register
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3128 #endif
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3129 const Register pos = rax;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3130
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3131 // xmm register assignments for the loops below
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3132 const XMMRegister xmm_result = xmm0;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3133 const XMMRegister xmm_temp = xmm1;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3134 // keys 0-10 preloaded into xmm2-xmm12
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3135 const int XMM_REG_NUM_KEY_FIRST = 2;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3136 const int XMM_REG_NUM_KEY_LAST = 12;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3137 const XMMRegister xmm_key0 = as_XMMRegister(XMM_REG_NUM_KEY_FIRST);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3138 const XMMRegister xmm_key10 = as_XMMRegister(XMM_REG_NUM_KEY_LAST);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3139
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3140 __ enter(); // required for proper stackwalking of RuntimeStub frame
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3141
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3142 #ifdef _WIN64
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3143 // on win64, fill len_reg from stack position
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3144 __ movl(len_reg, len_mem);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3145 // save the xmm registers which must be preserved 6-12
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3146 __ subptr(rsp, -rsp_after_call_off * wordSize);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3147 for (int i = 6; i <= XMM_REG_NUM_KEY_LAST; i++) {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3148 __ movdqu(xmm_save(i), as_XMMRegister(i));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3149 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3150 #endif
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3151
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3152 const XMMRegister xmm_key_shuf_mask = xmm_temp; // used temporarily to swap key bytes up front
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3153 __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3154 // load up xmm regs 2 thru 12 with key 0x00 - 0xa0
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3155 for (int rnum = XMM_REG_NUM_KEY_FIRST, offset = 0x00; rnum <= XMM_REG_NUM_KEY_LAST; rnum++) {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3156 load_key(as_XMMRegister(rnum), key, offset, xmm_key_shuf_mask);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3157 offset += 0x10;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3158 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3159
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3160 __ movdqu(xmm_result, Address(rvec, 0x00)); // initialize xmm_result with r vec
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3161
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3162 // now split to different paths depending on the keylen (len in ints of AESCrypt.KLE array (52=192, or 60=256))
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3163 __ movl(rax, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3164 __ cmpl(rax, 44);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3165 __ jcc(Assembler::notEqual, L_key_192_256);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3166
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3167 // 128 bit code follows here
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3168 __ movptr(pos, 0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3169 __ align(OptoLoopAlignment);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3170 __ BIND(L_loopTop_128);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3171 __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of input
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3172 __ pxor (xmm_result, xmm_temp); // xor with the current r vector
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3173
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3174 __ pxor (xmm_result, xmm_key0); // do the aes rounds
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3175 for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_LAST - 1; rnum++) {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3176 __ aesenc(xmm_result, as_XMMRegister(rnum));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3177 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3178 __ aesenclast(xmm_result, xmm_key10);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3179
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3180 __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3181 // no need to store r to memory until we exit
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3182 __ addptr(pos, AESBlockSize);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3183 __ subptr(len_reg, AESBlockSize);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3184 __ jcc(Assembler::notEqual, L_loopTop_128);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3185
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3186 __ BIND(L_exit);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3187 __ movdqu(Address(rvec, 0), xmm_result); // final value of r stored in rvec of CipherBlockChaining object
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3188
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3189 #ifdef _WIN64
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3190 // restore xmm regs belonging to calling function
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3191 for (int i = 6; i <= XMM_REG_NUM_KEY_LAST; i++) {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3192 __ movdqu(as_XMMRegister(i), xmm_save(i));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3193 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3194 #endif
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3195 __ movl(rax, 0); // return 0 (why?)
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3196 __ leave(); // required for proper stackwalking of RuntimeStub frame
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3197 __ ret(0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3198
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3199 __ BIND(L_key_192_256);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3200 // here rax = len in ints of AESCrypt.KLE array (52=192, or 60=256)
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3201 __ cmpl(rax, 52);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3202 __ jcc(Assembler::notEqual, L_key_256);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3203
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3204 // 192-bit code follows here (could be changed to use more xmm registers)
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3205 __ movptr(pos, 0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3206 __ align(OptoLoopAlignment);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3207 __ BIND(L_loopTop_192);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3208 __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of input
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3209 __ pxor (xmm_result, xmm_temp); // xor with the current r vector
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3210
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3211 __ pxor (xmm_result, xmm_key0); // do the aes rounds
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3212 for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_LAST; rnum++) {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3213 __ aesenc(xmm_result, as_XMMRegister(rnum));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3214 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3215 aes_enc_key(xmm_result, xmm_temp, key, 0xb0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3216 load_key(xmm_temp, key, 0xc0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3217 __ aesenclast(xmm_result, xmm_temp);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3218
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3219 __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3220 // no need to store r to memory until we exit
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3221 __ addptr(pos, AESBlockSize);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3222 __ subptr(len_reg, AESBlockSize);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3223 __ jcc(Assembler::notEqual, L_loopTop_192);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3224 __ jmp(L_exit);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3225
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3226 __ BIND(L_key_256);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3227 // 256-bit code follows here (could be changed to use more xmm registers)
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3228 __ movptr(pos, 0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3229 __ align(OptoLoopAlignment);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3230 __ BIND(L_loopTop_256);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3231 __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of input
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3232 __ pxor (xmm_result, xmm_temp); // xor with the current r vector
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3233
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3234 __ pxor (xmm_result, xmm_key0); // do the aes rounds
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3235 for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_LAST; rnum++) {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3236 __ aesenc(xmm_result, as_XMMRegister(rnum));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3237 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3238 aes_enc_key(xmm_result, xmm_temp, key, 0xb0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3239 aes_enc_key(xmm_result, xmm_temp, key, 0xc0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3240 aes_enc_key(xmm_result, xmm_temp, key, 0xd0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3241 load_key(xmm_temp, key, 0xe0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3242 __ aesenclast(xmm_result, xmm_temp);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3243
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3244 __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3245 // no need to store r to memory until we exit
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3246 __ addptr(pos, AESBlockSize);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3247 __ subptr(len_reg, AESBlockSize);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3248 __ jcc(Assembler::notEqual, L_loopTop_256);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3249 __ jmp(L_exit);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3250
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3251 return start;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3252 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3253
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3254
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3255
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3256 // This is a version of CBC/AES Decrypt which does 4 blocks in a loop at a time
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3257 // to hide instruction latency
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3258 //
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3259 // Arguments:
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3260 //
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3261 // Inputs:
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3262 // c_rarg0 - source byte array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3263 // c_rarg1 - destination byte array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3264 // c_rarg2 - K (key) in little endian int array
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3265 // c_rarg3 - r vector byte array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3266 // c_rarg4 - input length
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3267 //
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3268
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3269 address generate_cipherBlockChaining_decryptAESCrypt_Parallel() {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3270 assert(UseAES && (UseAVX > 0), "need AES instructions and misaligned SSE support");
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3271 __ align(CodeEntryAlignment);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3272 StubCodeMark mark(this, "StubRoutines", "cipherBlockChaining_decryptAESCrypt");
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3273 address start = __ pc();
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3274
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3275 Label L_exit, L_key_192_256, L_key_256;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3276 Label L_singleBlock_loopTop_128, L_multiBlock_loopTop_128;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3277 Label L_singleBlock_loopTop_192, L_singleBlock_loopTop_256;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3278 const Register from = c_rarg0; // source array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3279 const Register to = c_rarg1; // destination array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3280 const Register key = c_rarg2; // key array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3281 const Register rvec = c_rarg3; // r byte array initialized from initvector array address
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3282 // and left with the results of the last encryption block
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3283 #ifndef _WIN64
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3284 const Register len_reg = c_rarg4; // src len (must be multiple of blocksize 16)
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3285 #else
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3286 const Address len_mem(rsp, 6 * wordSize); // length is on stack on Win64
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3287 const Register len_reg = r10; // pick the first volatile windows register
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3288 #endif
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3289 const Register pos = rax;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3290
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3291 // xmm register assignments for the loops below
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3292 const XMMRegister xmm_result = xmm0;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3293 // keys 0-10 preloaded into xmm2-xmm12
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3294 const int XMM_REG_NUM_KEY_FIRST = 5;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3295 const int XMM_REG_NUM_KEY_LAST = 15;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3296 const XMMRegister xmm_key_first = as_XMMRegister(XMM_REG_NUM_KEY_FIRST);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3297 const XMMRegister xmm_key_last = as_XMMRegister(XMM_REG_NUM_KEY_LAST);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3298
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3299 __ enter(); // required for proper stackwalking of RuntimeStub frame
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3300
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3301 #ifdef _WIN64
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3302 // on win64, fill len_reg from stack position
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3303 __ movl(len_reg, len_mem);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3304 // save the xmm registers which must be preserved 6-15
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3305 __ subptr(rsp, -rsp_after_call_off * wordSize);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3306 for (int i = 6; i <= XMM_REG_NUM_KEY_LAST; i++) {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3307 __ movdqu(xmm_save(i), as_XMMRegister(i));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3308 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3309 #endif
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3310 // the java expanded key ordering is rotated one position from what we want
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3311 // so we start from 0x10 here and hit 0x00 last
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3312 const XMMRegister xmm_key_shuf_mask = xmm1; // used temporarily to swap key bytes up front
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3313 __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3314 // load up xmm regs 5 thru 15 with key 0x10 - 0xa0 - 0x00
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3315 for (int rnum = XMM_REG_NUM_KEY_FIRST, offset = 0x10; rnum <= XMM_REG_NUM_KEY_LAST; rnum++) {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3316 if (rnum == XMM_REG_NUM_KEY_LAST) offset = 0x00;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3317 load_key(as_XMMRegister(rnum), key, offset, xmm_key_shuf_mask);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3318 offset += 0x10;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3319 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3320
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3321 const XMMRegister xmm_prev_block_cipher = xmm1; // holds cipher of previous block
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3322 // registers holding the four results in the parallelized loop
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3323 const XMMRegister xmm_result0 = xmm0;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3324 const XMMRegister xmm_result1 = xmm2;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3325 const XMMRegister xmm_result2 = xmm3;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3326 const XMMRegister xmm_result3 = xmm4;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3327
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3328 __ movdqu(xmm_prev_block_cipher, Address(rvec, 0x00)); // initialize with initial rvec
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3329
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3330 // now split to different paths depending on the keylen (len in ints of AESCrypt.KLE array (52=192, or 60=256))
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3331 __ movl(rax, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3332 __ cmpl(rax, 44);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3333 __ jcc(Assembler::notEqual, L_key_192_256);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3334
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3335
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3336 // 128-bit code follows here, parallelized
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3337 __ movptr(pos, 0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3338 __ align(OptoLoopAlignment);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3339 __ BIND(L_multiBlock_loopTop_128);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3340 __ cmpptr(len_reg, 4*AESBlockSize); // see if at least 4 blocks left
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3341 __ jcc(Assembler::less, L_singleBlock_loopTop_128);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3342
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3343 __ movdqu(xmm_result0, Address(from, pos, Address::times_1, 0*AESBlockSize)); // get next 4 blocks into xmmresult registers
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3344 __ movdqu(xmm_result1, Address(from, pos, Address::times_1, 1*AESBlockSize));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3345 __ movdqu(xmm_result2, Address(from, pos, Address::times_1, 2*AESBlockSize));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3346 __ movdqu(xmm_result3, Address(from, pos, Address::times_1, 3*AESBlockSize));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3347
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3348 #define DoFour(opc, src_reg) \
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3349 __ opc(xmm_result0, src_reg); \
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3350 __ opc(xmm_result1, src_reg); \
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3351 __ opc(xmm_result2, src_reg); \
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3352 __ opc(xmm_result3, src_reg);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3353
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3354 DoFour(pxor, xmm_key_first);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3355 for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_LAST - 1; rnum++) {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3356 DoFour(aesdec, as_XMMRegister(rnum));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3357 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3358 DoFour(aesdeclast, xmm_key_last);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3359 // for each result, xor with the r vector of previous cipher block
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3360 __ pxor(xmm_result0, xmm_prev_block_cipher);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3361 __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 0*AESBlockSize));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3362 __ pxor(xmm_result1, xmm_prev_block_cipher);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3363 __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 1*AESBlockSize));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3364 __ pxor(xmm_result2, xmm_prev_block_cipher);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3365 __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 2*AESBlockSize));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3366 __ pxor(xmm_result3, xmm_prev_block_cipher);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3367 __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 3*AESBlockSize)); // this will carry over to next set of blocks
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3368
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3369 __ movdqu(Address(to, pos, Address::times_1, 0*AESBlockSize), xmm_result0); // store 4 results into the next 64 bytes of output
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3370 __ movdqu(Address(to, pos, Address::times_1, 1*AESBlockSize), xmm_result1);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3371 __ movdqu(Address(to, pos, Address::times_1, 2*AESBlockSize), xmm_result2);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3372 __ movdqu(Address(to, pos, Address::times_1, 3*AESBlockSize), xmm_result3);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3373
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3374 __ addptr(pos, 4*AESBlockSize);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3375 __ subptr(len_reg, 4*AESBlockSize);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3376 __ jmp(L_multiBlock_loopTop_128);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3377
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3378 // registers used in the non-parallelized loops
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3379 const XMMRegister xmm_prev_block_cipher_save = xmm2;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3380 const XMMRegister xmm_temp = xmm3;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3381
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3382 __ align(OptoLoopAlignment);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3383 __ BIND(L_singleBlock_loopTop_128);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3384 __ cmpptr(len_reg, 0); // any blocks left??
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3385 __ jcc(Assembler::equal, L_exit);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3386 __ movdqu(xmm_result, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of cipher input
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3387 __ movdqa(xmm_prev_block_cipher_save, xmm_result); // save for next r vector
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3388 __ pxor (xmm_result, xmm_key_first); // do the aes dec rounds
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3389 for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_LAST - 1; rnum++) {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3390 __ aesdec(xmm_result, as_XMMRegister(rnum));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3391 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3392 __ aesdeclast(xmm_result, xmm_key_last);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3393 __ pxor (xmm_result, xmm_prev_block_cipher); // xor with the current r vector
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3394 __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3395 // no need to store r to memory until we exit
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3396 __ movdqa(xmm_prev_block_cipher, xmm_prev_block_cipher_save); // set up next r vector with cipher input from this block
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3397
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3398 __ addptr(pos, AESBlockSize);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3399 __ subptr(len_reg, AESBlockSize);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3400 __ jmp(L_singleBlock_loopTop_128);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3401
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3402
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3403 __ BIND(L_exit);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3404 __ movdqu(Address(rvec, 0), xmm_prev_block_cipher); // final value of r stored in rvec of CipherBlockChaining object
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3405 #ifdef _WIN64
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3406 // restore regs belonging to calling function
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3407 for (int i = 6; i <= XMM_REG_NUM_KEY_LAST; i++) {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3408 __ movdqu(as_XMMRegister(i), xmm_save(i));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3409 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3410 #endif
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3411 __ movl(rax, 0); // return 0 (why?)
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3412 __ leave(); // required for proper stackwalking of RuntimeStub frame
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3413 __ ret(0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3414
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3415
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3416 __ BIND(L_key_192_256);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3417 // here rax = len in ints of AESCrypt.KLE array (52=192, or 60=256)
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3418 __ cmpl(rax, 52);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3419 __ jcc(Assembler::notEqual, L_key_256);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3420
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3421 // 192-bit code follows here (could be optimized to use parallelism)
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3422 __ movptr(pos, 0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3423 __ align(OptoLoopAlignment);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3424 __ BIND(L_singleBlock_loopTop_192);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3425 __ movdqu(xmm_result, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of cipher input
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3426 __ movdqa(xmm_prev_block_cipher_save, xmm_result); // save for next r vector
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3427 __ pxor (xmm_result, xmm_key_first); // do the aes dec rounds
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3428 for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_LAST - 1; rnum++) {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3429 __ aesdec(xmm_result, as_XMMRegister(rnum));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3430 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3431 aes_dec_key(xmm_result, xmm_temp, key, 0xb0); // 192-bit key goes up to c0
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3432 aes_dec_key(xmm_result, xmm_temp, key, 0xc0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3433 __ aesdeclast(xmm_result, xmm_key_last); // xmm15 always came from key+0
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3434 __ pxor (xmm_result, xmm_prev_block_cipher); // xor with the current r vector
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3435 __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3436 // no need to store r to memory until we exit
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3437 __ movdqa(xmm_prev_block_cipher, xmm_prev_block_cipher_save); // set up next r vector with cipher input from this block
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3438
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3439 __ addptr(pos, AESBlockSize);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3440 __ subptr(len_reg, AESBlockSize);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3441 __ jcc(Assembler::notEqual,L_singleBlock_loopTop_192);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3442 __ jmp(L_exit);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3443
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3444 __ BIND(L_key_256);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3445 // 256-bit code follows here (could be optimized to use parallelism)
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3446 __ movptr(pos, 0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3447 __ align(OptoLoopAlignment);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3448 __ BIND(L_singleBlock_loopTop_256);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3449 __ movdqu(xmm_result, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of cipher input
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3450 __ movdqa(xmm_prev_block_cipher_save, xmm_result); // save for next r vector
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3451 __ pxor (xmm_result, xmm_key_first); // do the aes dec rounds
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3452 for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_LAST - 1; rnum++) {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3453 __ aesdec(xmm_result, as_XMMRegister(rnum));
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3454 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3455 aes_dec_key(xmm_result, xmm_temp, key, 0xb0); // 256-bit key goes up to e0
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3456 aes_dec_key(xmm_result, xmm_temp, key, 0xc0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3457 aes_dec_key(xmm_result, xmm_temp, key, 0xd0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3458 aes_dec_key(xmm_result, xmm_temp, key, 0xe0);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3459 __ aesdeclast(xmm_result, xmm_key_last); // xmm15 came from key+0
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3460 __ pxor (xmm_result, xmm_prev_block_cipher); // xor with the current r vector
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3461 __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3462 // no need to store r to memory until we exit
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3463 __ movdqa(xmm_prev_block_cipher, xmm_prev_block_cipher_save); // set up next r vector with cipher input from this block
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3464
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3465 __ addptr(pos, AESBlockSize);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3466 __ subptr(len_reg, AESBlockSize);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3467 __ jcc(Assembler::notEqual,L_singleBlock_loopTop_256);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3468 __ jmp(L_exit);
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3469
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3470 return start;
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3471 }
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3472
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3473
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3474
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3475 #undef __
a61af66fc99e Initial load
duke
parents:
diff changeset
3476 #define __ masm->
a61af66fc99e Initial load
duke
parents:
diff changeset
3477
a61af66fc99e Initial load
duke
parents:
diff changeset
3478 // Continuation point for throwing of implicit exceptions that are
a61af66fc99e Initial load
duke
parents:
diff changeset
3479 // not handled in the current activation. Fabricates an exception
a61af66fc99e Initial load
duke
parents:
diff changeset
3480 // oop and initiates normal exception dispatching in this
a61af66fc99e Initial load
duke
parents:
diff changeset
3481 // frame. Since we need to preserve callee-saved values (currently
a61af66fc99e Initial load
duke
parents:
diff changeset
3482 // only for C2, but done for C1 as well) we need a callee-saved oop
a61af66fc99e Initial load
duke
parents:
diff changeset
3483 // map and therefore have to make these stubs into RuntimeStubs
a61af66fc99e Initial load
duke
parents:
diff changeset
3484 // rather than BufferBlobs. If the compiler needs all registers to
a61af66fc99e Initial load
duke
parents:
diff changeset
3485 // be preserved between the fault point and the exception handler
a61af66fc99e Initial load
duke
parents:
diff changeset
3486 // then it must assume responsibility for that in
a61af66fc99e Initial load
duke
parents:
diff changeset
3487 // AbstractCompiler::continuation_for_implicit_null_exception or
a61af66fc99e Initial load
duke
parents:
diff changeset
3488 // continuation_for_implicit_division_by_zero_exception. All other
a61af66fc99e Initial load
duke
parents:
diff changeset
3489 // implicit exceptions (e.g., NullPointerException or
a61af66fc99e Initial load
duke
parents:
diff changeset
3490 // AbstractMethodError on entry) are either at call sites or
a61af66fc99e Initial load
duke
parents:
diff changeset
3491 // otherwise assume that stack unwinding will be initiated, so
a61af66fc99e Initial load
duke
parents:
diff changeset
3492 // caller saved registers were assumed volatile in the compiler.
a61af66fc99e Initial load
duke
parents:
diff changeset
3493 address generate_throw_exception(const char* name,
a61af66fc99e Initial load
duke
parents:
diff changeset
3494 address runtime_entry,
3451
38fa55e5e792 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 2409
diff changeset
3495 Register arg1 = noreg,
38fa55e5e792 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 2409
diff changeset
3496 Register arg2 = noreg) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3497 // Information about frame layout at time of blocking runtime call.
a61af66fc99e Initial load
duke
parents:
diff changeset
3498 // Note that we only have to preserve callee-saved registers since
a61af66fc99e Initial load
duke
parents:
diff changeset
3499 // the compilers are responsible for supplying a continuation point
a61af66fc99e Initial load
duke
parents:
diff changeset
3500 // if they expect all registers to be preserved.
a61af66fc99e Initial load
duke
parents:
diff changeset
3501 enum layout {
a61af66fc99e Initial load
duke
parents:
diff changeset
3502 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt,
a61af66fc99e Initial load
duke
parents:
diff changeset
3503 rbp_off2,
a61af66fc99e Initial load
duke
parents:
diff changeset
3504 return_off,
a61af66fc99e Initial load
duke
parents:
diff changeset
3505 return_off2,
a61af66fc99e Initial load
duke
parents:
diff changeset
3506 framesize // inclusive of return address
a61af66fc99e Initial load
duke
parents:
diff changeset
3507 };
a61af66fc99e Initial load
duke
parents:
diff changeset
3508
a61af66fc99e Initial load
duke
parents:
diff changeset
3509 int insts_size = 512;
a61af66fc99e Initial load
duke
parents:
diff changeset
3510 int locs_size = 64;
a61af66fc99e Initial load
duke
parents:
diff changeset
3511
a61af66fc99e Initial load
duke
parents:
diff changeset
3512 CodeBuffer code(name, insts_size, locs_size);
a61af66fc99e Initial load
duke
parents:
diff changeset
3513 OopMapSet* oop_maps = new OopMapSet();
a61af66fc99e Initial load
duke
parents:
diff changeset
3514 MacroAssembler* masm = new MacroAssembler(&code);
a61af66fc99e Initial load
duke
parents:
diff changeset
3515
a61af66fc99e Initial load
duke
parents:
diff changeset
3516 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
3517
a61af66fc99e Initial load
duke
parents:
diff changeset
3518 // This is an inlined and slightly modified version of call_VM
a61af66fc99e Initial load
duke
parents:
diff changeset
3519 // which has the ability to fetch the return PC out of
a61af66fc99e Initial load
duke
parents:
diff changeset
3520 // thread-local storage and also sets up last_Java_sp slightly
a61af66fc99e Initial load
duke
parents:
diff changeset
3521 // differently than the real call_VM
a61af66fc99e Initial load
duke
parents:
diff changeset
3522
a61af66fc99e Initial load
duke
parents:
diff changeset
3523 __ enter(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
3524
a61af66fc99e Initial load
duke
parents:
diff changeset
3525 assert(is_even(framesize/2), "sp not 16-byte aligned");
a61af66fc99e Initial load
duke
parents:
diff changeset
3526
a61af66fc99e Initial load
duke
parents:
diff changeset
3527 // return address and rbp are already in place
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
3528 __ subptr(rsp, (framesize-4) << LogBytesPerInt); // prolog
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3529
a61af66fc99e Initial load
duke
parents:
diff changeset
3530 int frame_complete = __ pc() - start;
a61af66fc99e Initial load
duke
parents:
diff changeset
3531
a61af66fc99e Initial load
duke
parents:
diff changeset
3532 // Set up last_Java_sp and last_Java_fp
4895
c742b0b47fe5 7119286: JSR292: SIGSEGV in JNIHandleBlock::release_block(JNIHandleBlock*, Thread*)+0x3c
roland
parents: 4771
diff changeset
3533 address the_pc = __ pc();
c742b0b47fe5 7119286: JSR292: SIGSEGV in JNIHandleBlock::release_block(JNIHandleBlock*, Thread*)+0x3c
roland
parents: 4771
diff changeset
3534 __ set_last_Java_frame(rsp, rbp, the_pc);
c742b0b47fe5 7119286: JSR292: SIGSEGV in JNIHandleBlock::release_block(JNIHandleBlock*, Thread*)+0x3c
roland
parents: 4771
diff changeset
3535 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3536
a61af66fc99e Initial load
duke
parents:
diff changeset
3537 // Call runtime
3451
38fa55e5e792 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 2409
diff changeset
3538 if (arg1 != noreg) {
38fa55e5e792 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 2409
diff changeset
3539 assert(arg2 != c_rarg1, "clobbered");
38fa55e5e792 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 2409
diff changeset
3540 __ movptr(c_rarg1, arg1);
38fa55e5e792 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 2409
diff changeset
3541 }
38fa55e5e792 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 2409
diff changeset
3542 if (arg2 != noreg) {
38fa55e5e792 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 2409
diff changeset
3543 __ movptr(c_rarg2, arg2);
38fa55e5e792 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 2409
diff changeset
3544 }
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
3545 __ movptr(c_rarg0, r15_thread);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3546 BLOCK_COMMENT("call runtime_entry");
a61af66fc99e Initial load
duke
parents:
diff changeset
3547 __ call(RuntimeAddress(runtime_entry));
a61af66fc99e Initial load
duke
parents:
diff changeset
3548
a61af66fc99e Initial load
duke
parents:
diff changeset
3549 // Generate oop map
a61af66fc99e Initial load
duke
parents:
diff changeset
3550 OopMap* map = new OopMap(framesize, 0);
a61af66fc99e Initial load
duke
parents:
diff changeset
3551
4941
b522995d91f0 7144405: JumbleGC002 assert(m->offset() == pc_offset) failed: oopmap not found
roland
parents: 4895
diff changeset
3552 oop_maps->add_gc_map(the_pc - start, map);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3553
4895
c742b0b47fe5 7119286: JSR292: SIGSEGV in JNIHandleBlock::release_block(JNIHandleBlock*, Thread*)+0x3c
roland
parents: 4771
diff changeset
3554 __ reset_last_Java_frame(true, true);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3555
a61af66fc99e Initial load
duke
parents:
diff changeset
3556 __ leave(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
3557
a61af66fc99e Initial load
duke
parents:
diff changeset
3558 // check for pending exceptions
a61af66fc99e Initial load
duke
parents:
diff changeset
3559 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
3560 Label L;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
3561 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()),
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
3562 (int32_t) NULL_WORD);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3563 __ jcc(Assembler::notEqual, L);
a61af66fc99e Initial load
duke
parents:
diff changeset
3564 __ should_not_reach_here();
a61af66fc99e Initial load
duke
parents:
diff changeset
3565 __ bind(L);
a61af66fc99e Initial load
duke
parents:
diff changeset
3566 #endif // ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
3567 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
a61af66fc99e Initial load
duke
parents:
diff changeset
3568
a61af66fc99e Initial load
duke
parents:
diff changeset
3569
a61af66fc99e Initial load
duke
parents:
diff changeset
3570 // codeBlob framesize is in words (not VMRegImpl::slot_size)
a61af66fc99e Initial load
duke
parents:
diff changeset
3571 RuntimeStub* stub =
a61af66fc99e Initial load
duke
parents:
diff changeset
3572 RuntimeStub::new_runtime_stub(name,
a61af66fc99e Initial load
duke
parents:
diff changeset
3573 &code,
a61af66fc99e Initial load
duke
parents:
diff changeset
3574 frame_complete,
a61af66fc99e Initial load
duke
parents:
diff changeset
3575 (framesize >> (LogBytesPerWord - LogBytesPerInt)),
a61af66fc99e Initial load
duke
parents:
diff changeset
3576 oop_maps, false);
a61af66fc99e Initial load
duke
parents:
diff changeset
3577 return stub->entry_point();
a61af66fc99e Initial load
duke
parents:
diff changeset
3578 }
a61af66fc99e Initial load
duke
parents:
diff changeset
3579
a61af66fc99e Initial load
duke
parents:
diff changeset
3580 // Initialization
a61af66fc99e Initial load
duke
parents:
diff changeset
3581 void generate_initial() {
a61af66fc99e Initial load
duke
parents:
diff changeset
3582 // Generates all stubs and initializes the entry points
a61af66fc99e Initial load
duke
parents:
diff changeset
3583
a61af66fc99e Initial load
duke
parents:
diff changeset
3584 // This platform-specific stub is needed by generate_call_stub()
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
3585 StubRoutines::x86::_mxcsr_std = generate_fp_mask("mxcsr_std", 0x0000000000001F80);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3586
a61af66fc99e Initial load
duke
parents:
diff changeset
3587 // entry points that exist in all platforms Note: This is code
a61af66fc99e Initial load
duke
parents:
diff changeset
3588 // that could be shared among different platforms - however the
a61af66fc99e Initial load
duke
parents:
diff changeset
3589 // benefit seems to be smaller than the disadvantage of having a
a61af66fc99e Initial load
duke
parents:
diff changeset
3590 // much more complicated generator structure. See also comment in
a61af66fc99e Initial load
duke
parents:
diff changeset
3591 // stubRoutines.hpp.
a61af66fc99e Initial load
duke
parents:
diff changeset
3592
a61af66fc99e Initial load
duke
parents:
diff changeset
3593 StubRoutines::_forward_exception_entry = generate_forward_exception();
a61af66fc99e Initial load
duke
parents:
diff changeset
3594
a61af66fc99e Initial load
duke
parents:
diff changeset
3595 StubRoutines::_call_stub_entry =
a61af66fc99e Initial load
duke
parents:
diff changeset
3596 generate_call_stub(StubRoutines::_call_stub_return_address);
a61af66fc99e Initial load
duke
parents:
diff changeset
3597
a61af66fc99e Initial load
duke
parents:
diff changeset
3598 // is referenced by megamorphic call
a61af66fc99e Initial load
duke
parents:
diff changeset
3599 StubRoutines::_catch_exception_entry = generate_catch_exception();
a61af66fc99e Initial load
duke
parents:
diff changeset
3600
a61af66fc99e Initial load
duke
parents:
diff changeset
3601 // atomic calls
a61af66fc99e Initial load
duke
parents:
diff changeset
3602 StubRoutines::_atomic_xchg_entry = generate_atomic_xchg();
a61af66fc99e Initial load
duke
parents:
diff changeset
3603 StubRoutines::_atomic_xchg_ptr_entry = generate_atomic_xchg_ptr();
a61af66fc99e Initial load
duke
parents:
diff changeset
3604 StubRoutines::_atomic_cmpxchg_entry = generate_atomic_cmpxchg();
a61af66fc99e Initial load
duke
parents:
diff changeset
3605 StubRoutines::_atomic_cmpxchg_long_entry = generate_atomic_cmpxchg_long();
a61af66fc99e Initial load
duke
parents:
diff changeset
3606 StubRoutines::_atomic_add_entry = generate_atomic_add();
a61af66fc99e Initial load
duke
parents:
diff changeset
3607 StubRoutines::_atomic_add_ptr_entry = generate_atomic_add_ptr();
a61af66fc99e Initial load
duke
parents:
diff changeset
3608 StubRoutines::_fence_entry = generate_orderaccess_fence();
a61af66fc99e Initial load
duke
parents:
diff changeset
3609
a61af66fc99e Initial load
duke
parents:
diff changeset
3610 StubRoutines::_handler_for_unsafe_access_entry =
a61af66fc99e Initial load
duke
parents:
diff changeset
3611 generate_handler_for_unsafe_access();
a61af66fc99e Initial load
duke
parents:
diff changeset
3612
a61af66fc99e Initial load
duke
parents:
diff changeset
3613 // platform dependent
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
3614 StubRoutines::x86::_get_previous_fp_entry = generate_get_previous_fp();
5903
da4be62fb889 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 4941
diff changeset
3615 StubRoutines::x86::_get_previous_sp_entry = generate_get_previous_sp();
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
3616
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
3617 StubRoutines::x86::_verify_mxcsr_entry = generate_verify_mxcsr();
3451
38fa55e5e792 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 2409
diff changeset
3618
4743
dca455dea3a7 7116216: StackOverflow GC crash
bdelsart
parents: 4118
diff changeset
3619 // Build this early so it's available for the interpreter.
dca455dea3a7 7116216: StackOverflow GC crash
bdelsart
parents: 4118
diff changeset
3620 StubRoutines::_throw_StackOverflowError_entry =
dca455dea3a7 7116216: StackOverflow GC crash
bdelsart
parents: 4118
diff changeset
3621 generate_throw_exception("StackOverflowError throw_exception",
dca455dea3a7 7116216: StackOverflow GC crash
bdelsart
parents: 4118
diff changeset
3622 CAST_FROM_FN_PTR(address,
dca455dea3a7 7116216: StackOverflow GC crash
bdelsart
parents: 4118
diff changeset
3623 SharedRuntime::
dca455dea3a7 7116216: StackOverflow GC crash
bdelsart
parents: 4118
diff changeset
3624 throw_StackOverflowError));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3625 }
a61af66fc99e Initial load
duke
parents:
diff changeset
3626
a61af66fc99e Initial load
duke
parents:
diff changeset
3627 void generate_all() {
a61af66fc99e Initial load
duke
parents:
diff changeset
3628 // Generates all stubs and initializes the entry points
a61af66fc99e Initial load
duke
parents:
diff changeset
3629
a61af66fc99e Initial load
duke
parents:
diff changeset
3630 // These entry points require SharedInfo::stack0 to be set up in
a61af66fc99e Initial load
duke
parents:
diff changeset
3631 // non-core builds and need to be relocatable, so they each
a61af66fc99e Initial load
duke
parents:
diff changeset
3632 // fabricate a RuntimeStub internally.
a61af66fc99e Initial load
duke
parents:
diff changeset
3633 StubRoutines::_throw_AbstractMethodError_entry =
a61af66fc99e Initial load
duke
parents:
diff changeset
3634 generate_throw_exception("AbstractMethodError throw_exception",
a61af66fc99e Initial load
duke
parents:
diff changeset
3635 CAST_FROM_FN_PTR(address,
a61af66fc99e Initial load
duke
parents:
diff changeset
3636 SharedRuntime::
3937
c565834fb592 7088020: SEGV in JNIHandleBlock::release_block
never
parents: 3451
diff changeset
3637 throw_AbstractMethodError));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3638
16
f8236e79048a 6664627: Merge changes made only in hotspot 11 forward to jdk 7
dcubed
parents: 0
diff changeset
3639 StubRoutines::_throw_IncompatibleClassChangeError_entry =
f8236e79048a 6664627: Merge changes made only in hotspot 11 forward to jdk 7
dcubed
parents: 0
diff changeset
3640 generate_throw_exception("IncompatibleClassChangeError throw_exception",
f8236e79048a 6664627: Merge changes made only in hotspot 11 forward to jdk 7
dcubed
parents: 0
diff changeset
3641 CAST_FROM_FN_PTR(address,
f8236e79048a 6664627: Merge changes made only in hotspot 11 forward to jdk 7
dcubed
parents: 0
diff changeset
3642 SharedRuntime::
3937
c565834fb592 7088020: SEGV in JNIHandleBlock::release_block
never
parents: 3451
diff changeset
3643 throw_IncompatibleClassChangeError));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3644
a61af66fc99e Initial load
duke
parents:
diff changeset
3645 StubRoutines::_throw_NullPointerException_at_call_entry =
a61af66fc99e Initial load
duke
parents:
diff changeset
3646 generate_throw_exception("NullPointerException at call throw_exception",
a61af66fc99e Initial load
duke
parents:
diff changeset
3647 CAST_FROM_FN_PTR(address,
a61af66fc99e Initial load
duke
parents:
diff changeset
3648 SharedRuntime::
3937
c565834fb592 7088020: SEGV in JNIHandleBlock::release_block
never
parents: 3451
diff changeset
3649 throw_NullPointerException_at_call));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3650
a61af66fc99e Initial load
duke
parents:
diff changeset
3651 // entry points that are platform specific
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
3652 StubRoutines::x86::_f2i_fixup = generate_f2i_fixup();
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
3653 StubRoutines::x86::_f2l_fixup = generate_f2l_fixup();
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
3654 StubRoutines::x86::_d2i_fixup = generate_d2i_fixup();
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
3655 StubRoutines::x86::_d2l_fixup = generate_d2l_fixup();
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
3656
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
3657 StubRoutines::x86::_float_sign_mask = generate_fp_mask("float_sign_mask", 0x7FFFFFFF7FFFFFFF);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
3658 StubRoutines::x86::_float_sign_flip = generate_fp_mask("float_sign_flip", 0x8000000080000000);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
3659 StubRoutines::x86::_double_sign_mask = generate_fp_mask("double_sign_mask", 0x7FFFFFFFFFFFFFFF);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
3660 StubRoutines::x86::_double_sign_flip = generate_fp_mask("double_sign_flip", 0x8000000000000000);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3661
a61af66fc99e Initial load
duke
parents:
diff changeset
3662 // support for verify_oop (must happen after universe_init)
a61af66fc99e Initial load
duke
parents:
diff changeset
3663 StubRoutines::_verify_oop_subroutine_entry = generate_verify_oop();
a61af66fc99e Initial load
duke
parents:
diff changeset
3664
a61af66fc99e Initial load
duke
parents:
diff changeset
3665 // arraycopy stubs used by compilers
a61af66fc99e Initial load
duke
parents:
diff changeset
3666 generate_arraycopy_stubs();
1108
85f13cdfbc1d 6829192: JSR 292 needs to support 64-bit x86
twisti
parents: 845
diff changeset
3667
1174
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 1108
diff changeset
3668 generate_math_stubs();
6894
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3669
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3670 // don't bother generating these AES intrinsic stubs unless global flag is set
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3671 if (UseAESIntrinsics) {
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3672 StubRoutines::x86::_key_shuffle_mask_addr = generate_key_shuffle_mask(); // needed by the others
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3673
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3674 StubRoutines::_aescrypt_encryptBlock = generate_aescrypt_encryptBlock();
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3675 StubRoutines::_aescrypt_decryptBlock = generate_aescrypt_decryptBlock();
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3676 StubRoutines::_cipherBlockChaining_encryptAESCrypt = generate_cipherBlockChaining_encryptAESCrypt();
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3677 StubRoutines::_cipherBlockChaining_decryptAESCrypt = generate_cipherBlockChaining_decryptAESCrypt_Parallel();
a3ecd773a7b9 7184394: add intrinsics to use AES instructions
kvn
parents: 6831
diff changeset
3678 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3679 }
a61af66fc99e Initial load
duke
parents:
diff changeset
3680
a61af66fc99e Initial load
duke
parents:
diff changeset
3681 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
3682 StubGenerator(CodeBuffer* code, bool all) : StubCodeGenerator(code) {
a61af66fc99e Initial load
duke
parents:
diff changeset
3683 if (all) {
a61af66fc99e Initial load
duke
parents:
diff changeset
3684 generate_all();
a61af66fc99e Initial load
duke
parents:
diff changeset
3685 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
3686 generate_initial();
a61af66fc99e Initial load
duke
parents:
diff changeset
3687 }
a61af66fc99e Initial load
duke
parents:
diff changeset
3688 }
a61af66fc99e Initial load
duke
parents:
diff changeset
3689 }; // end class declaration
a61af66fc99e Initial load
duke
parents:
diff changeset
3690
a61af66fc99e Initial load
duke
parents:
diff changeset
3691 void StubGenerator_generate(CodeBuffer* code, bool all) {
a61af66fc99e Initial load
duke
parents:
diff changeset
3692 StubGenerator g(code, all);
a61af66fc99e Initial load
duke
parents:
diff changeset
3693 }