Mercurial > hg > truffle
annotate src/cpu/x86/vm/sharedRuntime_x86_64.cpp @ 10116:2a9d97b57920
Merge
author | bharadwaj |
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date | Fri, 19 Apr 2013 03:13:04 -0400 |
parents | e961c11b85fe |
children | b9a918201d47 e7f5651d459c |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
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26 #include "asm/macroAssembler.hpp" |
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27 #include "asm/macroAssembler.inline.hpp" |
1972 | 28 #include "code/debugInfoRec.hpp" |
29 #include "code/icBuffer.hpp" | |
30 #include "code/vtableStubs.hpp" | |
31 #include "interpreter/interpreter.hpp" | |
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32 #include "oops/compiledICHolder.hpp" |
1972 | 33 #include "prims/jvmtiRedefineClassesTrace.hpp" |
34 #include "runtime/sharedRuntime.hpp" | |
35 #include "runtime/vframeArray.hpp" | |
36 #include "vmreg_x86.inline.hpp" | |
37 #ifdef COMPILER1 | |
38 #include "c1/c1_Runtime1.hpp" | |
39 #endif | |
40 #ifdef COMPILER2 | |
41 #include "opto/runtime.hpp" | |
42 #endif | |
0 | 43 |
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44 #define __ masm-> |
0 | 45 |
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46 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; |
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47 |
0 | 48 class SimpleRuntimeFrame { |
49 | |
50 public: | |
51 | |
52 // Most of the runtime stubs have this simple frame layout. | |
53 // This class exists to make the layout shared in one place. | |
54 // Offsets are for compiler stack slots, which are jints. | |
55 enum layout { | |
56 // The frame sender code expects that rbp will be in the "natural" place and | |
57 // will override any oopMap setting for it. We must therefore force the layout | |
58 // so that it agrees with the frame sender code. | |
59 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt, | |
60 rbp_off2, | |
61 return_off, return_off2, | |
62 framesize | |
63 }; | |
64 }; | |
65 | |
66 class RegisterSaver { | |
67 // Capture info about frame layout. Layout offsets are in jint | |
68 // units because compiler frame slots are jints. | |
69 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off | |
70 enum layout { | |
71 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area | |
72 xmm_off = fpu_state_off + 160/BytesPerInt, // offset in fxsave save area | |
73 DEF_XMM_OFFS(0), | |
74 DEF_XMM_OFFS(1), | |
75 DEF_XMM_OFFS(2), | |
76 DEF_XMM_OFFS(3), | |
77 DEF_XMM_OFFS(4), | |
78 DEF_XMM_OFFS(5), | |
79 DEF_XMM_OFFS(6), | |
80 DEF_XMM_OFFS(7), | |
81 DEF_XMM_OFFS(8), | |
82 DEF_XMM_OFFS(9), | |
83 DEF_XMM_OFFS(10), | |
84 DEF_XMM_OFFS(11), | |
85 DEF_XMM_OFFS(12), | |
86 DEF_XMM_OFFS(13), | |
87 DEF_XMM_OFFS(14), | |
88 DEF_XMM_OFFS(15), | |
89 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt), | |
90 fpu_stateH_end, | |
91 r15_off, r15H_off, | |
92 r14_off, r14H_off, | |
93 r13_off, r13H_off, | |
94 r12_off, r12H_off, | |
95 r11_off, r11H_off, | |
96 r10_off, r10H_off, | |
97 r9_off, r9H_off, | |
98 r8_off, r8H_off, | |
99 rdi_off, rdiH_off, | |
100 rsi_off, rsiH_off, | |
101 ignore_off, ignoreH_off, // extra copy of rbp | |
102 rsp_off, rspH_off, | |
103 rbx_off, rbxH_off, | |
104 rdx_off, rdxH_off, | |
105 rcx_off, rcxH_off, | |
106 rax_off, raxH_off, | |
107 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state | |
108 align_off, alignH_off, | |
109 flags_off, flagsH_off, | |
110 // The frame sender code expects that rbp will be in the "natural" place and | |
111 // will override any oopMap setting for it. We must therefore force the layout | |
112 // so that it agrees with the frame sender code. | |
113 rbp_off, rbpH_off, // copy of rbp we will restore | |
114 return_off, returnH_off, // slot for return address | |
115 reg_save_size // size in compiler stack slots | |
116 }; | |
117 | |
118 public: | |
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119 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors = false); |
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120 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false); |
0 | 121 |
122 // Offsets into the register save area | |
123 // Used by deoptimization when it is managing result register | |
124 // values on its own | |
125 | |
126 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; } | |
304 | 127 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; } |
0 | 128 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; } |
129 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; } | |
130 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; } | |
131 | |
132 // During deoptimization only the result registers need to be restored, | |
133 // all the other values have already been extracted. | |
134 static void restore_result_registers(MacroAssembler* masm); | |
135 }; | |
136 | |
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137 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) { |
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138 int vect_words = 0; |
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139 #ifdef COMPILER2 |
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140 if (save_vectors) { |
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141 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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142 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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143 // Save upper half of YMM registes |
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144 vect_words = 16 * 16 / wordSize; |
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145 additional_frame_words += vect_words; |
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146 } |
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147 #else |
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148 assert(!save_vectors, "vectors are generated only by C2"); |
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149 #endif |
0 | 150 |
151 // Always make the frame size 16-byte aligned | |
152 int frame_size_in_bytes = round_to(additional_frame_words*wordSize + | |
153 reg_save_size*BytesPerInt, 16); | |
154 // OopMap frame size is in compiler stack slots (jint's) not bytes or words | |
155 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt; | |
156 // The caller will allocate additional_frame_words | |
157 int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt; | |
158 // CodeBlob frame size is in words. | |
159 int frame_size_in_words = frame_size_in_bytes / wordSize; | |
160 *total_frame_words = frame_size_in_words; | |
161 | |
162 // Save registers, fpu state, and flags. | |
163 // We assume caller has already pushed the return address onto the | |
164 // stack, so rsp is 8-byte aligned here. | |
165 // We push rpb twice in this sequence because we want the real rbp | |
166 // to be under the return like a normal enter. | |
167 | |
168 __ enter(); // rsp becomes 16-byte aligned here | |
169 __ push_CPU_state(); // Push a multiple of 16 bytes | |
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170 |
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171 if (vect_words > 0) { |
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172 assert(vect_words*wordSize == 256, ""); |
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173 __ subptr(rsp, 256); // Save upper half of YMM registes |
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174 __ vextractf128h(Address(rsp, 0),xmm0); |
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175 __ vextractf128h(Address(rsp, 16),xmm1); |
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176 __ vextractf128h(Address(rsp, 32),xmm2); |
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177 __ vextractf128h(Address(rsp, 48),xmm3); |
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178 __ vextractf128h(Address(rsp, 64),xmm4); |
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179 __ vextractf128h(Address(rsp, 80),xmm5); |
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180 __ vextractf128h(Address(rsp, 96),xmm6); |
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181 __ vextractf128h(Address(rsp,112),xmm7); |
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182 __ vextractf128h(Address(rsp,128),xmm8); |
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183 __ vextractf128h(Address(rsp,144),xmm9); |
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184 __ vextractf128h(Address(rsp,160),xmm10); |
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185 __ vextractf128h(Address(rsp,176),xmm11); |
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186 __ vextractf128h(Address(rsp,192),xmm12); |
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187 __ vextractf128h(Address(rsp,208),xmm13); |
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188 __ vextractf128h(Address(rsp,224),xmm14); |
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189 __ vextractf128h(Address(rsp,240),xmm15); |
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190 } |
0 | 191 if (frame::arg_reg_save_area_bytes != 0) { |
192 // Allocate argument register save area | |
304 | 193 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 194 } |
195 | |
196 // Set an oopmap for the call site. This oopmap will map all | |
197 // oop-registers and debug-info registers as callee-saved. This | |
198 // will allow deoptimization at this safepoint to find all possible | |
199 // debug-info recordings, as well as let GC find all oops. | |
200 | |
201 OopMapSet *oop_maps = new OopMapSet(); | |
202 OopMap* map = new OopMap(frame_size_in_slots, 0); | |
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203 |
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204 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_slots) |
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205 |
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206 map->set_callee_saved(STACK_OFFSET( rax_off ), rax->as_VMReg()); |
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207 map->set_callee_saved(STACK_OFFSET( rcx_off ), rcx->as_VMReg()); |
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208 map->set_callee_saved(STACK_OFFSET( rdx_off ), rdx->as_VMReg()); |
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209 map->set_callee_saved(STACK_OFFSET( rbx_off ), rbx->as_VMReg()); |
0 | 210 // rbp location is known implicitly by the frame sender code, needs no oopmap |
211 // and the location where rbp was saved by is ignored | |
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212 map->set_callee_saved(STACK_OFFSET( rsi_off ), rsi->as_VMReg()); |
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213 map->set_callee_saved(STACK_OFFSET( rdi_off ), rdi->as_VMReg()); |
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214 map->set_callee_saved(STACK_OFFSET( r8_off ), r8->as_VMReg()); |
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215 map->set_callee_saved(STACK_OFFSET( r9_off ), r9->as_VMReg()); |
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216 map->set_callee_saved(STACK_OFFSET( r10_off ), r10->as_VMReg()); |
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217 map->set_callee_saved(STACK_OFFSET( r11_off ), r11->as_VMReg()); |
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218 map->set_callee_saved(STACK_OFFSET( r12_off ), r12->as_VMReg()); |
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219 map->set_callee_saved(STACK_OFFSET( r13_off ), r13->as_VMReg()); |
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220 map->set_callee_saved(STACK_OFFSET( r14_off ), r14->as_VMReg()); |
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221 map->set_callee_saved(STACK_OFFSET( r15_off ), r15->as_VMReg()); |
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222 map->set_callee_saved(STACK_OFFSET(xmm0_off ), xmm0->as_VMReg()); |
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223 map->set_callee_saved(STACK_OFFSET(xmm1_off ), xmm1->as_VMReg()); |
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224 map->set_callee_saved(STACK_OFFSET(xmm2_off ), xmm2->as_VMReg()); |
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225 map->set_callee_saved(STACK_OFFSET(xmm3_off ), xmm3->as_VMReg()); |
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226 map->set_callee_saved(STACK_OFFSET(xmm4_off ), xmm4->as_VMReg()); |
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227 map->set_callee_saved(STACK_OFFSET(xmm5_off ), xmm5->as_VMReg()); |
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228 map->set_callee_saved(STACK_OFFSET(xmm6_off ), xmm6->as_VMReg()); |
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229 map->set_callee_saved(STACK_OFFSET(xmm7_off ), xmm7->as_VMReg()); |
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230 map->set_callee_saved(STACK_OFFSET(xmm8_off ), xmm8->as_VMReg()); |
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231 map->set_callee_saved(STACK_OFFSET(xmm9_off ), xmm9->as_VMReg()); |
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232 map->set_callee_saved(STACK_OFFSET(xmm10_off), xmm10->as_VMReg()); |
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233 map->set_callee_saved(STACK_OFFSET(xmm11_off), xmm11->as_VMReg()); |
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234 map->set_callee_saved(STACK_OFFSET(xmm12_off), xmm12->as_VMReg()); |
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235 map->set_callee_saved(STACK_OFFSET(xmm13_off), xmm13->as_VMReg()); |
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236 map->set_callee_saved(STACK_OFFSET(xmm14_off), xmm14->as_VMReg()); |
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237 map->set_callee_saved(STACK_OFFSET(xmm15_off), xmm15->as_VMReg()); |
0 | 238 |
239 // %%% These should all be a waste but we'll keep things as they were for now | |
240 if (true) { | |
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241 map->set_callee_saved(STACK_OFFSET( raxH_off ), rax->as_VMReg()->next()); |
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242 map->set_callee_saved(STACK_OFFSET( rcxH_off ), rcx->as_VMReg()->next()); |
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243 map->set_callee_saved(STACK_OFFSET( rdxH_off ), rdx->as_VMReg()->next()); |
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244 map->set_callee_saved(STACK_OFFSET( rbxH_off ), rbx->as_VMReg()->next()); |
0 | 245 // rbp location is known implicitly by the frame sender code, needs no oopmap |
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246 map->set_callee_saved(STACK_OFFSET( rsiH_off ), rsi->as_VMReg()->next()); |
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247 map->set_callee_saved(STACK_OFFSET( rdiH_off ), rdi->as_VMReg()->next()); |
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248 map->set_callee_saved(STACK_OFFSET( r8H_off ), r8->as_VMReg()->next()); |
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249 map->set_callee_saved(STACK_OFFSET( r9H_off ), r9->as_VMReg()->next()); |
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250 map->set_callee_saved(STACK_OFFSET( r10H_off ), r10->as_VMReg()->next()); |
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251 map->set_callee_saved(STACK_OFFSET( r11H_off ), r11->as_VMReg()->next()); |
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252 map->set_callee_saved(STACK_OFFSET( r12H_off ), r12->as_VMReg()->next()); |
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253 map->set_callee_saved(STACK_OFFSET( r13H_off ), r13->as_VMReg()->next()); |
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254 map->set_callee_saved(STACK_OFFSET( r14H_off ), r14->as_VMReg()->next()); |
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255 map->set_callee_saved(STACK_OFFSET( r15H_off ), r15->as_VMReg()->next()); |
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256 map->set_callee_saved(STACK_OFFSET(xmm0H_off ), xmm0->as_VMReg()->next()); |
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257 map->set_callee_saved(STACK_OFFSET(xmm1H_off ), xmm1->as_VMReg()->next()); |
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258 map->set_callee_saved(STACK_OFFSET(xmm2H_off ), xmm2->as_VMReg()->next()); |
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259 map->set_callee_saved(STACK_OFFSET(xmm3H_off ), xmm3->as_VMReg()->next()); |
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260 map->set_callee_saved(STACK_OFFSET(xmm4H_off ), xmm4->as_VMReg()->next()); |
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261 map->set_callee_saved(STACK_OFFSET(xmm5H_off ), xmm5->as_VMReg()->next()); |
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262 map->set_callee_saved(STACK_OFFSET(xmm6H_off ), xmm6->as_VMReg()->next()); |
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263 map->set_callee_saved(STACK_OFFSET(xmm7H_off ), xmm7->as_VMReg()->next()); |
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264 map->set_callee_saved(STACK_OFFSET(xmm8H_off ), xmm8->as_VMReg()->next()); |
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265 map->set_callee_saved(STACK_OFFSET(xmm9H_off ), xmm9->as_VMReg()->next()); |
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266 map->set_callee_saved(STACK_OFFSET(xmm10H_off), xmm10->as_VMReg()->next()); |
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267 map->set_callee_saved(STACK_OFFSET(xmm11H_off), xmm11->as_VMReg()->next()); |
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268 map->set_callee_saved(STACK_OFFSET(xmm12H_off), xmm12->as_VMReg()->next()); |
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269 map->set_callee_saved(STACK_OFFSET(xmm13H_off), xmm13->as_VMReg()->next()); |
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270 map->set_callee_saved(STACK_OFFSET(xmm14H_off), xmm14->as_VMReg()->next()); |
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271 map->set_callee_saved(STACK_OFFSET(xmm15H_off), xmm15->as_VMReg()->next()); |
0 | 272 } |
273 | |
274 return map; | |
275 } | |
276 | |
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277 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) { |
0 | 278 if (frame::arg_reg_save_area_bytes != 0) { |
279 // Pop arg register save area | |
304 | 280 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 281 } |
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282 #ifdef COMPILER2 |
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283 if (restore_vectors) { |
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284 // Restore upper half of YMM registes. |
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285 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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286 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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287 __ vinsertf128h(xmm0, Address(rsp, 0)); |
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288 __ vinsertf128h(xmm1, Address(rsp, 16)); |
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289 __ vinsertf128h(xmm2, Address(rsp, 32)); |
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290 __ vinsertf128h(xmm3, Address(rsp, 48)); |
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291 __ vinsertf128h(xmm4, Address(rsp, 64)); |
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292 __ vinsertf128h(xmm5, Address(rsp, 80)); |
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293 __ vinsertf128h(xmm6, Address(rsp, 96)); |
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294 __ vinsertf128h(xmm7, Address(rsp,112)); |
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295 __ vinsertf128h(xmm8, Address(rsp,128)); |
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296 __ vinsertf128h(xmm9, Address(rsp,144)); |
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297 __ vinsertf128h(xmm10, Address(rsp,160)); |
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298 __ vinsertf128h(xmm11, Address(rsp,176)); |
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299 __ vinsertf128h(xmm12, Address(rsp,192)); |
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300 __ vinsertf128h(xmm13, Address(rsp,208)); |
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301 __ vinsertf128h(xmm14, Address(rsp,224)); |
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302 __ vinsertf128h(xmm15, Address(rsp,240)); |
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303 __ addptr(rsp, 256); |
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304 } |
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305 #else |
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306 assert(!restore_vectors, "vectors are generated only by C2"); |
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307 #endif |
0 | 308 // Recover CPU state |
309 __ pop_CPU_state(); | |
310 // Get the rbp described implicitly by the calling convention (no oopMap) | |
304 | 311 __ pop(rbp); |
0 | 312 } |
313 | |
314 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
315 | |
316 // Just restore result register. Only used by deoptimization. By | |
317 // now any callee save register that needs to be restored to a c2 | |
318 // caller of the deoptee has been extracted into the vframeArray | |
319 // and will be stuffed into the c2i adapter we create for later | |
320 // restoration so only result registers need to be restored here. | |
321 | |
322 // Restore fp result register | |
323 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes())); | |
324 // Restore integer result register | |
304 | 325 __ movptr(rax, Address(rsp, rax_offset_in_bytes())); |
326 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes())); | |
327 | |
0 | 328 // Pop all of the register save are off the stack except the return address |
304 | 329 __ addptr(rsp, return_offset_in_bytes()); |
0 | 330 } |
331 | |
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332 // Is vector's size (in bytes) bigger than a size saved by default? |
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333 // 16 bytes XMM registers are saved by default using fxsave/fxrstor instructions. |
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334 bool SharedRuntime::is_wide_vector(int size) { |
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335 return size > 16; |
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336 } |
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337 |
0 | 338 // The java_calling_convention describes stack locations as ideal slots on |
339 // a frame with no abi restrictions. Since we must observe abi restrictions | |
340 // (like the placement of the register window) the slots must be biased by | |
341 // the following value. | |
342 static int reg2offset_in(VMReg r) { | |
343 // Account for saved rbp and return address | |
344 // This should really be in_preserve_stack_slots | |
345 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size; | |
346 } | |
347 | |
348 static int reg2offset_out(VMReg r) { | |
349 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
350 } | |
351 | |
352 // --------------------------------------------------------------------------- | |
353 // Read the array of BasicTypes from a signature, and compute where the | |
354 // arguments should go. Values in the VMRegPair regs array refer to 4-byte | |
355 // quantities. Values less than VMRegImpl::stack0 are registers, those above | |
356 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer | |
357 // as framesizes are fixed. | |
358 // VMRegImpl::stack0 refers to the first slot 0(sp). | |
359 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
360 // up to RegisterImpl::number_of_registers) are the 64-bit | |
361 // integer registers. | |
362 | |
363 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
364 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
365 // units regardless of build. Of course for i486 there is no 64 bit build | |
366 | |
367 // The Java calling convention is a "shifted" version of the C ABI. | |
368 // By skipping the first C ABI register we can call non-static jni methods | |
369 // with small numbers of arguments without having to shuffle the arguments | |
370 // at all. Since we control the java ABI we ought to at least get some | |
371 // advantage out of it. | |
372 | |
373 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
374 VMRegPair *regs, | |
375 int total_args_passed, | |
376 int is_outgoing) { | |
377 | |
378 // Create the mapping between argument positions and | |
379 // registers. | |
380 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = { | |
381 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5 | |
382 }; | |
383 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = { | |
384 j_farg0, j_farg1, j_farg2, j_farg3, | |
385 j_farg4, j_farg5, j_farg6, j_farg7 | |
386 }; | |
387 | |
388 | |
389 uint int_args = 0; | |
390 uint fp_args = 0; | |
391 uint stk_args = 0; // inc by 2 each time | |
392 | |
393 for (int i = 0; i < total_args_passed; i++) { | |
394 switch (sig_bt[i]) { | |
395 case T_BOOLEAN: | |
396 case T_CHAR: | |
397 case T_BYTE: | |
398 case T_SHORT: | |
399 case T_INT: | |
400 if (int_args < Argument::n_int_register_parameters_j) { | |
401 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
402 } else { | |
403 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
404 stk_args += 2; | |
405 } | |
406 break; | |
407 case T_VOID: | |
408 // halves of T_LONG or T_DOUBLE | |
409 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
410 regs[i].set_bad(); | |
411 break; | |
412 case T_LONG: | |
413 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
414 // fall through | |
415 case T_OBJECT: | |
416 case T_ARRAY: | |
417 case T_ADDRESS: | |
418 if (int_args < Argument::n_int_register_parameters_j) { | |
419 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
420 } else { | |
421 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
422 stk_args += 2; | |
423 } | |
424 break; | |
425 case T_FLOAT: | |
426 if (fp_args < Argument::n_float_register_parameters_j) { | |
427 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
428 } else { | |
429 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
430 stk_args += 2; | |
431 } | |
432 break; | |
433 case T_DOUBLE: | |
434 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
435 if (fp_args < Argument::n_float_register_parameters_j) { | |
436 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
437 } else { | |
438 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
439 stk_args += 2; | |
440 } | |
441 break; | |
442 default: | |
443 ShouldNotReachHere(); | |
444 break; | |
445 } | |
446 } | |
447 | |
448 return round_to(stk_args, 2); | |
449 } | |
450 | |
451 // Patch the callers callsite with entry to compiled code if it exists. | |
452 static void patch_callers_callsite(MacroAssembler *masm) { | |
453 Label L; | |
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454 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
0 | 455 __ jcc(Assembler::equal, L); |
456 | |
457 // Save the current stack pointer | |
304 | 458 __ mov(r13, rsp); |
0 | 459 // Schedule the branch target address early. |
460 // Call into the VM to patch the caller, then jump to compiled callee | |
461 // rax isn't live so capture return address while we easily can | |
304 | 462 __ movptr(rax, Address(rsp, 0)); |
0 | 463 |
464 // align stack so push_CPU_state doesn't fault | |
304 | 465 __ andptr(rsp, -(StackAlignmentInBytes)); |
0 | 466 __ push_CPU_state(); |
467 | |
468 // VM needs caller's callsite | |
469 // VM needs target method | |
470 // This needs to be a long call since we will relocate this adapter to | |
471 // the codeBuffer and it may not reach | |
472 | |
473 // Allocate argument register save area | |
474 if (frame::arg_reg_save_area_bytes != 0) { | |
304 | 475 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 476 } |
304 | 477 __ mov(c_rarg0, rbx); |
478 __ mov(c_rarg1, rax); | |
0 | 479 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); |
480 | |
481 // De-allocate argument register save area | |
482 if (frame::arg_reg_save_area_bytes != 0) { | |
304 | 483 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 484 } |
485 | |
486 __ pop_CPU_state(); | |
487 // restore sp | |
304 | 488 __ mov(rsp, r13); |
0 | 489 __ bind(L); |
490 } | |
491 | |
492 | |
493 static void gen_c2i_adapter(MacroAssembler *masm, | |
494 int total_args_passed, | |
495 int comp_args_on_stack, | |
496 const BasicType *sig_bt, | |
497 const VMRegPair *regs, | |
498 Label& skip_fixup) { | |
499 // Before we get into the guts of the C2I adapter, see if we should be here | |
500 // at all. We've come from compiled code and are attempting to jump to the | |
501 // interpreter, which means the caller made a static call to get here | |
502 // (vcalls always get a compiled target if there is one). Check for a | |
503 // compiled target. If there is one, we need to patch the caller's call. | |
504 patch_callers_callsite(masm); | |
505 | |
506 __ bind(skip_fixup); | |
507 | |
508 // Since all args are passed on the stack, total_args_passed * | |
509 // Interpreter::stackElementSize is the space we need. Plus 1 because | |
510 // we also account for the return address location since | |
511 // we store it first rather than hold it in rax across all the shuffling | |
512 | |
1506 | 513 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize; |
0 | 514 |
515 // stack is aligned, keep it that way | |
516 extraspace = round_to(extraspace, 2*wordSize); | |
517 | |
518 // Get return address | |
304 | 519 __ pop(rax); |
0 | 520 |
521 // set senderSP value | |
304 | 522 __ mov(r13, rsp); |
523 | |
524 __ subptr(rsp, extraspace); | |
0 | 525 |
526 // Store the return address in the expected location | |
304 | 527 __ movptr(Address(rsp, 0), rax); |
0 | 528 |
529 // Now write the args into the outgoing interpreter space | |
530 for (int i = 0; i < total_args_passed; i++) { | |
531 if (sig_bt[i] == T_VOID) { | |
532 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
533 continue; | |
534 } | |
535 | |
536 // offset to start parameters | |
1506 | 537 int st_off = (total_args_passed - i) * Interpreter::stackElementSize; |
538 int next_off = st_off - Interpreter::stackElementSize; | |
0 | 539 |
540 // Say 4 args: | |
541 // i st_off | |
542 // 0 32 T_LONG | |
543 // 1 24 T_VOID | |
544 // 2 16 T_OBJECT | |
545 // 3 8 T_BOOL | |
546 // - 0 return address | |
547 // | |
548 // However to make thing extra confusing. Because we can fit a long/double in | |
549 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter | |
550 // leaves one slot empty and only stores to a single slot. In this case the | |
551 // slot that is occupied is the T_VOID slot. See I said it was confusing. | |
552 | |
553 VMReg r_1 = regs[i].first(); | |
554 VMReg r_2 = regs[i].second(); | |
555 if (!r_1->is_valid()) { | |
556 assert(!r_2->is_valid(), ""); | |
557 continue; | |
558 } | |
559 if (r_1->is_stack()) { | |
560 // memory to memory use rax | |
561 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; | |
562 if (!r_2->is_valid()) { | |
563 // sign extend?? | |
564 __ movl(rax, Address(rsp, ld_off)); | |
304 | 565 __ movptr(Address(rsp, st_off), rax); |
0 | 566 |
567 } else { | |
568 | |
569 __ movq(rax, Address(rsp, ld_off)); | |
570 | |
571 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
572 // T_DOUBLE and T_LONG use two slots in the interpreter | |
573 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
574 // ld_off == LSW, ld_off+wordSize == MSW | |
575 // st_off == MSW, next_off == LSW | |
576 __ movq(Address(rsp, next_off), rax); | |
577 #ifdef ASSERT | |
578 // Overwrite the unused slot with known junk | |
579 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); | |
304 | 580 __ movptr(Address(rsp, st_off), rax); |
0 | 581 #endif /* ASSERT */ |
582 } else { | |
583 __ movq(Address(rsp, st_off), rax); | |
584 } | |
585 } | |
586 } else if (r_1->is_Register()) { | |
587 Register r = r_1->as_Register(); | |
588 if (!r_2->is_valid()) { | |
589 // must be only an int (or less ) so move only 32bits to slot | |
590 // why not sign extend?? | |
591 __ movl(Address(rsp, st_off), r); | |
592 } else { | |
593 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
594 // T_DOUBLE and T_LONG use two slots in the interpreter | |
595 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
596 // long/double in gpr | |
597 #ifdef ASSERT | |
598 // Overwrite the unused slot with known junk | |
599 __ mov64(rax, CONST64(0xdeadffffdeadaaab)); | |
304 | 600 __ movptr(Address(rsp, st_off), rax); |
0 | 601 #endif /* ASSERT */ |
602 __ movq(Address(rsp, next_off), r); | |
603 } else { | |
304 | 604 __ movptr(Address(rsp, st_off), r); |
0 | 605 } |
606 } | |
607 } else { | |
608 assert(r_1->is_XMMRegister(), ""); | |
609 if (!r_2->is_valid()) { | |
610 // only a float use just part of the slot | |
611 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); | |
612 } else { | |
613 #ifdef ASSERT | |
614 // Overwrite the unused slot with known junk | |
615 __ mov64(rax, CONST64(0xdeadffffdeadaaac)); | |
304 | 616 __ movptr(Address(rsp, st_off), rax); |
0 | 617 #endif /* ASSERT */ |
618 __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister()); | |
619 } | |
620 } | |
621 } | |
622 | |
623 // Schedule the branch target address early. | |
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624 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset()))); |
0 | 625 __ jmp(rcx); |
626 } | |
627 | |
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628 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, |
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629 address code_start, address code_end, |
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630 Label& L_ok) { |
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631 Label L_fail; |
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632 __ lea(temp_reg, ExternalAddress(code_start)); |
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633 __ cmpptr(pc_reg, temp_reg); |
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634 __ jcc(Assembler::belowEqual, L_fail); |
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635 __ lea(temp_reg, ExternalAddress(code_end)); |
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636 __ cmpptr(pc_reg, temp_reg); |
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637 __ jcc(Assembler::below, L_ok); |
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638 __ bind(L_fail); |
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639 } |
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640 |
0 | 641 static void gen_i2c_adapter(MacroAssembler *masm, |
642 int total_args_passed, | |
643 int comp_args_on_stack, | |
644 const BasicType *sig_bt, | |
645 const VMRegPair *regs) { | |
646 | |
647 // Note: r13 contains the senderSP on entry. We must preserve it since | |
648 // we may do a i2c -> c2i transition if we lose a race where compiled | |
649 // code goes non-entrant while we get args ready. | |
650 // In addition we use r13 to locate all the interpreter args as | |
651 // we must align the stack to 16 bytes on an i2c entry else we | |
652 // lose alignment we expect in all compiled code and register | |
653 // save code can segv when fxsave instructions find improperly | |
654 // aligned stack pointer. | |
655 | |
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656 // Adapters can be frameless because they do not require the caller |
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657 // to perform additional cleanup work, such as correcting the stack pointer. |
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658 // An i2c adapter is frameless because the *caller* frame, which is interpreted, |
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659 // routinely repairs its own stack pointer (from interpreter_frame_last_sp), |
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660 // even if a callee has modified the stack pointer. |
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661 // A c2i adapter is frameless because the *callee* frame, which is interpreted, |
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662 // routinely repairs its caller's stack pointer (from sender_sp, which is set |
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663 // up via the senderSP register). |
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664 // In other words, if *either* the caller or callee is interpreted, we can |
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665 // get the stack pointer repaired after a call. |
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666 // This is why c2i and i2c adapters cannot be indefinitely composed. |
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667 // In particular, if a c2i adapter were to somehow call an i2c adapter, |
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668 // both caller and callee would be compiled methods, and neither would |
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669 // clean up the stack pointer changes performed by the two adapters. |
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670 // If this happens, control eventually transfers back to the compiled |
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671 // caller, but with an uncorrected stack, causing delayed havoc. |
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672 |
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673 // Pick up the return address |
304 | 674 __ movptr(rax, Address(rsp, 0)); |
0 | 675 |
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676 if (VerifyAdapterCalls && |
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677 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { |
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678 // So, let's test for cascading c2i/i2c adapters right now. |
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679 // assert(Interpreter::contains($return_addr) || |
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680 // StubRoutines::contains($return_addr), |
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681 // "i2c adapter must return to an interpreter frame"); |
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682 __ block_comment("verify_i2c { "); |
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683 Label L_ok; |
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684 if (Interpreter::code() != NULL) |
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685 range_check(masm, rax, r11, |
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686 Interpreter::code()->code_start(), Interpreter::code()->code_end(), |
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687 L_ok); |
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688 if (StubRoutines::code1() != NULL) |
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689 range_check(masm, rax, r11, |
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690 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), |
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691 L_ok); |
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692 if (StubRoutines::code2() != NULL) |
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693 range_check(masm, rax, r11, |
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694 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), |
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695 L_ok); |
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696 const char* msg = "i2c adapter must return to an interpreter frame"; |
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697 __ block_comment(msg); |
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698 __ stop(msg); |
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699 __ bind(L_ok); |
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700 __ block_comment("} verify_i2ce "); |
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701 } |
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702 |
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703 // Must preserve original SP for loading incoming arguments because |
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704 // we need to align the outgoing SP for compiled code. |
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705 __ movptr(r11, rsp); |
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706 |
0 | 707 // Cut-out for having no stack args. Since up to 2 int/oop args are passed |
708 // in registers, we will occasionally have no stack args. | |
709 int comp_words_on_stack = 0; | |
710 if (comp_args_on_stack) { | |
711 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in | |
712 // registers are below. By subtracting stack0, we either get a negative | |
713 // number (all values in registers) or the maximum stack slot accessed. | |
714 | |
715 // Convert 4-byte c2 stack slots to words. | |
716 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; | |
717 // Round up to miminum stack alignment, in wordSize | |
718 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
304 | 719 __ subptr(rsp, comp_words_on_stack * wordSize); |
0 | 720 } |
721 | |
722 | |
723 // Ensure compiled code always sees stack at proper alignment | |
304 | 724 __ andptr(rsp, -16); |
0 | 725 |
726 // push the return address and misalign the stack that youngest frame always sees | |
727 // as far as the placement of the call instruction | |
304 | 728 __ push(rax); |
0 | 729 |
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730 // Put saved SP in another register |
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731 const Register saved_sp = rax; |
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732 __ movptr(saved_sp, r11); |
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733 |
0 | 734 // Will jump to the compiled code just as if compiled code was doing it. |
735 // Pre-load the register-jump target early, to schedule it better. | |
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736 __ movptr(r11, Address(rbx, in_bytes(Method::from_compiled_offset()))); |
0 | 737 |
738 // Now generate the shuffle code. Pick up all register args and move the | |
739 // rest through the floating point stack top. | |
740 for (int i = 0; i < total_args_passed; i++) { | |
741 if (sig_bt[i] == T_VOID) { | |
742 // Longs and doubles are passed in native word order, but misaligned | |
743 // in the 32-bit build. | |
744 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
745 continue; | |
746 } | |
747 | |
748 // Pick up 0, 1 or 2 words from SP+offset. | |
749 | |
750 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), | |
751 "scrambled load targets?"); | |
752 // Load in argument order going down. | |
1506 | 753 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize; |
0 | 754 // Point to interpreter value (vs. tag) |
1506 | 755 int next_off = ld_off - Interpreter::stackElementSize; |
0 | 756 // |
757 // | |
758 // | |
759 VMReg r_1 = regs[i].first(); | |
760 VMReg r_2 = regs[i].second(); | |
761 if (!r_1->is_valid()) { | |
762 assert(!r_2->is_valid(), ""); | |
763 continue; | |
764 } | |
765 if (r_1->is_stack()) { | |
766 // Convert stack slot to an SP offset (+ wordSize to account for return address ) | |
767 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; | |
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768 |
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769 // We can use r13 as a temp here because compiled code doesn't need r13 as an input |
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770 // and if we end up going thru a c2i because of a miss a reasonable value of r13 |
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771 // will be generated. |
0 | 772 if (!r_2->is_valid()) { |
773 // sign extend??? | |
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774 __ movl(r13, Address(saved_sp, ld_off)); |
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775 __ movptr(Address(rsp, st_off), r13); |
0 | 776 } else { |
777 // | |
778 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
779 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
780 // So we must adjust where to pick up the data to match the interpreter. | |
781 // | |
782 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
783 // are accessed as negative so LSW is at LOW address | |
784 | |
785 // ld_off is MSW so get LSW | |
786 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
787 next_off : ld_off; | |
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788 __ movq(r13, Address(saved_sp, offset)); |
0 | 789 // st_off is LSW (i.e. reg.first()) |
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790 __ movq(Address(rsp, st_off), r13); |
0 | 791 } |
792 } else if (r_1->is_Register()) { // Register argument | |
793 Register r = r_1->as_Register(); | |
794 assert(r != rax, "must be different"); | |
795 if (r_2->is_valid()) { | |
796 // | |
797 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
798 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
799 // So we must adjust where to pick up the data to match the interpreter. | |
800 | |
801 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
802 next_off : ld_off; | |
803 | |
804 // this can be a misaligned move | |
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805 __ movq(r, Address(saved_sp, offset)); |
0 | 806 } else { |
807 // sign extend and use a full word? | |
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808 __ movl(r, Address(saved_sp, ld_off)); |
0 | 809 } |
810 } else { | |
811 if (!r_2->is_valid()) { | |
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812 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); |
0 | 813 } else { |
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814 __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off)); |
0 | 815 } |
816 } | |
817 } | |
818 | |
819 // 6243940 We might end up in handle_wrong_method if | |
820 // the callee is deoptimized as we race thru here. If that | |
821 // happens we don't want to take a safepoint because the | |
822 // caller frame will look interpreted and arguments are now | |
823 // "compiled" so it is much better to make this transition | |
824 // invisible to the stack walking code. Unfortunately if | |
825 // we try and find the callee by normal means a safepoint | |
826 // is possible. So we stash the desired callee in the thread | |
827 // and the vm will find there should this case occur. | |
828 | |
304 | 829 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx); |
0 | 830 |
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831 // put Method* where a c2i would expect should we end up there |
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832 // only needed becaus eof c2 resolve stubs return Method* as a result in |
0 | 833 // rax |
304 | 834 __ mov(rax, rbx); |
0 | 835 __ jmp(r11); |
836 } | |
837 | |
838 // --------------------------------------------------------------- | |
839 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
840 int total_args_passed, | |
841 int comp_args_on_stack, | |
842 const BasicType *sig_bt, | |
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843 const VMRegPair *regs, |
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844 AdapterFingerPrint* fingerprint) { |
0 | 845 address i2c_entry = __ pc(); |
846 | |
847 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); | |
848 | |
849 // ------------------------------------------------------------------------- | |
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850 // Generate a C2I adapter. On entry we know rbx holds the Method* during calls |
0 | 851 // to the interpreter. The args start out packed in the compiled layout. They |
852 // need to be unpacked into the interpreter layout. This will almost always | |
853 // require some stack space. We grow the current (compiled) stack, then repack | |
854 // the args. We finally end in a jump to the generic interpreter entry point. | |
855 // On exit from the interpreter, the interpreter will restore our SP (lest the | |
856 // compiled code, which relys solely on SP and not RBP, get sick). | |
857 | |
858 address c2i_unverified_entry = __ pc(); | |
859 Label skip_fixup; | |
860 Label ok; | |
861 | |
862 Register holder = rax; | |
863 Register receiver = j_rarg0; | |
864 Register temp = rbx; | |
865 | |
866 { | |
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867 __ load_klass(temp, receiver); |
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868 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset())); |
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869 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset())); |
0 | 870 __ jcc(Assembler::equal, ok); |
871 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
872 | |
873 __ bind(ok); | |
874 // Method might have been compiled since the call site was patched to | |
875 // interpreted if that is the case treat it as a miss so we can get | |
876 // the call site corrected. | |
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877 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
0 | 878 __ jcc(Assembler::equal, skip_fixup); |
879 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
880 } | |
881 | |
882 address c2i_entry = __ pc(); | |
883 | |
884 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); | |
885 | |
886 __ flush(); | |
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887 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
0 | 888 } |
889 | |
890 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
891 VMRegPair *regs, | |
892 int total_args_passed) { | |
893 // We return the amount of VMRegImpl stack slots we need to reserve for all | |
894 // the arguments NOT counting out_preserve_stack_slots. | |
895 | |
896 // NOTE: These arrays will have to change when c1 is ported | |
897 #ifdef _WIN64 | |
898 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
899 c_rarg0, c_rarg1, c_rarg2, c_rarg3 | |
900 }; | |
901 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
902 c_farg0, c_farg1, c_farg2, c_farg3 | |
903 }; | |
904 #else | |
905 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
906 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5 | |
907 }; | |
908 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
909 c_farg0, c_farg1, c_farg2, c_farg3, | |
910 c_farg4, c_farg5, c_farg6, c_farg7 | |
911 }; | |
912 #endif // _WIN64 | |
913 | |
914 | |
915 uint int_args = 0; | |
916 uint fp_args = 0; | |
917 uint stk_args = 0; // inc by 2 each time | |
918 | |
919 for (int i = 0; i < total_args_passed; i++) { | |
920 switch (sig_bt[i]) { | |
921 case T_BOOLEAN: | |
922 case T_CHAR: | |
923 case T_BYTE: | |
924 case T_SHORT: | |
925 case T_INT: | |
926 if (int_args < Argument::n_int_register_parameters_c) { | |
927 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
928 #ifdef _WIN64 | |
929 fp_args++; | |
930 // Allocate slots for callee to stuff register args the stack. | |
931 stk_args += 2; | |
932 #endif | |
933 } else { | |
934 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
935 stk_args += 2; | |
936 } | |
937 break; | |
938 case T_LONG: | |
939 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
940 // fall through | |
941 case T_OBJECT: | |
942 case T_ARRAY: | |
943 case T_ADDRESS: | |
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944 case T_METADATA: |
0 | 945 if (int_args < Argument::n_int_register_parameters_c) { |
946 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
947 #ifdef _WIN64 | |
948 fp_args++; | |
949 stk_args += 2; | |
950 #endif | |
951 } else { | |
952 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
953 stk_args += 2; | |
954 } | |
955 break; | |
956 case T_FLOAT: | |
957 if (fp_args < Argument::n_float_register_parameters_c) { | |
958 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
959 #ifdef _WIN64 | |
960 int_args++; | |
961 // Allocate slots for callee to stuff register args the stack. | |
962 stk_args += 2; | |
963 #endif | |
964 } else { | |
965 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
966 stk_args += 2; | |
967 } | |
968 break; | |
969 case T_DOUBLE: | |
970 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
971 if (fp_args < Argument::n_float_register_parameters_c) { | |
972 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
973 #ifdef _WIN64 | |
974 int_args++; | |
975 // Allocate slots for callee to stuff register args the stack. | |
976 stk_args += 2; | |
977 #endif | |
978 } else { | |
979 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
980 stk_args += 2; | |
981 } | |
982 break; | |
983 case T_VOID: // Halves of longs and doubles | |
984 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
985 regs[i].set_bad(); | |
986 break; | |
987 default: | |
988 ShouldNotReachHere(); | |
989 break; | |
990 } | |
991 } | |
992 #ifdef _WIN64 | |
993 // windows abi requires that we always allocate enough stack space | |
994 // for 4 64bit registers to be stored down. | |
995 if (stk_args < 8) { | |
996 stk_args = 8; | |
997 } | |
998 #endif // _WIN64 | |
999 | |
1000 return stk_args; | |
1001 } | |
1002 | |
1003 // On 64 bit we will store integer like items to the stack as | |
1004 // 64 bits items (sparc abi) even though java would only store | |
1005 // 32bits for a parameter. On 32bit it will simply be 32 bits | |
1006 // So this routine will do 32->32 on 32bit and 32->64 on 64bit | |
1007 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1008 if (src.first()->is_stack()) { | |
1009 if (dst.first()->is_stack()) { | |
1010 // stack to stack | |
1011 __ movslq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1012 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1013 } else { | |
1014 // stack to reg | |
1015 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); | |
1016 } | |
1017 } else if (dst.first()->is_stack()) { | |
1018 // reg to stack | |
1019 // Do we really have to sign extend??? | |
1020 // __ movslq(src.first()->as_Register(), src.first()->as_Register()); | |
1021 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
1022 } else { | |
1023 // Do we really have to sign extend??? | |
1024 // __ movslq(dst.first()->as_Register(), src.first()->as_Register()); | |
1025 if (dst.first() != src.first()) { | |
1026 __ movq(dst.first()->as_Register(), src.first()->as_Register()); | |
1027 } | |
1028 } | |
1029 } | |
1030 | |
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1031 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
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1032 if (src.first()->is_stack()) { |
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1033 if (dst.first()->is_stack()) { |
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1034 // stack to stack |
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1035 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
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1036 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); |
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1037 } else { |
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1038 // stack to reg |
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1039 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); |
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1040 } |
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1041 } else if (dst.first()->is_stack()) { |
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1042 // reg to stack |
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1043 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); |
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1044 } else { |
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1045 if (dst.first() != src.first()) { |
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1046 __ movq(dst.first()->as_Register(), src.first()->as_Register()); |
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1047 } |
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1048 } |
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1049 } |
0 | 1050 |
1051 // An oop arg. Must pass a handle not the oop itself | |
1052 static void object_move(MacroAssembler* masm, | |
1053 OopMap* map, | |
1054 int oop_handle_offset, | |
1055 int framesize_in_slots, | |
1056 VMRegPair src, | |
1057 VMRegPair dst, | |
1058 bool is_receiver, | |
1059 int* receiver_offset) { | |
1060 | |
1061 // must pass a handle. First figure out the location we use as a handle | |
1062 | |
1063 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register(); | |
1064 | |
1065 // See if oop is NULL if it is we need no handle | |
1066 | |
1067 if (src.first()->is_stack()) { | |
1068 | |
1069 // Oop is already on the stack as an argument | |
1070 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
1071 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
1072 if (is_receiver) { | |
1073 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
1074 } | |
1075 | |
304 | 1076 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); |
1077 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); | |
0 | 1078 // conditionally move a NULL |
304 | 1079 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first()))); |
0 | 1080 } else { |
1081 | |
1082 // Oop is in an a register we must store it to the space we reserve | |
1083 // on the stack for oop_handles and pass a handle if oop is non-NULL | |
1084 | |
1085 const Register rOop = src.first()->as_Register(); | |
1086 int oop_slot; | |
1087 if (rOop == j_rarg0) | |
1088 oop_slot = 0; | |
1089 else if (rOop == j_rarg1) | |
1090 oop_slot = 1; | |
1091 else if (rOop == j_rarg2) | |
1092 oop_slot = 2; | |
1093 else if (rOop == j_rarg3) | |
1094 oop_slot = 3; | |
1095 else if (rOop == j_rarg4) | |
1096 oop_slot = 4; | |
1097 else { | |
1098 assert(rOop == j_rarg5, "wrong register"); | |
1099 oop_slot = 5; | |
1100 } | |
1101 | |
1102 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset; | |
1103 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
1104 | |
1105 map->set_oop(VMRegImpl::stack2reg(oop_slot)); | |
1106 // Store oop in handle area, may be NULL | |
304 | 1107 __ movptr(Address(rsp, offset), rOop); |
0 | 1108 if (is_receiver) { |
1109 *receiver_offset = offset; | |
1110 } | |
1111 | |
304 | 1112 __ cmpptr(rOop, (int32_t)NULL_WORD); |
1113 __ lea(rHandle, Address(rsp, offset)); | |
0 | 1114 // conditionally move a NULL from the handle area where it was just stored |
304 | 1115 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset)); |
0 | 1116 } |
1117 | |
1118 // If arg is on the stack then place it otherwise it is already in correct reg. | |
1119 if (dst.first()->is_stack()) { | |
304 | 1120 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
0 | 1121 } |
1122 } | |
1123 | |
1124 // A float arg may have to do float reg int reg conversion | |
1125 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1126 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
1127 | |
1128 // The calling conventions assures us that each VMregpair is either | |
1129 // all really one physical register or adjacent stack slots. | |
1130 // This greatly simplifies the cases here compared to sparc. | |
1131 | |
1132 if (src.first()->is_stack()) { | |
1133 if (dst.first()->is_stack()) { | |
1134 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); | |
304 | 1135 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); |
0 | 1136 } else { |
1137 // stack to reg | |
1138 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
1139 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first()))); | |
1140 } | |
1141 } else if (dst.first()->is_stack()) { | |
1142 // reg to stack | |
1143 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
1144 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1145 } else { | |
1146 // reg to reg | |
1147 // In theory these overlap but the ordering is such that this is likely a nop | |
1148 if ( src.first() != dst.first()) { | |
1149 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
1150 } | |
1151 } | |
1152 } | |
1153 | |
1154 // A long move | |
1155 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1156 | |
1157 // The calling conventions assures us that each VMregpair is either | |
1158 // all really one physical register or adjacent stack slots. | |
1159 // This greatly simplifies the cases here compared to sparc. | |
1160 | |
1161 if (src.is_single_phys_reg() ) { | |
1162 if (dst.is_single_phys_reg()) { | |
1163 if (dst.first() != src.first()) { | |
304 | 1164 __ mov(dst.first()->as_Register(), src.first()->as_Register()); |
0 | 1165 } |
1166 } else { | |
1167 assert(dst.is_single_reg(), "not a stack pair"); | |
1168 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
1169 } | |
1170 } else if (dst.is_single_phys_reg()) { | |
1171 assert(src.is_single_reg(), "not a stack pair"); | |
1172 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first()))); | |
1173 } else { | |
1174 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
1175 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1176 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1177 } | |
1178 } | |
1179 | |
1180 // A double move | |
1181 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1182 | |
1183 // The calling conventions assures us that each VMregpair is either | |
1184 // all really one physical register or adjacent stack slots. | |
1185 // This greatly simplifies the cases here compared to sparc. | |
1186 | |
1187 if (src.is_single_phys_reg() ) { | |
1188 if (dst.is_single_phys_reg()) { | |
1189 // In theory these overlap but the ordering is such that this is likely a nop | |
1190 if ( src.first() != dst.first()) { | |
1191 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
1192 } | |
1193 } else { | |
1194 assert(dst.is_single_reg(), "not a stack pair"); | |
1195 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1196 } | |
1197 } else if (dst.is_single_phys_reg()) { | |
1198 assert(src.is_single_reg(), "not a stack pair"); | |
1199 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first()))); | |
1200 } else { | |
1201 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
1202 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1203 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1204 } | |
1205 } | |
1206 | |
1207 | |
1208 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1209 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1210 // which by this time is free to use | |
1211 switch (ret_type) { | |
1212 case T_FLOAT: | |
1213 __ movflt(Address(rbp, -wordSize), xmm0); | |
1214 break; | |
1215 case T_DOUBLE: | |
1216 __ movdbl(Address(rbp, -wordSize), xmm0); | |
1217 break; | |
1218 case T_VOID: break; | |
1219 default: { | |
304 | 1220 __ movptr(Address(rbp, -wordSize), rax); |
0 | 1221 } |
1222 } | |
1223 } | |
1224 | |
1225 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1226 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1227 // which by this time is free to use | |
1228 switch (ret_type) { | |
1229 case T_FLOAT: | |
1230 __ movflt(xmm0, Address(rbp, -wordSize)); | |
1231 break; | |
1232 case T_DOUBLE: | |
1233 __ movdbl(xmm0, Address(rbp, -wordSize)); | |
1234 break; | |
1235 case T_VOID: break; | |
1236 default: { | |
304 | 1237 __ movptr(rax, Address(rbp, -wordSize)); |
0 | 1238 } |
1239 } | |
1240 } | |
1241 | |
1242 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
1243 for ( int i = first_arg ; i < arg_count ; i++ ) { | |
1244 if (args[i].first()->is_Register()) { | |
304 | 1245 __ push(args[i].first()->as_Register()); |
0 | 1246 } else if (args[i].first()->is_XMMRegister()) { |
304 | 1247 __ subptr(rsp, 2*wordSize); |
0 | 1248 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister()); |
1249 } | |
1250 } | |
1251 } | |
1252 | |
1253 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
1254 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) { | |
1255 if (args[i].first()->is_Register()) { | |
304 | 1256 __ pop(args[i].first()->as_Register()); |
0 | 1257 } else if (args[i].first()->is_XMMRegister()) { |
1258 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0)); | |
304 | 1259 __ addptr(rsp, 2*wordSize); |
0 | 1260 } |
1261 } | |
1262 } | |
1263 | |
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1264 |
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1265 static void save_or_restore_arguments(MacroAssembler* masm, |
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1266 const int stack_slots, |
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1267 const int total_in_args, |
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1268 const int arg_save_area, |
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1269 OopMap* map, |
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1270 VMRegPair* in_regs, |
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1271 BasicType* in_sig_bt) { |
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1272 // if map is non-NULL then the code should store the values, |
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1273 // otherwise it should load them. |
5905 | 1274 int slot = arg_save_area; |
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1275 // Save down double word first |
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1276 for ( int i = 0; i < total_in_args; i++) { |
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1277 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) { |
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1278 int offset = slot * VMRegImpl::stack_slot_size; |
5905 | 1279 slot += VMRegImpl::slots_per_word; |
1280 assert(slot <= stack_slots, "overflow"); | |
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1281 if (map != NULL) { |
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1282 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1283 } else { |
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1284 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1285 } |
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1286 } |
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1287 if (in_regs[i].first()->is_Register() && |
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1288 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) { |
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1289 int offset = slot * VMRegImpl::stack_slot_size; |
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1290 if (map != NULL) { |
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1291 __ movq(Address(rsp, offset), in_regs[i].first()->as_Register()); |
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1292 if (in_sig_bt[i] == T_ARRAY) { |
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1293 map->set_oop(VMRegImpl::stack2reg(slot));; |
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1294 } |
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1295 } else { |
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1296 __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset)); |
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1297 } |
5907 | 1298 slot += VMRegImpl::slots_per_word; |
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1299 } |
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1300 } |
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1301 // Save or restore single word registers |
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1302 for ( int i = 0; i < total_in_args; i++) { |
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1303 if (in_regs[i].first()->is_Register()) { |
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1304 int offset = slot * VMRegImpl::stack_slot_size; |
5905 | 1305 slot++; |
1306 assert(slot <= stack_slots, "overflow"); | |
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1307 |
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1308 // Value is in an input register pass we must flush it to the stack |
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1309 const Register reg = in_regs[i].first()->as_Register(); |
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1310 switch (in_sig_bt[i]) { |
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1311 case T_BOOLEAN: |
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1312 case T_CHAR: |
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1313 case T_BYTE: |
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1314 case T_SHORT: |
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1315 case T_INT: |
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1316 if (map != NULL) { |
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1317 __ movl(Address(rsp, offset), reg); |
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1318 } else { |
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1319 __ movl(reg, Address(rsp, offset)); |
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1320 } |
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1321 break; |
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1322 case T_ARRAY: |
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1323 case T_LONG: |
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1324 // handled above |
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1325 break; |
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1326 case T_OBJECT: |
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1327 default: ShouldNotReachHere(); |
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1328 } |
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1329 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1330 if (in_sig_bt[i] == T_FLOAT) { |
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1331 int offset = slot * VMRegImpl::stack_slot_size; |
5905 | 1332 slot++; |
1333 assert(slot <= stack_slots, "overflow"); | |
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1334 if (map != NULL) { |
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1335 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1336 } else { |
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1337 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1338 } |
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1339 } |
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1340 } else if (in_regs[i].first()->is_stack()) { |
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1341 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
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1342 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
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1343 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); |
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1344 } |
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1345 } |
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1346 } |
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1347 } |
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1348 |
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1349 |
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1350 // Check GC_locker::needs_gc and enter the runtime if it's true. This |
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1351 // keeps a new JNI critical region from starting until a GC has been |
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1352 // forced. Save down any oops in registers and describe them in an |
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1353 // OopMap. |
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1354 static void check_needs_gc_for_critical_native(MacroAssembler* masm, |
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1355 int stack_slots, |
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1356 int total_c_args, |
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1357 int total_in_args, |
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1358 int arg_save_area, |
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1359 OopMapSet* oop_maps, |
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1360 VMRegPair* in_regs, |
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1361 BasicType* in_sig_bt) { |
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1362 __ block_comment("check GC_locker::needs_gc"); |
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1363 Label cont; |
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1364 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false); |
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1365 __ jcc(Assembler::equal, cont); |
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1366 |
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1367 // Save down any incoming oops and call into the runtime to halt for a GC |
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1368 |
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1369 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1370 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1371 arg_save_area, map, in_regs, in_sig_bt); |
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1372 |
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1373 address the_pc = __ pc(); |
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1374 oop_maps->add_gc_map( __ offset(), map); |
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1375 __ set_last_Java_frame(rsp, noreg, the_pc); |
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1376 |
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1377 __ block_comment("block_for_jni_critical"); |
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1378 __ movptr(c_rarg0, r15_thread); |
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1379 __ mov(r12, rsp); // remember sp |
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1380 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows |
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1381 __ andptr(rsp, -16); // align stack as required by ABI |
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1382 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical))); |
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1383 __ mov(rsp, r12); // restore sp |
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1384 __ reinit_heapbase(); |
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1385 |
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1386 __ reset_last_Java_frame(false, true); |
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1387 |
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1388 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1389 arg_save_area, NULL, in_regs, in_sig_bt); |
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1390 |
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1391 __ bind(cont); |
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1392 #ifdef ASSERT |
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1393 if (StressCriticalJNINatives) { |
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1394 // Stress register saving |
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1395 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1396 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1397 arg_save_area, map, in_regs, in_sig_bt); |
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1398 // Destroy argument registers |
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1399 for (int i = 0; i < total_in_args - 1; i++) { |
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1400 if (in_regs[i].first()->is_Register()) { |
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1401 const Register reg = in_regs[i].first()->as_Register(); |
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1402 __ xorptr(reg, reg); |
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1403 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1404 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister()); |
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1405 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1406 ShouldNotReachHere(); |
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1407 } else if (in_regs[i].first()->is_stack()) { |
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1408 // Nothing to do |
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1409 } else { |
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1410 ShouldNotReachHere(); |
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1411 } |
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1412 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) { |
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1413 i++; |
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1414 } |
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1415 } |
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1416 |
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1417 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1418 arg_save_area, NULL, in_regs, in_sig_bt); |
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1419 } |
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1420 #endif |
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1421 } |
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1422 |
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1423 // Unpack an array argument into a pointer to the body and the length |
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1424 // if the array is non-null, otherwise pass 0 for both. |
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1425 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { |
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1426 Register tmp_reg = rax; |
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1427 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg, |
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1428 "possible collision"); |
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1429 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg, |
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1430 "possible collision"); |
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1431 |
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1432 // Pass the length, ptr pair |
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1433 Label is_null, done; |
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1434 VMRegPair tmp; |
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1435 tmp.set_ptr(tmp_reg->as_VMReg()); |
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1436 if (reg.first()->is_stack()) { |
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1437 // Load the arg up from the stack |
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1438 move_ptr(masm, reg, tmp); |
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1439 reg = tmp; |
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1440 } |
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1441 __ testptr(reg.first()->as_Register(), reg.first()->as_Register()); |
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1442 __ jccb(Assembler::equal, is_null); |
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1443 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1444 move_ptr(masm, tmp, body_arg); |
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1445 // load the length relative to the body. |
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1446 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() - |
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1447 arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1448 move32_64(masm, tmp, length_arg); |
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1449 __ jmpb(done); |
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1450 __ bind(is_null); |
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1451 // Pass zeros |
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1452 __ xorptr(tmp_reg, tmp_reg); |
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1453 move_ptr(masm, tmp, body_arg); |
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1454 move32_64(masm, tmp, length_arg); |
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1455 __ bind(done); |
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1456 } |
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1457 |
5905 | 1458 |
6266
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1459 // Different signatures may require very different orders for the move |
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1460 // to avoid clobbering other arguments. There's no simple way to |
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1461 // order them safely. Compute a safe order for issuing stores and |
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1462 // break any cycles in those stores. This code is fairly general but |
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1463 // it's not necessary on the other platforms so we keep it in the |
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1464 // platform dependent code instead of moving it into a shared file. |
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1465 // (See bugs 7013347 & 7145024.) |
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1466 // Note that this code is specific to LP64. |
5905 | 1467 class ComputeMoveOrder: public StackObj { |
1468 class MoveOperation: public ResourceObj { | |
1469 friend class ComputeMoveOrder; | |
1470 private: | |
1471 VMRegPair _src; | |
1472 VMRegPair _dst; | |
1473 int _src_index; | |
1474 int _dst_index; | |
1475 bool _processed; | |
1476 MoveOperation* _next; | |
1477 MoveOperation* _prev; | |
1478 | |
1479 static int get_id(VMRegPair r) { | |
1480 return r.first()->value(); | |
1481 } | |
1482 | |
1483 public: | |
1484 MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst): | |
1485 _src(src) | |
1486 , _src_index(src_index) | |
1487 , _dst(dst) | |
1488 , _dst_index(dst_index) | |
1489 , _next(NULL) | |
1490 , _prev(NULL) | |
1491 , _processed(false) { | |
1492 } | |
1493 | |
1494 VMRegPair src() const { return _src; } | |
1495 int src_id() const { return get_id(src()); } | |
1496 int src_index() const { return _src_index; } | |
1497 VMRegPair dst() const { return _dst; } | |
1498 void set_dst(int i, VMRegPair dst) { _dst_index = i, _dst = dst; } | |
1499 int dst_index() const { return _dst_index; } | |
1500 int dst_id() const { return get_id(dst()); } | |
1501 MoveOperation* next() const { return _next; } | |
1502 MoveOperation* prev() const { return _prev; } | |
1503 void set_processed() { _processed = true; } | |
1504 bool is_processed() const { return _processed; } | |
1505 | |
1506 // insert | |
1507 void break_cycle(VMRegPair temp_register) { | |
1508 // create a new store following the last store | |
1509 // to move from the temp_register to the original | |
1510 MoveOperation* new_store = new MoveOperation(-1, temp_register, dst_index(), dst()); | |
1511 | |
1512 // break the cycle of links and insert new_store at the end | |
1513 // break the reverse link. | |
1514 MoveOperation* p = prev(); | |
1515 assert(p->next() == this, "must be"); | |
1516 _prev = NULL; | |
1517 p->_next = new_store; | |
1518 new_store->_prev = p; | |
1519 | |
1520 // change the original store to save it's value in the temp. | |
1521 set_dst(-1, temp_register); | |
1522 } | |
1523 | |
1524 void link(GrowableArray<MoveOperation*>& killer) { | |
1525 // link this store in front the store that it depends on | |
1526 MoveOperation* n = killer.at_grow(src_id(), NULL); | |
1527 if (n != NULL) { | |
1528 assert(_next == NULL && n->_prev == NULL, "shouldn't have been set yet"); | |
1529 _next = n; | |
1530 n->_prev = this; | |
1531 } | |
1532 } | |
1533 }; | |
1534 | |
1535 private: | |
1536 GrowableArray<MoveOperation*> edges; | |
1537 | |
1538 public: | |
1539 ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs, | |
1540 BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) { | |
1541 // Move operations where the dest is the stack can all be | |
1542 // scheduled first since they can't interfere with the other moves. | |
1543 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { | |
1544 if (in_sig_bt[i] == T_ARRAY) { | |
1545 c_arg--; | |
1546 if (out_regs[c_arg].first()->is_stack() && | |
1547 out_regs[c_arg + 1].first()->is_stack()) { | |
1548 arg_order.push(i); | |
1549 arg_order.push(c_arg); | |
1550 } else { | |
1551 if (out_regs[c_arg].first()->is_stack() || | |
1552 in_regs[i].first() == out_regs[c_arg].first()) { | |
1553 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg + 1]); | |
1554 } else { | |
1555 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); | |
1556 } | |
1557 } | |
1558 } else if (in_sig_bt[i] == T_VOID) { | |
1559 arg_order.push(i); | |
1560 arg_order.push(c_arg); | |
1561 } else { | |
1562 if (out_regs[c_arg].first()->is_stack() || | |
1563 in_regs[i].first() == out_regs[c_arg].first()) { | |
1564 arg_order.push(i); | |
1565 arg_order.push(c_arg); | |
1566 } else { | |
1567 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); | |
1568 } | |
1569 } | |
1570 } | |
1571 // Break any cycles in the register moves and emit the in the | |
1572 // proper order. | |
1573 GrowableArray<MoveOperation*>* stores = get_store_order(tmp_vmreg); | |
1574 for (int i = 0; i < stores->length(); i++) { | |
1575 arg_order.push(stores->at(i)->src_index()); | |
1576 arg_order.push(stores->at(i)->dst_index()); | |
1577 } | |
1578 } | |
1579 | |
1580 // Collected all the move operations | |
1581 void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) { | |
1582 if (src.first() == dst.first()) return; | |
1583 edges.append(new MoveOperation(src_index, src, dst_index, dst)); | |
1584 } | |
1585 | |
1586 // Walk the edges breaking cycles between moves. The result list | |
1587 // can be walked in order to produce the proper set of loads | |
1588 GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) { | |
1589 // Record which moves kill which values | |
1590 GrowableArray<MoveOperation*> killer; | |
1591 for (int i = 0; i < edges.length(); i++) { | |
1592 MoveOperation* s = edges.at(i); | |
1593 assert(killer.at_grow(s->dst_id(), NULL) == NULL, "only one killer"); | |
1594 killer.at_put_grow(s->dst_id(), s, NULL); | |
1595 } | |
1596 assert(killer.at_grow(MoveOperation::get_id(temp_register), NULL) == NULL, | |
1597 "make sure temp isn't in the registers that are killed"); | |
1598 | |
1599 // create links between loads and stores | |
1600 for (int i = 0; i < edges.length(); i++) { | |
1601 edges.at(i)->link(killer); | |
1602 } | |
1603 | |
1604 // at this point, all the move operations are chained together | |
1605 // in a doubly linked list. Processing it backwards finds | |
1606 // the beginning of the chain, forwards finds the end. If there's | |
1607 // a cycle it can be broken at any point, so pick an edge and walk | |
1608 // backward until the list ends or we end where we started. | |
1609 GrowableArray<MoveOperation*>* stores = new GrowableArray<MoveOperation*>(); | |
1610 for (int e = 0; e < edges.length(); e++) { | |
1611 MoveOperation* s = edges.at(e); | |
1612 if (!s->is_processed()) { | |
1613 MoveOperation* start = s; | |
1614 // search for the beginning of the chain or cycle | |
1615 while (start->prev() != NULL && start->prev() != s) { | |
1616 start = start->prev(); | |
1617 } | |
1618 if (start->prev() == s) { | |
1619 start->break_cycle(temp_register); | |
1620 } | |
1621 // walk the chain forward inserting to store list | |
1622 while (start != NULL) { | |
1623 stores->append(start); | |
1624 start->set_processed(); | |
1625 start = start->next(); | |
1626 } | |
1627 } | |
1628 } | |
1629 return stores; | |
1630 } | |
1631 }; | |
1632 | |
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1633 static void verify_oop_args(MacroAssembler* masm, |
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1634 methodHandle method, |
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1635 const BasicType* sig_bt, |
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1636 const VMRegPair* regs) { |
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1637 Register temp_reg = rbx; // not part of any compiled calling seq |
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1638 if (VerifyOops) { |
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1639 for (int i = 0; i < method->size_of_parameters(); i++) { |
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1640 if (sig_bt[i] == T_OBJECT || |
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1641 sig_bt[i] == T_ARRAY) { |
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1642 VMReg r = regs[i].first(); |
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1643 assert(r->is_valid(), "bad oop arg"); |
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1644 if (r->is_stack()) { |
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1645 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1646 __ verify_oop(temp_reg); |
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1647 } else { |
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1648 __ verify_oop(r->as_Register()); |
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1649 } |
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1650 } |
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1651 } |
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1652 } |
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1653 } |
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1654 |
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1655 static void gen_special_dispatch(MacroAssembler* masm, |
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1656 methodHandle method, |
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1657 const BasicType* sig_bt, |
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1658 const VMRegPair* regs) { |
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1659 verify_oop_args(masm, method, sig_bt, regs); |
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1660 vmIntrinsics::ID iid = method->intrinsic_id(); |
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1661 |
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1662 // Now write the args into the outgoing interpreter space |
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1663 bool has_receiver = false; |
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1664 Register receiver_reg = noreg; |
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1665 int member_arg_pos = -1; |
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1666 Register member_reg = noreg; |
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1667 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); |
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1668 if (ref_kind != 0) { |
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1669 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument |
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1670 member_reg = rbx; // known to be free at this point |
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1671 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); |
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1672 } else if (iid == vmIntrinsics::_invokeBasic) { |
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1673 has_receiver = true; |
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1674 } else { |
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1675 fatal(err_msg_res("unexpected intrinsic id %d", iid)); |
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1676 } |
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1677 |
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1678 if (member_reg != noreg) { |
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1679 // Load the member_arg into register, if necessary. |
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1680 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); |
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1681 VMReg r = regs[member_arg_pos].first(); |
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1682 if (r->is_stack()) { |
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1683 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1684 } else { |
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1685 // no data motion is needed |
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1686 member_reg = r->as_Register(); |
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1687 } |
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1688 } |
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1689 |
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1690 if (has_receiver) { |
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1691 // Make sure the receiver is loaded into a register. |
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1692 assert(method->size_of_parameters() > 0, "oob"); |
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1693 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); |
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1694 VMReg r = regs[0].first(); |
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1695 assert(r->is_valid(), "bad receiver arg"); |
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1696 if (r->is_stack()) { |
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1697 // Porting note: This assumes that compiled calling conventions always |
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1698 // pass the receiver oop in a register. If this is not true on some |
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1699 // platform, pick a temp and load the receiver from stack. |
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1700 fatal("receiver always in a register"); |
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1701 receiver_reg = j_rarg0; // known to be free at this point |
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1702 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1703 } else { |
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1704 // no data motion is needed |
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1705 receiver_reg = r->as_Register(); |
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1706 } |
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1707 } |
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1708 |
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1709 // Figure out which address we are really jumping to: |
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1710 MethodHandles::generate_method_handle_dispatch(masm, iid, |
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1711 receiver_reg, member_reg, /*for_compiler_entry:*/ true); |
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1712 } |
5905 | 1713 |
0 | 1714 // --------------------------------------------------------------------------- |
1715 // Generate a native wrapper for a given method. The method takes arguments | |
1716 // in the Java compiled code convention, marshals them to the native | |
1717 // convention (handlizes oops, etc), transitions to native, makes the call, | |
1718 // returns to java state (possibly blocking), unhandlizes any result and | |
1719 // returns. | |
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1720 // |
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1721 // Critical native functions are a shorthand for the use of |
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1722 // GetPrimtiveArrayCritical and disallow the use of any other JNI |
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1723 // functions. The wrapper is expected to unpack the arguments before |
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1724 // passing them to the callee and perform checks before and after the |
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1725 // native call to ensure that they GC_locker |
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1726 // lock_critical/unlock_critical semantics are followed. Some other |
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1727 // parts of JNI setup are skipped like the tear down of the JNI handle |
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1728 // block and the check for pending exceptions it's impossible for them |
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1729 // to be thrown. |
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1730 // |
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1731 // They are roughly structured like this: |
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1732 // if (GC_locker::needs_gc()) |
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1733 // SharedRuntime::block_for_jni_critical(); |
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1734 // tranistion to thread_in_native |
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1735 // unpack arrray arguments and call native entry point |
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1736 // check for safepoint in progress |
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1737 // check if any thread suspend flags are set |
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1738 // call into JVM and possible unlock the JNI critical |
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1739 // if a GC was suppressed while in the critical native. |
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1740 // transition back to thread_in_Java |
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1741 // return to caller |
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1742 // |
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1743 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, |
0 | 1744 methodHandle method, |
2405
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1745 int compile_id, |
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1746 BasicType* in_sig_bt, |
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1747 VMRegPair* in_regs, |
0 | 1748 BasicType ret_type) { |
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1749 if (method->is_method_handle_intrinsic()) { |
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1750 vmIntrinsics::ID iid = method->intrinsic_id(); |
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1751 intptr_t start = (intptr_t)__ pc(); |
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1752 int vep_offset = ((intptr_t)__ pc()) - start; |
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1753 gen_special_dispatch(masm, |
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1754 method, |
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1755 in_sig_bt, |
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1756 in_regs); |
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1757 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period |
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1758 __ flush(); |
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1759 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually |
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1760 return nmethod::new_native_nmethod(method, |
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1761 compile_id, |
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1762 masm->code(), |
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1763 vep_offset, |
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1764 frame_complete, |
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1765 stack_slots / VMRegImpl::slots_per_word, |
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1766 in_ByteSize(-1), |
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1767 in_ByteSize(-1), |
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1768 (OopMapSet*)NULL); |
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1769 } |
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1770 bool is_critical_native = true; |
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1771 address native_func = method->critical_native_function(); |
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1772 if (native_func == NULL) { |
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1773 native_func = method->native_function(); |
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1774 is_critical_native = false; |
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1775 } |
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1776 assert(native_func != NULL, "must have function"); |
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1777 |
0 | 1778 // An OopMap for lock (and class if static) |
1779 OopMapSet *oop_maps = new OopMapSet(); | |
1780 intptr_t start = (intptr_t)__ pc(); | |
1781 | |
1782 // We have received a description of where all the java arg are located | |
1783 // on entry to the wrapper. We need to convert these args to where | |
1784 // the jni function will expect them. To figure out where they go | |
1785 // we convert the java signature to a C signature by inserting | |
1786 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
1787 | |
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1788 const int total_in_args = method->size_of_parameters(); |
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1789 int total_c_args = total_in_args; |
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1790 if (!is_critical_native) { |
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1791 total_c_args += 1; |
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1792 if (method->is_static()) { |
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1793 total_c_args++; |
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1794 } |
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1795 } else { |
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1796 for (int i = 0; i < total_in_args; i++) { |
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1797 if (in_sig_bt[i] == T_ARRAY) { |
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1798 total_c_args++; |
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1799 } |
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1800 } |
0 | 1801 } |
1802 | |
1803 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
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1804 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); |
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1805 BasicType* in_elem_bt = NULL; |
0 | 1806 |
1807 int argc = 0; | |
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1808 if (!is_critical_native) { |
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1809 out_sig_bt[argc++] = T_ADDRESS; |
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1810 if (method->is_static()) { |
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1811 out_sig_bt[argc++] = T_OBJECT; |
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1812 } |
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1813 |
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1814 for (int i = 0; i < total_in_args ; i++ ) { |
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1815 out_sig_bt[argc++] = in_sig_bt[i]; |
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1816 } |
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1817 } else { |
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1818 Thread* THREAD = Thread::current(); |
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1819 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); |
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1820 SignatureStream ss(method->signature()); |
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1821 for (int i = 0; i < total_in_args ; i++ ) { |
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1822 if (in_sig_bt[i] == T_ARRAY) { |
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1823 // Arrays are passed as int, elem* pair |
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1824 out_sig_bt[argc++] = T_INT; |
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1825 out_sig_bt[argc++] = T_ADDRESS; |
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1826 Symbol* atype = ss.as_symbol(CHECK_NULL); |
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1827 const char* at = atype->as_C_string(); |
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1828 if (strlen(at) == 2) { |
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1829 assert(at[0] == '[', "must be"); |
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1830 switch (at[1]) { |
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1831 case 'B': in_elem_bt[i] = T_BYTE; break; |
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1832 case 'C': in_elem_bt[i] = T_CHAR; break; |
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1833 case 'D': in_elem_bt[i] = T_DOUBLE; break; |
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1834 case 'F': in_elem_bt[i] = T_FLOAT; break; |
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1835 case 'I': in_elem_bt[i] = T_INT; break; |
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1836 case 'J': in_elem_bt[i] = T_LONG; break; |
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1837 case 'S': in_elem_bt[i] = T_SHORT; break; |
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1838 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; |
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1839 default: ShouldNotReachHere(); |
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1840 } |
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1841 } |
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1842 } else { |
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1843 out_sig_bt[argc++] = in_sig_bt[i]; |
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1844 in_elem_bt[i] = T_VOID; |
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1845 } |
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1846 if (in_sig_bt[i] != T_VOID) { |
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1847 assert(in_sig_bt[i] == ss.type(), "must match"); |
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1848 ss.next(); |
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1849 } |
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1850 } |
0 | 1851 } |
1852 | |
1853 // Now figure out where the args must be stored and how much stack space | |
1854 // they require. | |
1855 int out_arg_slots; | |
1856 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); | |
1857 | |
1858 // Compute framesize for the wrapper. We need to handlize all oops in | |
1859 // incoming registers | |
1860 | |
1861 // Calculate the total number of stack slots we will need. | |
1862 | |
1863 // First count the abi requirement plus all of the outgoing args | |
1864 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
1865 | |
1866 // Now the space for the inbound oop handle area | |
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1867 int total_save_slots = 6 * VMRegImpl::slots_per_word; // 6 arguments passed in registers |
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1868 if (is_critical_native) { |
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1869 // Critical natives may have to call out so they need a save area |
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1870 // for register arguments. |
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1871 int double_slots = 0; |
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1872 int single_slots = 0; |
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1873 for ( int i = 0; i < total_in_args; i++) { |
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1874 if (in_regs[i].first()->is_Register()) { |
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1875 const Register reg = in_regs[i].first()->as_Register(); |
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1876 switch (in_sig_bt[i]) { |
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1877 case T_BOOLEAN: |
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1878 case T_BYTE: |
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1879 case T_SHORT: |
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1880 case T_CHAR: |
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1881 case T_INT: single_slots++; break; |
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1882 case T_ARRAY: // specific to LP64 (7145024) |
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1883 case T_LONG: double_slots++; break; |
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1884 default: ShouldNotReachHere(); |
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1885 } |
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1886 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1887 switch (in_sig_bt[i]) { |
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1888 case T_FLOAT: single_slots++; break; |
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1889 case T_DOUBLE: double_slots++; break; |
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1890 default: ShouldNotReachHere(); |
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1891 } |
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1892 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1893 ShouldNotReachHere(); |
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1894 } |
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1895 } |
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1896 total_save_slots = double_slots * 2 + single_slots; |
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1897 // align the save area |
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1898 if (double_slots != 0) { |
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1899 stack_slots = round_to(stack_slots, 2); |
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1900 } |
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1901 } |
0 | 1902 |
1903 int oop_handle_offset = stack_slots; | |
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1904 stack_slots += total_save_slots; |
0 | 1905 |
1906 // Now any space we need for handlizing a klass if static method | |
1907 | |
1908 int klass_slot_offset = 0; | |
1909 int klass_offset = -1; | |
1910 int lock_slot_offset = 0; | |
1911 bool is_static = false; | |
1912 | |
1913 if (method->is_static()) { | |
1914 klass_slot_offset = stack_slots; | |
1915 stack_slots += VMRegImpl::slots_per_word; | |
1916 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
1917 is_static = true; | |
1918 } | |
1919 | |
1920 // Plus a lock if needed | |
1921 | |
1922 if (method->is_synchronized()) { | |
1923 lock_slot_offset = stack_slots; | |
1924 stack_slots += VMRegImpl::slots_per_word; | |
1925 } | |
1926 | |
1927 // Now a place (+2) to save return values or temp during shuffling | |
1928 // + 4 for return address (which we own) and saved rbp | |
1929 stack_slots += 6; | |
1930 | |
1931 // Ok The space we have allocated will look like: | |
1932 // | |
1933 // | |
1934 // FP-> | | | |
1935 // |---------------------| | |
1936 // | 2 slots for moves | | |
1937 // |---------------------| | |
1938 // | lock box (if sync) | | |
1939 // |---------------------| <- lock_slot_offset | |
1940 // | klass (if static) | | |
1941 // |---------------------| <- klass_slot_offset | |
1942 // | oopHandle area | | |
1943 // |---------------------| <- oop_handle_offset (6 java arg registers) | |
1944 // | outbound memory | | |
1945 // | based arguments | | |
1946 // | | | |
1947 // |---------------------| | |
1948 // | | | |
1949 // SP-> | out_preserved_slots | | |
1950 // | |
1951 // | |
1952 | |
1953 | |
1954 // Now compute actual number of stack words we need rounding to make | |
1955 // stack properly aligned. | |
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1956 stack_slots = round_to(stack_slots, StackAlignmentInSlots); |
0 | 1957 |
1958 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
1959 | |
1960 // First thing make an ic check to see if we should even be here | |
1961 | |
1962 // We are free to use all registers as temps without saving them and | |
1963 // restoring them except rbp. rbp is the only callee save register | |
1964 // as far as the interpreter and the compiler(s) are concerned. | |
1965 | |
1966 | |
1967 const Register ic_reg = rax; | |
1968 const Register receiver = j_rarg0; | |
1969 | |
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1970 Label hit; |
0 | 1971 Label exception_pending; |
1972 | |
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1973 assert_different_registers(ic_reg, receiver, rscratch1); |
0 | 1974 __ verify_oop(receiver); |
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1975 __ load_klass(rscratch1, receiver); |
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1976 __ cmpq(ic_reg, rscratch1); |
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1977 __ jcc(Assembler::equal, hit); |
0 | 1978 |
1979 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
1980 | |
1981 // Verified entry point must be aligned | |
1982 __ align(8); | |
1983 | |
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1984 __ bind(hit); |
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1985 |
0 | 1986 int vep_offset = ((intptr_t)__ pc()) - start; |
1987 | |
1988 // The instruction at the verified entry point must be 5 bytes or longer | |
1989 // because it can be patched on the fly by make_non_entrant. The stack bang | |
1990 // instruction fits that requirement. | |
1991 | |
1992 // Generate stack overflow check | |
1993 | |
1994 if (UseStackBanging) { | |
1995 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); | |
1996 } else { | |
1997 // need a 5 byte instruction to allow MT safe patching to non-entrant | |
1998 __ fat_nop(); | |
1999 } | |
2000 | |
2001 // Generate a new frame for the wrapper. | |
2002 __ enter(); | |
2003 // -2 because return address is already present and so is saved rbp | |
304 | 2004 __ subptr(rsp, stack_size - 2*wordSize); |
0 | 2005 |
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2006 // Frame is now completed as far as size and linkage. |
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2007 int frame_complete = ((intptr_t)__ pc()) - start; |
0 | 2008 |
2009 #ifdef ASSERT | |
2010 { | |
2011 Label L; | |
304 | 2012 __ mov(rax, rsp); |
605 | 2013 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI) |
304 | 2014 __ cmpptr(rax, rsp); |
0 | 2015 __ jcc(Assembler::equal, L); |
2016 __ stop("improperly aligned stack"); | |
2017 __ bind(L); | |
2018 } | |
2019 #endif /* ASSERT */ | |
2020 | |
2021 | |
2022 // We use r14 as the oop handle for the receiver/klass | |
2023 // It is callee save so it survives the call to native | |
2024 | |
2025 const Register oop_handle_reg = r14; | |
2026 | |
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2027 if (is_critical_native) { |
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2028 check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args, |
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2029 oop_handle_offset, oop_maps, in_regs, in_sig_bt); |
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2030 } |
0 | 2031 |
2032 // | |
2033 // We immediately shuffle the arguments so that any vm call we have to | |
2034 // make from here on out (sync slow path, jvmti, etc.) we will have | |
2035 // captured the oops from our caller and have a valid oopMap for | |
2036 // them. | |
2037 | |
2038 // ----------------- | |
2039 // The Grand Shuffle | |
2040 | |
2041 // The Java calling convention is either equal (linux) or denser (win64) than the | |
2042 // c calling convention. However the because of the jni_env argument the c calling | |
2043 // convention always has at least one more (and two for static) arguments than Java. | |
2044 // Therefore if we move the args from java -> c backwards then we will never have | |
2045 // a register->register conflict and we don't have to build a dependency graph | |
2046 // and figure out how to break any cycles. | |
2047 // | |
2048 | |
2049 // Record esp-based slot for receiver on stack for non-static methods | |
2050 int receiver_offset = -1; | |
2051 | |
2052 // This is a trick. We double the stack slots so we can claim | |
2053 // the oops in the caller's frame. Since we are sure to have | |
2054 // more args than the caller doubling is enough to make | |
2055 // sure we can capture all the incoming oop args from the | |
2056 // caller. | |
2057 // | |
2058 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
2059 | |
2060 // Mark location of rbp (someday) | |
2061 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp)); | |
2062 | |
2063 // Use eax, ebx as temporaries during any memory-memory moves we have to do | |
2064 // All inbound args are referenced based on rbp and all outbound args via rsp. | |
2065 | |
2066 | |
2067 #ifdef ASSERT | |
2068 bool reg_destroyed[RegisterImpl::number_of_registers]; | |
2069 bool freg_destroyed[XMMRegisterImpl::number_of_registers]; | |
2070 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { | |
2071 reg_destroyed[r] = false; | |
2072 } | |
2073 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) { | |
2074 freg_destroyed[f] = false; | |
2075 } | |
2076 | |
2077 #endif /* ASSERT */ | |
2078 | |
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2079 // This may iterate in two different directions depending on the |
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2080 // kind of native it is. The reason is that for regular JNI natives |
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2081 // the incoming and outgoing registers are offset upwards and for |
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2082 // critical natives they are offset down. |
5905 | 2083 GrowableArray<int> arg_order(2 * total_in_args); |
2084 VMRegPair tmp_vmreg; | |
2085 tmp_vmreg.set1(rbx->as_VMReg()); | |
2086 | |
2087 if (!is_critical_native) { | |
2088 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { | |
2089 arg_order.push(i); | |
2090 arg_order.push(c_arg); | |
2091 } | |
2092 } else { | |
2093 // Compute a valid move order, using tmp_vmreg to break any cycles | |
2094 ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg); | |
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2095 } |
5905 | 2096 |
2097 int temploc = -1; | |
2098 for (int ai = 0; ai < arg_order.length(); ai += 2) { | |
2099 int i = arg_order.at(ai); | |
2100 int c_arg = arg_order.at(ai + 1); | |
2101 __ block_comment(err_msg("move %d -> %d", i, c_arg)); | |
2102 if (c_arg == -1) { | |
2103 assert(is_critical_native, "should only be required for critical natives"); | |
2104 // This arg needs to be moved to a temporary | |
2105 __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register()); | |
2106 in_regs[i] = tmp_vmreg; | |
2107 temploc = i; | |
2108 continue; | |
2109 } else if (i == -1) { | |
2110 assert(is_critical_native, "should only be required for critical natives"); | |
2111 // Read from the temporary location | |
2112 assert(temploc != -1, "must be valid"); | |
2113 i = temploc; | |
2114 temploc = -1; | |
2115 } | |
0 | 2116 #ifdef ASSERT |
2117 if (in_regs[i].first()->is_Register()) { | |
2118 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!"); | |
2119 } else if (in_regs[i].first()->is_XMMRegister()) { | |
2120 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!"); | |
2121 } | |
2122 if (out_regs[c_arg].first()->is_Register()) { | |
2123 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; | |
2124 } else if (out_regs[c_arg].first()->is_XMMRegister()) { | |
2125 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; | |
2126 } | |
2127 #endif /* ASSERT */ | |
2128 switch (in_sig_bt[i]) { | |
2129 case T_ARRAY: | |
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2130 if (is_critical_native) { |
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2131 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); |
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2132 c_arg++; |
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2133 #ifdef ASSERT |
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2134 if (out_regs[c_arg].first()->is_Register()) { |
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2135 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; |
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2136 } else if (out_regs[c_arg].first()->is_XMMRegister()) { |
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2137 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; |
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2138 } |
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2139 #endif |
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2140 break; |
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2141 } |
0 | 2142 case T_OBJECT: |
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2143 assert(!is_critical_native, "no oop arguments"); |
0 | 2144 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], |
2145 ((i == 0) && (!is_static)), | |
2146 &receiver_offset); | |
2147 break; | |
2148 case T_VOID: | |
2149 break; | |
2150 | |
2151 case T_FLOAT: | |
2152 float_move(masm, in_regs[i], out_regs[c_arg]); | |
2153 break; | |
2154 | |
2155 case T_DOUBLE: | |
2156 assert( i + 1 < total_in_args && | |
2157 in_sig_bt[i + 1] == T_VOID && | |
2158 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
2159 double_move(masm, in_regs[i], out_regs[c_arg]); | |
2160 break; | |
2161 | |
2162 case T_LONG : | |
2163 long_move(masm, in_regs[i], out_regs[c_arg]); | |
2164 break; | |
2165 | |
2166 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
2167 | |
2168 default: | |
2169 move32_64(masm, in_regs[i], out_regs[c_arg]); | |
2170 } | |
2171 } | |
2172 | |
2173 // point c_arg at the first arg that is already loaded in case we | |
2174 // need to spill before we call out | |
5905 | 2175 int c_arg = total_c_args - total_in_args; |
0 | 2176 |
2177 // Pre-load a static method's oop into r14. Used both by locking code and | |
2178 // the normal JNI call code. | |
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2179 if (method->is_static() && !is_critical_native) { |
0 | 2180 |
2181 // load oop into a register | |
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2182 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror())); |
0 | 2183 |
2184 // Now handlize the static class mirror it's known not-null. | |
304 | 2185 __ movptr(Address(rsp, klass_offset), oop_handle_reg); |
0 | 2186 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
2187 | |
2188 // Now get the handle | |
304 | 2189 __ lea(oop_handle_reg, Address(rsp, klass_offset)); |
0 | 2190 // store the klass handle as second argument |
304 | 2191 __ movptr(c_rarg1, oop_handle_reg); |
0 | 2192 // and protect the arg if we must spill |
2193 c_arg--; | |
2194 } | |
2195 | |
2196 // Change state to native (we save the return address in the thread, since it might not | |
2197 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() | |
2198 // points into the right code segment. It does not have to be the correct return pc. | |
2199 // We use the same pc/oopMap repeatedly when we call out | |
2200 | |
2201 intptr_t the_pc = (intptr_t) __ pc(); | |
2202 oop_maps->add_gc_map(the_pc - start, map); | |
2203 | |
2204 __ set_last_Java_frame(rsp, noreg, (address)the_pc); | |
2205 | |
2206 | |
2207 // We have all of the arguments setup at this point. We must not touch any register | |
2208 // argument registers at this point (what if we save/restore them there are no oop? | |
2209 | |
2210 { | |
2211 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
2212 // protect the args we've loaded | |
2213 save_args(masm, total_c_args, c_arg, out_regs); | |
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2214 __ mov_metadata(c_rarg1, method()); |
0 | 2215 __ call_VM_leaf( |
2216 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
2217 r15_thread, c_rarg1); | |
2218 restore_args(masm, total_c_args, c_arg, out_regs); | |
2219 } | |
2220 | |
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2221 // RedefineClasses() tracing support for obsolete method entry |
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2222 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
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2223 // protect the args we've loaded |
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2224 save_args(masm, total_c_args, c_arg, out_regs); |
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2225 __ mov_metadata(c_rarg1, method()); |
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2226 __ call_VM_leaf( |
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2227 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
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2228 r15_thread, c_rarg1); |
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2229 restore_args(masm, total_c_args, c_arg, out_regs); |
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2230 } |
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2231 |
0 | 2232 // Lock a synchronized method |
2233 | |
2234 // Register definitions used by locking and unlocking | |
2235 | |
2236 const Register swap_reg = rax; // Must use rax for cmpxchg instruction | |
2237 const Register obj_reg = rbx; // Will contain the oop | |
2238 const Register lock_reg = r13; // Address of compiler lock object (BasicLock) | |
2239 const Register old_hdr = r13; // value of old header at unlock time | |
2240 | |
2241 Label slow_path_lock; | |
2242 Label lock_done; | |
2243 | |
2244 if (method->is_synchronized()) { | |
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2245 assert(!is_critical_native, "unhandled"); |
0 | 2246 |
2247 | |
2248 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); | |
2249 | |
2250 // Get the handle (the 2nd argument) | |
304 | 2251 __ mov(oop_handle_reg, c_rarg1); |
0 | 2252 |
2253 // Get address of the box | |
2254 | |
304 | 2255 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
0 | 2256 |
2257 // Load the oop from the handle | |
304 | 2258 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 2259 |
2260 if (UseBiasedLocking) { | |
2261 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock); | |
2262 } | |
2263 | |
2264 // Load immediate 1 into swap_reg %rax | |
2265 __ movl(swap_reg, 1); | |
2266 | |
2267 // Load (object->mark() | 1) into swap_reg %rax | |
304 | 2268 __ orptr(swap_reg, Address(obj_reg, 0)); |
0 | 2269 |
2270 // Save (object->mark() | 1) into BasicLock's displaced header | |
304 | 2271 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 2272 |
2273 if (os::is_MP()) { | |
2274 __ lock(); | |
2275 } | |
2276 | |
2277 // src -> dest iff dest == rax else rax <- dest | |
304 | 2278 __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); |
0 | 2279 __ jcc(Assembler::equal, lock_done); |
2280 | |
2281 // Hmm should this move to the slow path code area??? | |
2282 | |
2283 // Test if the oopMark is an obvious stack pointer, i.e., | |
2284 // 1) (mark & 3) == 0, and | |
2285 // 2) rsp <= mark < mark + os::pagesize() | |
2286 // These 3 tests can be done by evaluating the following | |
2287 // expression: ((mark - rsp) & (3 - os::vm_page_size())), | |
2288 // assuming both stack pointer and pagesize have their | |
2289 // least significant 2 bits clear. | |
2290 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg | |
2291 | |
304 | 2292 __ subptr(swap_reg, rsp); |
2293 __ andptr(swap_reg, 3 - os::vm_page_size()); | |
0 | 2294 |
2295 // Save the test result, for recursive case, the result is zero | |
304 | 2296 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 2297 __ jcc(Assembler::notEqual, slow_path_lock); |
2298 | |
2299 // Slow path will re-enter here | |
2300 | |
2301 __ bind(lock_done); | |
2302 } | |
2303 | |
2304 | |
2305 // Finally just about ready to make the JNI call | |
2306 | |
2307 | |
2308 // get JNIEnv* which is first argument to native | |
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2309 if (!is_critical_native) { |
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2310 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset()))); |
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2311 } |
0 | 2312 |
2313 // Now set thread in native | |
304 | 2314 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native); |
0 | 2315 |
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2316 __ call(RuntimeAddress(native_func)); |
0 | 2317 |
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2318 // Verify or restore cpu control state after JNI call |
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2319 __ restore_cpu_control_state_after_jni(); |
0 | 2320 |
2321 // Unpack native results. | |
2322 switch (ret_type) { | |
2323 case T_BOOLEAN: __ c2bool(rax); break; | |
2324 case T_CHAR : __ movzwl(rax, rax); break; | |
2325 case T_BYTE : __ sign_extend_byte (rax); break; | |
2326 case T_SHORT : __ sign_extend_short(rax); break; | |
2327 case T_INT : /* nothing to do */ break; | |
2328 case T_DOUBLE : | |
2329 case T_FLOAT : | |
2330 // Result is in xmm0 we'll save as needed | |
2331 break; | |
2332 case T_ARRAY: // Really a handle | |
2333 case T_OBJECT: // Really a handle | |
2334 break; // can't de-handlize until after safepoint check | |
2335 case T_VOID: break; | |
2336 case T_LONG: break; | |
2337 default : ShouldNotReachHere(); | |
2338 } | |
2339 | |
2340 // Switch thread to "native transition" state before reading the synchronization state. | |
2341 // This additional state is necessary because reading and testing the synchronization | |
2342 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
2343 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
2344 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
2345 // Thread A is resumed to finish this native method, but doesn't block here since it | |
2346 // didn't see any synchronization is progress, and escapes. | |
304 | 2347 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans); |
0 | 2348 |
2349 if(os::is_MP()) { | |
2350 if (UseMembar) { | |
2351 // Force this write out before the read below | |
2352 __ membar(Assembler::Membar_mask_bits( | |
2353 Assembler::LoadLoad | Assembler::LoadStore | | |
2354 Assembler::StoreLoad | Assembler::StoreStore)); | |
2355 } else { | |
2356 // Write serialization page so VM thread can do a pseudo remote membar. | |
2357 // We use the current thread pointer to calculate a thread specific | |
2358 // offset to write to within the page. This minimizes bus traffic | |
2359 // due to cache line collision. | |
2360 __ serialize_memory(r15_thread, rcx); | |
2361 } | |
2362 } | |
2363 | |
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2364 Label after_transition; |
0 | 2365 |
2366 // check for safepoint operation in progress and/or pending suspend requests | |
2367 { | |
2368 Label Continue; | |
2369 | |
2370 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), | |
2371 SafepointSynchronize::_not_synchronized); | |
2372 | |
2373 Label L; | |
2374 __ jcc(Assembler::notEqual, L); | |
2375 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0); | |
2376 __ jcc(Assembler::equal, Continue); | |
2377 __ bind(L); | |
2378 | |
2379 // Don't use call_VM as it will see a possible pending exception and forward it | |
2380 // and never return here preventing us from clearing _last_native_pc down below. | |
2381 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are | |
2382 // preserved and correspond to the bcp/locals pointers. So we do a runtime call | |
2383 // by hand. | |
2384 // | |
2385 save_native_result(masm, ret_type, stack_slots); | |
304 | 2386 __ mov(c_rarg0, r15_thread); |
2387 __ mov(r12, rsp); // remember sp | |
2388 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2389 __ andptr(rsp, -16); // align stack as required by ABI | |
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2390 if (!is_critical_native) { |
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2391 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans))); |
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2392 } else { |
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2393 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition))); |
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2394 } |
304 | 2395 __ mov(rsp, r12); // restore sp |
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2396 __ reinit_heapbase(); |
0 | 2397 // Restore any method result value |
2398 restore_native_result(masm, ret_type, stack_slots); | |
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2399 |
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2400 if (is_critical_native) { |
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2401 // The call above performed the transition to thread_in_Java so |
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2402 // skip the transition logic below. |
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2403 __ jmpb(after_transition); |
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2404 } |
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2405 |
0 | 2406 __ bind(Continue); |
2407 } | |
2408 | |
2409 // change thread state | |
2410 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java); | |
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2411 __ bind(after_transition); |
0 | 2412 |
2413 Label reguard; | |
2414 Label reguard_done; | |
2415 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); | |
2416 __ jcc(Assembler::equal, reguard); | |
2417 __ bind(reguard_done); | |
2418 | |
2419 // native result if any is live | |
2420 | |
2421 // Unlock | |
2422 Label unlock_done; | |
2423 Label slow_path_unlock; | |
2424 if (method->is_synchronized()) { | |
2425 | |
2426 // Get locked oop from the handle we passed to jni | |
304 | 2427 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 2428 |
2429 Label done; | |
2430 | |
2431 if (UseBiasedLocking) { | |
2432 __ biased_locking_exit(obj_reg, old_hdr, done); | |
2433 } | |
2434 | |
2435 // Simple recursive lock? | |
2436 | |
304 | 2437 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD); |
0 | 2438 __ jcc(Assembler::equal, done); |
2439 | |
2440 // Must save rax if if it is live now because cmpxchg must use it | |
2441 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
2442 save_native_result(masm, ret_type, stack_slots); | |
2443 } | |
2444 | |
2445 | |
2446 // get address of the stack lock | |
304 | 2447 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
0 | 2448 // get old displaced header |
304 | 2449 __ movptr(old_hdr, Address(rax, 0)); |
0 | 2450 |
2451 // Atomic swap old header if oop still contains the stack lock | |
2452 if (os::is_MP()) { | |
2453 __ lock(); | |
2454 } | |
304 | 2455 __ cmpxchgptr(old_hdr, Address(obj_reg, 0)); |
0 | 2456 __ jcc(Assembler::notEqual, slow_path_unlock); |
2457 | |
2458 // slow path re-enters here | |
2459 __ bind(unlock_done); | |
2460 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
2461 restore_native_result(masm, ret_type, stack_slots); | |
2462 } | |
2463 | |
2464 __ bind(done); | |
2465 | |
2466 } | |
2467 { | |
2468 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
2469 save_native_result(masm, ret_type, stack_slots); | |
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2470 __ mov_metadata(c_rarg1, method()); |
0 | 2471 __ call_VM_leaf( |
2472 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
2473 r15_thread, c_rarg1); | |
2474 restore_native_result(masm, ret_type, stack_slots); | |
2475 } | |
2476 | |
2477 __ reset_last_Java_frame(false, true); | |
2478 | |
2479 // Unpack oop result | |
2480 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
2481 Label L; | |
304 | 2482 __ testptr(rax, rax); |
0 | 2483 __ jcc(Assembler::zero, L); |
304 | 2484 __ movptr(rax, Address(rax, 0)); |
0 | 2485 __ bind(L); |
2486 __ verify_oop(rax); | |
2487 } | |
2488 | |
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2489 if (!is_critical_native) { |
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2490 // reset handle block |
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2491 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset())); |
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2492 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD); |
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2493 } |
0 | 2494 |
2495 // pop our frame | |
2496 | |
2497 __ leave(); | |
2498 | |
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2499 if (!is_critical_native) { |
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2500 // Any exception pending? |
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2501 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
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2502 __ jcc(Assembler::notEqual, exception_pending); |
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2503 } |
0 | 2504 |
2505 // Return | |
2506 | |
2507 __ ret(0); | |
2508 | |
2509 // Unexpected paths are out of line and go here | |
2510 | |
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2511 if (!is_critical_native) { |
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2512 // forward the exception |
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2513 __ bind(exception_pending); |
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2514 |
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2515 // and forward the exception |
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2516 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
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2517 } |
0 | 2518 |
2519 // Slow path locking & unlocking | |
2520 if (method->is_synchronized()) { | |
2521 | |
2522 // BEGIN Slow path lock | |
2523 __ bind(slow_path_lock); | |
2524 | |
2525 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM | |
2526 // args are (oop obj, BasicLock* lock, JavaThread* thread) | |
2527 | |
2528 // protect the args we've loaded | |
2529 save_args(masm, total_c_args, c_arg, out_regs); | |
2530 | |
304 | 2531 __ mov(c_rarg0, obj_reg); |
2532 __ mov(c_rarg1, lock_reg); | |
2533 __ mov(c_rarg2, r15_thread); | |
0 | 2534 |
2535 // Not a leaf but we have last_Java_frame setup as we want | |
2536 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3); | |
2537 restore_args(masm, total_c_args, c_arg, out_regs); | |
2538 | |
2539 #ifdef ASSERT | |
2540 { Label L; | |
304 | 2541 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
0 | 2542 __ jcc(Assembler::equal, L); |
2543 __ stop("no pending exception allowed on exit from monitorenter"); | |
2544 __ bind(L); | |
2545 } | |
2546 #endif | |
2547 __ jmp(lock_done); | |
2548 | |
2549 // END Slow path lock | |
2550 | |
2551 // BEGIN Slow path unlock | |
2552 __ bind(slow_path_unlock); | |
2553 | |
2554 // If we haven't already saved the native result we must save it now as xmm registers | |
2555 // are still exposed. | |
2556 | |
2557 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
2558 save_native_result(masm, ret_type, stack_slots); | |
2559 } | |
2560 | |
304 | 2561 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
2562 | |
2563 __ mov(c_rarg0, obj_reg); | |
2564 __ mov(r12, rsp); // remember sp | |
2565 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2566 __ andptr(rsp, -16); // align stack as required by ABI | |
0 | 2567 |
2568 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) | |
2569 // NOTE that obj_reg == rbx currently | |
304 | 2570 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset()))); |
2571 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); | |
0 | 2572 |
2573 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); | |
304 | 2574 __ mov(rsp, r12); // restore sp |
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2575 __ reinit_heapbase(); |
0 | 2576 #ifdef ASSERT |
2577 { | |
2578 Label L; | |
304 | 2579 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); |
0 | 2580 __ jcc(Assembler::equal, L); |
2581 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); | |
2582 __ bind(L); | |
2583 } | |
2584 #endif /* ASSERT */ | |
2585 | |
304 | 2586 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx); |
0 | 2587 |
2588 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
2589 restore_native_result(masm, ret_type, stack_slots); | |
2590 } | |
2591 __ jmp(unlock_done); | |
2592 | |
2593 // END Slow path unlock | |
2594 | |
2595 } // synchronized | |
2596 | |
2597 // SLOW PATH Reguard the stack if needed | |
2598 | |
2599 __ bind(reguard); | |
2600 save_native_result(masm, ret_type, stack_slots); | |
304 | 2601 __ mov(r12, rsp); // remember sp |
2602 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2603 __ andptr(rsp, -16); // align stack as required by ABI | |
0 | 2604 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); |
304 | 2605 __ mov(rsp, r12); // restore sp |
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2606 __ reinit_heapbase(); |
0 | 2607 restore_native_result(masm, ret_type, stack_slots); |
2608 // and continue | |
2609 __ jmp(reguard_done); | |
2610 | |
2611 | |
2612 | |
2613 __ flush(); | |
2614 | |
2615 nmethod *nm = nmethod::new_native_nmethod(method, | |
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2616 compile_id, |
0 | 2617 masm->code(), |
2618 vep_offset, | |
2619 frame_complete, | |
2620 stack_slots / VMRegImpl::slots_per_word, | |
2621 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
2622 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), | |
2623 oop_maps); | |
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2624 |
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2625 if (is_critical_native) { |
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2626 nm->set_lazy_critical_native(true); |
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2627 } |
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2628 |
0 | 2629 return nm; |
2630 | |
2631 } | |
2632 | |
116
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2633 #ifdef HAVE_DTRACE_H |
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2634 // --------------------------------------------------------------------------- |
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2635 // Generate a dtrace nmethod for a given signature. The method takes arguments |
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2636 // in the Java compiled code convention, marshals them to the native |
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2637 // abi and then leaves nops at the position you would expect to call a native |
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2638 // function. When the probe is enabled the nops are replaced with a trap |
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2639 // instruction that dtrace inserts and the trace will cause a notification |
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2640 // to dtrace. |
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2641 // |
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2642 // The probes are only able to take primitive types and java/lang/String as |
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2643 // arguments. No other java types are allowed. Strings are converted to utf8 |
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2644 // strings so that from dtrace point of view java strings are converted to C |
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2645 // strings. There is an arbitrary fixed limit on the total space that a method |
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2646 // can use for converting the strings. (256 chars per string in the signature). |
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2647 // So any java string larger then this is truncated. |
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2648 |
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2649 static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 }; |
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2650 static bool offsets_initialized = false; |
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2651 |
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2652 |
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2653 nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm, |
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2654 methodHandle method) { |
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2655 |
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2656 |
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2657 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
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2658 // be single threaded in this method. |
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2659 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
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2660 |
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2661 if (!offsets_initialized) { |
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2662 fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize; |
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2663 fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize; |
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2664 fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize; |
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2665 fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize; |
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2666 fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize; |
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2667 fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize; |
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2668 |
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2669 fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize; |
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2670 fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize; |
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2671 fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize; |
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2672 fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize; |
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2673 fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize; |
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2674 fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize; |
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2675 fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize; |
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2676 fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize; |
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2677 |
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2678 offsets_initialized = true; |
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2679 } |
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2680 // Fill in the signature array, for the calling-convention call. |
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2681 int total_args_passed = method->size_of_parameters(); |
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2682 |
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2683 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
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2684 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
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2685 |
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2686 // The signature we are going to use for the trap that dtrace will see |
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2687 // java/lang/String is converted. We drop "this" and any other object |
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2688 // is converted to NULL. (A one-slot java/lang/Long object reference |
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2689 // is converted to a two-slot long, which is why we double the allocation). |
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2690 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
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2691 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
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2692 |
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2693 int i=0; |
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2694 int total_strings = 0; |
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2695 int first_arg_to_pass = 0; |
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2696 int total_c_args = 0; |
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2697 |
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2698 // Skip the receiver as dtrace doesn't want to see it |
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2699 if( !method->is_static() ) { |
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2700 in_sig_bt[i++] = T_OBJECT; |
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2701 first_arg_to_pass = 1; |
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2702 } |
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2703 |
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2704 // We need to convert the java args to where a native (non-jni) function |
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2705 // would expect them. To figure out where they go we convert the java |
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2706 // signature to a C signature. |
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2707 |
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2708 SignatureStream ss(method->signature()); |
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2709 for ( ; !ss.at_return_type(); ss.next()) { |
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2710 BasicType bt = ss.type(); |
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2711 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
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2712 out_sig_bt[total_c_args++] = bt; |
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2713 if( bt == T_OBJECT) { |
2177
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2714 Symbol* s = ss.as_symbol_or_null(); // symbol is created |
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2715 if (s == vmSymbols::java_lang_String()) { |
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2716 total_strings++; |
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2717 out_sig_bt[total_c_args-1] = T_ADDRESS; |
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2718 } else if (s == vmSymbols::java_lang_Boolean() || |
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2719 s == vmSymbols::java_lang_Character() || |
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2720 s == vmSymbols::java_lang_Byte() || |
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2721 s == vmSymbols::java_lang_Short() || |
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2722 s == vmSymbols::java_lang_Integer() || |
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2723 s == vmSymbols::java_lang_Float()) { |
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2724 out_sig_bt[total_c_args-1] = T_INT; |
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2725 } else if (s == vmSymbols::java_lang_Long() || |
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2726 s == vmSymbols::java_lang_Double()) { |
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2727 out_sig_bt[total_c_args-1] = T_LONG; |
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2728 out_sig_bt[total_c_args++] = T_VOID; |
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2729 } |
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2730 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
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2731 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
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2732 // We convert double to long |
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2733 out_sig_bt[total_c_args-1] = T_LONG; |
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2734 out_sig_bt[total_c_args++] = T_VOID; |
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2735 } else if ( bt == T_FLOAT) { |
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2736 // We convert float to int |
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2737 out_sig_bt[total_c_args-1] = T_INT; |
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2738 } |
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2739 } |
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2740 |
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2741 assert(i==total_args_passed, "validly parsed signature"); |
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2742 |
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2743 // Now get the compiled-Java layout as input arguments |
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2744 int comp_args_on_stack; |
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2745 comp_args_on_stack = SharedRuntime::java_calling_convention( |
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2746 in_sig_bt, in_regs, total_args_passed, false); |
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2747 |
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2748 // Now figure out where the args must be stored and how much stack space |
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2749 // they require (neglecting out_preserve_stack_slots but space for storing |
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2750 // the 1st six register arguments). It's weird see int_stk_helper. |
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2751 |
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2752 int out_arg_slots; |
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2753 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); |
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2754 |
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2755 // Calculate the total number of stack slots we will need. |
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2756 |
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2757 // First count the abi requirement plus all of the outgoing args |
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2758 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
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2759 |
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2760 // Now space for the string(s) we must convert |
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2761 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1); |
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2762 for (i = 0; i < total_strings ; i++) { |
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2763 string_locs[i] = stack_slots; |
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2764 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size; |
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2765 } |
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2766 |
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2767 // Plus the temps we might need to juggle register args |
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2768 // regs take two slots each |
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2769 stack_slots += (Argument::n_int_register_parameters_c + |
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2770 Argument::n_float_register_parameters_c) * 2; |
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2771 |
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2772 |
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2773 // + 4 for return address (which we own) and saved rbp, |
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2774 |
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2775 stack_slots += 4; |
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2776 |
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2777 // Ok The space we have allocated will look like: |
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2778 // |
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2779 // |
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2780 // FP-> | | |
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2781 // |---------------------| |
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2782 // | string[n] | |
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2783 // |---------------------| <- string_locs[n] |
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2784 // | string[n-1] | |
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2785 // |---------------------| <- string_locs[n-1] |
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2786 // | ... | |
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2787 // | ... | |
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2788 // |---------------------| <- string_locs[1] |
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2789 // | string[0] | |
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2790 // |---------------------| <- string_locs[0] |
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2791 // | outbound memory | |
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2792 // | based arguments | |
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2793 // | | |
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2794 // |---------------------| |
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2795 // | | |
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2796 // SP-> | out_preserved_slots | |
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2797 // |
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2798 // |
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2799 |
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2800 // Now compute actual number of stack words we need rounding to make |
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2801 // stack properly aligned. |
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2802 stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word); |
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2803 |
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2804 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
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2805 |
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2806 intptr_t start = (intptr_t)__ pc(); |
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2807 |
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2808 // First thing make an ic check to see if we should even be here |
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2809 |
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2810 // We are free to use all registers as temps without saving them and |
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2811 // restoring them except rbp. rbp, is the only callee save register |
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2812 // as far as the interpreter and the compiler(s) are concerned. |
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2813 |
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2814 const Register ic_reg = rax; |
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2815 const Register receiver = rcx; |
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2816 Label hit; |
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2817 Label exception_pending; |
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2818 |
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2819 |
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2820 __ verify_oop(receiver); |
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2821 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
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2822 __ jcc(Assembler::equal, hit); |
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2823 |
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2824 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); |
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2825 |
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2826 // verified entry must be aligned for code patching. |
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2827 // and the first 5 bytes must be in the same cache line |
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2828 // if we align at 8 then we will be sure 5 bytes are in the same line |
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2829 __ align(8); |
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2830 |
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2831 __ bind(hit); |
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2832 |
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2833 int vep_offset = ((intptr_t)__ pc()) - start; |
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2834 |
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2835 |
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2836 // The instruction at the verified entry point must be 5 bytes or longer |
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2837 // because it can be patched on the fly by make_non_entrant. The stack bang |
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2838 // instruction fits that requirement. |
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2839 |
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2840 // Generate stack overflow check |
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2841 |
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2842 if (UseStackBanging) { |
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2843 if (stack_size <= StackShadowPages*os::vm_page_size()) { |
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2844 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); |
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2845 } else { |
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2846 __ movl(rax, stack_size); |
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2847 __ bang_stack_size(rax, rbx); |
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2848 } |
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2849 } else { |
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2850 // need a 5 byte instruction to allow MT safe patching to non-entrant |
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2851 __ fat_nop(); |
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2852 } |
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2853 |
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2854 assert(((uintptr_t)__ pc() - start - vep_offset) >= 5, |
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2855 "valid size for make_non_entrant"); |
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2856 |
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2857 // Generate a new frame for the wrapper. |
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2858 __ enter(); |
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2859 |
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2860 // -4 because return address is already present and so is saved rbp, |
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2861 if (stack_size - 2*wordSize != 0) { |
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2862 __ subq(rsp, stack_size - 2*wordSize); |
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2863 } |
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2864 |
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2865 // Frame is now completed as far a size and linkage. |
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2866 |
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2867 int frame_complete = ((intptr_t)__ pc()) - start; |
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2868 |
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2869 int c_arg, j_arg; |
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2870 |
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|
2871 // State of input register args |
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|
2872 |
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|
2873 bool live[ConcreteRegisterImpl::number_of_registers]; |
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2874 |
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|
2875 live[j_rarg0->as_VMReg()->value()] = false; |
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2876 live[j_rarg1->as_VMReg()->value()] = false; |
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|
2877 live[j_rarg2->as_VMReg()->value()] = false; |
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|
2878 live[j_rarg3->as_VMReg()->value()] = false; |
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2879 live[j_rarg4->as_VMReg()->value()] = false; |
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|
2880 live[j_rarg5->as_VMReg()->value()] = false; |
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kamg
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|
2881 |
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diff
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|
2882 live[j_farg0->as_VMReg()->value()] = false; |
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|
2883 live[j_farg1->as_VMReg()->value()] = false; |
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|
2884 live[j_farg2->as_VMReg()->value()] = false; |
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|
2885 live[j_farg3->as_VMReg()->value()] = false; |
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|
2886 live[j_farg4->as_VMReg()->value()] = false; |
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|
2887 live[j_farg5->as_VMReg()->value()] = false; |
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|
2888 live[j_farg6->as_VMReg()->value()] = false; |
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|
2889 live[j_farg7->as_VMReg()->value()] = false; |
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kamg
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|
2890 |
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diff
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|
2891 |
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|
2892 bool rax_is_zero = false; |
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|
2893 |
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|
2894 // All args (except strings) destined for the stack are moved first |
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2895 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2896 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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|
2897 VMRegPair src = in_regs[j_arg]; |
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|
2898 VMRegPair dst = out_regs[c_arg]; |
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|
2899 |
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|
2900 // Get the real reg value or a dummy (rsp) |
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|
2901 |
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|
2902 int src_reg = src.first()->is_reg() ? |
018d5b58dd4f
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|
2903 src.first()->value() : |
018d5b58dd4f
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|
2904 rsp->as_VMReg()->value(); |
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diff
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|
2905 |
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|
2906 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
018d5b58dd4f
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|
2907 (in_sig_bt[j_arg] == T_OBJECT && |
018d5b58dd4f
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|
2908 out_sig_bt[c_arg] != T_INT && |
018d5b58dd4f
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|
2909 out_sig_bt[c_arg] != T_ADDRESS && |
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|
2910 out_sig_bt[c_arg] != T_LONG); |
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kamg
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113
diff
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|
2911 |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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|
2912 live[src_reg] = !useless; |
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diff
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|
2913 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
diff
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|
2914 if (dst.first()->is_stack()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2915 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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diff
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|
2916 // Even though a string arg in a register is still live after this loop |
018d5b58dd4f
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|
2917 // after the string conversion loop (next) it will be dead so we take |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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|
2918 // advantage of that now for simpler code to manage live. |
018d5b58dd4f
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kamg
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113
diff
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|
2919 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
diff
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|
2920 live[src_reg] = false; |
018d5b58dd4f
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113
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|
2921 switch (in_sig_bt[j_arg]) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
2922 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2923 case T_ARRAY: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2924 case T_OBJECT: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2925 { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
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|
2926 Address stack_dst(rsp, reg2offset_out(dst.first())); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
2927 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2928 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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diff
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|
2929 // need to unbox a one-word value |
018d5b58dd4f
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kamg
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113
diff
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|
2930 Register in_reg = rax; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
diff
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|
2931 if ( src.first()->is_reg() ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
diff
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|
2932 in_reg = src.first()->as_Register(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2933 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
diff
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|
2934 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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|
2935 rax_is_zero = false; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2936 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2937 Label skipUnbox; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2938 __ movptr(Address(rsp, reg2offset_out(dst.first())), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
2939 (int32_t)NULL_WORD); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2940 __ testq(in_reg, in_reg); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2941 __ jcc(Assembler::zero, skipUnbox); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2942 |
165
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2943 BasicType bt = out_sig_bt[c_arg]; |
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
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|
2944 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
2945 Address src1(in_reg, box_offset); |
165
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
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|
2946 if ( bt == T_LONG ) { |
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2947 __ movq(in_reg, src1); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2948 __ movq(stack_dst, in_reg); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2949 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2950 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
2951 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
2952 __ movl(in_reg, src1); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2953 __ movl(stack_dst, in_reg); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
2954 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2955 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2956 __ bind(skipUnbox); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2957 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
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113
diff
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|
2958 // Convert the arg to NULL |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2959 if (!rax_is_zero) { |
018d5b58dd4f
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113
diff
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|
2960 __ xorq(rax, rax); |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
diff
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|
2961 rax_is_zero = true; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2962 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2963 __ movq(stack_dst, rax); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2964 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2965 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2966 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2967 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2968 case T_VOID: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2969 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2970 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2971 case T_FLOAT: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2972 // This does the right thing since we know it is destined for the |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2973 // stack |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
diff
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|
2974 float_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2975 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2976 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2977 case T_DOUBLE: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2978 // This does the right thing since we know it is destined for the |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2979 // stack |
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113
diff
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|
2980 double_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2981 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2982 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2983 case T_LONG : |
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2984 long_move(masm, src, dst); |
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2985 break; |
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2986 |
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2987 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
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2988 |
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2989 default: |
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2990 move32_64(masm, src, dst); |
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2991 } |
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|
2992 } |
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2993 |
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2994 } |
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2995 |
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2996 // If we have any strings we must store any register based arg to the stack |
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2997 // This includes any still live xmm registers too. |
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2998 |
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2999 int sid = 0; |
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3000 |
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3001 if (total_strings > 0 ) { |
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3002 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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3003 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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3004 VMRegPair src = in_regs[j_arg]; |
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3005 VMRegPair dst = out_regs[c_arg]; |
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3006 |
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3007 if (src.first()->is_reg()) { |
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3008 Address src_tmp(rbp, fp_offset[src.first()->value()]); |
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3009 |
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3010 // string oops were left untouched by the previous loop even if the |
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3011 // eventual (converted) arg is destined for the stack so park them |
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3012 // away now (except for first) |
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3013 |
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3014 if (out_sig_bt[c_arg] == T_ADDRESS) { |
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3015 Address utf8_addr = Address( |
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3016 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
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3017 if (sid != 1) { |
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3018 // The first string arg won't be killed until after the utf8 |
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3019 // conversion |
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3020 __ movq(utf8_addr, src.first()->as_Register()); |
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3021 } |
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3022 } else if (dst.first()->is_reg()) { |
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3023 if (in_sig_bt[j_arg] == T_FLOAT || in_sig_bt[j_arg] == T_DOUBLE) { |
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|
3024 |
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3025 // Convert the xmm register to an int and store it in the reserved |
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3026 // location for the eventual c register arg |
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3027 XMMRegister f = src.first()->as_XMMRegister(); |
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3028 if (in_sig_bt[j_arg] == T_FLOAT) { |
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3029 __ movflt(src_tmp, f); |
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|
3030 } else { |
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3031 __ movdbl(src_tmp, f); |
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|
3032 } |
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|
3033 } else { |
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3034 // If the arg is an oop type we don't support don't bother to store |
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3035 // it remember string was handled above. |
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3036 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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3037 (in_sig_bt[j_arg] == T_OBJECT && |
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3038 out_sig_bt[c_arg] != T_INT && |
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3039 out_sig_bt[c_arg] != T_LONG); |
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|
3040 |
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|
3041 if (!useless) { |
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3042 __ movq(src_tmp, src.first()->as_Register()); |
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|
3043 } |
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diff
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|
3044 } |
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diff
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|
3045 } |
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diff
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|
3046 } |
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|
3047 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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3048 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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3049 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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|
3050 } |
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diff
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|
3051 } |
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|
3052 |
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|
3053 // Now that the volatile registers are safe, convert all the strings |
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|
3054 sid = 0; |
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|
3055 |
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|
3056 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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3057 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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3058 if (out_sig_bt[c_arg] == T_ADDRESS) { |
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|
3059 // It's a string |
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|
3060 Address utf8_addr = Address( |
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|
3061 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
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|
3062 // The first string we find might still be in the original java arg |
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|
3063 // register |
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|
3064 |
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|
3065 VMReg src = in_regs[j_arg].first(); |
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|
3066 |
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|
3067 // We will need to eventually save the final argument to the trap |
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3068 // in the von-volatile location dedicated to src. This is the offset |
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|
3069 // from fp we will use. |
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|
3070 int src_off = src->is_reg() ? |
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|
3071 fp_offset[src->value()] : reg2offset_in(src); |
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|
3072 |
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|
3073 // This is where the argument will eventually reside |
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3074 VMRegPair dst = out_regs[c_arg]; |
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|
3075 |
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|
3076 if (src->is_reg()) { |
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3077 if (sid == 1) { |
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|
3078 __ movq(c_rarg0, src->as_Register()); |
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|
3079 } else { |
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|
3080 __ movq(c_rarg0, utf8_addr); |
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|
3081 } |
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|
3082 } else { |
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|
3083 // arg is still in the original location |
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3084 __ movq(c_rarg0, Address(rbp, reg2offset_in(src))); |
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|
3085 } |
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|
3086 Label done, convert; |
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|
3087 |
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|
3088 // see if the oop is NULL |
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|
3089 __ testq(c_rarg0, c_rarg0); |
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|
3090 __ jcc(Assembler::notEqual, convert); |
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|
3091 |
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|
3092 if (dst.first()->is_reg()) { |
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3093 // Save the ptr to utf string in the origina src loc or the tmp |
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3094 // dedicated to it |
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|
3095 __ movq(Address(rbp, src_off), c_rarg0); |
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3096 } else { |
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|
3097 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg0); |
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|
3098 } |
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|
3099 __ jmp(done); |
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|
3100 |
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|
3101 __ bind(convert); |
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|
3102 |
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|
3103 __ lea(c_rarg1, utf8_addr); |
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3104 if (dst.first()->is_reg()) { |
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3105 __ movq(Address(rbp, src_off), c_rarg1); |
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3106 } else { |
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|
3107 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1); |
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|
3108 } |
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3109 // And do the conversion |
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3110 __ call(RuntimeAddress( |
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3111 CAST_FROM_FN_PTR(address, SharedRuntime::get_utf))); |
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|
3112 |
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|
3113 __ bind(done); |
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|
3114 } |
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3115 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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3116 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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3117 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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3118 } |
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|
3119 } |
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3120 // The get_utf call killed all the c_arg registers |
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3121 live[c_rarg0->as_VMReg()->value()] = false; |
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3122 live[c_rarg1->as_VMReg()->value()] = false; |
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3123 live[c_rarg2->as_VMReg()->value()] = false; |
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3124 live[c_rarg3->as_VMReg()->value()] = false; |
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3125 live[c_rarg4->as_VMReg()->value()] = false; |
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3126 live[c_rarg5->as_VMReg()->value()] = false; |
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3127 |
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3128 live[c_farg0->as_VMReg()->value()] = false; |
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3129 live[c_farg1->as_VMReg()->value()] = false; |
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3130 live[c_farg2->as_VMReg()->value()] = false; |
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3131 live[c_farg3->as_VMReg()->value()] = false; |
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3132 live[c_farg4->as_VMReg()->value()] = false; |
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3133 live[c_farg5->as_VMReg()->value()] = false; |
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3134 live[c_farg6->as_VMReg()->value()] = false; |
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3135 live[c_farg7->as_VMReg()->value()] = false; |
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3136 } |
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|
3137 |
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3138 // Now we can finally move the register args to their desired locations |
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3139 |
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3140 rax_is_zero = false; |
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3141 |
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3142 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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3143 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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3144 |
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3145 VMRegPair src = in_regs[j_arg]; |
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3146 VMRegPair dst = out_regs[c_arg]; |
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3147 |
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3148 // Only need to look for args destined for the interger registers (since we |
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3149 // convert float/double args to look like int/long outbound) |
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3150 if (dst.first()->is_reg()) { |
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3151 Register r = dst.first()->as_Register(); |
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3152 |
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3153 // Check if the java arg is unsupported and thereofre useless |
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3154 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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3155 (in_sig_bt[j_arg] == T_OBJECT && |
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3156 out_sig_bt[c_arg] != T_INT && |
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3157 out_sig_bt[c_arg] != T_ADDRESS && |
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3158 out_sig_bt[c_arg] != T_LONG); |
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|
3159 |
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|
3160 |
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|
3161 // If we're going to kill an existing arg save it first |
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3162 if (live[dst.first()->value()]) { |
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3163 // you can't kill yourself |
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3164 if (src.first() != dst.first()) { |
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3165 __ movq(Address(rbp, fp_offset[dst.first()->value()]), r); |
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|
3166 } |
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|
3167 } |
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|
3168 if (src.first()->is_reg()) { |
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3169 if (live[src.first()->value()] ) { |
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3170 if (in_sig_bt[j_arg] == T_FLOAT) { |
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3171 __ movdl(r, src.first()->as_XMMRegister()); |
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3172 } else if (in_sig_bt[j_arg] == T_DOUBLE) { |
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|
3173 __ movdq(r, src.first()->as_XMMRegister()); |
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3174 } else if (r != src.first()->as_Register()) { |
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|
3175 if (!useless) { |
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|
3176 __ movq(r, src.first()->as_Register()); |
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|
3177 } |
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diff
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|
3178 } |
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113
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|
3179 } else { |
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|
3180 // If the arg is an oop type we don't support don't bother to store |
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|
3181 // it |
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|
3182 if (!useless) { |
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3183 if (in_sig_bt[j_arg] == T_DOUBLE || |
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3184 in_sig_bt[j_arg] == T_LONG || |
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3185 in_sig_bt[j_arg] == T_OBJECT ) { |
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3186 __ movq(r, Address(rbp, fp_offset[src.first()->value()])); |
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|
3187 } else { |
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|
3188 __ movl(r, Address(rbp, fp_offset[src.first()->value()])); |
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|
3189 } |
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|
3190 } |
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|
3191 } |
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|
3192 live[src.first()->value()] = false; |
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3193 } else if (!useless) { |
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3194 // full sized move even for int should be ok |
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3195 __ movq(r, Address(rbp, reg2offset_in(src.first()))); |
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|
3196 } |
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|
3197 |
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3198 // At this point r has the original java arg in the final location |
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3199 // (assuming it wasn't useless). If the java arg was an oop |
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3200 // we have a bit more to do |
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|
3201 |
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3202 if (in_sig_bt[j_arg] == T_ARRAY || in_sig_bt[j_arg] == T_OBJECT ) { |
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3203 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
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3204 // need to unbox a one-word value |
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|
3205 Label skip; |
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|
3206 __ testq(r, r); |
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3207 __ jcc(Assembler::equal, skip); |
165
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3208 BasicType bt = out_sig_bt[c_arg]; |
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3209 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
116
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3210 Address src1(r, box_offset); |
165
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3211 if ( bt == T_LONG ) { |
116
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3212 __ movq(r, src1); |
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|
3213 } else { |
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3214 __ movl(r, src1); |
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|
3215 } |
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|
3216 __ bind(skip); |
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|
3217 |
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3218 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
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|
3219 // Convert the arg to NULL |
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3220 __ xorq(r, r); |
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3221 } |
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3222 } |
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3223 |
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3224 // dst can longer be holding an input value |
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3225 live[dst.first()->value()] = false; |
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3226 } |
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3227 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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3228 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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3229 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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3230 } |
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3231 } |
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3232 |
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3233 |
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3234 // Ok now we are done. Need to place the nop that dtrace wants in order to |
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3235 // patch in the trap |
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3236 int patch_offset = ((intptr_t)__ pc()) - start; |
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3237 |
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3238 __ nop(); |
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3239 |
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3240 |
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3241 // Return |
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3242 |
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3243 __ leave(); |
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3244 __ ret(0); |
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3245 |
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3246 __ flush(); |
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3247 |
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3248 nmethod *nm = nmethod::new_dtrace_nmethod( |
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3249 method, masm->code(), vep_offset, patch_offset, frame_complete, |
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3250 stack_slots / VMRegImpl::slots_per_word); |
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3251 return nm; |
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3252 |
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3253 } |
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3254 |
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3255 #endif // HAVE_DTRACE_H |
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3256 |
0 | 3257 // this function returns the adjust size (in number of words) to a c2i adapter |
3258 // activation for use during deoptimization | |
3259 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { | |
1506 | 3260 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
0 | 3261 } |
3262 | |
3263 | |
3264 uint SharedRuntime::out_preserve_stack_slots() { | |
3265 return 0; | |
3266 } | |
3267 | |
3268 //------------------------------generate_deopt_blob---------------------------- | |
3269 void SharedRuntime::generate_deopt_blob() { | |
3270 // Allocate space for the code | |
3271 ResourceMark rm; | |
3272 // Setup code generation tools | |
3273 CodeBuffer buffer("deopt_blob", 2048, 1024); | |
3274 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3275 int frame_size_in_words; | |
3276 OopMap* map = NULL; | |
3277 OopMapSet *oop_maps = new OopMapSet(); | |
3278 | |
3279 // ------------- | |
3280 // This code enters when returning to a de-optimized nmethod. A return | |
3281 // address has been pushed on the the stack, and return values are in | |
3282 // registers. | |
3283 // If we are doing a normal deopt then we were called from the patched | |
3284 // nmethod from the point we returned to the nmethod. So the return | |
3285 // address on the stack is wrong by NativeCall::instruction_size | |
3286 // We will adjust the value so it looks like we have the original return | |
3287 // address on the stack (like when we eagerly deoptimized). | |
3288 // In the case of an exception pending when deoptimizing, we enter | |
3289 // with a return address on the stack that points after the call we patched | |
3290 // into the exception handler. We have the following register state from, | |
3291 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp). | |
3292 // rax: exception oop | |
3293 // rbx: exception handler | |
3294 // rdx: throwing pc | |
3295 // So in this case we simply jam rdx into the useless return address and | |
3296 // the stack looks just like we want. | |
3297 // | |
3298 // At this point we need to de-opt. We save the argument return | |
3299 // registers. We call the first C routine, fetch_unroll_info(). This | |
3300 // routine captures the return values and returns a structure which | |
3301 // describes the current frame size and the sizes of all replacement frames. | |
3302 // The current frame is compiled code and may contain many inlined | |
3303 // functions, each with their own JVM state. We pop the current frame, then | |
3304 // push all the new frames. Then we call the C routine unpack_frames() to | |
3305 // populate these frames. Finally unpack_frames() returns us the new target | |
3306 // address. Notice that callee-save registers are BLOWN here; they have | |
3307 // already been captured in the vframeArray at the time the return PC was | |
3308 // patched. | |
3309 address start = __ pc(); | |
3310 Label cont; | |
3311 | |
3312 // Prolog for non exception case! | |
3313 | |
3314 // Save everything in sight. | |
3315 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3316 | |
3317 // Normal deoptimization. Save exec mode for unpack_frames. | |
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3318 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved |
0 | 3319 __ jmp(cont); |
304 | 3320 |
3321 int reexecute_offset = __ pc() - start; | |
3322 | |
3323 // Reexecute case | |
3324 // return address is the pc describes what bci to do re-execute at | |
3325 | |
3326 // No need to update map as each call to save_live_registers will produce identical oopmap | |
3327 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3328 | |
3329 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved | |
3330 __ jmp(cont); | |
3331 | |
0 | 3332 int exception_offset = __ pc() - start; |
3333 | |
3334 // Prolog for exception case | |
3335 | |
304 | 3336 // all registers are dead at this entry point, except for rax, and |
3337 // rdx which contain the exception oop and exception pc | |
3338 // respectively. Set them in TLS and fall thru to the | |
3339 // unpack_with_exception_in_tls entry point. | |
3340 | |
3341 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
3342 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax); | |
3343 | |
3344 int exception_in_tls_offset = __ pc() - start; | |
3345 | |
3346 // new implementation because exception oop is now passed in JavaThread | |
3347 | |
3348 // Prolog for exception case | |
3349 // All registers must be preserved because they might be used by LinearScan | |
3350 // Exceptiop oop and throwing PC are passed in JavaThread | |
3351 // tos: stack at point of call to method that threw the exception (i.e. only | |
3352 // args are on the stack, no return address) | |
3353 | |
3354 // make room on stack for the return address | |
3355 // It will be patched later with the throwing pc. The correct value is not | |
3356 // available now because loading it from memory would destroy registers. | |
3357 __ push(0); | |
0 | 3358 |
3359 // Save everything in sight. | |
3360 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3361 | |
304 | 3362 // Now it is safe to overwrite any register |
3363 | |
0 | 3364 // Deopt during an exception. Save exec mode for unpack_frames. |
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3365 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved |
0 | 3366 |
304 | 3367 // load throwing pc from JavaThread and patch it as the return address |
3368 // of the current frame. Then clear the field in JavaThread | |
3369 | |
3370 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
3371 __ movptr(Address(rbp, wordSize), rdx); | |
3372 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
3373 | |
3374 #ifdef ASSERT | |
3375 // verify that there is really an exception oop in JavaThread | |
3376 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
3377 __ verify_oop(rax); | |
3378 | |
3379 // verify that there is no pending exception | |
3380 Label no_pending_exception; | |
3381 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); | |
3382 __ testptr(rax, rax); | |
3383 __ jcc(Assembler::zero, no_pending_exception); | |
3384 __ stop("must not have pending exception here"); | |
3385 __ bind(no_pending_exception); | |
3386 #endif | |
3387 | |
0 | 3388 __ bind(cont); |
3389 | |
3390 // Call C code. Need thread and this frame, but NOT official VM entry | |
3391 // crud. We cannot block on this call, no GC can happen. | |
3392 // | |
3393 // UnrollBlock* fetch_unroll_info(JavaThread* thread) | |
3394 | |
3395 // fetch_unroll_info needs to call last_java_frame(). | |
3396 | |
3397 __ set_last_Java_frame(noreg, noreg, NULL); | |
3398 #ifdef ASSERT | |
3399 { Label L; | |
304 | 3400 __ cmpptr(Address(r15_thread, |
0 | 3401 JavaThread::last_Java_fp_offset()), |
304 | 3402 (int32_t)0); |
0 | 3403 __ jcc(Assembler::equal, L); |
3404 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared"); | |
3405 __ bind(L); | |
3406 } | |
3407 #endif // ASSERT | |
304 | 3408 __ mov(c_rarg0, r15_thread); |
0 | 3409 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); |
3410 | |
3411 // Need to have an oopmap that tells fetch_unroll_info where to | |
3412 // find any register it might need. | |
3413 oop_maps->add_gc_map(__ pc() - start, map); | |
3414 | |
3415 __ reset_last_Java_frame(false, false); | |
3416 | |
3417 // Load UnrollBlock* into rdi | |
304 | 3418 __ mov(rdi, rax); |
3419 | |
3420 Label noException; | |
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3421 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending? |
304 | 3422 __ jcc(Assembler::notEqual, noException); |
3423 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
3424 // QQQ this is useless it was NULL above | |
3425 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
3426 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); | |
3427 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
3428 | |
3429 __ verify_oop(rax); | |
3430 | |
3431 // Overwrite the result registers with the exception results. | |
3432 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
3433 // I think this is useless | |
3434 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx); | |
3435 | |
3436 __ bind(noException); | |
0 | 3437 |
3438 // Only register save data is on the stack. | |
3439 // Now restore the result registers. Everything else is either dead | |
3440 // or captured in the vframeArray. | |
3441 RegisterSaver::restore_result_registers(masm); | |
3442 | |
3443 // All of the register save area has been popped of the stack. Only the | |
3444 // return address remains. | |
3445 | |
3446 // Pop all the frames we must move/replace. | |
3447 // | |
3448 // Frame picture (youngest to oldest) | |
3449 // 1: self-frame (no frame link) | |
3450 // 2: deopting frame (no frame link) | |
3451 // 3: caller of deopting frame (could be compiled/interpreted). | |
3452 // | |
3453 // Note: by leaving the return address of self-frame on the stack | |
3454 // and using the size of frame 2 to adjust the stack | |
3455 // when we are done the return to frame 3 will still be on the stack. | |
3456 | |
3457 // Pop deoptimized frame | |
3458 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); | |
304 | 3459 __ addptr(rsp, rcx); |
0 | 3460 |
3461 // rsp should be pointing at the return address to the caller (3) | |
3462 | |
3463 // Stack bang to make sure there's enough room for these interpreter frames. | |
3464 if (UseStackBanging) { | |
3465 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
3466 __ bang_stack_size(rbx, rcx); | |
3467 } | |
3468 | |
3469 // Load address of array of frame pcs into rcx | |
304 | 3470 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
0 | 3471 |
3472 // Trash the old pc | |
304 | 3473 __ addptr(rsp, wordSize); |
0 | 3474 |
3475 // Load address of array of frame sizes into rsi | |
304 | 3476 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
0 | 3477 |
3478 // Load counter into rdx | |
3479 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
3480 | |
3481 // Pick up the initial fp we should save | |
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3482 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
0 | 3483 |
3484 // Now adjust the caller's stack to make up for the extra locals | |
3485 // but record the original sp so that we can save it in the skeletal interpreter | |
3486 // frame and the stack walking of interpreter_sender will get the unextended sp | |
3487 // value and not the "real" sp value. | |
3488 | |
3489 const Register sender_sp = r8; | |
3490 | |
304 | 3491 __ mov(sender_sp, rsp); |
0 | 3492 __ movl(rbx, Address(rdi, |
3493 Deoptimization::UnrollBlock:: | |
3494 caller_adjustment_offset_in_bytes())); | |
304 | 3495 __ subptr(rsp, rbx); |
0 | 3496 |
3497 // Push interpreter frames in a loop | |
3498 Label loop; | |
3499 __ bind(loop); | |
304 | 3500 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
3501 #ifdef CC_INTERP | |
3502 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and | |
3503 #ifdef ASSERT | |
3504 __ push(0xDEADDEAD); // Make a recognizable pattern | |
3505 __ push(0xDEADDEAD); | |
3506 #else /* ASSERT */ | |
3507 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" | |
3508 #endif /* ASSERT */ | |
3509 #else | |
3510 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand | |
3511 #endif // CC_INTERP | |
3512 __ pushptr(Address(rcx, 0)); // Save return address | |
0 | 3513 __ enter(); // Save old & set new ebp |
304 | 3514 __ subptr(rsp, rbx); // Prolog |
3515 #ifdef CC_INTERP | |
3516 __ movptr(Address(rbp, | |
3517 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), | |
3518 sender_sp); // Make it walkable | |
3519 #else /* CC_INTERP */ | |
0 | 3520 // This value is corrected by layout_activation_impl |
304 | 3521 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
3522 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable | |
3523 #endif /* CC_INTERP */ | |
3524 __ mov(sender_sp, rsp); // Pass sender_sp to next frame | |
3525 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
3526 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
0 | 3527 __ decrementl(rdx); // Decrement counter |
3528 __ jcc(Assembler::notZero, loop); | |
304 | 3529 __ pushptr(Address(rcx, 0)); // Save final return address |
0 | 3530 |
3531 // Re-push self-frame | |
3532 __ enter(); // Save old & set new ebp | |
3533 | |
3534 // Allocate a full sized register save area. | |
3535 // Return address and rbp are in place, so we allocate two less words. | |
304 | 3536 __ subptr(rsp, (frame_size_in_words - 2) * wordSize); |
0 | 3537 |
3538 // Restore frame locals after moving the frame | |
3539 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0); | |
304 | 3540 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); |
0 | 3541 |
3542 // Call C code. Need thread but NOT official VM entry | |
3543 // crud. We cannot block on this call, no GC can happen. Call should | |
3544 // restore return values to their stack-slots with the new SP. | |
3545 // | |
3546 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode) | |
3547 | |
3548 // Use rbp because the frames look interpreted now | |
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3549 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
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3550 // Don't need the precise return PC here, just precise enough to point into this code blob. |
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3551 address the_pc = __ pc(); |
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3552 __ set_last_Java_frame(noreg, rbp, the_pc); |
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3553 |
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3554 __ andptr(rsp, -(StackAlignmentInBytes)); // Fix stack alignment as required by ABI |
304 | 3555 __ mov(c_rarg0, r15_thread); |
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3556 __ movl(c_rarg1, r14); // second arg: exec_mode |
0 | 3557 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); |
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3558 // Revert SP alignment after call since we're going to do some SP relative addressing below |
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3559 __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset())); |
0 | 3560 |
3561 // Set an oopmap for the call site | |
4057
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3562 // Use the same PC we used for the last java frame |
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3563 oop_maps->add_gc_map(the_pc - start, |
0 | 3564 new OopMap( frame_size_in_words, 0 )); |
3565 | |
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3566 // Clear fp AND pc |
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3567 __ reset_last_Java_frame(true, true); |
0 | 3568 |
3569 // Collect return values | |
3570 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes())); | |
304 | 3571 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes())); |
3572 // I think this is useless (throwing pc?) | |
3573 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes())); | |
0 | 3574 |
3575 // Pop self-frame. | |
3576 __ leave(); // Epilog | |
3577 | |
3578 // Jump to interpreter | |
3579 __ ret(0); | |
3580 | |
3581 // Make sure all code is generated | |
3582 masm->flush(); | |
3583 | |
304 | 3584 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); |
3585 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
0 | 3586 } |
3587 | |
3588 #ifdef COMPILER2 | |
3589 //------------------------------generate_uncommon_trap_blob-------------------- | |
3590 void SharedRuntime::generate_uncommon_trap_blob() { | |
3591 // Allocate space for the code | |
3592 ResourceMark rm; | |
3593 // Setup code generation tools | |
3594 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024); | |
3595 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3596 | |
3597 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
3598 | |
3599 address start = __ pc(); | |
3600 | |
3601 // Push self-frame. We get here with a return address on the | |
3602 // stack, so rsp is 8-byte aligned until we allocate our frame. | |
304 | 3603 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog! |
0 | 3604 |
3605 // No callee saved registers. rbp is assumed implicitly saved | |
304 | 3606 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
0 | 3607 |
3608 // compiler left unloaded_class_index in j_rarg0 move to where the | |
3609 // runtime expects it. | |
3610 __ movl(c_rarg1, j_rarg0); | |
3611 | |
3612 __ set_last_Java_frame(noreg, noreg, NULL); | |
3613 | |
3614 // Call C code. Need thread but NOT official VM entry | |
3615 // crud. We cannot block on this call, no GC can happen. Call should | |
3616 // capture callee-saved registers as well as return values. | |
3617 // Thread is in rdi already. | |
3618 // | |
3619 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index); | |
3620 | |
304 | 3621 __ mov(c_rarg0, r15_thread); |
0 | 3622 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
3623 | |
3624 // Set an oopmap for the call site | |
3625 OopMapSet* oop_maps = new OopMapSet(); | |
3626 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0); | |
3627 | |
3628 // location of rbp is known implicitly by the frame sender code | |
3629 | |
3630 oop_maps->add_gc_map(__ pc() - start, map); | |
3631 | |
3632 __ reset_last_Java_frame(false, false); | |
3633 | |
3634 // Load UnrollBlock* into rdi | |
304 | 3635 __ mov(rdi, rax); |
0 | 3636 |
3637 // Pop all the frames we must move/replace. | |
3638 // | |
3639 // Frame picture (youngest to oldest) | |
3640 // 1: self-frame (no frame link) | |
3641 // 2: deopting frame (no frame link) | |
3642 // 3: caller of deopting frame (could be compiled/interpreted). | |
3643 | |
3644 // Pop self-frame. We have no frame, and must rely only on rax and rsp. | |
304 | 3645 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog! |
0 | 3646 |
3647 // Pop deoptimized frame (int) | |
3648 __ movl(rcx, Address(rdi, | |
3649 Deoptimization::UnrollBlock:: | |
3650 size_of_deoptimized_frame_offset_in_bytes())); | |
304 | 3651 __ addptr(rsp, rcx); |
0 | 3652 |
3653 // rsp should be pointing at the return address to the caller (3) | |
3654 | |
3655 // Stack bang to make sure there's enough room for these interpreter frames. | |
3656 if (UseStackBanging) { | |
3657 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
3658 __ bang_stack_size(rbx, rcx); | |
3659 } | |
3660 | |
3661 // Load address of array of frame pcs into rcx (address*) | |
304 | 3662 __ movptr(rcx, |
3663 Address(rdi, | |
3664 Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); | |
0 | 3665 |
3666 // Trash the return pc | |
304 | 3667 __ addptr(rsp, wordSize); |
0 | 3668 |
3669 // Load address of array of frame sizes into rsi (intptr_t*) | |
304 | 3670 __ movptr(rsi, Address(rdi, |
3671 Deoptimization::UnrollBlock:: | |
3672 frame_sizes_offset_in_bytes())); | |
0 | 3673 |
3674 // Counter | |
3675 __ movl(rdx, Address(rdi, | |
3676 Deoptimization::UnrollBlock:: | |
3677 number_of_frames_offset_in_bytes())); // (int) | |
3678 | |
3679 // Pick up the initial fp we should save | |
304 | 3680 __ movptr(rbp, |
3681 Address(rdi, | |
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3682 Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
0 | 3683 |
3684 // Now adjust the caller's stack to make up for the extra locals but | |
3685 // record the original sp so that we can save it in the skeletal | |
3686 // interpreter frame and the stack walking of interpreter_sender | |
3687 // will get the unextended sp value and not the "real" sp value. | |
3688 | |
3689 const Register sender_sp = r8; | |
3690 | |
304 | 3691 __ mov(sender_sp, rsp); |
0 | 3692 __ movl(rbx, Address(rdi, |
3693 Deoptimization::UnrollBlock:: | |
3694 caller_adjustment_offset_in_bytes())); // (int) | |
304 | 3695 __ subptr(rsp, rbx); |
0 | 3696 |
3697 // Push interpreter frames in a loop | |
3698 Label loop; | |
3699 __ bind(loop); | |
304 | 3700 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
3701 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand | |
3702 __ pushptr(Address(rcx, 0)); // Save return address | |
3703 __ enter(); // Save old & set new rbp | |
3704 __ subptr(rsp, rbx); // Prolog | |
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3705 #ifdef CC_INTERP |
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3706 __ movptr(Address(rbp, |
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3707 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
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3708 sender_sp); // Make it walkable |
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3709 #else // CC_INTERP |
304 | 3710 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), |
3711 sender_sp); // Make it walkable | |
0 | 3712 // This value is corrected by layout_activation_impl |
304 | 3713 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
520
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3714 #endif // CC_INTERP |
304 | 3715 __ mov(sender_sp, rsp); // Pass sender_sp to next frame |
3716 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
3717 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
3718 __ decrementl(rdx); // Decrement counter | |
0 | 3719 __ jcc(Assembler::notZero, loop); |
304 | 3720 __ pushptr(Address(rcx, 0)); // Save final return address |
0 | 3721 |
3722 // Re-push self-frame | |
3723 __ enter(); // Save old & set new rbp | |
304 | 3724 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt); |
0 | 3725 // Prolog |
3726 | |
3727 // Use rbp because the frames look interpreted now | |
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3728 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
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3729 // Don't need the precise return PC here, just precise enough to point into this code blob. |
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3730 address the_pc = __ pc(); |
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3731 __ set_last_Java_frame(noreg, rbp, the_pc); |
0 | 3732 |
3733 // Call C code. Need thread but NOT official VM entry | |
3734 // crud. We cannot block on this call, no GC can happen. Call should | |
3735 // restore return values to their stack-slots with the new SP. | |
3736 // Thread is in rdi already. | |
3737 // | |
3738 // BasicType unpack_frames(JavaThread* thread, int exec_mode); | |
3739 | |
4057
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3740 __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI |
304 | 3741 __ mov(c_rarg0, r15_thread); |
0 | 3742 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap); |
3743 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
3744 | |
3745 // Set an oopmap for the call site | |
4057
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3746 // Use the same PC we used for the last java frame |
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3747 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
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3748 |
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3749 // Clear fp AND pc |
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3750 __ reset_last_Java_frame(true, true); |
0 | 3751 |
3752 // Pop self-frame. | |
3753 __ leave(); // Epilog | |
3754 | |
3755 // Jump to interpreter | |
3756 __ ret(0); | |
3757 | |
3758 // Make sure all code is generated | |
3759 masm->flush(); | |
3760 | |
3761 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, | |
3762 SimpleRuntimeFrame::framesize >> 1); | |
3763 } | |
3764 #endif // COMPILER2 | |
3765 | |
3766 | |
3767 //------------------------------generate_handler_blob------ | |
3768 // | |
3769 // Generate a special Compile2Runtime blob that saves all registers, | |
3770 // and setup oopmap. | |
3771 // | |
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3772 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { |
0 | 3773 assert(StubRoutines::forward_exception_entry() != NULL, |
3774 "must be generated before"); | |
3775 | |
3776 ResourceMark rm; | |
3777 OopMapSet *oop_maps = new OopMapSet(); | |
3778 OopMap* map; | |
3779 | |
3780 // Allocate space for the code. Setup code generation tools. | |
3781 CodeBuffer buffer("handler_blob", 2048, 1024); | |
3782 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3783 | |
3784 address start = __ pc(); | |
3785 address call_pc = NULL; | |
3786 int frame_size_in_words; | |
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3787 bool cause_return = (poll_type == POLL_AT_RETURN); |
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3788 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP); |
0 | 3789 |
3790 // Make room for return address (or push it again) | |
3791 if (!cause_return) { | |
304 | 3792 __ push(rbx); |
0 | 3793 } |
3794 | |
3795 // Save registers, fpu state, and flags | |
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3796 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words, save_vectors); |
0 | 3797 |
3798 // The following is basically a call_VM. However, we need the precise | |
3799 // address of the call in order to generate an oopmap. Hence, we do all the | |
3800 // work outselves. | |
3801 | |
3802 __ set_last_Java_frame(noreg, noreg, NULL); | |
3803 | |
3804 // The return address must always be correct so that frame constructor never | |
3805 // sees an invalid pc. | |
3806 | |
3807 if (!cause_return) { | |
3808 // overwrite the dummy value we pushed on entry | |
304 | 3809 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset())); |
3810 __ movptr(Address(rbp, wordSize), c_rarg0); | |
0 | 3811 } |
3812 | |
3813 // Do the call | |
304 | 3814 __ mov(c_rarg0, r15_thread); |
0 | 3815 __ call(RuntimeAddress(call_ptr)); |
3816 | |
3817 // Set an oopmap for the call site. This oopmap will map all | |
3818 // oop-registers and debug-info registers as callee-saved. This | |
3819 // will allow deoptimization at this safepoint to find all possible | |
3820 // debug-info recordings, as well as let GC find all oops. | |
3821 | |
3822 oop_maps->add_gc_map( __ pc() - start, map); | |
3823 | |
3824 Label noException; | |
3825 | |
3826 __ reset_last_Java_frame(false, false); | |
3827 | |
304 | 3828 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 3829 __ jcc(Assembler::equal, noException); |
3830 | |
3831 // Exception pending | |
3832 | |
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3833 RegisterSaver::restore_live_registers(masm, save_vectors); |
0 | 3834 |
3835 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
3836 | |
3837 // No exception case | |
3838 __ bind(noException); | |
3839 | |
3840 // Normal exit, restore registers and exit. | |
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3841 RegisterSaver::restore_live_registers(masm, save_vectors); |
0 | 3842 |
3843 __ ret(0); | |
3844 | |
3845 // Make sure all code is generated | |
3846 masm->flush(); | |
3847 | |
3848 // Fill-out other meta info | |
3849 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); | |
3850 } | |
3851 | |
3852 // | |
3853 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
3854 // | |
3855 // Generate a stub that calls into vm to find out the proper destination | |
3856 // of a java call. All the argument registers are live at this point | |
3857 // but since this is generic code we don't know what they are and the caller | |
3858 // must do any gc of the args. | |
3859 // | |
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3860 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
0 | 3861 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
3862 | |
3863 // allocate space for the code | |
3864 ResourceMark rm; | |
3865 | |
3866 CodeBuffer buffer(name, 1000, 512); | |
3867 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3868 | |
3869 int frame_size_in_words; | |
3870 | |
3871 OopMapSet *oop_maps = new OopMapSet(); | |
3872 OopMap* map = NULL; | |
3873 | |
3874 int start = __ offset(); | |
3875 | |
3876 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3877 | |
3878 int frame_complete = __ offset(); | |
3879 | |
3880 __ set_last_Java_frame(noreg, noreg, NULL); | |
3881 | |
304 | 3882 __ mov(c_rarg0, r15_thread); |
0 | 3883 |
3884 __ call(RuntimeAddress(destination)); | |
3885 | |
3886 | |
3887 // Set an oopmap for the call site. | |
3888 // We need this not only for callee-saved registers, but also for volatile | |
3889 // registers that the compiler might be keeping live across a safepoint. | |
3890 | |
3891 oop_maps->add_gc_map( __ offset() - start, map); | |
3892 | |
3893 // rax contains the address we are going to jump to assuming no exception got installed | |
3894 | |
3895 // clear last_Java_sp | |
3896 __ reset_last_Java_frame(false, false); | |
3897 // check for pending exceptions | |
3898 Label pending; | |
304 | 3899 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 3900 __ jcc(Assembler::notEqual, pending); |
3901 | |
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3902 // get the returned Method* |
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3903 __ get_vm_result_2(rbx, r15_thread); |
304 | 3904 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx); |
3905 | |
3906 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
0 | 3907 |
3908 RegisterSaver::restore_live_registers(masm); | |
3909 | |
3910 // We are back the the original state on entry and ready to go. | |
3911 | |
3912 __ jmp(rax); | |
3913 | |
3914 // Pending exception after the safepoint | |
3915 | |
3916 __ bind(pending); | |
3917 | |
3918 RegisterSaver::restore_live_registers(masm); | |
3919 | |
3920 // exception pending => remove activation and forward to exception handler | |
3921 | |
3922 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD); | |
3923 | |
304 | 3924 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); |
0 | 3925 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
3926 | |
3927 // ------------- | |
3928 // make sure all code is generated | |
3929 masm->flush(); | |
3930 | |
3931 // return the blob | |
3932 // frame_size_words or bytes?? | |
3933 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true); | |
3934 } | |
3935 | |
3936 | |
3937 #ifdef COMPILER2 | |
3938 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame | |
3939 // | |
3940 //------------------------------generate_exception_blob--------------------------- | |
3941 // creates exception blob at the end | |
3942 // Using exception blob, this code is jumped from a compiled method. | |
3943 // (see emit_exception_handler in x86_64.ad file) | |
3944 // | |
3945 // Given an exception pc at a call we call into the runtime for the | |
3946 // handler in this method. This handler might merely restore state | |
3947 // (i.e. callee save registers) unwind the frame and jump to the | |
3948 // exception handler for the nmethod if there is no Java level handler | |
3949 // for the nmethod. | |
3950 // | |
3951 // This code is entered with a jmp. | |
3952 // | |
3953 // Arguments: | |
3954 // rax: exception oop | |
3955 // rdx: exception pc | |
3956 // | |
3957 // Results: | |
3958 // rax: exception oop | |
3959 // rdx: exception pc in caller or ??? | |
3960 // destination: exception handler of caller | |
3961 // | |
3962 // Note: the exception pc MUST be at a call (precise debug information) | |
3963 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved. | |
3964 // | |
3965 | |
3966 void OptoRuntime::generate_exception_blob() { | |
3967 assert(!OptoRuntime::is_callee_saved_register(RDX_num), ""); | |
3968 assert(!OptoRuntime::is_callee_saved_register(RAX_num), ""); | |
3969 assert(!OptoRuntime::is_callee_saved_register(RCX_num), ""); | |
3970 | |
3971 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
3972 | |
3973 // Allocate space for the code | |
3974 ResourceMark rm; | |
3975 // Setup code generation tools | |
3976 CodeBuffer buffer("exception_blob", 2048, 1024); | |
3977 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3978 | |
3979 | |
3980 address start = __ pc(); | |
3981 | |
3982 // Exception pc is 'return address' for stack walker | |
304 | 3983 __ push(rdx); |
3984 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog | |
0 | 3985 |
3986 // Save callee-saved registers. See x86_64.ad. | |
3987 | |
3988 // rbp is an implicitly saved callee saved register (i.e. the calling | |
3989 // convention will save restore it in prolog/epilog) Other than that | |
3990 // there are no callee save registers now that adapter frames are gone. | |
3991 | |
304 | 3992 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
0 | 3993 |
3994 // Store exception in Thread object. We cannot pass any arguments to the | |
3995 // handle_exception call, since we do not want to make any assumption | |
3996 // about the size of the frame where the exception happened in. | |
3997 // c_rarg0 is either rdi (Linux) or rcx (Windows). | |
304 | 3998 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax); |
3999 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
0 | 4000 |
4001 // This call does all the hard work. It checks if an exception handler | |
4002 // exists in the method. | |
4003 // If so, it returns the handler address. | |
4004 // If not, it prepares for stack-unwinding, restoring the callee-save | |
4005 // registers of the frame being removed. | |
4006 // | |
4007 // address OptoRuntime::handle_exception_C(JavaThread* thread) | |
4008 | |
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4009 // At a method handle call, the stack may not be properly aligned |
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4010 // when returning with an exception. |
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4011 address the_pc = __ pc(); |
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4012 __ set_last_Java_frame(noreg, noreg, the_pc); |
304 | 4013 __ mov(c_rarg0, r15_thread); |
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4014 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack |
0 | 4015 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C))); |
4016 | |
4017 // Set an oopmap for the call site. This oopmap will only be used if we | |
4018 // are unwinding the stack. Hence, all locations will be dead. | |
4019 // Callee-saved registers will be the same as the frame above (i.e., | |
4020 // handle_exception_stub), since they were restored when we got the | |
4021 // exception. | |
4022 | |
4023 OopMapSet* oop_maps = new OopMapSet(); | |
4024 | |
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4025 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
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4026 |
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4027 __ reset_last_Java_frame(false, true); |
0 | 4028 |
4029 // Restore callee-saved registers | |
4030 | |
4031 // rbp is an implicitly saved callee saved register (i.e. the calling | |
4032 // convention will save restore it in prolog/epilog) Other than that | |
4033 // there are no callee save registers no that adapter frames are gone. | |
4034 | |
304 | 4035 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt)); |
4036 | |
4037 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog | |
4038 __ pop(rdx); // No need for exception pc anymore | |
0 | 4039 |
4040 // rax: exception handler | |
4041 | |
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4042 // Restore SP from BP if the exception PC is a MethodHandle call site. |
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4043 __ cmpl(Address(r15_thread, JavaThread::is_method_handle_return_offset()), 0); |
1567 | 4044 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
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4045 |
0 | 4046 // We have a handler in rax (could be deopt blob). |
304 | 4047 __ mov(r8, rax); |
0 | 4048 |
4049 // Get the exception oop | |
304 | 4050 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); |
0 | 4051 // Get the exception pc in case we are deoptimized |
304 | 4052 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); |
0 | 4053 #ifdef ASSERT |
4054 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD); | |
4055 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD); | |
4056 #endif | |
4057 // Clear the exception oop so GC no longer processes it as a root. | |
4058 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD); | |
4059 | |
4060 // rax: exception oop | |
4061 // r8: exception handler | |
4062 // rdx: exception pc | |
4063 // Jump to handler | |
4064 | |
4065 __ jmp(r8); | |
4066 | |
4067 // Make sure all code is generated | |
4068 masm->flush(); | |
4069 | |
4070 // Set exception blob | |
4071 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1); | |
4072 } | |
4073 #endif // COMPILER2 |