Mercurial > hg > truffle

annotate src/cpu/ppc/vm/icache_ppc.cpp @ 18408:2c3666f44855

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Truffle: initial commit of object API implementation
author Andreas Woess <andreas.woess@jku.at>
date Tue, 18 Nov 2014 23:19:43 +0100
parents 67fa91961822
children
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1 /*
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2 * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
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3 * Copyright 2012, 2013 SAP AG. All rights reserved.
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4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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5 *
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6 * This code is free software; you can redistribute it and/or modify it
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7 * under the terms of the GNU General Public License version 2 only, as
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8 * published by the Free Software Foundation.
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9 *
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10 * This code is distributed in the hope that it will be useful, but WITHOUT
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11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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13 * version 2 for more details (a copy is included in the LICENSE file that
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14 * accompanied this code).
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15 *
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16 * You should have received a copy of the GNU General Public License version
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17 * 2 along with this work; if not, write to the Free Software Foundation,
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18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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19 *
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20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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21 * or visit www.oracle.com if you need additional information or have any
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22 * questions.
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23 *
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24 */
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25
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26 #include "precompiled.hpp"
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27 #include "assembler_ppc.inline.hpp"
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28 #include "runtime/icache.hpp"
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29
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30 // Use inline assembler to implement icache flush.
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31 int ICache::ppc64_flush_icache(address start, int lines, int magic) {
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32 address end = start + (unsigned int)lines*ICache::line_size;
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33 assert(start <= end, "flush_icache parms");
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34
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35 // store modified cache lines from data cache
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36 for (address a = start; a < end; a += ICache::line_size) {
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37 __asm__ __volatile__(
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38 "dcbst 0, %0 \n"
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39 :
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40 : "r" (a)
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41 : "memory");
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42 }
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43
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44 // sync instruction
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45 __asm__ __volatile__(
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46 "sync \n"
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47 :
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48 :
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49 : "memory");
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50
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51 // invalidate respective cache lines in instruction cache
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52 for (address a = start; a < end; a += ICache::line_size) {
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53 __asm__ __volatile__(
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54 "icbi 0, %0 \n"
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55 :
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56 : "r" (a)
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57 : "memory");
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58 }
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59
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60 // discard fetched instructions
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61 __asm__ __volatile__(
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62 "isync \n"
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63 :
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64 :
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65 : "memory");
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66
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67 return magic;
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68 }
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69
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70 void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) {
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71 StubCodeMark mark(this, "ICache", "flush_icache_stub");
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72
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73 *flush_icache_stub = (ICache::flush_icache_stub_t)ICache::ppc64_flush_icache;
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74
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75 // First call to flush itself
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76 ICache::invalidate_range((address)(*flush_icache_stub), 0);
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77 }