Mercurial > hg > truffle
annotate src/cpu/x86/vm/globals_x86.hpp @ 18943:2e726a84c8f3
Remove IterableNodeType from IntegerExactArithmeticNode
author | Andreas Woess <andreas.woess@jku.at> |
---|---|
date | Sun, 25 Jan 2015 09:50:42 +0100 |
parents | 52b4284cb496 |
children | 7848fc12602b |
rev | line source |
---|---|
0 | 1 /* |
10988
cd54c7e92908
8015660: Test8009761.java "Failed: init recursive calls: 24. After deopt 25"
minqi
parents:
10287
diff
changeset
|
2 * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
1552
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1365
diff
changeset
|
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1365
diff
changeset
|
20 * or visit www.oracle.com if you need additional information or have any |
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1365
diff
changeset
|
21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #ifndef CPU_X86_VM_GLOBALS_X86_HPP |
26 #define CPU_X86_VM_GLOBALS_X86_HPP | |
27 | |
28 #include "utilities/globalDefinitions.hpp" | |
29 #include "utilities/macros.hpp" | |
30 | |
0 | 31 // Sets the default values for platform dependent flags used by the runtime system. |
32 // (see globals.hpp) | |
33 | |
1064 | 34 define_pd_global(bool, ConvertSleepToYield, true); |
35 define_pd_global(bool, ShareVtableStubs, true); | |
36 define_pd_global(bool, CountInterpCalls, true); | |
37 define_pd_global(bool, NeedsDeoptSuspend, false); // only register window machines need this | |
0 | 38 |
1064 | 39 define_pd_global(bool, ImplicitNullChecks, true); // Generate code for implicit null checks |
14440
41b780b43b74
8029015: PPC64 (part 216): opto: trap based null and range checks
goetz
parents:
12962
diff
changeset
|
40 define_pd_global(bool, TrapBasedNullChecks, false); // Not needed on x86. |
41b780b43b74
8029015: PPC64 (part 216): opto: trap based null and range checks
goetz
parents:
12962
diff
changeset
|
41 define_pd_global(bool, UncommonNullCast, true); // Uncommon-trap NULLs passed to check cast |
0 | 42 |
43 // See 4827828 for this change. There is no globals_core_i486.hpp. I can't | |
44 // assign a different value for C2 without touching a number of files. Use | |
45 // #ifdef to minimize the change as it's late in Mantis. -- FIXME. | |
46 // c1 doesn't have this problem because the fix to 4858033 assures us | |
47 // the the vep is aligned at CodeEntryAlignment whereas c2 only aligns | |
48 // the uep and the vep doesn't get real alignment but just slops on by | |
49 // only assured that the entry instruction meets the 5 byte size requirement. | |
11806
14904566a4b2
Use 32 byte code alignment for Graal on x86.
Roland Schatz <roland.schatz@oracle.com>
parents:
11080
diff
changeset
|
50 #if defined(COMPILER2) || defined(GRAAL) |
1064 | 51 define_pd_global(intx, CodeEntryAlignment, 32); |
0 | 52 #else |
1064 | 53 define_pd_global(intx, CodeEntryAlignment, 16); |
0 | 54 #endif // COMPILER2 |
1365 | 55 define_pd_global(intx, OptoLoopAlignment, 16); |
1064 | 56 define_pd_global(intx, InlineFrequencyCount, 100); |
57 define_pd_global(intx, InlineSmallCode, 1000); | |
0 | 58 |
10988
cd54c7e92908
8015660: Test8009761.java "Failed: init recursive calls: 24. After deopt 25"
minqi
parents:
10287
diff
changeset
|
59 define_pd_global(intx, StackYellowPages, NOT_WINDOWS(2) WINDOWS_ONLY(3)); |
1064 | 60 define_pd_global(intx, StackRedPages, 1); |
0 | 61 #ifdef AMD64 |
62 // Very large C++ stack frames using solaris-amd64 optimized builds | |
63 // due to lack of optimization caused by C++ compiler bugs | |
4921
849412a95e45
7059899: Stack overflows in Java code cause 64-bit JVMs to exit due to SIGSEGV
coleenp
parents:
3960
diff
changeset
|
64 define_pd_global(intx, StackShadowPages, NOT_WIN64(20) WIN64_ONLY(6) DEBUG_ONLY(+2)); |
0 | 65 #else |
4942 | 66 define_pd_global(intx, StackShadowPages, 4 DEBUG_ONLY(+5)); |
0 | 67 #endif // AMD64 |
68 | |
1064 | 69 define_pd_global(intx, PreInflateSpin, 10); |
0 | 70 |
71 define_pd_global(bool, RewriteBytecodes, true); | |
72 define_pd_global(bool, RewriteFrequentPairs, true); | |
1868
3dc12ef8735e
6989297: Integrate additional portability improvements
bobv
parents:
1552
diff
changeset
|
73 |
3960 | 74 #ifdef _ALLBSD_SOURCE |
75 define_pd_global(bool, UseMembar, true); | |
76 #else | |
1868
3dc12ef8735e
6989297: Integrate additional portability improvements
bobv
parents:
1552
diff
changeset
|
77 define_pd_global(bool, UseMembar, false); |
3960 | 78 #endif |
1972 | 79 |
2368
dde920245681
6896099: Integrate CMS heap ergo with default heap sizing ergo
ysr
parents:
2150
diff
changeset
|
80 // GC Ergo Flags |
10287
12f651e29f6b
6843347: Boundary values in some public GC options cause crashes
tschatzl
parents:
7474
diff
changeset
|
81 define_pd_global(uintx, CMSYoungGenPerWorker, 64*M); // default max size of CMS young gen, per GC worker thread |
6633
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
82 |
13280
fbcdae53b17e
force TypeProfileLevel to 0 in GRAAL until HotSpotMethodData is updated to be aware of the new profiling tags
Doug Simon <doug.simon@oracle.com>
parents:
13109
diff
changeset
|
83 // Disabled in GRAAL until HotSpotMethodData is updated to be aware of the new profiling tags |
fbcdae53b17e
force TypeProfileLevel to 0 in GRAAL until HotSpotMethodData is updated to be aware of the new profiling tags
Doug Simon <doug.simon@oracle.com>
parents:
13109
diff
changeset
|
84 define_pd_global(uintx, TypeProfileLevel, GRAAL_ONLY(0) NOT_GRAAL(111)); |
12875
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
85 |
6633
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
86 #define ARCH_FLAGS(develop, product, diagnostic, experimental, notproduct) \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
87 \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
88 develop(bool, IEEEPrecision, true, \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
89 "Enables IEEE precision (for INTEL only)") \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
90 \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
91 product(intx, FenceInstruction, 0, \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
92 "(Unsafe,Unstable) Experimental") \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
93 \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
94 product(intx, ReadPrefetchInstr, 0, \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
95 "Prefetch instruction to prefetch ahead") \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
96 \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
97 product(bool, UseStoreImmI16, true, \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
98 "Use store immediate 16-bits value instruction on x86") \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
99 \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
100 product(intx, UseAVX, 99, \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
101 "Highest supported AVX instructions set on x86/x64") \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
102 \ |
11080
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
10988
diff
changeset
|
103 product(bool, UseCLMUL, false, \ |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
10988
diff
changeset
|
104 "Control whether CLMUL instructions can be used on x86/x64") \ |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
10988
diff
changeset
|
105 \ |
6633
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
106 diagnostic(bool, UseIncDec, true, \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
107 "Use INC, DEC instructions on x86") \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
108 \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
109 product(bool, UseNewLongLShift, false, \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
110 "Use optimized bitwise shift left") \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
111 \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
112 product(bool, UseAddressNop, false, \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
113 "Use '0F 1F [addr]' NOP instructions on x86 cpus") \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
114 \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
115 product(bool, UseXmmLoadAndClearUpper, true, \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
116 "Load low part of XMM register and clear upper part") \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
117 \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
118 product(bool, UseXmmRegToRegMoveAll, false, \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
119 "Copy all XMM register bits when moving value between registers") \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
120 \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
121 product(bool, UseXmmI2D, false, \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
122 "Use SSE2 CVTDQ2PD instruction to convert Integer to Double") \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
123 \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
124 product(bool, UseXmmI2F, false, \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
125 "Use SSE2 CVTDQ2PS instruction to convert Integer to Float") \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
126 \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
127 product(bool, UseUnalignedLoadStores, false, \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
128 "Use SSE2 MOVDQU instruction for Arraycopy") \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
129 \ |
7474
00af3a3a8df4
8005522: use fast-string instructions on x86 for zeroing
kvn
parents:
6633
diff
changeset
|
130 product(bool, UseFastStosb, false, \ |
00af3a3a8df4
8005522: use fast-string instructions on x86 for zeroing
kvn
parents:
6633
diff
changeset
|
131 "Use fast-string operation for zeroing: rep stosb") \ |
00af3a3a8df4
8005522: use fast-string instructions on x86 for zeroing
kvn
parents:
6633
diff
changeset
|
132 \ |
17780 | 133 /* Use Restricted Transactional Memory for lock eliding */ \ |
134 experimental(bool, UseRTMLocking, false, \ | |
135 "Enable RTM lock eliding for inflated locks in compiled code") \ | |
136 \ | |
137 experimental(bool, UseRTMForStackLocks, false, \ | |
138 "Enable RTM lock eliding for stack locks in compiled code") \ | |
139 \ | |
140 experimental(bool, UseRTMDeopt, false, \ | |
141 "Perform deopt and recompilation based on RTM abort ratio") \ | |
142 \ | |
143 experimental(uintx, RTMRetryCount, 5, \ | |
144 "Number of RTM retries on lock abort or busy") \ | |
145 \ | |
146 experimental(intx, RTMSpinLoopCount, 100, \ | |
147 "Spin count for lock to become free before RTM retry") \ | |
148 \ | |
149 experimental(intx, RTMAbortThreshold, 1000, \ | |
150 "Calculate abort ratio after this number of aborts") \ | |
151 \ | |
152 experimental(intx, RTMLockingThreshold, 10000, \ | |
153 "Lock count at which to do RTM lock eliding without " \ | |
154 "abort ratio calculation") \ | |
155 \ | |
156 experimental(intx, RTMAbortRatio, 50, \ | |
157 "Lock abort ratio at which to stop use RTM lock eliding") \ | |
158 \ | |
159 experimental(intx, RTMTotalCountIncrRate, 64, \ | |
160 "Increment total RTM attempted lock count once every n times") \ | |
161 \ | |
162 experimental(intx, RTMLockingCalculationDelay, 0, \ | |
163 "Number of milliseconds to wait before start calculating aborts " \ | |
164 "for RTM locking") \ | |
165 \ | |
17849
526acaf3626f
8038939: Some options related to RTM locking optimization works inconsistently
kvn
parents:
17810
diff
changeset
|
166 experimental(bool, UseRTMXendForLockBusy, true, \ |
17780 | 167 "Use RTM Xend instead of Xabort when lock busy") \ |
168 \ | |
6633
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
169 /* assembler */ \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
170 product(bool, Use486InstrsOnly, false, \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
171 "Use 80486 Compliant instruction subset") \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
172 \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
173 product(bool, UseCountLeadingZerosInstruction, false, \ |
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
174 "Use count leading zeros instruction") \ |
17729
8a8ff6b577ed
8031321: Support Intel bit manipulation instructions
iveresov
parents:
12962
diff
changeset
|
175 \ |
8a8ff6b577ed
8031321: Support Intel bit manipulation instructions
iveresov
parents:
12962
diff
changeset
|
176 product(bool, UseCountTrailingZerosInstruction, false, \ |
8a8ff6b577ed
8031321: Support Intel bit manipulation instructions
iveresov
parents:
12962
diff
changeset
|
177 "Use count trailing zeros instruction") \ |
8a8ff6b577ed
8031321: Support Intel bit manipulation instructions
iveresov
parents:
12962
diff
changeset
|
178 \ |
8a8ff6b577ed
8031321: Support Intel bit manipulation instructions
iveresov
parents:
12962
diff
changeset
|
179 product(bool, UseBMI1Instructions, false, \ |
8a8ff6b577ed
8031321: Support Intel bit manipulation instructions
iveresov
parents:
12962
diff
changeset
|
180 "Use BMI instructions") |
6633
a5dd6e3ef9f3
6677625: Move platform specific flags from globals.hpp to globals_<arch>.hpp
twisti
parents:
4952
diff
changeset
|
181 |
1972 | 182 #endif // CPU_X86_VM_GLOBALS_X86_HPP |