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annotate graal/com.oracle.max.cri/src/com/oracle/max/cri/ci/CiArchitecture.java @ 4558:3706975946e4

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Make graph dumping a bit more robust when there is no method, enable debug in the startCompiler method, add context and scope for snippets installation Made IGV display graphs even if some edges are problematic When schedule failed don't use it
author Gilles Duboscq <duboscq@ssw.jku.at>
date Fri, 10 Feb 2012 02:22:23 +0100
parents aaac4894175c
children
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1 /*
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2 * Copyright (c) 2009, 2011, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 */
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23 package com.oracle.max.cri.ci;
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25 import java.util.*;
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26
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27 import com.oracle.max.cri.ci.CiRegister.*;
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28 import com.oracle.max.cri.util.*;
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30
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31 /**
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32 * Represents a CPU architecture, including information such as its endianness, CPU
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33 * registers, word width, etc.
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34 */
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35 public abstract class CiArchitecture {
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36
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37 /**
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38 * The endianness of the architecture.
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39 */
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40 public static enum ByteOrder {
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41 LittleEndian,
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42 BigEndian
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43 }
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44
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45 /**
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46 * The number of bits required in a bit map covering all the registers that may store references.
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47 * The bit position of a register in the map is the register's {@linkplain CiRegister#number number}.
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48 */
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49 public final int registerReferenceMapBitCount;
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50
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51 /**
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52 * Represents the natural size of words (typically registers and pointers) of this architecture, in bytes.
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53 */
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54 public final int wordSize;
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55
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56 /**
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57 * The name of this architecture (e.g. "AMD64", "SPARCv9").
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58 */
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59 public final String name;
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60
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61 /**
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62 * Array of all available registers on this architecture. The index of each register in this
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63 * array is equal to its {@linkplain CiRegister#number number}.
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64 */
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65 public final CiRegister[] registers;
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66
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67 /**
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68 * Map of all registers keyed by their {@linkplain CiRegister#name names}.
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69 */
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70 public final HashMap<String, CiRegister> registersByName;
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71
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72 /**
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73 * The byte ordering can be either little or big endian.
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74 */
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75 public final ByteOrder byteOrder;
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76
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77 /**
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78 * Mask of the barrier constants defined in {@link MemoryBarriers} denoting the barriers that
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79 * are not required to be explicitly inserted under this architecture.
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80 */
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81 public final int implicitMemoryBarriers;
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82
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83 /**
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84 * Determines the barriers in a given barrier mask that are explicitly required on this architecture.
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85 *
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86 * @param barriers a mask of the barrier constants defined in {@link MemoryBarriers}
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87 * @return the value of {@code barriers} minus the barriers unnecessary on this architecture
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88 */
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89 public final int requiredBarriers(int barriers) {
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90 return barriers & ~implicitMemoryBarriers;
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91 }
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92
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93 /**
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94 * Offset in bytes from the beginning of a call instruction to the displacement.
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95 */
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96 public final int machineCodeCallDisplacementOffset;
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97
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98 /**
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99 * The size of the return address pushed to the stack by a call instruction.
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100 * A value of 0 denotes that call linkage uses registers instead (e.g. SPARC).
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101 */
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102 public final int returnAddressSize;
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103
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104 private final EnumMap<RegisterFlag, CiRegister[]> registersByTypeAndEncoding;
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105
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106 /**
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107 * Gets the register for a given {@linkplain CiRegister#encoding encoding} and type.
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108 *
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109 * @param encoding a register value as used in a machine instruction
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110 * @param type the type of the register
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111 */
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112 public CiRegister registerFor(int encoding, RegisterFlag type) {
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113 CiRegister[] regs = registersByTypeAndEncoding.get(type);
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114 assert encoding >= 0 && encoding < regs.length;
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115 CiRegister reg = regs[encoding];
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116 assert reg != null;
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117 return reg;
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118 }
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119
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120 protected CiArchitecture(String name,
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121 int wordSize,
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122 ByteOrder byteOrder,
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123 CiRegister[] registers,
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124 int implicitMemoryBarriers,
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125 int nativeCallDisplacementOffset,
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126 int registerReferenceMapBitCount,
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127 int returnAddressSize) {
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128 this.name = name;
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129 this.registers = registers;
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130 this.wordSize = wordSize;
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131 this.byteOrder = byteOrder;
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132 this.implicitMemoryBarriers = implicitMemoryBarriers;
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133 this.machineCodeCallDisplacementOffset = nativeCallDisplacementOffset;
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134 this.registerReferenceMapBitCount = registerReferenceMapBitCount;
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135 this.returnAddressSize = returnAddressSize;
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136
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137 registersByName = new HashMap<>(registers.length);
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138 for (CiRegister register : registers) {
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139 registersByName.put(register.name, register);
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140 assert registers[register.number] == register;
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141 }
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142
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143 registersByTypeAndEncoding = new EnumMap<>(RegisterFlag.class);
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144 EnumMap<RegisterFlag, CiRegister[]> categorizedRegs = CiRegister.categorize(registers);
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145 for (RegisterFlag type : RegisterFlag.values()) {
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146 CiRegister[] regs = categorizedRegs.get(type);
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147 int max = CiRegister.maxRegisterEncoding(regs);
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148 CiRegister[] regsByEnc = new CiRegister[max + 1];
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149 for (CiRegister reg : regs) {
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150 regsByEnc[reg.encoding] = reg;
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151 }
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152 registersByTypeAndEncoding.put(type, regsByEnc);
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153 }
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154 }
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155
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156 /**
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157 * Converts this architecture to a string.
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158 * @return the string representation of this architecture
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159 */
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160 @Override
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161 public final String toString() {
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162 return name.toLowerCase();
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163 }
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164
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165 /**
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166 * Checks whether this is a 32-bit architecture.
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167 * @return {@code true} if this architecture is 32-bit
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168 */
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169 public final boolean is32bit() {
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170 return wordSize == 4;
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171 }
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172
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173 /**
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174 * Checks whether this is a 64-bit architecture.
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175 * @return {@code true} if this architecture is 64-bit
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176 */
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177 public final boolean is64bit() {
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178 return wordSize == 8;
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179 }
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180
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181 // The following methods are architecture specific and not dependent on state
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182 // stored in this class. They have convenient default implementations.
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183
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184 /**
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185 * Checks whether this architecture's normal arithmetic instructions use a two-operand form
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186 * (e.g. x86 which overwrites one operand register with the result when adding).
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187 * @return {@code true} if this architecture uses two-operand mode
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188 */
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189 public boolean twoOperandMode() {
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190 return false;
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191 }
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192
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193 // TODO: Why enumerate the concrete subclasses here rather
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194 // than use instanceof comparisons in code that cares?
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195
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196 /**
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197 * Checks whether the architecture is x86.
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198 * @return {@code true} if the architecture is x86
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199 */
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200 public boolean isX86() {
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201 return false;
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202 }
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203
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204 /**
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205 * Checks whether the architecture is SPARC.
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206 * @return {@code true} if the architecture is SPARC
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207 */
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208 public boolean isSPARC() {
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209 return false;
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210 }
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211
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212 }