Mercurial > hg > truffle
annotate agent/src/share/classes/sun/jvm/hotspot/asm/sparc/SPARCV8Disassembler.java @ 1913:3b2dea75431e
6984311: JSR 292 needs optional bootstrap method parameters
Summary: Allow CONSTANT_InvokeDynamic nodes to have any number of extra operands.
Reviewed-by: twisti
author | jrose |
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date | Sat, 30 Oct 2010 13:08:23 -0700 |
parents | c18cbe5936b8 |
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rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
25 package sun.jvm.hotspot.asm.sparc; | |
26 | |
27 import sun.jvm.hotspot.asm.*; | |
28 import java.io.*; | |
29 import java.util.*; | |
30 | |
31 // Please refer to "The SPARC Architecture Manual - Version 8" | |
32 | |
33 public class SPARCV8Disassembler extends SPARCDisassembler { | |
34 | |
35 public SPARCV8Disassembler(long startPc, byte[] code, SPARCInstructionFactory factory) { | |
36 super(startPc, code, factory); | |
37 } | |
38 | |
39 public SPARCV8Disassembler(long startPc, byte[] code) { | |
40 this(startPc, code, new SPARCInstructionFactoryImpl()); | |
41 } | |
42 | |
43 // decoders for format 2 instructions | |
44 private static InstructionDecoder format2Decoders[] = { | |
45 new UnimpDecoder(), | |
46 illegalDecoder, | |
47 new IntegerBranchDecoder(), | |
48 illegalDecoder, | |
49 new SethiDecoder(), | |
50 illegalDecoder, | |
51 new FloatBranchDecoder(), | |
52 new CoprocessorBranchDecoder() | |
53 }; | |
54 | |
55 protected InstructionDecoder getFormat2Decoder(int op2) { | |
56 return format2Decoders[op2]; | |
57 } | |
58 | |
59 // op3 decoder table for op=3 (FORMAT_3) instructions - (memory instructions) | |
60 // Appendix F - Opcodes and Condition Codes - Page 229 - Table F-4 | |
61 | |
62 private static final InstructionDecoder format3Decoders[][] = { | |
63 { | |
64 new LoadDecoder(LD, "ld", RTLDT_UNSIGNED_WORD), new AlternateSpaceLoadDecoder(LDA, "lda", RTLDT_UNSIGNED_WORD), | |
65 new LoadDecoder(LDF,"ld", RTLDT_FL_SINGLE), new SpecialLoadDecoder(LDC,"ld", SPARCSpecialRegisters.CREG) | |
66 }, | |
67 { | |
68 new LoadDecoder(LDUB, "ldub", RTLDT_UNSIGNED_BYTE), new AlternateSpaceLoadDecoder(LDUBA, "lduba", RTLDT_UNSIGNED_BYTE), | |
69 new SpecialLoadDecoder(LDFSR, "ld", SPARCSpecialRegisters.FSR), new SpecialLoadDecoder(LDCSR, "ld", SPARCSpecialRegisters.CSR) | |
70 }, | |
71 { | |
72 new LoadDecoder(LDUH, "lduh", RTLDT_UNSIGNED_HALF), new AlternateSpaceLoadDecoder(LDUHA, "lduha", RTLDT_UNSIGNED_HALF), | |
73 illegalDecoder, illegalDecoder | |
74 }, | |
75 { | |
76 new LoadDecoder(LDD, "ldd", RTLDT_UNSIGNED_DWORD), new AlternateSpaceLoadDecoder(LDDA, "ldda", RTLDT_UNSIGNED_DWORD), | |
77 new LoadDecoder(LDDF, "ldd", RTLDT_FL_DOUBLE), new SpecialLoadDecoder(LDDC, "ldd", SPARCSpecialRegisters.CREG) | |
78 }, | |
79 { | |
80 new StoreDecoder(ST, "st", RTLDT_UNSIGNED_WORD), new AlternateSpaceStoreDecoder(STA, "sta", RTLDT_UNSIGNED_WORD), | |
81 new StoreDecoder(STF, "st", RTLDT_FL_SINGLE), new SpecialStoreDecoder(STC, "st", SPARCSpecialRegisters.CREG) | |
82 }, | |
83 { | |
84 new StoreDecoder(STB, "stb", RTLDT_UNSIGNED_BYTE), new AlternateSpaceStoreDecoder(STBA, "stba", RTLDT_UNSIGNED_BYTE), | |
85 new SpecialStoreDecoder(STFSR, "st", SPARCSpecialRegisters.FSR), new SpecialStoreDecoder(STCSR, "st", SPARCSpecialRegisters.CSR), | |
86 }, | |
87 { | |
88 new StoreDecoder(STH, "sth", RTLDT_UNSIGNED_HALF), new AlternateSpaceStoreDecoder(STHA, "stha", RTLDT_UNSIGNED_HALF), | |
89 new SpecialStoreDecoder(STDFQ, "std", SPARCSpecialRegisters.FQ), new SpecialStoreDecoder(STDCQ, "std", SPARCSpecialRegisters.CQ), | |
90 }, | |
91 { | |
92 new StoreDecoder(STD, "std", RTLDT_UNSIGNED_DWORD), new AlternateSpaceStoreDecoder(STDA, "stda", RTLDT_UNSIGNED_DWORD), | |
93 new StoreDecoder(STDF, "std", RTLDT_FL_DOUBLE), new SpecialStoreDecoder(STDC, "std", SPARCSpecialRegisters.CREG) | |
94 }, | |
95 { | |
96 illegalDecoder, illegalDecoder, | |
97 illegalDecoder, illegalDecoder | |
98 }, | |
99 { | |
100 new LoadDecoder(LDSB, "ldsb", RTLDT_SIGNED_BYTE), new AlternateSpaceLoadDecoder(LDSBA, "ldsba", RTLDT_UNSIGNED_BYTE), | |
101 illegalDecoder, illegalDecoder | |
102 }, | |
103 { | |
104 new LoadDecoder(LDSH, "ldsh", RTLDT_SIGNED_HALF), new AlternateSpaceLoadDecoder(LDSHA, "ldsha", RTLDT_UNSIGNED_HALF), | |
105 illegalDecoder, illegalDecoder | |
106 }, | |
107 { | |
108 illegalDecoder, illegalDecoder, | |
109 illegalDecoder, illegalDecoder | |
110 }, | |
111 { | |
112 illegalDecoder, illegalDecoder, | |
113 illegalDecoder, illegalDecoder | |
114 }, | |
115 { | |
116 new LdstubDecoder(LDSTUB, "ldstub", RTLDT_UNSIGNED_BYTE), new AlternateSpaceLdstubDecoder(LDSTUBA, "ldstuba", RTLDT_UNSIGNED_BYTE), | |
117 illegalDecoder, illegalDecoder | |
118 }, | |
119 { | |
120 illegalDecoder, illegalDecoder, | |
121 illegalDecoder, illegalDecoder | |
122 }, | |
123 { | |
124 new SwapDecoder(SWAP, "swap", RTLDT_UNSIGNED_WORD), new AlternateSpaceSwapDecoder(SWAPA, "swapa", RTLDT_UNSIGNED_WORD), | |
125 illegalDecoder, illegalDecoder | |
126 }, | |
127 }; | |
128 | |
129 protected InstructionDecoder getFormat3Decoder(int row, int column) { | |
130 return format3Decoders[row][column]; | |
131 } | |
132 | |
133 // op3 decoder table for op=2 (FORMAT_3A) instructions | |
134 // Appendix F - Opcodes and Condition Codes - Page 228 - Table F-3 | |
135 protected static final InstructionDecoder format3ADecoders[][] = { | |
136 { | |
137 new ArithmeticDecoder(ADD, "add", RTLOP_ADD), new ArithmeticDecoder(ADDcc, "addcc", RTLOP_ADD), | |
138 new ArithmeticDecoder(TADDcc, "taddcc", RTLOP_ADD), new WriteDecoder(SPARCSpecialRegisters.ASR) | |
139 }, | |
140 { | |
141 new LogicDecoder(AND, "and", RTLOP_AND), new LogicDecoder(ANDcc, "andcc", RTLOP_AND), | |
142 new ArithmeticDecoder(TSUBcc, "tsubcc", RTLOP_ADD), new WriteDecoder(SPARCSpecialRegisters.PSR) | |
143 }, | |
144 { | |
145 new LogicDecoder(OR, "or", RTLOP_OR), new LogicDecoder(ORcc, "orcc", RTLOP_OR), | |
146 new ArithmeticDecoder(TADDccTV, "taddcctv", RTLOP_ADD), new WriteDecoder(SPARCSpecialRegisters.WIM) | |
147 }, | |
148 { | |
149 new LogicDecoder(XOR, "xor", RTLOP_XOR), new LogicDecoder(XORcc, "xorcc", RTLOP_XOR), | |
150 new ArithmeticDecoder(TSUBccTV, "tsubcctv", RTLOP_SUB), new WriteDecoder(SPARCSpecialRegisters.TBR) | |
151 }, | |
152 { | |
153 new ArithmeticDecoder(SUB, "sub", RTLOP_SUB), new ArithmeticDecoder(SUBcc, "subcc", RTLOP_SUB), | |
154 new ArithmeticDecoder(MULScc, "mulscc", RTLOP_SMUL), new V8FPop1Decoder() | |
155 }, | |
156 { | |
157 new LogicDecoder(ANDN, "andn", RTLOP_NAND), new LogicDecoder(ANDNcc, "andncc", RTLOP_NAND), | |
158 new ShiftDecoder(SLL, "sll", RTLOP_SLL), new V8FPop2Decoder() | |
159 }, | |
160 { | |
161 new LogicDecoder(ORN, "orn", RTLOP_NOR), new LogicDecoder(ORNcc, "orncc", RTLOP_NOR), | |
162 new ShiftDecoder(SRL, "srl", RTLOP_SRL), new CoprocessorDecoder(CPop1) | |
163 }, | |
164 { | |
165 new LogicDecoder(XNOR, "xnor", RTLOP_XNOR), new LogicDecoder(XNORcc, "xnorcc", RTLOP_XNOR), | |
166 new ShiftDecoder(SRA, "sra", RTLOP_SRA), new CoprocessorDecoder(CPop2) | |
167 }, | |
168 { | |
169 new ArithmeticDecoder(ADDX, "addx", RTLOP_ADDC), new ArithmeticDecoder(ADDXcc, "addxcc", RTLOP_ADDC), | |
170 new ReadDecoder(SPARCSpecialRegisters.ASR), new JmplDecoder() | |
171 }, | |
172 { | |
173 illegalDecoder, illegalDecoder, | |
174 new ReadDecoder(SPARCSpecialRegisters.PSR), new RettDecoder() | |
175 }, | |
176 { | |
177 new ArithmeticDecoder(UMUL, "umul", RTLOP_UMUL), new ArithmeticDecoder(UMULcc, "umulcc", RTLOP_UMUL), | |
178 new ReadDecoder(SPARCSpecialRegisters.WIM), new TrapDecoder() | |
179 }, | |
180 { | |
181 new ArithmeticDecoder(SMUL, "smul", RTLOP_SMUL), new ArithmeticDecoder(SMULcc, "smulcc", RTLOP_SMUL), | |
182 new ReadDecoder(SPARCSpecialRegisters.TBR), new FlushDecoder() | |
183 }, | |
184 { | |
185 new ArithmeticDecoder(SUBX, "subx", RTLOP_SUBC), new ArithmeticDecoder(SUBXcc, "subxcc", RTLOP_SUBC), | |
186 illegalDecoder, new SaveDecoder() | |
187 }, | |
188 { | |
189 illegalDecoder, illegalDecoder, | |
190 illegalDecoder, new RestoreDecoder() | |
191 }, | |
192 { | |
193 new ArithmeticDecoder(UDIV, "udiv", RTLOP_UDIV), new ArithmeticDecoder(UDIVcc, "udivcc", RTLOP_UDIV), | |
194 illegalDecoder, illegalDecoder | |
195 }, | |
196 { | |
197 new ArithmeticDecoder(SDIV, "sdiv", RTLOP_SDIV), new ArithmeticDecoder(SDIVcc, "sdivcc", RTLOP_SDIV), | |
198 illegalDecoder, illegalDecoder | |
199 } | |
200 }; | |
201 | |
202 protected InstructionDecoder getFormat3ADecoder(int row, int column) { | |
203 return format3ADecoders[row][column]; | |
204 } | |
205 } |