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1 /*
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2 * Copyright 2000-2005 Sun Microsystems, Inc. All Rights Reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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20 * CA 95054 USA or visit www.sun.com if you need additional information or
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21 * have any questions.
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22 *
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23 */
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24
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25 // native word offsets from memory address (little endian)
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26 enum {
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27 pd_lo_word_offset_in_bytes = 0,
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28 pd_hi_word_offset_in_bytes = BytesPerWord
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29 };
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30
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31 // explicit rounding operations are required to implement the strictFP mode
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32 enum {
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33 pd_strict_fp_requires_explicit_rounding = true
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34 };
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35
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36
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37 // registers
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38 enum {
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39 pd_nof_cpu_regs_frame_map = 8, // number of registers used during code emission
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40 pd_nof_fpu_regs_frame_map = 8, // number of registers used during code emission
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41 pd_nof_xmm_regs_frame_map = 8, // number of registers used during code emission
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42 pd_nof_caller_save_cpu_regs_frame_map = 6, // number of registers killed by calls
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43 pd_nof_caller_save_fpu_regs_frame_map = 8, // number of registers killed by calls
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44 pd_nof_caller_save_xmm_regs_frame_map = 8, // number of registers killed by calls
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45
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46 pd_nof_cpu_regs_reg_alloc = 6, // number of registers that are visible to register allocator
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47 pd_nof_fpu_regs_reg_alloc = 6, // number of registers that are visible to register allocator
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48
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49 pd_nof_cpu_regs_linearscan = 8, // number of registers visible to linear scan
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50 pd_nof_fpu_regs_linearscan = 8, // number of registers visible to linear scan
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51 pd_nof_xmm_regs_linearscan = 8, // number of registers visible to linear scan
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52 pd_first_cpu_reg = 0,
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53 pd_last_cpu_reg = 5,
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54 pd_first_byte_reg = 2,
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55 pd_last_byte_reg = 5,
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56 pd_first_fpu_reg = pd_nof_cpu_regs_frame_map,
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57 pd_last_fpu_reg = pd_first_fpu_reg + 7,
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58 pd_first_xmm_reg = pd_nof_cpu_regs_frame_map + pd_nof_fpu_regs_frame_map,
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59 pd_last_xmm_reg = pd_first_xmm_reg + 7
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60 };
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61
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62
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63 // encoding of float value in debug info:
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64 enum {
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65 pd_float_saved_as_double = true
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66 };
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