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1 /*
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2 * Copyright 1999-2006 Sun Microsystems, Inc. All Rights Reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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20 * CA 95054 USA or visit www.sun.com if you need additional information or
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21 * have any questions.
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22 *
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23 */
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24
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25 // On i486 the frame looks as follows:
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26 //
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27 // +-----------------------------+---------+----------------------------------------+----------------+-----------
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28 // | size_arguments-nof_reg_args | 2 words | size_locals-size_arguments+numreg_args | _size_monitors | spilling .
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29 // +-----------------------------+---------+----------------------------------------+----------------+-----------
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30 //
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31 // The FPU registers are mapped with their offset from TOS; therefore the
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32 // status of FPU stack must be updated during code emission.
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33
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34 public:
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35 static const int pd_c_runtime_reserved_arg_size;
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36
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37 enum {
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38 nof_xmm_regs = pd_nof_xmm_regs_frame_map,
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39 nof_caller_save_xmm_regs = pd_nof_caller_save_xmm_regs_frame_map,
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40 first_available_sp_in_frame = 0,
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41 frame_pad_in_bytes = 8,
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42 nof_reg_args = 2
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43 };
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44
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45 private:
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46 static LIR_Opr _caller_save_xmm_regs [nof_caller_save_xmm_regs];
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47
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48 static XMMRegister _xmm_regs[nof_xmm_regs];
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49
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50 public:
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51 static LIR_Opr receiver_opr;
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52
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53 static LIR_Opr rsi_opr;
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54 static LIR_Opr rdi_opr;
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55 static LIR_Opr rbx_opr;
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56 static LIR_Opr rax_opr;
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57 static LIR_Opr rdx_opr;
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58 static LIR_Opr rcx_opr;
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59 static LIR_Opr rsp_opr;
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60 static LIR_Opr rbp_opr;
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61
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62 static LIR_Opr rsi_oop_opr;
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63 static LIR_Opr rdi_oop_opr;
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64 static LIR_Opr rbx_oop_opr;
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65 static LIR_Opr rax_oop_opr;
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66 static LIR_Opr rdx_oop_opr;
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67 static LIR_Opr rcx_oop_opr;
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68
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69 static LIR_Opr rax_rdx_long_opr;
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70 static LIR_Opr rbx_rcx_long_opr;
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71 static LIR_Opr fpu0_float_opr;
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72 static LIR_Opr fpu0_double_opr;
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73 static LIR_Opr xmm0_float_opr;
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74 static LIR_Opr xmm0_double_opr;
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75
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76 static LIR_Opr as_long_opr(Register r, Register r2) {
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77 return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r2));
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78 }
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79
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80 // VMReg name for spilled physical FPU stack slot n
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81 static VMReg fpu_regname (int n);
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82
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83 static XMMRegister nr2xmmreg(int rnr);
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84
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85 static bool is_caller_save_register (LIR_Opr opr) { return true; }
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86 static bool is_caller_save_register (Register r) { return true; }
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87
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88 static LIR_Opr caller_save_xmm_reg_at(int i) {
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89 assert(i >= 0 && i < nof_caller_save_xmm_regs, "out of bounds");
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90 return _caller_save_xmm_regs[i];
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91 }
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