annotate src/cpu/x86/vm/vmreg_x86.inline.hpp @ 71:3d62cb85208d

6662967: Optimize I2D conversion on new x86 Summary: Use CVTDQ2PS and CVTDQ2PD for integer values conversions to float and double values on new AMD cpu. Reviewed-by: sgoldman, never
author kvn
date Wed, 19 Mar 2008 15:33:25 -0700
parents a61af66fc99e
children c18cbe5936b8
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1 /*
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2 * Copyright 2006-2007 Sun Microsystems, Inc. All Rights Reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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20 * CA 95054 USA or visit www.sun.com if you need additional information or
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21 * have any questions.
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22 *
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23 */
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24
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25 inline VMReg RegisterImpl::as_VMReg() {
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26 if( this==noreg ) return VMRegImpl::Bad();
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27 #ifdef AMD64
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28 return VMRegImpl::as_VMReg(encoding() << 1 );
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29 #else
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30 return VMRegImpl::as_VMReg(encoding() );
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31 #endif // AMD64
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32 }
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33
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34 inline VMReg FloatRegisterImpl::as_VMReg() {
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35 return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr);
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36 }
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37
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38 inline VMReg XMMRegisterImpl::as_VMReg() {
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39 return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_fpr);
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40 }
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41
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42
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43 inline bool VMRegImpl::is_Register() {
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44 return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr;
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45 }
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46
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47 inline bool VMRegImpl::is_FloatRegister() {
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48 return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr;
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49 }
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50
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51 inline bool VMRegImpl::is_XMMRegister() {
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52 return value() >= ConcreteRegisterImpl::max_fpr && value() < ConcreteRegisterImpl::max_xmm;
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53 }
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54
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55 inline Register VMRegImpl::as_Register() {
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56
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57 assert( is_Register(), "must be");
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58 // Yuk
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59 #ifdef AMD64
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60 return ::as_Register(value() >> 1);
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61 #else
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62 return ::as_Register(value());
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63 #endif // AMD64
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64 }
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65
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66 inline FloatRegister VMRegImpl::as_FloatRegister() {
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67 assert( is_FloatRegister() && is_even(value()), "must be" );
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68 // Yuk
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69 return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1);
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70 }
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71
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72 inline XMMRegister VMRegImpl::as_XMMRegister() {
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73 assert( is_XMMRegister() && is_even(value()), "must be" );
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74 // Yuk
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75 return ::as_XMMRegister((value() - ConcreteRegisterImpl::max_fpr) >> 1);
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76 }
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77
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78 inline bool VMRegImpl::is_concrete() {
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79 assert(is_reg(), "must be");
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80 #ifndef AMD64
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81 if (is_Register()) return true;
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82 #endif // AMD64
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83 return is_even(value());
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84 }