annotate src/share/vm/c1/c1_LIR.hpp @ 1721:413ad0331a0c

6977924: Changes for 6975078 produce build error with certain gcc versions Summary: The changes introduced for 6975078 assign badHeapOopVal to the _allocation field in the ResourceObj class. In 32 bit linux builds with certain versions of gcc this assignment will be flagged as an error while compiling allocation.cpp. In 32 bit builds the constant value badHeapOopVal (which is cast to an intptr_t) is negative. The _allocation field is typed as an unsigned intptr_t and gcc catches this as an error. Reviewed-by: jcoomes, ysr, phh
author johnc
date Wed, 18 Aug 2010 10:59:06 -0700
parents 126ea7725993
children d5d065957597
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1 /*
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2 * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 class BlockBegin;
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26 class BlockList;
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27 class LIR_Assembler;
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28 class CodeEmitInfo;
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29 class CodeStub;
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30 class CodeStubList;
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31 class ArrayCopyStub;
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32 class LIR_Op;
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33 class ciType;
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34 class ValueType;
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35 class LIR_OpVisitState;
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36 class FpuStackSim;
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37
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38 //---------------------------------------------------------------------
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39 // LIR Operands
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40 // LIR_OprDesc
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41 // LIR_OprPtr
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42 // LIR_Const
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43 // LIR_Address
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44 //---------------------------------------------------------------------
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45 class LIR_OprDesc;
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46 class LIR_OprPtr;
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47 class LIR_Const;
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48 class LIR_Address;
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49 class LIR_OprVisitor;
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50
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51
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52 typedef LIR_OprDesc* LIR_Opr;
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53 typedef int RegNr;
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54
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55 define_array(LIR_OprArray, LIR_Opr)
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56 define_stack(LIR_OprList, LIR_OprArray)
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57
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58 define_array(LIR_OprRefArray, LIR_Opr*)
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59 define_stack(LIR_OprRefList, LIR_OprRefArray)
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60
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61 define_array(CodeEmitInfoArray, CodeEmitInfo*)
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62 define_stack(CodeEmitInfoList, CodeEmitInfoArray)
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63
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64 define_array(LIR_OpArray, LIR_Op*)
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65 define_stack(LIR_OpList, LIR_OpArray)
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66
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67 // define LIR_OprPtr early so LIR_OprDesc can refer to it
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68 class LIR_OprPtr: public CompilationResourceObj {
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69 public:
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70 bool is_oop_pointer() const { return (type() == T_OBJECT); }
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71 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); }
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72
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73 virtual LIR_Const* as_constant() { return NULL; }
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74 virtual LIR_Address* as_address() { return NULL; }
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75 virtual BasicType type() const = 0;
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76 virtual void print_value_on(outputStream* out) const = 0;
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77 };
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78
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79
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80
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81 // LIR constants
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82 class LIR_Const: public LIR_OprPtr {
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83 private:
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84 JavaValue _value;
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85
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86 void type_check(BasicType t) const { assert(type() == t, "type check"); }
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87 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); }
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88 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); }
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89
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90 public:
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91 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); }
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92 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); }
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93 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); }
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94 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); }
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95 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); }
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96 LIR_Const(void* p) {
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97 #ifdef _LP64
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98 assert(sizeof(jlong) >= sizeof(p), "too small");;
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99 _value.set_type(T_LONG); _value.set_jlong((jlong)p);
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100 #else
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101 assert(sizeof(jint) >= sizeof(p), "too small");;
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102 _value.set_type(T_INT); _value.set_jint((jint)p);
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103 #endif
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104 }
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105
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106 virtual BasicType type() const { return _value.get_type(); }
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107 virtual LIR_Const* as_constant() { return this; }
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108
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109 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); }
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110 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); }
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111 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); }
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112 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); }
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113 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); }
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114 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); }
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115 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); }
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116
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117 #ifdef _LP64
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118 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); }
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119 #else
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120 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); }
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121 #endif
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122
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123
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124 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); }
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125 jint as_jint_lo_bits() const {
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126 if (type() == T_DOUBLE) {
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127 return low(jlong_cast(_value.get_jdouble()));
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128 } else {
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129 return as_jint_lo();
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130 }
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131 }
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132 jint as_jint_hi_bits() const {
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133 if (type() == T_DOUBLE) {
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134 return high(jlong_cast(_value.get_jdouble()));
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135 } else {
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136 return as_jint_hi();
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137 }
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138 }
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139 jlong as_jlong_bits() const {
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140 if (type() == T_DOUBLE) {
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141 return jlong_cast(_value.get_jdouble());
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142 } else {
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143 return as_jlong();
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144 }
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145 }
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146
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147 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
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148
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149
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150 bool is_zero_float() {
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151 jfloat f = as_jfloat();
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152 jfloat ok = 0.0f;
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153 return jint_cast(f) == jint_cast(ok);
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154 }
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155
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156 bool is_one_float() {
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157 jfloat f = as_jfloat();
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158 return !g_isnan(f) && g_isfinite(f) && f == 1.0;
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159 }
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160
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161 bool is_zero_double() {
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162 jdouble d = as_jdouble();
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163 jdouble ok = 0.0;
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164 return jlong_cast(d) == jlong_cast(ok);
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165 }
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166
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167 bool is_one_double() {
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168 jdouble d = as_jdouble();
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169 return !g_isnan(d) && g_isfinite(d) && d == 1.0;
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170 }
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171 };
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172
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173
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174 //---------------------LIR Operand descriptor------------------------------------
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175 //
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176 // The class LIR_OprDesc represents a LIR instruction operand;
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177 // it can be a register (ALU/FPU), stack location or a constant;
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178 // Constants and addresses are represented as resource area allocated
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179 // structures (see above).
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180 // Registers and stack locations are inlined into the this pointer
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181 // (see value function).
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182
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183 class LIR_OprDesc: public CompilationResourceObj {
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184 public:
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185 // value structure:
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186 // data opr-type opr-kind
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187 // +--------------+-------+-------+
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188 // [max...........|7 6 5 4|3 2 1 0]
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189 // ^
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190 // is_pointer bit
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191 //
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192 // lowest bit cleared, means it is a structure pointer
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193 // we need 4 bits to represent types
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194
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195 private:
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196 friend class LIR_OprFact;
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197
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198 // Conversion
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199 intptr_t value() const { return (intptr_t) this; }
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200
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201 bool check_value_mask(intptr_t mask, intptr_t masked_value) const {
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202 return (value() & mask) == masked_value;
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203 }
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204
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205 enum OprKind {
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206 pointer_value = 0
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207 , stack_value = 1
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208 , cpu_register = 3
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209 , fpu_register = 5
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210 , illegal_value = 7
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211 };
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212
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213 enum OprBits {
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214 pointer_bits = 1
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215 , kind_bits = 3
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216 , type_bits = 4
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217 , size_bits = 2
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218 , destroys_bits = 1
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219 , virtual_bits = 1
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220 , is_xmm_bits = 1
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221 , last_use_bits = 1
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222 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation
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223 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits +
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224 is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits
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225 , data_bits = BitsPerInt - non_data_bits
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226 , reg_bits = data_bits / 2 // for two registers in one value encoding
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227 };
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228
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229 enum OprShift {
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230 kind_shift = 0
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231 , type_shift = kind_shift + kind_bits
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232 , size_shift = type_shift + type_bits
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233 , destroys_shift = size_shift + size_bits
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234 , last_use_shift = destroys_shift + destroys_bits
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235 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits
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236 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits
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237 , is_xmm_shift = virtual_shift + virtual_bits
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238 , data_shift = is_xmm_shift + is_xmm_bits
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239 , reg1_shift = data_shift
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240 , reg2_shift = data_shift + reg_bits
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241
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242 };
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243
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244 enum OprSize {
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245 single_size = 0 << size_shift
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246 , double_size = 1 << size_shift
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247 };
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248
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249 enum OprMask {
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250 kind_mask = right_n_bits(kind_bits)
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251 , type_mask = right_n_bits(type_bits) << type_shift
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252 , size_mask = right_n_bits(size_bits) << size_shift
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253 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift
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254 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift
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255 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift
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256 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift
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257 , pointer_mask = right_n_bits(pointer_bits)
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258 , lower_reg_mask = right_n_bits(reg_bits)
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259 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask))
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260 };
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261
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262 uintptr_t data() const { return value() >> data_shift; }
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263 int lo_reg_half() const { return data() & lower_reg_mask; }
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264 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; }
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265 OprKind kind_field() const { return (OprKind)(value() & kind_mask); }
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266 OprSize size_field() const { return (OprSize)(value() & size_mask); }
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267
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268 static char type_char(BasicType t);
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269
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270 public:
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271 enum {
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272 vreg_base = ConcreteRegisterImpl::number_of_registers,
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273 vreg_max = (1 << data_bits) - 1
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274 };
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275
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276 static inline LIR_Opr illegalOpr();
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277
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278 enum OprType {
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279 unknown_type = 0 << type_shift // means: not set (catch uninitialized types)
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280 , int_type = 1 << type_shift
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281 , long_type = 2 << type_shift
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282 , object_type = 3 << type_shift
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283 , pointer_type = 4 << type_shift
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284 , float_type = 5 << type_shift
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285 , double_type = 6 << type_shift
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286 };
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287 friend OprType as_OprType(BasicType t);
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288 friend BasicType as_BasicType(OprType t);
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289
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290 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); }
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291 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); }
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292
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293 static OprSize size_for(BasicType t) {
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294 switch (t) {
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295 case T_LONG:
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296 case T_DOUBLE:
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297 return double_size;
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298 break;
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299
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300 case T_FLOAT:
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301 case T_BOOLEAN:
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302 case T_CHAR:
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303 case T_BYTE:
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304 case T_SHORT:
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305 case T_INT:
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306 case T_OBJECT:
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307 case T_ARRAY:
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308 return single_size;
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309 break;
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310
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311 default:
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312 ShouldNotReachHere();
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
313 return single_size;
0
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314 }
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315 }
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316
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317
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318 void validate_type() const PRODUCT_RETURN;
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319
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320 BasicType type() const {
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321 if (is_pointer()) {
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322 return pointer()->type();
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323 }
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324 return as_BasicType(type_field());
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325 }
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326
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327
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328 ValueType* value_type() const { return as_ValueType(type()); }
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329
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330 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); }
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331
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332 bool is_equal(LIR_Opr opr) const { return this == opr; }
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333 // checks whether types are same
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334 bool is_same_type(LIR_Opr opr) const {
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335 assert(type_field() != unknown_type &&
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336 opr->type_field() != unknown_type, "shouldn't see unknown_type");
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337 return type_field() == opr->type_field();
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338 }
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339 bool is_same_register(LIR_Opr opr) {
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340 return (is_register() && opr->is_register() &&
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341 kind_field() == opr->kind_field() &&
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342 (value() & no_type_mask) == (opr->value() & no_type_mask));
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343 }
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344
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345 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); }
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346 bool is_illegal() const { return kind_field() == illegal_value; }
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347 bool is_valid() const { return kind_field() != illegal_value; }
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348
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349 bool is_register() const { return is_cpu_register() || is_fpu_register(); }
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350 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); }
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351
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352 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; }
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353 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; }
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354
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355 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); }
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diff changeset
356 bool is_oop() const;
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357
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diff changeset
358 // semantic for fpu- and xmm-registers:
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diff changeset
359 // * is_float and is_double return true for xmm_registers
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360 // (so is_single_fpu and is_single_xmm are true)
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diff changeset
361 // * So you must always check for is_???_xmm prior to is_???_fpu to
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diff changeset
362 // distinguish between fpu- and xmm-registers
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363
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diff changeset
364 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); }
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365 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); }
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366 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); }
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367
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diff changeset
368 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); }
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diff changeset
369 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); }
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370 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); }
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371 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); }
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diff changeset
372 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); }
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373
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diff changeset
374 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); }
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375 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); }
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376 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); }
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377 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); }
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378 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); }
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diff changeset
379
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380 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); }
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diff changeset
381 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); }
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diff changeset
382 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); }
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diff changeset
383
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diff changeset
384 // fast accessor functions for special bits that do not work for pointers
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385 // (in this functions, the check for is_pointer() is omitted)
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386 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); }
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diff changeset
387 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); }
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diff changeset
388 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); }
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diff changeset
389 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; }
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diff changeset
390 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); }
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diff changeset
391
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diff changeset
392 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; }
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393 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; }
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diff changeset
394 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); }
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diff changeset
395 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); }
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diff changeset
396
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diff changeset
397
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diff changeset
398 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); }
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diff changeset
399 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); }
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diff changeset
400 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); }
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diff changeset
401 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
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diff changeset
402 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
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diff changeset
403 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); }
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diff changeset
404 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
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405 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
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406 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); }
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407 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
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408 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
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409 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); }
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410
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411 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; }
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412 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); }
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413 LIR_Address* as_address_ptr() const { return pointer()->as_address(); }
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414
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415 Register as_register() const;
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416 Register as_register_lo() const;
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417 Register as_register_hi() const;
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418
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419 Register as_pointer_register() {
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420 #ifdef _LP64
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421 if (is_double_cpu()) {
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422 assert(as_register_lo() == as_register_hi(), "should be a single register");
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423 return as_register_lo();
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424 }
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425 #endif
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426 return as_register();
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427 }
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428
304
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429 #ifdef X86
0
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430 XMMRegister as_xmm_float_reg() const;
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431 XMMRegister as_xmm_double_reg() const;
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432 // for compatibility with RInfo
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433 int fpu () const { return lo_reg_half(); }
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434 #endif // X86
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435 #if defined(SPARC) || defined(ARM) || defined(PPC)
0
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436 FloatRegister as_float_reg () const;
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437 FloatRegister as_double_reg () const;
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438 #endif
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439
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440 jint as_jint() const { return as_constant_ptr()->as_jint(); }
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441 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); }
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442 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); }
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443 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); }
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444 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); }
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445
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446 void print() const PRODUCT_RETURN;
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447 void print(outputStream* out) const PRODUCT_RETURN;
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448 };
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449
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450
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451 inline LIR_OprDesc::OprType as_OprType(BasicType type) {
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452 switch (type) {
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453 case T_INT: return LIR_OprDesc::int_type;
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454 case T_LONG: return LIR_OprDesc::long_type;
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455 case T_FLOAT: return LIR_OprDesc::float_type;
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456 case T_DOUBLE: return LIR_OprDesc::double_type;
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457 case T_OBJECT:
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458 case T_ARRAY: return LIR_OprDesc::object_type;
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459 case T_ILLEGAL: // fall through
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460 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;
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461 }
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462 }
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463
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464 inline BasicType as_BasicType(LIR_OprDesc::OprType t) {
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465 switch (t) {
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466 case LIR_OprDesc::int_type: return T_INT;
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467 case LIR_OprDesc::long_type: return T_LONG;
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468 case LIR_OprDesc::float_type: return T_FLOAT;
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469 case LIR_OprDesc::double_type: return T_DOUBLE;
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470 case LIR_OprDesc::object_type: return T_OBJECT;
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471 case LIR_OprDesc::unknown_type: // fall through
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472 default: ShouldNotReachHere(); return T_ILLEGAL;
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473 }
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474 }
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475
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476
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477 // LIR_Address
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478 class LIR_Address: public LIR_OprPtr {
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479 friend class LIR_OpVisitState;
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480
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481 public:
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482 // NOTE: currently these must be the log2 of the scale factor (and
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483 // must also be equivalent to the ScaleFactor enum in
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484 // assembler_i486.hpp)
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485 enum Scale {
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486 times_1 = 0,
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487 times_2 = 1,
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488 times_4 = 2,
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489 times_8 = 3
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490 };
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491
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492 private:
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493 LIR_Opr _base;
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494 LIR_Opr _index;
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495 Scale _scale;
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496 intx _disp;
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497 BasicType _type;
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498
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499 public:
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500 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type):
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501 _base(base)
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502 , _index(index)
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503 , _scale(times_1)
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504 , _type(type)
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505 , _disp(0) { verify(); }
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506
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parents: 1564
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507 LIR_Address(LIR_Opr base, intx disp, BasicType type):
0
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508 _base(base)
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509 , _index(LIR_OprDesc::illegalOpr())
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510 , _scale(times_1)
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511 , _type(type)
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512 , _disp(disp) { verify(); }
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513
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514 LIR_Address(LIR_Opr base, BasicType type):
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515 _base(base)
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516 , _index(LIR_OprDesc::illegalOpr())
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517 , _scale(times_1)
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diff changeset
518 , _type(type)
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519 , _disp(0) { verify(); }
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parents: 1564
diff changeset
520
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
521 #if defined(X86) || defined(ARM)
1572
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522 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type):
0
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523 _base(base)
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524 , _index(index)
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525 , _scale(scale)
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526 , _type(type)
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527 , _disp(disp) { verify(); }
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parents: 1579
diff changeset
528 #endif // X86 || ARM
0
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529
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530 LIR_Opr base() const { return _base; }
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531 LIR_Opr index() const { return _index; }
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532 Scale scale() const { return _scale; }
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533 intx disp() const { return _disp; }
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534
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535 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); }
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536
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537 virtual LIR_Address* as_address() { return this; }
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538 virtual BasicType type() const { return _type; }
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539 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
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540
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diff changeset
541 void verify() const PRODUCT_RETURN;
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542
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543 static Scale scale(BasicType type);
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544 };
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545
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546
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parents:
diff changeset
547 // operand factory
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548 class LIR_OprFact: public AllStatic {
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549 public:
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550
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551 static LIR_Opr illegalOpr;
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552
304
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parents: 0
diff changeset
553 static LIR_Opr single_cpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::int_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
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parents: 0
diff changeset
554 static LIR_Opr single_cpu_oop(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::object_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
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diff changeset
555 static LIR_Opr double_cpu(int reg1, int reg2) {
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
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diff changeset
556 LP64_ONLY(assert(reg1 == reg2, "must be identical"));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
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diff changeset
557 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
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diff changeset
558 (reg2 << LIR_OprDesc::reg2_shift) |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
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diff changeset
559 LIR_OprDesc::long_type |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
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diff changeset
560 LIR_OprDesc::cpu_register |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
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diff changeset
561 LIR_OprDesc::double_size);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
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diff changeset
562 }
0
a61af66fc99e Initial load
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parents:
diff changeset
563
304
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diff changeset
564 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
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never
parents: 0
diff changeset
565 LIR_OprDesc::float_type |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
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diff changeset
566 LIR_OprDesc::fpu_register |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
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diff changeset
567 LIR_OprDesc::single_size); }
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
568 #if defined(ARM)
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
569 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); }
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
570 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::float_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
571 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); }
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
572 #endif
0
a61af66fc99e Initial load
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parents:
diff changeset
573 #ifdef SPARC
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
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parents: 0
diff changeset
574 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
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parents: 0
diff changeset
575 (reg2 << LIR_OprDesc::reg2_shift) |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
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diff changeset
576 LIR_OprDesc::double_type |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
577 LIR_OprDesc::fpu_register |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
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parents: 0
diff changeset
578 LIR_OprDesc::double_size); }
0
a61af66fc99e Initial load
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parents:
diff changeset
579 #endif
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
580 #ifdef X86
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
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parents: 0
diff changeset
581 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
582 (reg << LIR_OprDesc::reg2_shift) |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
583 LIR_OprDesc::double_type |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
584 LIR_OprDesc::fpu_register |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
585 LIR_OprDesc::double_size); }
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
586
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
587 static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
588 LIR_OprDesc::float_type |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
589 LIR_OprDesc::fpu_register |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
590 LIR_OprDesc::single_size |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
591 LIR_OprDesc::is_xmm_mask); }
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
592 static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
593 (reg << LIR_OprDesc::reg2_shift) |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
594 LIR_OprDesc::double_type |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
595 LIR_OprDesc::fpu_register |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
596 LIR_OprDesc::double_size |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
597 LIR_OprDesc::is_xmm_mask); }
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
598 #endif // X86
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
599 #ifdef PPC
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
600 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
601 (reg << LIR_OprDesc::reg2_shift) |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
602 LIR_OprDesc::double_type |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
603 LIR_OprDesc::fpu_register |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
604 LIR_OprDesc::double_size); }
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
605 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
606 LIR_OprDesc::float_type |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
607 LIR_OprDesc::cpu_register |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
608 LIR_OprDesc::single_size); }
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
609 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift) |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
610 (reg1 << LIR_OprDesc::reg2_shift) |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
611 LIR_OprDesc::double_type |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
612 LIR_OprDesc::cpu_register |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
613 LIR_OprDesc::double_size); }
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
614 #endif // PPC
0
a61af66fc99e Initial load
duke
parents:
diff changeset
615
a61af66fc99e Initial load
duke
parents:
diff changeset
616 static LIR_Opr virtual_register(int index, BasicType type) {
a61af66fc99e Initial load
duke
parents:
diff changeset
617 LIR_Opr res;
a61af66fc99e Initial load
duke
parents:
diff changeset
618 switch (type) {
a61af66fc99e Initial load
duke
parents:
diff changeset
619 case T_OBJECT: // fall through
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
620 case T_ARRAY:
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
621 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
622 LIR_OprDesc::object_type |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
623 LIR_OprDesc::cpu_register |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
624 LIR_OprDesc::single_size |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
625 LIR_OprDesc::virtual_mask);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
626 break;
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
627
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
628 case T_INT:
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
629 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
630 LIR_OprDesc::int_type |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
631 LIR_OprDesc::cpu_register |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
632 LIR_OprDesc::single_size |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
633 LIR_OprDesc::virtual_mask);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
634 break;
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
635
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
636 case T_LONG:
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
637 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
638 LIR_OprDesc::long_type |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
639 LIR_OprDesc::cpu_register |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
640 LIR_OprDesc::double_size |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
641 LIR_OprDesc::virtual_mask);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
642 break;
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
643
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
644 #ifdef __SOFTFP__
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
645 case T_FLOAT:
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
646 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
647 LIR_OprDesc::float_type |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
648 LIR_OprDesc::cpu_register |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
649 LIR_OprDesc::single_size |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
650 LIR_OprDesc::virtual_mask);
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
651 break;
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
652 case T_DOUBLE:
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
653 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
654 LIR_OprDesc::double_type |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
655 LIR_OprDesc::cpu_register |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
656 LIR_OprDesc::double_size |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
657 LIR_OprDesc::virtual_mask);
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
658 break;
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
659 #else // __SOFTFP__
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
660 case T_FLOAT:
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
661 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
662 LIR_OprDesc::float_type |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
663 LIR_OprDesc::fpu_register |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
664 LIR_OprDesc::single_size |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
665 LIR_OprDesc::virtual_mask);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
666 break;
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
667
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
668 case
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
669 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
670 LIR_OprDesc::double_type |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
671 LIR_OprDesc::fpu_register |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
672 LIR_OprDesc::double_size |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
673 LIR_OprDesc::virtual_mask);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
674 break;
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
675 #endif // __SOFTFP__
0
a61af66fc99e Initial load
duke
parents:
diff changeset
676 default: ShouldNotReachHere(); res = illegalOpr;
a61af66fc99e Initial load
duke
parents:
diff changeset
677 }
a61af66fc99e Initial load
duke
parents:
diff changeset
678
a61af66fc99e Initial load
duke
parents:
diff changeset
679 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
680 res->validate_type();
a61af66fc99e Initial load
duke
parents:
diff changeset
681 assert(res->vreg_number() == index, "conversion check");
a61af66fc99e Initial load
duke
parents:
diff changeset
682 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base");
a61af66fc99e Initial load
duke
parents:
diff changeset
683 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
a61af66fc99e Initial load
duke
parents:
diff changeset
684
a61af66fc99e Initial load
duke
parents:
diff changeset
685 // old-style calculation; check if old and new method are equal
a61af66fc99e Initial load
duke
parents:
diff changeset
686 LIR_OprDesc::OprType t = as_OprType(type);
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
687 #ifdef __SOFTFP__
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
688 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
689 t |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
690 LIR_OprDesc::cpu_register |
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
691 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
692 #else // __SOFTFP__
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
693 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
694 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |
0
a61af66fc99e Initial load
duke
parents:
diff changeset
695 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
a61af66fc99e Initial load
duke
parents:
diff changeset
696 assert(res == old_res, "old and new method not equal");
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
697 #endif // __SOFTFP__
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
698 #endif // ASSERT
0
a61af66fc99e Initial load
duke
parents:
diff changeset
699
a61af66fc99e Initial load
duke
parents:
diff changeset
700 return res;
a61af66fc99e Initial load
duke
parents:
diff changeset
701 }
a61af66fc99e Initial load
duke
parents:
diff changeset
702
a61af66fc99e Initial load
duke
parents:
diff changeset
703 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as
a61af66fc99e Initial load
duke
parents:
diff changeset
704 // the index is platform independent; a double stack useing indeces 2 and 3 has always
a61af66fc99e Initial load
duke
parents:
diff changeset
705 // index 2.
a61af66fc99e Initial load
duke
parents:
diff changeset
706 static LIR_Opr stack(int index, BasicType type) {
a61af66fc99e Initial load
duke
parents:
diff changeset
707 LIR_Opr res;
a61af66fc99e Initial load
duke
parents:
diff changeset
708 switch (type) {
a61af66fc99e Initial load
duke
parents:
diff changeset
709 case T_OBJECT: // fall through
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
710 case T_ARRAY:
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
711 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
712 LIR_OprDesc::object_type |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
713 LIR_OprDesc::stack_value |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
714 LIR_OprDesc::single_size);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
715 break;
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
716
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
717 case T_INT:
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
718 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
719 LIR_OprDesc::int_type |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
720 LIR_OprDesc::stack_value |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
721 LIR_OprDesc::single_size);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
722 break;
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
723
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
724 case T_LONG:
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
725 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
726 LIR_OprDesc::long_type |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
727 LIR_OprDesc::stack_value |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
728 LIR_OprDesc::double_size);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
729 break;
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
730
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
731 case T_FLOAT:
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
732 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
733 LIR_OprDesc::float_type |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
734 LIR_OprDesc::stack_value |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
735 LIR_OprDesc::single_size);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
736 break;
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
737 case T_DOUBLE:
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
738 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
739 LIR_OprDesc::double_type |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
740 LIR_OprDesc::stack_value |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
741 LIR_OprDesc::double_size);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
742 break;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
743
a61af66fc99e Initial load
duke
parents:
diff changeset
744 default: ShouldNotReachHere(); res = illegalOpr;
a61af66fc99e Initial load
duke
parents:
diff changeset
745 }
a61af66fc99e Initial load
duke
parents:
diff changeset
746
a61af66fc99e Initial load
duke
parents:
diff changeset
747 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
748 assert(index >= 0, "index must be positive");
a61af66fc99e Initial load
duke
parents:
diff changeset
749 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
a61af66fc99e Initial load
duke
parents:
diff changeset
750
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
751 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
752 LIR_OprDesc::stack_value |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
753 as_OprType(type) |
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 0
diff changeset
754 LIR_OprDesc::size_for(type));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
755 assert(res == old_res, "old and new method not equal");
a61af66fc99e Initial load
duke
parents:
diff changeset
756 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
757
a61af66fc99e Initial load
duke
parents:
diff changeset
758 return res;
a61af66fc99e Initial load
duke
parents:
diff changeset
759 }
a61af66fc99e Initial load
duke
parents:
diff changeset
760
a61af66fc99e Initial load
duke
parents:
diff changeset
761 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
762 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
763 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
764 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
765 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
766 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; }
a61af66fc99e Initial load
duke
parents:
diff changeset
767 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
768 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
769 static LIR_Opr illegal() { return (LIR_Opr)-1; }
1297
c466efa608d5 6932496: c1: deoptimization of jsr subroutine fails on sparcv9
roland
parents: 1295
diff changeset
770 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
771
a61af66fc99e Initial load
duke
parents:
diff changeset
772 static LIR_Opr value_type(ValueType* type);
a61af66fc99e Initial load
duke
parents:
diff changeset
773 static LIR_Opr dummy_value_type(ValueType* type);
a61af66fc99e Initial load
duke
parents:
diff changeset
774 };
a61af66fc99e Initial load
duke
parents:
diff changeset
775
a61af66fc99e Initial load
duke
parents:
diff changeset
776
a61af66fc99e Initial load
duke
parents:
diff changeset
777 //-------------------------------------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
778 // LIR Instructions
a61af66fc99e Initial load
duke
parents:
diff changeset
779 //-------------------------------------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
780 //
a61af66fc99e Initial load
duke
parents:
diff changeset
781 // Note:
a61af66fc99e Initial load
duke
parents:
diff changeset
782 // - every instruction has a result operand
a61af66fc99e Initial load
duke
parents:
diff changeset
783 // - every instruction has an CodeEmitInfo operand (can be revisited later)
a61af66fc99e Initial load
duke
parents:
diff changeset
784 // - every instruction has a LIR_OpCode operand
a61af66fc99e Initial load
duke
parents:
diff changeset
785 // - LIR_OpN, means an instruction that has N input operands
a61af66fc99e Initial load
duke
parents:
diff changeset
786 //
a61af66fc99e Initial load
duke
parents:
diff changeset
787 // class hierarchy:
a61af66fc99e Initial load
duke
parents:
diff changeset
788 //
a61af66fc99e Initial load
duke
parents:
diff changeset
789 class LIR_Op;
a61af66fc99e Initial load
duke
parents:
diff changeset
790 class LIR_Op0;
a61af66fc99e Initial load
duke
parents:
diff changeset
791 class LIR_OpLabel;
a61af66fc99e Initial load
duke
parents:
diff changeset
792 class LIR_Op1;
a61af66fc99e Initial load
duke
parents:
diff changeset
793 class LIR_OpBranch;
a61af66fc99e Initial load
duke
parents:
diff changeset
794 class LIR_OpConvert;
a61af66fc99e Initial load
duke
parents:
diff changeset
795 class LIR_OpAllocObj;
a61af66fc99e Initial load
duke
parents:
diff changeset
796 class LIR_OpRoundFP;
a61af66fc99e Initial load
duke
parents:
diff changeset
797 class LIR_Op2;
a61af66fc99e Initial load
duke
parents:
diff changeset
798 class LIR_OpDelay;
a61af66fc99e Initial load
duke
parents:
diff changeset
799 class LIR_Op3;
a61af66fc99e Initial load
duke
parents:
diff changeset
800 class LIR_OpAllocArray;
a61af66fc99e Initial load
duke
parents:
diff changeset
801 class LIR_OpCall;
a61af66fc99e Initial load
duke
parents:
diff changeset
802 class LIR_OpJavaCall;
a61af66fc99e Initial load
duke
parents:
diff changeset
803 class LIR_OpRTCall;
a61af66fc99e Initial load
duke
parents:
diff changeset
804 class LIR_OpArrayCopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
805 class LIR_OpLock;
a61af66fc99e Initial load
duke
parents:
diff changeset
806 class LIR_OpTypeCheck;
a61af66fc99e Initial load
duke
parents:
diff changeset
807 class LIR_OpCompareAndSwap;
a61af66fc99e Initial load
duke
parents:
diff changeset
808 class LIR_OpProfileCall;
a61af66fc99e Initial load
duke
parents:
diff changeset
809
a61af66fc99e Initial load
duke
parents:
diff changeset
810
a61af66fc99e Initial load
duke
parents:
diff changeset
811 // LIR operation codes
a61af66fc99e Initial load
duke
parents:
diff changeset
812 enum LIR_Code {
a61af66fc99e Initial load
duke
parents:
diff changeset
813 lir_none
a61af66fc99e Initial load
duke
parents:
diff changeset
814 , begin_op0
a61af66fc99e Initial load
duke
parents:
diff changeset
815 , lir_word_align
a61af66fc99e Initial load
duke
parents:
diff changeset
816 , lir_label
a61af66fc99e Initial load
duke
parents:
diff changeset
817 , lir_nop
a61af66fc99e Initial load
duke
parents:
diff changeset
818 , lir_backwardbranch_target
a61af66fc99e Initial load
duke
parents:
diff changeset
819 , lir_std_entry
a61af66fc99e Initial load
duke
parents:
diff changeset
820 , lir_osr_entry
a61af66fc99e Initial load
duke
parents:
diff changeset
821 , lir_build_frame
a61af66fc99e Initial load
duke
parents:
diff changeset
822 , lir_fpop_raw
a61af66fc99e Initial load
duke
parents:
diff changeset
823 , lir_24bit_FPU
a61af66fc99e Initial load
duke
parents:
diff changeset
824 , lir_reset_FPU
a61af66fc99e Initial load
duke
parents:
diff changeset
825 , lir_breakpoint
a61af66fc99e Initial load
duke
parents:
diff changeset
826 , lir_rtcall
a61af66fc99e Initial load
duke
parents:
diff changeset
827 , lir_membar
a61af66fc99e Initial load
duke
parents:
diff changeset
828 , lir_membar_acquire
a61af66fc99e Initial load
duke
parents:
diff changeset
829 , lir_membar_release
a61af66fc99e Initial load
duke
parents:
diff changeset
830 , lir_get_thread
a61af66fc99e Initial load
duke
parents:
diff changeset
831 , end_op0
a61af66fc99e Initial load
duke
parents:
diff changeset
832 , begin_op1
a61af66fc99e Initial load
duke
parents:
diff changeset
833 , lir_fxch
a61af66fc99e Initial load
duke
parents:
diff changeset
834 , lir_fld
a61af66fc99e Initial load
duke
parents:
diff changeset
835 , lir_ffree
a61af66fc99e Initial load
duke
parents:
diff changeset
836 , lir_push
a61af66fc99e Initial load
duke
parents:
diff changeset
837 , lir_pop
a61af66fc99e Initial load
duke
parents:
diff changeset
838 , lir_null_check
a61af66fc99e Initial load
duke
parents:
diff changeset
839 , lir_return
a61af66fc99e Initial load
duke
parents:
diff changeset
840 , lir_leal
a61af66fc99e Initial load
duke
parents:
diff changeset
841 , lir_neg
a61af66fc99e Initial load
duke
parents:
diff changeset
842 , lir_branch
a61af66fc99e Initial load
duke
parents:
diff changeset
843 , lir_cond_float_branch
a61af66fc99e Initial load
duke
parents:
diff changeset
844 , lir_move
a61af66fc99e Initial load
duke
parents:
diff changeset
845 , lir_prefetchr
a61af66fc99e Initial load
duke
parents:
diff changeset
846 , lir_prefetchw
a61af66fc99e Initial load
duke
parents:
diff changeset
847 , lir_convert
a61af66fc99e Initial load
duke
parents:
diff changeset
848 , lir_alloc_object
a61af66fc99e Initial load
duke
parents:
diff changeset
849 , lir_monaddr
a61af66fc99e Initial load
duke
parents:
diff changeset
850 , lir_roundfp
a61af66fc99e Initial load
duke
parents:
diff changeset
851 , lir_safepoint
1378
9f5b60a14736 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 1297
diff changeset
852 , lir_unwind
0
a61af66fc99e Initial load
duke
parents:
diff changeset
853 , end_op1
a61af66fc99e Initial load
duke
parents:
diff changeset
854 , begin_op2
a61af66fc99e Initial load
duke
parents:
diff changeset
855 , lir_cmp
a61af66fc99e Initial load
duke
parents:
diff changeset
856 , lir_cmp_l2i
a61af66fc99e Initial load
duke
parents:
diff changeset
857 , lir_ucmp_fd2i
a61af66fc99e Initial load
duke
parents:
diff changeset
858 , lir_cmp_fd2i
a61af66fc99e Initial load
duke
parents:
diff changeset
859 , lir_cmove
a61af66fc99e Initial load
duke
parents:
diff changeset
860 , lir_add
a61af66fc99e Initial load
duke
parents:
diff changeset
861 , lir_sub
a61af66fc99e Initial load
duke
parents:
diff changeset
862 , lir_mul
a61af66fc99e Initial load
duke
parents:
diff changeset
863 , lir_mul_strictfp
a61af66fc99e Initial load
duke
parents:
diff changeset
864 , lir_div
a61af66fc99e Initial load
duke
parents:
diff changeset
865 , lir_div_strictfp
a61af66fc99e Initial load
duke
parents:
diff changeset
866 , lir_rem
a61af66fc99e Initial load
duke
parents:
diff changeset
867 , lir_sqrt
a61af66fc99e Initial load
duke
parents:
diff changeset
868 , lir_abs
a61af66fc99e Initial load
duke
parents:
diff changeset
869 , lir_sin
a61af66fc99e Initial load
duke
parents:
diff changeset
870 , lir_cos
a61af66fc99e Initial load
duke
parents:
diff changeset
871 , lir_tan
a61af66fc99e Initial load
duke
parents:
diff changeset
872 , lir_log
a61af66fc99e Initial load
duke
parents:
diff changeset
873 , lir_log10
a61af66fc99e Initial load
duke
parents:
diff changeset
874 , lir_logic_and
a61af66fc99e Initial load
duke
parents:
diff changeset
875 , lir_logic_or
a61af66fc99e Initial load
duke
parents:
diff changeset
876 , lir_logic_xor
a61af66fc99e Initial load
duke
parents:
diff changeset
877 , lir_shl
a61af66fc99e Initial load
duke
parents:
diff changeset
878 , lir_shr
a61af66fc99e Initial load
duke
parents:
diff changeset
879 , lir_ushr
a61af66fc99e Initial load
duke
parents:
diff changeset
880 , lir_alloc_array
a61af66fc99e Initial load
duke
parents:
diff changeset
881 , lir_throw
a61af66fc99e Initial load
duke
parents:
diff changeset
882 , lir_compare_to
a61af66fc99e Initial load
duke
parents:
diff changeset
883 , end_op2
a61af66fc99e Initial load
duke
parents:
diff changeset
884 , begin_op3
a61af66fc99e Initial load
duke
parents:
diff changeset
885 , lir_idiv
a61af66fc99e Initial load
duke
parents:
diff changeset
886 , lir_irem
a61af66fc99e Initial load
duke
parents:
diff changeset
887 , end_op3
a61af66fc99e Initial load
duke
parents:
diff changeset
888 , begin_opJavaCall
a61af66fc99e Initial load
duke
parents:
diff changeset
889 , lir_static_call
a61af66fc99e Initial load
duke
parents:
diff changeset
890 , lir_optvirtual_call
a61af66fc99e Initial load
duke
parents:
diff changeset
891 , lir_icvirtual_call
a61af66fc99e Initial load
duke
parents:
diff changeset
892 , lir_virtual_call
1295
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1175
diff changeset
893 , lir_dynamic_call
0
a61af66fc99e Initial load
duke
parents:
diff changeset
894 , end_opJavaCall
a61af66fc99e Initial load
duke
parents:
diff changeset
895 , begin_opArrayCopy
a61af66fc99e Initial load
duke
parents:
diff changeset
896 , lir_arraycopy
a61af66fc99e Initial load
duke
parents:
diff changeset
897 , end_opArrayCopy
a61af66fc99e Initial load
duke
parents:
diff changeset
898 , begin_opLock
a61af66fc99e Initial load
duke
parents:
diff changeset
899 , lir_lock
a61af66fc99e Initial load
duke
parents:
diff changeset
900 , lir_unlock
a61af66fc99e Initial load
duke
parents:
diff changeset
901 , end_opLock
a61af66fc99e Initial load
duke
parents:
diff changeset
902 , begin_delay_slot
a61af66fc99e Initial load
duke
parents:
diff changeset
903 , lir_delay_slot
a61af66fc99e Initial load
duke
parents:
diff changeset
904 , end_delay_slot
a61af66fc99e Initial load
duke
parents:
diff changeset
905 , begin_opTypeCheck
a61af66fc99e Initial load
duke
parents:
diff changeset
906 , lir_instanceof
a61af66fc99e Initial load
duke
parents:
diff changeset
907 , lir_checkcast
a61af66fc99e Initial load
duke
parents:
diff changeset
908 , lir_store_check
a61af66fc99e Initial load
duke
parents:
diff changeset
909 , end_opTypeCheck
a61af66fc99e Initial load
duke
parents:
diff changeset
910 , begin_opCompareAndSwap
a61af66fc99e Initial load
duke
parents:
diff changeset
911 , lir_cas_long
a61af66fc99e Initial load
duke
parents:
diff changeset
912 , lir_cas_obj
a61af66fc99e Initial load
duke
parents:
diff changeset
913 , lir_cas_int
a61af66fc99e Initial load
duke
parents:
diff changeset
914 , end_opCompareAndSwap
a61af66fc99e Initial load
duke
parents:
diff changeset
915 , begin_opMDOProfile
a61af66fc99e Initial load
duke
parents:
diff changeset
916 , lir_profile_call
a61af66fc99e Initial load
duke
parents:
diff changeset
917 , end_opMDOProfile
a61af66fc99e Initial load
duke
parents:
diff changeset
918 };
a61af66fc99e Initial load
duke
parents:
diff changeset
919
a61af66fc99e Initial load
duke
parents:
diff changeset
920
a61af66fc99e Initial load
duke
parents:
diff changeset
921 enum LIR_Condition {
a61af66fc99e Initial load
duke
parents:
diff changeset
922 lir_cond_equal
a61af66fc99e Initial load
duke
parents:
diff changeset
923 , lir_cond_notEqual
a61af66fc99e Initial load
duke
parents:
diff changeset
924 , lir_cond_less
a61af66fc99e Initial load
duke
parents:
diff changeset
925 , lir_cond_lessEqual
a61af66fc99e Initial load
duke
parents:
diff changeset
926 , lir_cond_greaterEqual
a61af66fc99e Initial load
duke
parents:
diff changeset
927 , lir_cond_greater
a61af66fc99e Initial load
duke
parents:
diff changeset
928 , lir_cond_belowEqual
a61af66fc99e Initial load
duke
parents:
diff changeset
929 , lir_cond_aboveEqual
a61af66fc99e Initial load
duke
parents:
diff changeset
930 , lir_cond_always
a61af66fc99e Initial load
duke
parents:
diff changeset
931 , lir_cond_unknown = -1
a61af66fc99e Initial load
duke
parents:
diff changeset
932 };
a61af66fc99e Initial load
duke
parents:
diff changeset
933
a61af66fc99e Initial load
duke
parents:
diff changeset
934
a61af66fc99e Initial load
duke
parents:
diff changeset
935 enum LIR_PatchCode {
a61af66fc99e Initial load
duke
parents:
diff changeset
936 lir_patch_none,
a61af66fc99e Initial load
duke
parents:
diff changeset
937 lir_patch_low,
a61af66fc99e Initial load
duke
parents:
diff changeset
938 lir_patch_high,
a61af66fc99e Initial load
duke
parents:
diff changeset
939 lir_patch_normal
a61af66fc99e Initial load
duke
parents:
diff changeset
940 };
a61af66fc99e Initial load
duke
parents:
diff changeset
941
a61af66fc99e Initial load
duke
parents:
diff changeset
942
a61af66fc99e Initial load
duke
parents:
diff changeset
943 enum LIR_MoveKind {
a61af66fc99e Initial load
duke
parents:
diff changeset
944 lir_move_normal,
a61af66fc99e Initial load
duke
parents:
diff changeset
945 lir_move_volatile,
a61af66fc99e Initial load
duke
parents:
diff changeset
946 lir_move_unaligned,
a61af66fc99e Initial load
duke
parents:
diff changeset
947 lir_move_max_flag
a61af66fc99e Initial load
duke
parents:
diff changeset
948 };
a61af66fc99e Initial load
duke
parents:
diff changeset
949
a61af66fc99e Initial load
duke
parents:
diff changeset
950
a61af66fc99e Initial load
duke
parents:
diff changeset
951 // --------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
952 // LIR_Op
a61af66fc99e Initial load
duke
parents:
diff changeset
953 // --------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
954 class LIR_Op: public CompilationResourceObj {
a61af66fc99e Initial load
duke
parents:
diff changeset
955 friend class LIR_OpVisitState;
a61af66fc99e Initial load
duke
parents:
diff changeset
956
a61af66fc99e Initial load
duke
parents:
diff changeset
957 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
958 private:
a61af66fc99e Initial load
duke
parents:
diff changeset
959 const char * _file;
a61af66fc99e Initial load
duke
parents:
diff changeset
960 int _line;
a61af66fc99e Initial load
duke
parents:
diff changeset
961 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
962
a61af66fc99e Initial load
duke
parents:
diff changeset
963 protected:
a61af66fc99e Initial load
duke
parents:
diff changeset
964 LIR_Opr _result;
a61af66fc99e Initial load
duke
parents:
diff changeset
965 unsigned short _code;
a61af66fc99e Initial load
duke
parents:
diff changeset
966 unsigned short _flags;
a61af66fc99e Initial load
duke
parents:
diff changeset
967 CodeEmitInfo* _info;
a61af66fc99e Initial load
duke
parents:
diff changeset
968 int _id; // value id for register allocation
a61af66fc99e Initial load
duke
parents:
diff changeset
969 int _fpu_pop_count;
a61af66fc99e Initial load
duke
parents:
diff changeset
970 Instruction* _source; // for debugging
a61af66fc99e Initial load
duke
parents:
diff changeset
971
a61af66fc99e Initial load
duke
parents:
diff changeset
972 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN;
a61af66fc99e Initial load
duke
parents:
diff changeset
973
a61af66fc99e Initial load
duke
parents:
diff changeset
974 protected:
a61af66fc99e Initial load
duke
parents:
diff changeset
975 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; }
a61af66fc99e Initial load
duke
parents:
diff changeset
976
a61af66fc99e Initial load
duke
parents:
diff changeset
977 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
978 LIR_Op()
a61af66fc99e Initial load
duke
parents:
diff changeset
979 : _result(LIR_OprFact::illegalOpr)
a61af66fc99e Initial load
duke
parents:
diff changeset
980 , _code(lir_none)
a61af66fc99e Initial load
duke
parents:
diff changeset
981 , _flags(0)
a61af66fc99e Initial load
duke
parents:
diff changeset
982 , _info(NULL)
a61af66fc99e Initial load
duke
parents:
diff changeset
983 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
984 , _file(NULL)
a61af66fc99e Initial load
duke
parents:
diff changeset
985 , _line(0)
a61af66fc99e Initial load
duke
parents:
diff changeset
986 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
987 , _fpu_pop_count(0)
a61af66fc99e Initial load
duke
parents:
diff changeset
988 , _source(NULL)
a61af66fc99e Initial load
duke
parents:
diff changeset
989 , _id(-1) {}
a61af66fc99e Initial load
duke
parents:
diff changeset
990
a61af66fc99e Initial load
duke
parents:
diff changeset
991 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info)
a61af66fc99e Initial load
duke
parents:
diff changeset
992 : _result(result)
a61af66fc99e Initial load
duke
parents:
diff changeset
993 , _code(code)
a61af66fc99e Initial load
duke
parents:
diff changeset
994 , _flags(0)
a61af66fc99e Initial load
duke
parents:
diff changeset
995 , _info(info)
a61af66fc99e Initial load
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parents:
diff changeset
996 #ifdef ASSERT
a61af66fc99e Initial load
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parents:
diff changeset
997 , _file(NULL)
a61af66fc99e Initial load
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parents:
diff changeset
998 , _line(0)
a61af66fc99e Initial load
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parents:
diff changeset
999 #endif
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parents:
diff changeset
1000 , _fpu_pop_count(0)
a61af66fc99e Initial load
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parents:
diff changeset
1001 , _source(NULL)
a61af66fc99e Initial load
duke
parents:
diff changeset
1002 , _id(-1) {}
a61af66fc99e Initial load
duke
parents:
diff changeset
1003
a61af66fc99e Initial load
duke
parents:
diff changeset
1004 CodeEmitInfo* info() const { return _info; }
a61af66fc99e Initial load
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parents:
diff changeset
1005 LIR_Code code() const { return (LIR_Code)_code; }
a61af66fc99e Initial load
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parents:
diff changeset
1006 LIR_Opr result_opr() const { return _result; }
a61af66fc99e Initial load
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parents:
diff changeset
1007 void set_result_opr(LIR_Opr opr) { _result = opr; }
a61af66fc99e Initial load
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parents:
diff changeset
1008
a61af66fc99e Initial load
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parents:
diff changeset
1009 #ifdef ASSERT
a61af66fc99e Initial load
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parents:
diff changeset
1010 void set_file_and_line(const char * file, int line) {
a61af66fc99e Initial load
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parents:
diff changeset
1011 _file = file;
a61af66fc99e Initial load
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parents:
diff changeset
1012 _line = line;
a61af66fc99e Initial load
duke
parents:
diff changeset
1013 }
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parents:
diff changeset
1014 #endif
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parents:
diff changeset
1015
a61af66fc99e Initial load
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parents:
diff changeset
1016 virtual const char * name() const PRODUCT_RETURN0;
a61af66fc99e Initial load
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parents:
diff changeset
1017
a61af66fc99e Initial load
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parents:
diff changeset
1018 int id() const { return _id; }
a61af66fc99e Initial load
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parents:
diff changeset
1019 void set_id(int id) { _id = id; }
a61af66fc99e Initial load
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parents:
diff changeset
1020
a61af66fc99e Initial load
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parents:
diff changeset
1021 // FPU stack simulation helpers -- only used on Intel
a61af66fc99e Initial load
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parents:
diff changeset
1022 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; }
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parents:
diff changeset
1023 int fpu_pop_count() const { return _fpu_pop_count; }
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parents:
diff changeset
1024 bool pop_fpu_stack() { return _fpu_pop_count > 0; }
a61af66fc99e Initial load
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parents:
diff changeset
1025
a61af66fc99e Initial load
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parents:
diff changeset
1026 Instruction* source() const { return _source; }
a61af66fc99e Initial load
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parents:
diff changeset
1027 void set_source(Instruction* ins) { _source = ins; }
a61af66fc99e Initial load
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parents:
diff changeset
1028
a61af66fc99e Initial load
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parents:
diff changeset
1029 virtual void emit_code(LIR_Assembler* masm) = 0;
a61af66fc99e Initial load
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parents:
diff changeset
1030 virtual void print_instr(outputStream* out) const = 0;
a61af66fc99e Initial load
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parents:
diff changeset
1031 virtual void print_on(outputStream* st) const PRODUCT_RETURN;
a61af66fc99e Initial load
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parents:
diff changeset
1032
a61af66fc99e Initial load
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parents:
diff changeset
1033 virtual LIR_OpCall* as_OpCall() { return NULL; }
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parents:
diff changeset
1034 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
a61af66fc99e Initial load
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parents:
diff changeset
1035 virtual LIR_OpLabel* as_OpLabel() { return NULL; }
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parents:
diff changeset
1036 virtual LIR_OpDelay* as_OpDelay() { return NULL; }
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parents:
diff changeset
1037 virtual LIR_OpLock* as_OpLock() { return NULL; }
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parents:
diff changeset
1038 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
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parents:
diff changeset
1039 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
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parents:
diff changeset
1040 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
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parents:
diff changeset
1041 virtual LIR_OpBranch* as_OpBranch() { return NULL; }
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parents:
diff changeset
1042 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
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parents:
diff changeset
1043 virtual LIR_OpConvert* as_OpConvert() { return NULL; }
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parents:
diff changeset
1044 virtual LIR_Op0* as_Op0() { return NULL; }
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parents:
diff changeset
1045 virtual LIR_Op1* as_Op1() { return NULL; }
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parents:
diff changeset
1046 virtual LIR_Op2* as_Op2() { return NULL; }
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parents:
diff changeset
1047 virtual LIR_Op3* as_Op3() { return NULL; }
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parents:
diff changeset
1048 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
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parents:
diff changeset
1049 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
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parents:
diff changeset
1050 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
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parents:
diff changeset
1051 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
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parents:
diff changeset
1052
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parents:
diff changeset
1053 virtual void verify() const {}
a61af66fc99e Initial load
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parents:
diff changeset
1054 };
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parents:
diff changeset
1055
a61af66fc99e Initial load
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parents:
diff changeset
1056 // for calls
a61af66fc99e Initial load
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parents:
diff changeset
1057 class LIR_OpCall: public LIR_Op {
a61af66fc99e Initial load
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parents:
diff changeset
1058 friend class LIR_OpVisitState;
a61af66fc99e Initial load
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parents:
diff changeset
1059
a61af66fc99e Initial load
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parents:
diff changeset
1060 protected:
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parents:
diff changeset
1061 address _addr;
a61af66fc99e Initial load
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parents:
diff changeset
1062 LIR_OprList* _arguments;
a61af66fc99e Initial load
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parents:
diff changeset
1063 protected:
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parents:
diff changeset
1064 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result,
a61af66fc99e Initial load
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parents:
diff changeset
1065 LIR_OprList* arguments, CodeEmitInfo* info = NULL)
a61af66fc99e Initial load
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parents:
diff changeset
1066 : LIR_Op(code, result, info)
a61af66fc99e Initial load
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parents:
diff changeset
1067 , _arguments(arguments)
a61af66fc99e Initial load
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parents:
diff changeset
1068 , _addr(addr) {}
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parents:
diff changeset
1069
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parents:
diff changeset
1070 public:
a61af66fc99e Initial load
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parents:
diff changeset
1071 address addr() const { return _addr; }
a61af66fc99e Initial load
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parents:
diff changeset
1072 const LIR_OprList* arguments() const { return _arguments; }
a61af66fc99e Initial load
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parents:
diff changeset
1073 virtual LIR_OpCall* as_OpCall() { return this; }
a61af66fc99e Initial load
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parents:
diff changeset
1074 };
a61af66fc99e Initial load
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parents:
diff changeset
1075
a61af66fc99e Initial load
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parents:
diff changeset
1076
a61af66fc99e Initial load
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parents:
diff changeset
1077 // --------------------------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
1078 // LIR_OpJavaCall
a61af66fc99e Initial load
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parents:
diff changeset
1079 // --------------------------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
1080 class LIR_OpJavaCall: public LIR_OpCall {
a61af66fc99e Initial load
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parents:
diff changeset
1081 friend class LIR_OpVisitState;
a61af66fc99e Initial load
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parents:
diff changeset
1082
a61af66fc99e Initial load
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parents:
diff changeset
1083 private:
1564
61b2245abf36 6930772: JSR 292 needs to support SPARC C1
twisti
parents: 1507
diff changeset
1084 ciMethod* _method;
61b2245abf36 6930772: JSR 292 needs to support SPARC C1
twisti
parents: 1507
diff changeset
1085 LIR_Opr _receiver;
61b2245abf36 6930772: JSR 292 needs to support SPARC C1
twisti
parents: 1507
diff changeset
1086 LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr.
0
a61af66fc99e Initial load
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parents:
diff changeset
1087
a61af66fc99e Initial load
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parents:
diff changeset
1088 public:
a61af66fc99e Initial load
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parents:
diff changeset
1089 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
a61af66fc99e Initial load
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parents:
diff changeset
1090 LIR_Opr receiver, LIR_Opr result,
a61af66fc99e Initial load
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parents:
diff changeset
1091 address addr, LIR_OprList* arguments,
a61af66fc99e Initial load
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parents:
diff changeset
1092 CodeEmitInfo* info)
a61af66fc99e Initial load
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parents:
diff changeset
1093 : LIR_OpCall(code, addr, result, arguments, info)
a61af66fc99e Initial load
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parents:
diff changeset
1094 , _receiver(receiver)
1564
61b2245abf36 6930772: JSR 292 needs to support SPARC C1
twisti
parents: 1507
diff changeset
1095 , _method(method)
61b2245abf36 6930772: JSR 292 needs to support SPARC C1
twisti
parents: 1507
diff changeset
1096 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
61b2245abf36 6930772: JSR 292 needs to support SPARC C1
twisti
parents: 1507
diff changeset
1097 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
0
a61af66fc99e Initial load
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parents:
diff changeset
1098
a61af66fc99e Initial load
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parents:
diff changeset
1099 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
a61af66fc99e Initial load
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parents:
diff changeset
1100 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset,
a61af66fc99e Initial load
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parents:
diff changeset
1101 LIR_OprList* arguments, CodeEmitInfo* info)
a61af66fc99e Initial load
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parents:
diff changeset
1102 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info)
a61af66fc99e Initial load
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parents:
diff changeset
1103 , _receiver(receiver)
1564
61b2245abf36 6930772: JSR 292 needs to support SPARC C1
twisti
parents: 1507
diff changeset
1104 , _method(method)
61b2245abf36 6930772: JSR 292 needs to support SPARC C1
twisti
parents: 1507
diff changeset
1105 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
61b2245abf36 6930772: JSR 292 needs to support SPARC C1
twisti
parents: 1507
diff changeset
1106 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
0
a61af66fc99e Initial load
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parents:
diff changeset
1107
a61af66fc99e Initial load
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parents:
diff changeset
1108 LIR_Opr receiver() const { return _receiver; }
a61af66fc99e Initial load
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parents:
diff changeset
1109 ciMethod* method() const { return _method; }
a61af66fc99e Initial load
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parents:
diff changeset
1110
1295
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1175
diff changeset
1111 // JSR 292 support.
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1175
diff changeset
1112 bool is_invokedynamic() const { return code() == lir_dynamic_call; }
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1175
diff changeset
1113 bool is_method_handle_invoke() const {
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1175
diff changeset
1114 return
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1175
diff changeset
1115 is_invokedynamic() // An invokedynamic is always a MethodHandle call site.
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1175
diff changeset
1116 ||
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1175
diff changeset
1117 (method()->holder()->name() == ciSymbol::java_dyn_MethodHandle() &&
1507
cd5dbf694d45 6939134: JSR 292 adjustments to method handle invocation
jrose
parents: 1378
diff changeset
1118 methodOopDesc::is_method_handle_invoke_name(method()->name()->sid()));
1295
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1175
diff changeset
1119 }
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1175
diff changeset
1120
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1121 intptr_t vtable_offset() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1122 assert(_code == lir_virtual_call, "only have vtable for real vcall");
a61af66fc99e Initial load
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parents:
diff changeset
1123 return (intptr_t) addr();
a61af66fc99e Initial load
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parents:
diff changeset
1124 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1125
a61af66fc99e Initial load
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parents:
diff changeset
1126 virtual void emit_code(LIR_Assembler* masm);
a61af66fc99e Initial load
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parents:
diff changeset
1127 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; }
a61af66fc99e Initial load
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parents:
diff changeset
1128 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
a61af66fc99e Initial load
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parents:
diff changeset
1129 };
a61af66fc99e Initial load
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parents:
diff changeset
1130
a61af66fc99e Initial load
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parents:
diff changeset
1131 // --------------------------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
1132 // LIR_OpLabel
a61af66fc99e Initial load
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parents:
diff changeset
1133 // --------------------------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
1134 // Location where a branch can continue
a61af66fc99e Initial load
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parents:
diff changeset
1135 class LIR_OpLabel: public LIR_Op {
a61af66fc99e Initial load
duke
parents:
diff changeset
1136 friend class LIR_OpVisitState;
a61af66fc99e Initial load
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parents:
diff changeset
1137
a61af66fc99e Initial load
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parents:
diff changeset
1138 private:
a61af66fc99e Initial load
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parents:
diff changeset
1139 Label* _label;
a61af66fc99e Initial load
duke
parents:
diff changeset
1140 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1141 LIR_OpLabel(Label* lbl)
a61af66fc99e Initial load
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parents:
diff changeset
1142 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL)
a61af66fc99e Initial load
duke
parents:
diff changeset
1143 , _label(lbl) {}
a61af66fc99e Initial load
duke
parents:
diff changeset
1144 Label* label() const { return _label; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1145
a61af66fc99e Initial load
duke
parents:
diff changeset
1146 virtual void emit_code(LIR_Assembler* masm);
a61af66fc99e Initial load
duke
parents:
diff changeset
1147 virtual LIR_OpLabel* as_OpLabel() { return this; }
a61af66fc99e Initial load
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parents:
diff changeset
1148 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
a61af66fc99e Initial load
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parents:
diff changeset
1149 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1150
a61af66fc99e Initial load
duke
parents:
diff changeset
1151 // LIR_OpArrayCopy
a61af66fc99e Initial load
duke
parents:
diff changeset
1152 class LIR_OpArrayCopy: public LIR_Op {
a61af66fc99e Initial load
duke
parents:
diff changeset
1153 friend class LIR_OpVisitState;
a61af66fc99e Initial load
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parents:
diff changeset
1154
a61af66fc99e Initial load
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parents:
diff changeset
1155 private:
a61af66fc99e Initial load
duke
parents:
diff changeset
1156 ArrayCopyStub* _stub;
a61af66fc99e Initial load
duke
parents:
diff changeset
1157 LIR_Opr _src;
a61af66fc99e Initial load
duke
parents:
diff changeset
1158 LIR_Opr _src_pos;
a61af66fc99e Initial load
duke
parents:
diff changeset
1159 LIR_Opr _dst;
a61af66fc99e Initial load
duke
parents:
diff changeset
1160 LIR_Opr _dst_pos;
a61af66fc99e Initial load
duke
parents:
diff changeset
1161 LIR_Opr _length;
a61af66fc99e Initial load
duke
parents:
diff changeset
1162 LIR_Opr _tmp;
a61af66fc99e Initial load
duke
parents:
diff changeset
1163 ciArrayKlass* _expected_type;
a61af66fc99e Initial load
duke
parents:
diff changeset
1164 int _flags;
a61af66fc99e Initial load
duke
parents:
diff changeset
1165
a61af66fc99e Initial load
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parents:
diff changeset
1166 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1167 enum Flags {
a61af66fc99e Initial load
duke
parents:
diff changeset
1168 src_null_check = 1 << 0,
a61af66fc99e Initial load
duke
parents:
diff changeset
1169 dst_null_check = 1 << 1,
a61af66fc99e Initial load
duke
parents:
diff changeset
1170 src_pos_positive_check = 1 << 2,
a61af66fc99e Initial load
duke
parents:
diff changeset
1171 dst_pos_positive_check = 1 << 3,
a61af66fc99e Initial load
duke
parents:
diff changeset
1172 length_positive_check = 1 << 4,
a61af66fc99e Initial load
duke
parents:
diff changeset
1173 src_range_check = 1 << 5,
a61af66fc99e Initial load
duke
parents:
diff changeset
1174 dst_range_check = 1 << 6,
a61af66fc99e Initial load
duke
parents:
diff changeset
1175 type_check = 1 << 7,
a61af66fc99e Initial load
duke
parents:
diff changeset
1176 all_flags = (1 << 8) - 1
a61af66fc99e Initial load
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parents:
diff changeset
1177 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1178
a61af66fc99e Initial load
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parents:
diff changeset
1179 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp,
a61af66fc99e Initial load
duke
parents:
diff changeset
1180 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info);
a61af66fc99e Initial load
duke
parents:
diff changeset
1181
a61af66fc99e Initial load
duke
parents:
diff changeset
1182 LIR_Opr src() const { return _src; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1183 LIR_Opr src_pos() const { return _src_pos; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1184 LIR_Opr dst() const { return _dst; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1185 LIR_Opr dst_pos() const { return _dst_pos; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1186 LIR_Opr length() const { return _length; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1187 LIR_Opr tmp() const { return _tmp; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1188 int flags() const { return _flags; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1189 ciArrayKlass* expected_type() const { return _expected_type; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1190 ArrayCopyStub* stub() const { return _stub; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1191
a61af66fc99e Initial load
duke
parents:
diff changeset
1192 virtual void emit_code(LIR_Assembler* masm);
a61af66fc99e Initial load
duke
parents:
diff changeset
1193 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1194 void print_instr(outputStream* out) const PRODUCT_RETURN;
a61af66fc99e Initial load
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parents:
diff changeset
1195 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1196
a61af66fc99e Initial load
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parents:
diff changeset
1197
a61af66fc99e Initial load
duke
parents:
diff changeset
1198 // --------------------------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
1199 // LIR_Op0
a61af66fc99e Initial load
duke
parents:
diff changeset
1200 // --------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1201 class LIR_Op0: public LIR_Op {
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duke
parents:
diff changeset
1202 friend class LIR_OpVisitState;
a61af66fc99e Initial load
duke
parents:
diff changeset
1203
a61af66fc99e Initial load
duke
parents:
diff changeset
1204 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1205 LIR_Op0(LIR_Code code)
a61af66fc99e Initial load
duke
parents:
diff changeset
1206 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1207 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL)
a61af66fc99e Initial load
duke
parents:
diff changeset
1208 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1209
a61af66fc99e Initial load
duke
parents:
diff changeset
1210 virtual void emit_code(LIR_Assembler* masm);
a61af66fc99e Initial load
duke
parents:
diff changeset
1211 virtual LIR_Op0* as_Op0() { return this; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1212 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
a61af66fc99e Initial load
duke
parents:
diff changeset
1213 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1214
a61af66fc99e Initial load
duke
parents:
diff changeset
1215
a61af66fc99e Initial load
duke
parents:
diff changeset
1216 // --------------------------------------------------
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parents:
diff changeset
1217 // LIR_Op1
a61af66fc99e Initial load
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parents:
diff changeset
1218 // --------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1219
a61af66fc99e Initial load
duke
parents:
diff changeset
1220 class LIR_Op1: public LIR_Op {
a61af66fc99e Initial load
duke
parents:
diff changeset
1221 friend class LIR_OpVisitState;
a61af66fc99e Initial load
duke
parents:
diff changeset
1222
a61af66fc99e Initial load
duke
parents:
diff changeset
1223 protected:
a61af66fc99e Initial load
duke
parents:
diff changeset
1224 LIR_Opr _opr; // input operand
a61af66fc99e Initial load
duke
parents:
diff changeset
1225 BasicType _type; // Operand types
a61af66fc99e Initial load
duke
parents:
diff changeset
1226 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?)
a61af66fc99e Initial load
duke
parents:
diff changeset
1227
a61af66fc99e Initial load
duke
parents:
diff changeset
1228 static void print_patch_code(outputStream* out, LIR_PatchCode code);
a61af66fc99e Initial load
duke
parents:
diff changeset
1229
a61af66fc99e Initial load
duke
parents:
diff changeset
1230 void set_kind(LIR_MoveKind kind) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1231 assert(code() == lir_move, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
1232 _flags = kind;
a61af66fc99e Initial load
duke
parents:
diff changeset
1233 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1234
a61af66fc99e Initial load
duke
parents:
diff changeset
1235 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1236 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL)
a61af66fc99e Initial load
duke
parents:
diff changeset
1237 : LIR_Op(code, result, info)
a61af66fc99e Initial load
duke
parents:
diff changeset
1238 , _opr(opr)
a61af66fc99e Initial load
duke
parents:
diff changeset
1239 , _patch(patch)
a61af66fc99e Initial load
duke
parents:
diff changeset
1240 , _type(type) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1241
a61af66fc99e Initial load
duke
parents:
diff changeset
1242 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind)
a61af66fc99e Initial load
duke
parents:
diff changeset
1243 : LIR_Op(code, result, info)
a61af66fc99e Initial load
duke
parents:
diff changeset
1244 , _opr(opr)
a61af66fc99e Initial load
duke
parents:
diff changeset
1245 , _patch(patch)
a61af66fc99e Initial load
duke
parents:
diff changeset
1246 , _type(type) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1247 assert(code == lir_move, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
1248 set_kind(kind);
a61af66fc99e Initial load
duke
parents:
diff changeset
1249 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1250
a61af66fc99e Initial load
duke
parents:
diff changeset
1251 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info)
a61af66fc99e Initial load
duke
parents:
diff changeset
1252 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
a61af66fc99e Initial load
duke
parents:
diff changeset
1253 , _opr(opr)
a61af66fc99e Initial load
duke
parents:
diff changeset
1254 , _patch(lir_patch_none)
a61af66fc99e Initial load
duke
parents:
diff changeset
1255 , _type(T_ILLEGAL) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1256
a61af66fc99e Initial load
duke
parents:
diff changeset
1257 LIR_Opr in_opr() const { return _opr; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1258 LIR_PatchCode patch_code() const { return _patch; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1259 BasicType type() const { return _type; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1260
a61af66fc99e Initial load
duke
parents:
diff changeset
1261 LIR_MoveKind move_kind() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1262 assert(code() == lir_move, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
1263 return (LIR_MoveKind)_flags;
a61af66fc99e Initial load
duke
parents:
diff changeset
1264 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1265
a61af66fc99e Initial load
duke
parents:
diff changeset
1266 virtual void emit_code(LIR_Assembler* masm);
a61af66fc99e Initial load
duke
parents:
diff changeset
1267 virtual LIR_Op1* as_Op1() { return this; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1268 virtual const char * name() const PRODUCT_RETURN0;
a61af66fc99e Initial load
duke
parents:
diff changeset
1269
a61af66fc99e Initial load
duke
parents:
diff changeset
1270 void set_in_opr(LIR_Opr opr) { _opr = opr; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1271
a61af66fc99e Initial load
duke
parents:
diff changeset
1272 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
a61af66fc99e Initial load
duke
parents:
diff changeset
1273 virtual void verify() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
1274 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1275
a61af66fc99e Initial load
duke
parents:
diff changeset
1276
a61af66fc99e Initial load
duke
parents:
diff changeset
1277 // for runtime calls
a61af66fc99e Initial load
duke
parents:
diff changeset
1278 class LIR_OpRTCall: public LIR_OpCall {
a61af66fc99e Initial load
duke
parents:
diff changeset
1279 friend class LIR_OpVisitState;
a61af66fc99e Initial load
duke
parents:
diff changeset
1280
a61af66fc99e Initial load
duke
parents:
diff changeset
1281 private:
a61af66fc99e Initial load
duke
parents:
diff changeset
1282 LIR_Opr _tmp;
a61af66fc99e Initial load
duke
parents:
diff changeset
1283 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1284 LIR_OpRTCall(address addr, LIR_Opr tmp,
a61af66fc99e Initial load
duke
parents:
diff changeset
1285 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
a61af66fc99e Initial load
duke
parents:
diff changeset
1286 : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
a61af66fc99e Initial load
duke
parents:
diff changeset
1287 , _tmp(tmp) {}
a61af66fc99e Initial load
duke
parents:
diff changeset
1288
a61af66fc99e Initial load
duke
parents:
diff changeset
1289 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
a61af66fc99e Initial load
duke
parents:
diff changeset
1290 virtual void emit_code(LIR_Assembler* masm);
a61af66fc99e Initial load
duke
parents:
diff changeset
1291 virtual LIR_OpRTCall* as_OpRTCall() { return this; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1292
a61af66fc99e Initial load
duke
parents:
diff changeset
1293 LIR_Opr tmp() const { return _tmp; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1294
a61af66fc99e Initial load
duke
parents:
diff changeset
1295 virtual void verify() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
1296 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1297
a61af66fc99e Initial load
duke
parents:
diff changeset
1298
a61af66fc99e Initial load
duke
parents:
diff changeset
1299 class LIR_OpBranch: public LIR_Op {
a61af66fc99e Initial load
duke
parents:
diff changeset
1300 friend class LIR_OpVisitState;
a61af66fc99e Initial load
duke
parents:
diff changeset
1301
a61af66fc99e Initial load
duke
parents:
diff changeset
1302 private:
a61af66fc99e Initial load
duke
parents:
diff changeset
1303 LIR_Condition _cond;
a61af66fc99e Initial load
duke
parents:
diff changeset
1304 BasicType _type;
a61af66fc99e Initial load
duke
parents:
diff changeset
1305 Label* _label;
a61af66fc99e Initial load
duke
parents:
diff changeset
1306 BlockBegin* _block; // if this is a branch to a block, this is the block
a61af66fc99e Initial load
duke
parents:
diff changeset
1307 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block
a61af66fc99e Initial load
duke
parents:
diff changeset
1308 CodeStub* _stub; // if this is a branch to a stub, this is the stub
a61af66fc99e Initial load
duke
parents:
diff changeset
1309
a61af66fc99e Initial load
duke
parents:
diff changeset
1310 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1311 LIR_OpBranch(LIR_Condition cond, Label* lbl)
a61af66fc99e Initial load
duke
parents:
diff changeset
1312 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
a61af66fc99e Initial load
duke
parents:
diff changeset
1313 , _cond(cond)
a61af66fc99e Initial load
duke
parents:
diff changeset
1314 , _label(lbl)
a61af66fc99e Initial load
duke
parents:
diff changeset
1315 , _block(NULL)
a61af66fc99e Initial load
duke
parents:
diff changeset
1316 , _ublock(NULL)
a61af66fc99e Initial load
duke
parents:
diff changeset
1317 , _stub(NULL) { }
a61af66fc99e Initial load
duke
parents:
diff changeset
1318
a61af66fc99e Initial load
duke
parents:
diff changeset
1319 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block);
a61af66fc99e Initial load
duke
parents:
diff changeset
1320 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
a61af66fc99e Initial load
duke
parents:
diff changeset
1321
a61af66fc99e Initial load
duke
parents:
diff changeset
1322 // for unordered comparisons
a61af66fc99e Initial load
duke
parents:
diff changeset
1323 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock);
a61af66fc99e Initial load
duke
parents:
diff changeset
1324
a61af66fc99e Initial load
duke
parents:
diff changeset
1325 LIR_Condition cond() const { return _cond; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1326 BasicType type() const { return _type; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1327 Label* label() const { return _label; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1328 BlockBegin* block() const { return _block; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1329 BlockBegin* ublock() const { return _ublock; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1330 CodeStub* stub() const { return _stub; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1331
a61af66fc99e Initial load
duke
parents:
diff changeset
1332 void change_block(BlockBegin* b);
a61af66fc99e Initial load
duke
parents:
diff changeset
1333 void change_ublock(BlockBegin* b);
a61af66fc99e Initial load
duke
parents:
diff changeset
1334 void negate_cond();
a61af66fc99e Initial load
duke
parents:
diff changeset
1335
a61af66fc99e Initial load
duke
parents:
diff changeset
1336 virtual void emit_code(LIR_Assembler* masm);
a61af66fc99e Initial load
duke
parents:
diff changeset
1337 virtual LIR_OpBranch* as_OpBranch() { return this; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1338 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
a61af66fc99e Initial load
duke
parents:
diff changeset
1339 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1340
a61af66fc99e Initial load
duke
parents:
diff changeset
1341
a61af66fc99e Initial load
duke
parents:
diff changeset
1342 class ConversionStub;
a61af66fc99e Initial load
duke
parents:
diff changeset
1343
a61af66fc99e Initial load
duke
parents:
diff changeset
1344 class LIR_OpConvert: public LIR_Op1 {
a61af66fc99e Initial load
duke
parents:
diff changeset
1345 friend class LIR_OpVisitState;
a61af66fc99e Initial load
duke
parents:
diff changeset
1346
a61af66fc99e Initial load
duke
parents:
diff changeset
1347 private:
a61af66fc99e Initial load
duke
parents:
diff changeset
1348 Bytecodes::Code _bytecode;
a61af66fc99e Initial load
duke
parents:
diff changeset
1349 ConversionStub* _stub;
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1350 #ifdef PPC
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1351 LIR_Opr _tmp1;
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1352 LIR_Opr _tmp2;
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1353 #endif
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1354
a61af66fc99e Initial load
duke
parents:
diff changeset
1355 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1356 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub)
a61af66fc99e Initial load
duke
parents:
diff changeset
1357 : LIR_Op1(lir_convert, opr, result)
a61af66fc99e Initial load
duke
parents:
diff changeset
1358 , _stub(stub)
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1359 #ifdef PPC
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1360 , _tmp1(LIR_OprDesc::illegalOpr())
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1361 , _tmp2(LIR_OprDesc::illegalOpr())
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1362 #endif
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1363 , _bytecode(code) {}
a61af66fc99e Initial load
duke
parents:
diff changeset
1364
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1365 #ifdef PPC
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1366 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1367 ,LIR_Opr tmp1, LIR_Opr tmp2)
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1368 : LIR_Op1(lir_convert, opr, result)
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1369 , _stub(stub)
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1370 , _tmp1(tmp1)
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1371 , _tmp2(tmp2)
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1372 , _bytecode(code) {}
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1373 #endif
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1374
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1375 Bytecodes::Code bytecode() const { return _bytecode; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1376 ConversionStub* stub() const { return _stub; }
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1377 #ifdef PPC
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1378 LIR_Opr tmp1() const { return _tmp1; }
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1379 LIR_Opr tmp2() const { return _tmp2; }
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1380 #endif
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1381
a61af66fc99e Initial load
duke
parents:
diff changeset
1382 virtual void emit_code(LIR_Assembler* masm);
a61af66fc99e Initial load
duke
parents:
diff changeset
1383 virtual LIR_OpConvert* as_OpConvert() { return this; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1384 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
a61af66fc99e Initial load
duke
parents:
diff changeset
1385
a61af66fc99e Initial load
duke
parents:
diff changeset
1386 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
a61af66fc99e Initial load
duke
parents:
diff changeset
1387 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1388
a61af66fc99e Initial load
duke
parents:
diff changeset
1389
a61af66fc99e Initial load
duke
parents:
diff changeset
1390 // LIR_OpAllocObj
a61af66fc99e Initial load
duke
parents:
diff changeset
1391 class LIR_OpAllocObj : public LIR_Op1 {
a61af66fc99e Initial load
duke
parents:
diff changeset
1392 friend class LIR_OpVisitState;
a61af66fc99e Initial load
duke
parents:
diff changeset
1393
a61af66fc99e Initial load
duke
parents:
diff changeset
1394 private:
a61af66fc99e Initial load
duke
parents:
diff changeset
1395 LIR_Opr _tmp1;
a61af66fc99e Initial load
duke
parents:
diff changeset
1396 LIR_Opr _tmp2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1397 LIR_Opr _tmp3;
a61af66fc99e Initial load
duke
parents:
diff changeset
1398 LIR_Opr _tmp4;
a61af66fc99e Initial load
duke
parents:
diff changeset
1399 int _hdr_size;
a61af66fc99e Initial load
duke
parents:
diff changeset
1400 int _obj_size;
a61af66fc99e Initial load
duke
parents:
diff changeset
1401 CodeStub* _stub;
a61af66fc99e Initial load
duke
parents:
diff changeset
1402 bool _init_check;
a61af66fc99e Initial load
duke
parents:
diff changeset
1403
a61af66fc99e Initial load
duke
parents:
diff changeset
1404 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1405 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
a61af66fc99e Initial load
duke
parents:
diff changeset
1406 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
a61af66fc99e Initial load
duke
parents:
diff changeset
1407 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
a61af66fc99e Initial load
duke
parents:
diff changeset
1408 : LIR_Op1(lir_alloc_object, klass, result)
a61af66fc99e Initial load
duke
parents:
diff changeset
1409 , _tmp1(t1)
a61af66fc99e Initial load
duke
parents:
diff changeset
1410 , _tmp2(t2)
a61af66fc99e Initial load
duke
parents:
diff changeset
1411 , _tmp3(t3)
a61af66fc99e Initial load
duke
parents:
diff changeset
1412 , _tmp4(t4)
a61af66fc99e Initial load
duke
parents:
diff changeset
1413 , _hdr_size(hdr_size)
a61af66fc99e Initial load
duke
parents:
diff changeset
1414 , _obj_size(obj_size)
a61af66fc99e Initial load
duke
parents:
diff changeset
1415 , _init_check(init_check)
a61af66fc99e Initial load
duke
parents:
diff changeset
1416 , _stub(stub) { }
a61af66fc99e Initial load
duke
parents:
diff changeset
1417
a61af66fc99e Initial load
duke
parents:
diff changeset
1418 LIR_Opr klass() const { return in_opr(); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1419 LIR_Opr obj() const { return result_opr(); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1420 LIR_Opr tmp1() const { return _tmp1; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1421 LIR_Opr tmp2() const { return _tmp2; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1422 LIR_Opr tmp3() const { return _tmp3; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1423 LIR_Opr tmp4() const { return _tmp4; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1424 int header_size() const { return _hdr_size; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1425 int object_size() const { return _obj_size; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1426 bool init_check() const { return _init_check; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1427 CodeStub* stub() const { return _stub; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1428
a61af66fc99e Initial load
duke
parents:
diff changeset
1429 virtual void emit_code(LIR_Assembler* masm);
a61af66fc99e Initial load
duke
parents:
diff changeset
1430 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1431 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
a61af66fc99e Initial load
duke
parents:
diff changeset
1432 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1433
a61af66fc99e Initial load
duke
parents:
diff changeset
1434
a61af66fc99e Initial load
duke
parents:
diff changeset
1435 // LIR_OpRoundFP
a61af66fc99e Initial load
duke
parents:
diff changeset
1436 class LIR_OpRoundFP : public LIR_Op1 {
a61af66fc99e Initial load
duke
parents:
diff changeset
1437 friend class LIR_OpVisitState;
a61af66fc99e Initial load
duke
parents:
diff changeset
1438
a61af66fc99e Initial load
duke
parents:
diff changeset
1439 private:
a61af66fc99e Initial load
duke
parents:
diff changeset
1440 LIR_Opr _tmp;
a61af66fc99e Initial load
duke
parents:
diff changeset
1441
a61af66fc99e Initial load
duke
parents:
diff changeset
1442 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1443 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result)
a61af66fc99e Initial load
duke
parents:
diff changeset
1444 : LIR_Op1(lir_roundfp, reg, result)
a61af66fc99e Initial load
duke
parents:
diff changeset
1445 , _tmp(stack_loc_temp) {}
a61af66fc99e Initial load
duke
parents:
diff changeset
1446
a61af66fc99e Initial load
duke
parents:
diff changeset
1447 LIR_Opr tmp() const { return _tmp; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1448 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1449 void print_instr(outputStream* out) const PRODUCT_RETURN;
a61af66fc99e Initial load
duke
parents:
diff changeset
1450 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1451
a61af66fc99e Initial load
duke
parents:
diff changeset
1452 // LIR_OpTypeCheck
a61af66fc99e Initial load
duke
parents:
diff changeset
1453 class LIR_OpTypeCheck: public LIR_Op {
a61af66fc99e Initial load
duke
parents:
diff changeset
1454 friend class LIR_OpVisitState;
a61af66fc99e Initial load
duke
parents:
diff changeset
1455
a61af66fc99e Initial load
duke
parents:
diff changeset
1456 private:
a61af66fc99e Initial load
duke
parents:
diff changeset
1457 LIR_Opr _object;
a61af66fc99e Initial load
duke
parents:
diff changeset
1458 LIR_Opr _array;
a61af66fc99e Initial load
duke
parents:
diff changeset
1459 ciKlass* _klass;
a61af66fc99e Initial load
duke
parents:
diff changeset
1460 LIR_Opr _tmp1;
a61af66fc99e Initial load
duke
parents:
diff changeset
1461 LIR_Opr _tmp2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1462 LIR_Opr _tmp3;
a61af66fc99e Initial load
duke
parents:
diff changeset
1463 bool _fast_check;
a61af66fc99e Initial load
duke
parents:
diff changeset
1464 CodeEmitInfo* _info_for_patch;
a61af66fc99e Initial load
duke
parents:
diff changeset
1465 CodeEmitInfo* _info_for_exception;
a61af66fc99e Initial load
duke
parents:
diff changeset
1466 CodeStub* _stub;
a61af66fc99e Initial load
duke
parents:
diff changeset
1467 // Helpers for Tier1UpdateMethodData
a61af66fc99e Initial load
duke
parents:
diff changeset
1468 ciMethod* _profiled_method;
a61af66fc99e Initial load
duke
parents:
diff changeset
1469 int _profiled_bci;
a61af66fc99e Initial load
duke
parents:
diff changeset
1470
a61af66fc99e Initial load
duke
parents:
diff changeset
1471 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1472 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
a61af66fc99e Initial load
duke
parents:
diff changeset
1473 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
a61af66fc99e Initial load
duke
parents:
diff changeset
1474 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
a61af66fc99e Initial load
duke
parents:
diff changeset
1475 ciMethod* profiled_method, int profiled_bci);
a61af66fc99e Initial load
duke
parents:
diff changeset
1476 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array,
a61af66fc99e Initial load
duke
parents:
diff changeset
1477 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception,
a61af66fc99e Initial load
duke
parents:
diff changeset
1478 ciMethod* profiled_method, int profiled_bci);
a61af66fc99e Initial load
duke
parents:
diff changeset
1479
a61af66fc99e Initial load
duke
parents:
diff changeset
1480 LIR_Opr object() const { return _object; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1481 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1482 LIR_Opr tmp1() const { return _tmp1; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1483 LIR_Opr tmp2() const { return _tmp2; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1484 LIR_Opr tmp3() const { return _tmp3; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1485 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1486 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1487 CodeEmitInfo* info_for_patch() const { return _info_for_patch; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1488 CodeEmitInfo* info_for_exception() const { return _info_for_exception; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1489 CodeStub* stub() const { return _stub; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1490
a61af66fc99e Initial load
duke
parents:
diff changeset
1491 // methodDataOop profiling
a61af66fc99e Initial load
duke
parents:
diff changeset
1492 ciMethod* profiled_method() { return _profiled_method; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1493 int profiled_bci() { return _profiled_bci; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1494
a61af66fc99e Initial load
duke
parents:
diff changeset
1495 virtual void emit_code(LIR_Assembler* masm);
a61af66fc99e Initial load
duke
parents:
diff changeset
1496 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1497 void print_instr(outputStream* out) const PRODUCT_RETURN;
a61af66fc99e Initial load
duke
parents:
diff changeset
1498 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1499
a61af66fc99e Initial load
duke
parents:
diff changeset
1500 // LIR_Op2
a61af66fc99e Initial load
duke
parents:
diff changeset
1501 class LIR_Op2: public LIR_Op {
a61af66fc99e Initial load
duke
parents:
diff changeset
1502 friend class LIR_OpVisitState;
a61af66fc99e Initial load
duke
parents:
diff changeset
1503
a61af66fc99e Initial load
duke
parents:
diff changeset
1504 int _fpu_stack_size; // for sin/cos implementation on Intel
a61af66fc99e Initial load
duke
parents:
diff changeset
1505
a61af66fc99e Initial load
duke
parents:
diff changeset
1506 protected:
a61af66fc99e Initial load
duke
parents:
diff changeset
1507 LIR_Opr _opr1;
a61af66fc99e Initial load
duke
parents:
diff changeset
1508 LIR_Opr _opr2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1509 BasicType _type;
a61af66fc99e Initial load
duke
parents:
diff changeset
1510 LIR_Opr _tmp;
a61af66fc99e Initial load
duke
parents:
diff changeset
1511 LIR_Condition _condition;
a61af66fc99e Initial load
duke
parents:
diff changeset
1512
a61af66fc99e Initial load
duke
parents:
diff changeset
1513 void verify() const;
a61af66fc99e Initial load
duke
parents:
diff changeset
1514
a61af66fc99e Initial load
duke
parents:
diff changeset
1515 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1516 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL)
a61af66fc99e Initial load
duke
parents:
diff changeset
1517 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
a61af66fc99e Initial load
duke
parents:
diff changeset
1518 , _opr1(opr1)
a61af66fc99e Initial load
duke
parents:
diff changeset
1519 , _opr2(opr2)
a61af66fc99e Initial load
duke
parents:
diff changeset
1520 , _type(T_ILLEGAL)
a61af66fc99e Initial load
duke
parents:
diff changeset
1521 , _condition(condition)
a61af66fc99e Initial load
duke
parents:
diff changeset
1522 , _fpu_stack_size(0)
a61af66fc99e Initial load
duke
parents:
diff changeset
1523 , _tmp(LIR_OprFact::illegalOpr) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1524 assert(code == lir_cmp, "code check");
a61af66fc99e Initial load
duke
parents:
diff changeset
1525 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1526
a61af66fc99e Initial load
duke
parents:
diff changeset
1527 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result)
a61af66fc99e Initial load
duke
parents:
diff changeset
1528 : LIR_Op(code, result, NULL)
a61af66fc99e Initial load
duke
parents:
diff changeset
1529 , _opr1(opr1)
a61af66fc99e Initial load
duke
parents:
diff changeset
1530 , _opr2(opr2)
a61af66fc99e Initial load
duke
parents:
diff changeset
1531 , _type(T_ILLEGAL)
a61af66fc99e Initial load
duke
parents:
diff changeset
1532 , _condition(condition)
a61af66fc99e Initial load
duke
parents:
diff changeset
1533 , _fpu_stack_size(0)
a61af66fc99e Initial load
duke
parents:
diff changeset
1534 , _tmp(LIR_OprFact::illegalOpr) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1535 assert(code == lir_cmove, "code check");
a61af66fc99e Initial load
duke
parents:
diff changeset
1536 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1537
a61af66fc99e Initial load
duke
parents:
diff changeset
1538 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
a61af66fc99e Initial load
duke
parents:
diff changeset
1539 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
a61af66fc99e Initial load
duke
parents:
diff changeset
1540 : LIR_Op(code, result, info)
a61af66fc99e Initial load
duke
parents:
diff changeset
1541 , _opr1(opr1)
a61af66fc99e Initial load
duke
parents:
diff changeset
1542 , _opr2(opr2)
a61af66fc99e Initial load
duke
parents:
diff changeset
1543 , _type(type)
a61af66fc99e Initial load
duke
parents:
diff changeset
1544 , _condition(lir_cond_unknown)
a61af66fc99e Initial load
duke
parents:
diff changeset
1545 , _fpu_stack_size(0)
a61af66fc99e Initial load
duke
parents:
diff changeset
1546 , _tmp(LIR_OprFact::illegalOpr) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1547 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
a61af66fc99e Initial load
duke
parents:
diff changeset
1548 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1549
a61af66fc99e Initial load
duke
parents:
diff changeset
1550 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp)
a61af66fc99e Initial load
duke
parents:
diff changeset
1551 : LIR_Op(code, result, NULL)
a61af66fc99e Initial load
duke
parents:
diff changeset
1552 , _opr1(opr1)
a61af66fc99e Initial load
duke
parents:
diff changeset
1553 , _opr2(opr2)
a61af66fc99e Initial load
duke
parents:
diff changeset
1554 , _type(T_ILLEGAL)
a61af66fc99e Initial load
duke
parents:
diff changeset
1555 , _condition(lir_cond_unknown)
a61af66fc99e Initial load
duke
parents:
diff changeset
1556 , _fpu_stack_size(0)
a61af66fc99e Initial load
duke
parents:
diff changeset
1557 , _tmp(tmp) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1558 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
a61af66fc99e Initial load
duke
parents:
diff changeset
1559 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1560
a61af66fc99e Initial load
duke
parents:
diff changeset
1561 LIR_Opr in_opr1() const { return _opr1; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1562 LIR_Opr in_opr2() const { return _opr2; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1563 BasicType type() const { return _type; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1564 LIR_Opr tmp_opr() const { return _tmp; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1565 LIR_Condition condition() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1566 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); return _condition;
a61af66fc99e Initial load
duke
parents:
diff changeset
1567 }
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1568 void set_condition(LIR_Condition condition) {
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1569 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition;
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1570 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1571
a61af66fc99e Initial load
duke
parents:
diff changeset
1572 void set_fpu_stack_size(int size) { _fpu_stack_size = size; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1573 int fpu_stack_size() const { return _fpu_stack_size; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1574
a61af66fc99e Initial load
duke
parents:
diff changeset
1575 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1576 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1577
a61af66fc99e Initial load
duke
parents:
diff changeset
1578 virtual void emit_code(LIR_Assembler* masm);
a61af66fc99e Initial load
duke
parents:
diff changeset
1579 virtual LIR_Op2* as_Op2() { return this; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1580 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
a61af66fc99e Initial load
duke
parents:
diff changeset
1581 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1582
a61af66fc99e Initial load
duke
parents:
diff changeset
1583 class LIR_OpAllocArray : public LIR_Op {
a61af66fc99e Initial load
duke
parents:
diff changeset
1584 friend class LIR_OpVisitState;
a61af66fc99e Initial load
duke
parents:
diff changeset
1585
a61af66fc99e Initial load
duke
parents:
diff changeset
1586 private:
a61af66fc99e Initial load
duke
parents:
diff changeset
1587 LIR_Opr _klass;
a61af66fc99e Initial load
duke
parents:
diff changeset
1588 LIR_Opr _len;
a61af66fc99e Initial load
duke
parents:
diff changeset
1589 LIR_Opr _tmp1;
a61af66fc99e Initial load
duke
parents:
diff changeset
1590 LIR_Opr _tmp2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1591 LIR_Opr _tmp3;
a61af66fc99e Initial load
duke
parents:
diff changeset
1592 LIR_Opr _tmp4;
a61af66fc99e Initial load
duke
parents:
diff changeset
1593 BasicType _type;
a61af66fc99e Initial load
duke
parents:
diff changeset
1594 CodeStub* _stub;
a61af66fc99e Initial load
duke
parents:
diff changeset
1595
a61af66fc99e Initial load
duke
parents:
diff changeset
1596 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1597 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
a61af66fc99e Initial load
duke
parents:
diff changeset
1598 : LIR_Op(lir_alloc_array, result, NULL)
a61af66fc99e Initial load
duke
parents:
diff changeset
1599 , _klass(klass)
a61af66fc99e Initial load
duke
parents:
diff changeset
1600 , _len(len)
a61af66fc99e Initial load
duke
parents:
diff changeset
1601 , _tmp1(t1)
a61af66fc99e Initial load
duke
parents:
diff changeset
1602 , _tmp2(t2)
a61af66fc99e Initial load
duke
parents:
diff changeset
1603 , _tmp3(t3)
a61af66fc99e Initial load
duke
parents:
diff changeset
1604 , _tmp4(t4)
a61af66fc99e Initial load
duke
parents:
diff changeset
1605 , _type(type)
a61af66fc99e Initial load
duke
parents:
diff changeset
1606 , _stub(stub) {}
a61af66fc99e Initial load
duke
parents:
diff changeset
1607
a61af66fc99e Initial load
duke
parents:
diff changeset
1608 LIR_Opr klass() const { return _klass; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1609 LIR_Opr len() const { return _len; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1610 LIR_Opr obj() const { return result_opr(); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1611 LIR_Opr tmp1() const { return _tmp1; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1612 LIR_Opr tmp2() const { return _tmp2; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1613 LIR_Opr tmp3() const { return _tmp3; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1614 LIR_Opr tmp4() const { return _tmp4; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1615 BasicType type() const { return _type; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1616 CodeStub* stub() const { return _stub; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1617
a61af66fc99e Initial load
duke
parents:
diff changeset
1618 virtual void emit_code(LIR_Assembler* masm);
a61af66fc99e Initial load
duke
parents:
diff changeset
1619 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1620 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
a61af66fc99e Initial load
duke
parents:
diff changeset
1621 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1622
a61af66fc99e Initial load
duke
parents:
diff changeset
1623
a61af66fc99e Initial load
duke
parents:
diff changeset
1624 class LIR_Op3: public LIR_Op {
a61af66fc99e Initial load
duke
parents:
diff changeset
1625 friend class LIR_OpVisitState;
a61af66fc99e Initial load
duke
parents:
diff changeset
1626
a61af66fc99e Initial load
duke
parents:
diff changeset
1627 private:
a61af66fc99e Initial load
duke
parents:
diff changeset
1628 LIR_Opr _opr1;
a61af66fc99e Initial load
duke
parents:
diff changeset
1629 LIR_Opr _opr2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1630 LIR_Opr _opr3;
a61af66fc99e Initial load
duke
parents:
diff changeset
1631 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1632 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
a61af66fc99e Initial load
duke
parents:
diff changeset
1633 : LIR_Op(code, result, info)
a61af66fc99e Initial load
duke
parents:
diff changeset
1634 , _opr1(opr1)
a61af66fc99e Initial load
duke
parents:
diff changeset
1635 , _opr2(opr2)
a61af66fc99e Initial load
duke
parents:
diff changeset
1636 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1637 LIR_Opr in_opr1() const { return _opr1; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1638 LIR_Opr in_opr2() const { return _opr2; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1639 LIR_Opr in_opr3() const { return _opr3; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1640
a61af66fc99e Initial load
duke
parents:
diff changeset
1641 virtual void emit_code(LIR_Assembler* masm);
a61af66fc99e Initial load
duke
parents:
diff changeset
1642 virtual LIR_Op3* as_Op3() { return this; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1643 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
a61af66fc99e Initial load
duke
parents:
diff changeset
1644 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1645
a61af66fc99e Initial load
duke
parents:
diff changeset
1646
a61af66fc99e Initial load
duke
parents:
diff changeset
1647 //--------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1648 class LabelObj: public CompilationResourceObj {
a61af66fc99e Initial load
duke
parents:
diff changeset
1649 private:
a61af66fc99e Initial load
duke
parents:
diff changeset
1650 Label _label;
a61af66fc99e Initial load
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parents:
diff changeset
1651 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1652 LabelObj() {}
a61af66fc99e Initial load
duke
parents:
diff changeset
1653 Label* label() { return &_label; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1654 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1655
a61af66fc99e Initial load
duke
parents:
diff changeset
1656
a61af66fc99e Initial load
duke
parents:
diff changeset
1657 class LIR_OpLock: public LIR_Op {
a61af66fc99e Initial load
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parents:
diff changeset
1658 friend class LIR_OpVisitState;
a61af66fc99e Initial load
duke
parents:
diff changeset
1659
a61af66fc99e Initial load
duke
parents:
diff changeset
1660 private:
a61af66fc99e Initial load
duke
parents:
diff changeset
1661 LIR_Opr _hdr;
a61af66fc99e Initial load
duke
parents:
diff changeset
1662 LIR_Opr _obj;
a61af66fc99e Initial load
duke
parents:
diff changeset
1663 LIR_Opr _lock;
a61af66fc99e Initial load
duke
parents:
diff changeset
1664 LIR_Opr _scratch;
a61af66fc99e Initial load
duke
parents:
diff changeset
1665 CodeStub* _stub;
a61af66fc99e Initial load
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parents:
diff changeset
1666 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1667 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info)
a61af66fc99e Initial load
duke
parents:
diff changeset
1668 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
a61af66fc99e Initial load
duke
parents:
diff changeset
1669 , _hdr(hdr)
a61af66fc99e Initial load
duke
parents:
diff changeset
1670 , _obj(obj)
a61af66fc99e Initial load
duke
parents:
diff changeset
1671 , _lock(lock)
a61af66fc99e Initial load
duke
parents:
diff changeset
1672 , _scratch(scratch)
a61af66fc99e Initial load
duke
parents:
diff changeset
1673 , _stub(stub) {}
a61af66fc99e Initial load
duke
parents:
diff changeset
1674
a61af66fc99e Initial load
duke
parents:
diff changeset
1675 LIR_Opr hdr_opr() const { return _hdr; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1676 LIR_Opr obj_opr() const { return _obj; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1677 LIR_Opr lock_opr() const { return _lock; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1678 LIR_Opr scratch_opr() const { return _scratch; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1679 CodeStub* stub() const { return _stub; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1680
a61af66fc99e Initial load
duke
parents:
diff changeset
1681 virtual void emit_code(LIR_Assembler* masm);
a61af66fc99e Initial load
duke
parents:
diff changeset
1682 virtual LIR_OpLock* as_OpLock() { return this; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1683 void print_instr(outputStream* out) const PRODUCT_RETURN;
a61af66fc99e Initial load
duke
parents:
diff changeset
1684 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1685
a61af66fc99e Initial load
duke
parents:
diff changeset
1686
a61af66fc99e Initial load
duke
parents:
diff changeset
1687 class LIR_OpDelay: public LIR_Op {
a61af66fc99e Initial load
duke
parents:
diff changeset
1688 friend class LIR_OpVisitState;
a61af66fc99e Initial load
duke
parents:
diff changeset
1689
a61af66fc99e Initial load
duke
parents:
diff changeset
1690 private:
a61af66fc99e Initial load
duke
parents:
diff changeset
1691 LIR_Op* _op;
a61af66fc99e Initial load
duke
parents:
diff changeset
1692
a61af66fc99e Initial load
duke
parents:
diff changeset
1693 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1694 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info):
a61af66fc99e Initial load
duke
parents:
diff changeset
1695 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info),
a61af66fc99e Initial load
duke
parents:
diff changeset
1696 _op(op) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1697 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops");
a61af66fc99e Initial load
duke
parents:
diff changeset
1698 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1699 virtual void emit_code(LIR_Assembler* masm);
a61af66fc99e Initial load
duke
parents:
diff changeset
1700 virtual LIR_OpDelay* as_OpDelay() { return this; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1701 void print_instr(outputStream* out) const PRODUCT_RETURN;
a61af66fc99e Initial load
duke
parents:
diff changeset
1702 LIR_Op* delay_op() const { return _op; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1703 CodeEmitInfo* call_info() const { return info(); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1704 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1705
a61af66fc99e Initial load
duke
parents:
diff changeset
1706
a61af66fc99e Initial load
duke
parents:
diff changeset
1707 // LIR_OpCompareAndSwap
a61af66fc99e Initial load
duke
parents:
diff changeset
1708 class LIR_OpCompareAndSwap : public LIR_Op {
a61af66fc99e Initial load
duke
parents:
diff changeset
1709 friend class LIR_OpVisitState;
a61af66fc99e Initial load
duke
parents:
diff changeset
1710
a61af66fc99e Initial load
duke
parents:
diff changeset
1711 private:
a61af66fc99e Initial load
duke
parents:
diff changeset
1712 LIR_Opr _addr;
a61af66fc99e Initial load
duke
parents:
diff changeset
1713 LIR_Opr _cmp_value;
a61af66fc99e Initial load
duke
parents:
diff changeset
1714 LIR_Opr _new_value;
a61af66fc99e Initial load
duke
parents:
diff changeset
1715 LIR_Opr _tmp1;
a61af66fc99e Initial load
duke
parents:
diff changeset
1716 LIR_Opr _tmp2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1717
a61af66fc99e Initial load
duke
parents:
diff changeset
1718 public:
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1719 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1720 LIR_Opr t1, LIR_Opr t2, LIR_Opr result)
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1721 : LIR_Op(code, result, NULL) // no result, no info
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1722 , _addr(addr)
a61af66fc99e Initial load
duke
parents:
diff changeset
1723 , _cmp_value(cmp_value)
a61af66fc99e Initial load
duke
parents:
diff changeset
1724 , _new_value(new_value)
a61af66fc99e Initial load
duke
parents:
diff changeset
1725 , _tmp1(t1)
a61af66fc99e Initial load
duke
parents:
diff changeset
1726 , _tmp2(t2) { }
a61af66fc99e Initial load
duke
parents:
diff changeset
1727
a61af66fc99e Initial load
duke
parents:
diff changeset
1728 LIR_Opr addr() const { return _addr; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1729 LIR_Opr cmp_value() const { return _cmp_value; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1730 LIR_Opr new_value() const { return _new_value; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1731 LIR_Opr tmp1() const { return _tmp1; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1732 LIR_Opr tmp2() const { return _tmp2; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1733
a61af66fc99e Initial load
duke
parents:
diff changeset
1734 virtual void emit_code(LIR_Assembler* masm);
a61af66fc99e Initial load
duke
parents:
diff changeset
1735 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1736 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
a61af66fc99e Initial load
duke
parents:
diff changeset
1737 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1738
a61af66fc99e Initial load
duke
parents:
diff changeset
1739 // LIR_OpProfileCall
a61af66fc99e Initial load
duke
parents:
diff changeset
1740 class LIR_OpProfileCall : public LIR_Op {
a61af66fc99e Initial load
duke
parents:
diff changeset
1741 friend class LIR_OpVisitState;
a61af66fc99e Initial load
duke
parents:
diff changeset
1742
a61af66fc99e Initial load
duke
parents:
diff changeset
1743 private:
a61af66fc99e Initial load
duke
parents:
diff changeset
1744 ciMethod* _profiled_method;
a61af66fc99e Initial load
duke
parents:
diff changeset
1745 int _profiled_bci;
a61af66fc99e Initial load
duke
parents:
diff changeset
1746 LIR_Opr _mdo;
a61af66fc99e Initial load
duke
parents:
diff changeset
1747 LIR_Opr _recv;
a61af66fc99e Initial load
duke
parents:
diff changeset
1748 LIR_Opr _tmp1;
a61af66fc99e Initial load
duke
parents:
diff changeset
1749 ciKlass* _known_holder;
a61af66fc99e Initial load
duke
parents:
diff changeset
1750
a61af66fc99e Initial load
duke
parents:
diff changeset
1751 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1752 // Destroys recv
a61af66fc99e Initial load
duke
parents:
diff changeset
1753 LIR_OpProfileCall(LIR_Code code, ciMethod* profiled_method, int profiled_bci, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder)
a61af66fc99e Initial load
duke
parents:
diff changeset
1754 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) // no result, no info
a61af66fc99e Initial load
duke
parents:
diff changeset
1755 , _profiled_method(profiled_method)
a61af66fc99e Initial load
duke
parents:
diff changeset
1756 , _profiled_bci(profiled_bci)
a61af66fc99e Initial load
duke
parents:
diff changeset
1757 , _mdo(mdo)
a61af66fc99e Initial load
duke
parents:
diff changeset
1758 , _recv(recv)
a61af66fc99e Initial load
duke
parents:
diff changeset
1759 , _tmp1(t1)
a61af66fc99e Initial load
duke
parents:
diff changeset
1760 , _known_holder(known_holder) { }
a61af66fc99e Initial load
duke
parents:
diff changeset
1761
a61af66fc99e Initial load
duke
parents:
diff changeset
1762 ciMethod* profiled_method() const { return _profiled_method; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1763 int profiled_bci() const { return _profiled_bci; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1764 LIR_Opr mdo() const { return _mdo; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1765 LIR_Opr recv() const { return _recv; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1766 LIR_Opr tmp1() const { return _tmp1; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1767 ciKlass* known_holder() const { return _known_holder; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1768
a61af66fc99e Initial load
duke
parents:
diff changeset
1769 virtual void emit_code(LIR_Assembler* masm);
a61af66fc99e Initial load
duke
parents:
diff changeset
1770 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1771 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
a61af66fc99e Initial load
duke
parents:
diff changeset
1772 };
a61af66fc99e Initial load
duke
parents:
diff changeset
1773
a61af66fc99e Initial load
duke
parents:
diff changeset
1774
a61af66fc99e Initial load
duke
parents:
diff changeset
1775 class LIR_InsertionBuffer;
a61af66fc99e Initial load
duke
parents:
diff changeset
1776
a61af66fc99e Initial load
duke
parents:
diff changeset
1777 //--------------------------------LIR_List---------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1778 // Maintains a list of LIR instructions (one instance of LIR_List per basic block)
a61af66fc99e Initial load
duke
parents:
diff changeset
1779 // The LIR instructions are appended by the LIR_List class itself;
a61af66fc99e Initial load
duke
parents:
diff changeset
1780 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1781 // Notes:
a61af66fc99e Initial load
duke
parents:
diff changeset
1782 // - all offsets are(should be) in bytes
a61af66fc99e Initial load
duke
parents:
diff changeset
1783 // - local positions are specified with an offset, with offset 0 being local 0
a61af66fc99e Initial load
duke
parents:
diff changeset
1784
a61af66fc99e Initial load
duke
parents:
diff changeset
1785 class LIR_List: public CompilationResourceObj {
a61af66fc99e Initial load
duke
parents:
diff changeset
1786 private:
a61af66fc99e Initial load
duke
parents:
diff changeset
1787 LIR_OpList _operations;
a61af66fc99e Initial load
duke
parents:
diff changeset
1788
a61af66fc99e Initial load
duke
parents:
diff changeset
1789 Compilation* _compilation;
a61af66fc99e Initial load
duke
parents:
diff changeset
1790 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
1791 BlockBegin* _block;
a61af66fc99e Initial load
duke
parents:
diff changeset
1792 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1793 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
1794 const char * _file;
a61af66fc99e Initial load
duke
parents:
diff changeset
1795 int _line;
a61af66fc99e Initial load
duke
parents:
diff changeset
1796 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1797
a61af66fc99e Initial load
duke
parents:
diff changeset
1798 void append(LIR_Op* op) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1799 if (op->source() == NULL)
a61af66fc99e Initial load
duke
parents:
diff changeset
1800 op->set_source(_compilation->current_instruction());
a61af66fc99e Initial load
duke
parents:
diff changeset
1801 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
1802 if (PrintIRWithLIR) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1803 _compilation->maybe_print_current_instruction();
a61af66fc99e Initial load
duke
parents:
diff changeset
1804 op->print(); tty->cr();
a61af66fc99e Initial load
duke
parents:
diff changeset
1805 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1806 #endif // PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
1807
a61af66fc99e Initial load
duke
parents:
diff changeset
1808 _operations.append(op);
a61af66fc99e Initial load
duke
parents:
diff changeset
1809
a61af66fc99e Initial load
duke
parents:
diff changeset
1810 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
1811 op->verify();
a61af66fc99e Initial load
duke
parents:
diff changeset
1812 op->set_file_and_line(_file, _line);
a61af66fc99e Initial load
duke
parents:
diff changeset
1813 _file = NULL;
a61af66fc99e Initial load
duke
parents:
diff changeset
1814 _line = 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
1815 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1816 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1817
a61af66fc99e Initial load
duke
parents:
diff changeset
1818 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
1819 LIR_List(Compilation* compilation, BlockBegin* block = NULL);
a61af66fc99e Initial load
duke
parents:
diff changeset
1820
a61af66fc99e Initial load
duke
parents:
diff changeset
1821 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
1822 void set_file_and_line(const char * file, int line);
a61af66fc99e Initial load
duke
parents:
diff changeset
1823 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1824
a61af66fc99e Initial load
duke
parents:
diff changeset
1825 //---------- accessors ---------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1826 LIR_OpList* instructions_list() { return &_operations; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1827 int length() const { return _operations.length(); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1828 LIR_Op* at(int i) const { return _operations.at(i); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1829
a61af66fc99e Initial load
duke
parents:
diff changeset
1830 NOT_PRODUCT(BlockBegin* block() const { return _block; });
a61af66fc99e Initial load
duke
parents:
diff changeset
1831
a61af66fc99e Initial load
duke
parents:
diff changeset
1832 // insert LIR_Ops in buffer to right places in LIR_List
a61af66fc99e Initial load
duke
parents:
diff changeset
1833 void append(LIR_InsertionBuffer* buffer);
a61af66fc99e Initial load
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parents:
diff changeset
1834
a61af66fc99e Initial load
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parents:
diff changeset
1835 //---------- mutators ---------------
a61af66fc99e Initial load
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parents:
diff changeset
1836 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1837 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1838
a61af66fc99e Initial load
duke
parents:
diff changeset
1839 //---------- printing -------------
a61af66fc99e Initial load
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parents:
diff changeset
1840 void print_instructions() PRODUCT_RETURN;
a61af66fc99e Initial load
duke
parents:
diff changeset
1841
a61af66fc99e Initial load
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parents:
diff changeset
1842
a61af66fc99e Initial load
duke
parents:
diff changeset
1843 //---------- instructions -------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1844 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
a61af66fc99e Initial load
duke
parents:
diff changeset
1845 address dest, LIR_OprList* arguments,
a61af66fc99e Initial load
duke
parents:
diff changeset
1846 CodeEmitInfo* info) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1847 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info));
a61af66fc99e Initial load
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parents:
diff changeset
1848 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1849 void call_static(ciMethod* method, LIR_Opr result,
a61af66fc99e Initial load
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parents:
diff changeset
1850 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
a61af66fc99e Initial load
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parents:
diff changeset
1851 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info));
a61af66fc99e Initial load
duke
parents:
diff changeset
1852 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1853 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
a61af66fc99e Initial load
duke
parents:
diff changeset
1854 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1855 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info));
a61af66fc99e Initial load
duke
parents:
diff changeset
1856 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1857 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
a61af66fc99e Initial load
duke
parents:
diff changeset
1858 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1859 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info));
a61af66fc99e Initial load
duke
parents:
diff changeset
1860 }
1295
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1175
diff changeset
1861 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1175
diff changeset
1862 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1175
diff changeset
1863 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info));
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1175
diff changeset
1864 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1865
a61af66fc99e Initial load
duke
parents:
diff changeset
1866 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1867 void word_align() { append(new LIR_Op0(lir_word_align)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1868 void membar() { append(new LIR_Op0(lir_membar)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1869 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1870 void membar_release() { append(new LIR_Op0(lir_membar_release)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1871
a61af66fc99e Initial load
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parents:
diff changeset
1872 void nop() { append(new LIR_Op0(lir_nop)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1873 void build_frame() { append(new LIR_Op0(lir_build_frame)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1874
a61af66fc99e Initial load
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parents:
diff changeset
1875 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); }
a61af66fc99e Initial load
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parents:
diff changeset
1876 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1877
a61af66fc99e Initial load
duke
parents:
diff changeset
1878 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1879
a61af66fc99e Initial load
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parents:
diff changeset
1880 void negate(LIR_Opr from, LIR_Opr to) { append(new LIR_Op1(lir_neg, from, to)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1881 void leal(LIR_Opr from, LIR_Opr result_reg) { append(new LIR_Op1(lir_leal, from, result_reg)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1882
a61af66fc99e Initial load
duke
parents:
diff changeset
1883 // result is a stack location for old backend and vreg for UseLinearScan
a61af66fc99e Initial load
duke
parents:
diff changeset
1884 // stack_loc_temp is an illegal register for old backend
a61af66fc99e Initial load
duke
parents:
diff changeset
1885 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1886 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1887 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1888 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1889 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1890 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1891 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1892
a61af66fc99e Initial load
duke
parents:
diff changeset
1893 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1894
a61af66fc99e Initial load
duke
parents:
diff changeset
1895 void oop2reg (jobject o, LIR_Opr reg) { append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1896 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info);
a61af66fc99e Initial load
duke
parents:
diff changeset
1897
a61af66fc99e Initial load
duke
parents:
diff changeset
1898 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1899
a61af66fc99e Initial load
duke
parents:
diff changeset
1900 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1901
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1902 #ifdef PPC
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1903 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); }
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1904 #endif
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1905 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1906
a61af66fc99e Initial load
duke
parents:
diff changeset
1907 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1908 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1909 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1910
a61af66fc99e Initial load
duke
parents:
diff changeset
1911 void null_check(LIR_Opr opr, CodeEmitInfo* info) { append(new LIR_Op1(lir_null_check, opr, info)); }
1378
9f5b60a14736 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 1297
diff changeset
1912 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
9f5b60a14736 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 1297
diff changeset
1913 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
9f5b60a14736 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 1297
diff changeset
1914 }
9f5b60a14736 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 1297
diff changeset
1915 void unwind_exception(LIR_Opr exceptionOop) {
9f5b60a14736 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 1297
diff changeset
1916 append(new LIR_Op1(lir_unwind, exceptionOop));
9f5b60a14736 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 1297
diff changeset
1917 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1918
a61af66fc99e Initial load
duke
parents:
diff changeset
1919 void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1920 append(new LIR_Op2(lir_compare_to, left, right, dst));
a61af66fc99e Initial load
duke
parents:
diff changeset
1921 }
a61af66fc99e Initial load
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parents:
diff changeset
1922
a61af66fc99e Initial load
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parents:
diff changeset
1923 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1924 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1925
a61af66fc99e Initial load
duke
parents:
diff changeset
1926 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1927 append(new LIR_Op2(lir_cmp, condition, left, right, info));
a61af66fc99e Initial load
duke
parents:
diff changeset
1928 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1929 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1930 cmp(condition, left, LIR_OprFact::intConst(right), info);
a61af66fc99e Initial load
duke
parents:
diff changeset
1931 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1932
a61af66fc99e Initial load
duke
parents:
diff changeset
1933 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
a61af66fc99e Initial load
duke
parents:
diff changeset
1934 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
a61af66fc99e Initial load
duke
parents:
diff changeset
1935
a61af66fc99e Initial load
duke
parents:
diff changeset
1936 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1937 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst));
a61af66fc99e Initial load
duke
parents:
diff changeset
1938 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1939
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1940 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1941 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1942 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1943 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1944 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1945 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1946
a61af66fc99e Initial load
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parents:
diff changeset
1947 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1948 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
953
ff1a29907b6c 6855215: Calculation error (NaN) after about 1500 calculations
never
parents: 337
diff changeset
1949 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); }
ff1a29907b6c 6855215: Calculation error (NaN) after about 1500 calculations
never
parents: 337
diff changeset
1950 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1951 void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1952 void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1953 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1954
a61af66fc99e Initial load
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parents:
diff changeset
1955 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1956 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1957 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1958 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1959 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1960 void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1961 void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
1962
a61af66fc99e Initial load
duke
parents:
diff changeset
1963 void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
a61af66fc99e Initial load
duke
parents:
diff changeset
1964 void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
a61af66fc99e Initial load
duke
parents:
diff changeset
1965
a61af66fc99e Initial load
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parents:
diff changeset
1966 void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
a61af66fc99e Initial load
duke
parents:
diff changeset
1967
a61af66fc99e Initial load
duke
parents:
diff changeset
1968 void prefetch(LIR_Address* addr, bool is_store);
a61af66fc99e Initial load
duke
parents:
diff changeset
1969
a61af66fc99e Initial load
duke
parents:
diff changeset
1970 void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
a61af66fc99e Initial load
duke
parents:
diff changeset
1971 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
a61af66fc99e Initial load
duke
parents:
diff changeset
1972 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
a61af66fc99e Initial load
duke
parents:
diff changeset
1973 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
a61af66fc99e Initial load
duke
parents:
diff changeset
1974 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
a61af66fc99e Initial load
duke
parents:
diff changeset
1975
a61af66fc99e Initial load
duke
parents:
diff changeset
1976 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
a61af66fc99e Initial load
duke
parents:
diff changeset
1977 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
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parents:
diff changeset
1978 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
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parents:
diff changeset
1979 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
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parents:
diff changeset
1980
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parents:
diff changeset
1981 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
a61af66fc99e Initial load
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parents:
diff changeset
1982 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub);
a61af66fc99e Initial load
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parents:
diff changeset
1983
a61af66fc99e Initial load
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parents:
diff changeset
1984 // jump is an unconditional branch
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parents:
diff changeset
1985 void jump(BlockBegin* block) {
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parents:
diff changeset
1986 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block));
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parents:
diff changeset
1987 }
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parents:
diff changeset
1988 void jump(CodeStub* stub) {
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parents:
diff changeset
1989 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub));
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parents:
diff changeset
1990 }
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parents:
diff changeset
1991 void branch(LIR_Condition cond, Label* lbl) { append(new LIR_OpBranch(cond, lbl)); }
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parents:
diff changeset
1992 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) {
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parents:
diff changeset
1993 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
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parents:
diff changeset
1994 append(new LIR_OpBranch(cond, type, block));
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parents:
diff changeset
1995 }
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parents:
diff changeset
1996 void branch(LIR_Condition cond, BasicType type, CodeStub* stub) {
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parents:
diff changeset
1997 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
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parents:
diff changeset
1998 append(new LIR_OpBranch(cond, type, stub));
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parents:
diff changeset
1999 }
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parents:
diff changeset
2000 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) {
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parents:
diff changeset
2001 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only");
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parents:
diff changeset
2002 append(new LIR_OpBranch(cond, type, block, unordered));
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parents:
diff changeset
2003 }
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parents:
diff changeset
2004
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parents:
diff changeset
2005 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
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parents:
diff changeset
2006 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
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parents:
diff changeset
2007 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
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parents:
diff changeset
2008
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parents:
diff changeset
2009 void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
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parents:
diff changeset
2010 void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
a61af66fc99e Initial load
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parents:
diff changeset
2011 void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
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parents:
diff changeset
2012
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parents:
diff changeset
2013 void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); }
a61af66fc99e Initial load
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parents:
diff changeset
2014 void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less);
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parents:
diff changeset
2015
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parents:
diff changeset
2016 void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) {
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parents:
diff changeset
2017 append(new LIR_OpRTCall(routine, tmp, result, arguments));
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parents:
diff changeset
2018 }
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parents:
diff changeset
2019
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parents:
diff changeset
2020 void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result,
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parents:
diff changeset
2021 LIR_OprList* arguments, CodeEmitInfo* info) {
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parents:
diff changeset
2022 append(new LIR_OpRTCall(routine, tmp, result, arguments, info));
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parents:
diff changeset
2023 }
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parents:
diff changeset
2024
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parents:
diff changeset
2025 void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); }
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
2026 void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub);
0
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parents:
diff changeset
2027 void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info);
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parents:
diff changeset
2028
a61af66fc99e Initial load
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parents:
diff changeset
2029 void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); }
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parents:
diff changeset
2030 void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); }
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parents:
diff changeset
2031 void breakpoint() { append(new LIR_Op0(lir_breakpoint)); }
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parents:
diff changeset
2032
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parents:
diff changeset
2033 void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); }
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parents:
diff changeset
2034
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parents:
diff changeset
2035 void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); }
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parents:
diff changeset
2036
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parents:
diff changeset
2037 void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
a61af66fc99e Initial load
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parents:
diff changeset
2038 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
a61af66fc99e Initial load
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parents:
diff changeset
2039 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
a61af66fc99e Initial load
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parents:
diff changeset
2040 ciMethod* profiled_method, int profiled_bci);
a61af66fc99e Initial load
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parents:
diff changeset
2041 void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch);
a61af66fc99e Initial load
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parents:
diff changeset
2042 void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception);
a61af66fc99e Initial load
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parents:
diff changeset
2043
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parents:
diff changeset
2044 // methodDataOop profiling
a61af66fc99e Initial load
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parents:
diff changeset
2045 void profile_call(ciMethod* method, int bci, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) { append(new LIR_OpProfileCall(lir_profile_call, method, bci, mdo, recv, t1, cha_klass)); }
a61af66fc99e Initial load
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parents:
diff changeset
2046 };
a61af66fc99e Initial load
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parents:
diff changeset
2047
a61af66fc99e Initial load
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parents:
diff changeset
2048 void print_LIR(BlockList* blocks);
a61af66fc99e Initial load
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parents:
diff changeset
2049
a61af66fc99e Initial load
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parents:
diff changeset
2050 class LIR_InsertionBuffer : public CompilationResourceObj {
a61af66fc99e Initial load
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parents:
diff changeset
2051 private:
a61af66fc99e Initial load
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parents:
diff changeset
2052 LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized)
a61af66fc99e Initial load
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parents:
diff changeset
2053
a61af66fc99e Initial load
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parents:
diff changeset
2054 // list of insertion points. index and count are stored alternately:
a61af66fc99e Initial load
duke
parents:
diff changeset
2055 // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted
a61af66fc99e Initial load
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parents:
diff changeset
2056 // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index
a61af66fc99e Initial load
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parents:
diff changeset
2057 intStack _index_and_count;
a61af66fc99e Initial load
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parents:
diff changeset
2058
a61af66fc99e Initial load
duke
parents:
diff changeset
2059 // the LIR_Ops to be inserted
a61af66fc99e Initial load
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parents:
diff changeset
2060 LIR_OpList _ops;
a61af66fc99e Initial load
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parents:
diff changeset
2061
a61af66fc99e Initial load
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parents:
diff changeset
2062 void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); }
a61af66fc99e Initial load
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parents:
diff changeset
2063 void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); }
a61af66fc99e Initial load
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parents:
diff changeset
2064 void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); }
a61af66fc99e Initial load
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parents:
diff changeset
2065
a61af66fc99e Initial load
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parents:
diff changeset
2066 #ifdef ASSERT
a61af66fc99e Initial load
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parents:
diff changeset
2067 void verify();
a61af66fc99e Initial load
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parents:
diff changeset
2068 #endif
a61af66fc99e Initial load
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parents:
diff changeset
2069 public:
a61af66fc99e Initial load
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parents:
diff changeset
2070 LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { }
a61af66fc99e Initial load
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parents:
diff changeset
2071
a61af66fc99e Initial load
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parents:
diff changeset
2072 // must be called before using the insertion buffer
a61af66fc99e Initial load
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parents:
diff changeset
2073 void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); }
a61af66fc99e Initial load
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parents:
diff changeset
2074 bool initialized() const { return _lir != NULL; }
a61af66fc99e Initial load
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parents:
diff changeset
2075 // called automatically when the buffer is appended to the LIR_List
a61af66fc99e Initial load
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parents:
diff changeset
2076 void finish() { _lir = NULL; }
a61af66fc99e Initial load
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parents:
diff changeset
2077
a61af66fc99e Initial load
duke
parents:
diff changeset
2078 // accessors
a61af66fc99e Initial load
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parents:
diff changeset
2079 LIR_List* lir_list() const { return _lir; }
a61af66fc99e Initial load
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parents:
diff changeset
2080 int number_of_insertion_points() const { return _index_and_count.length() >> 1; }
a61af66fc99e Initial load
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parents:
diff changeset
2081 int index_at(int i) const { return _index_and_count.at((i << 1)); }
a61af66fc99e Initial load
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parents:
diff changeset
2082 int count_at(int i) const { return _index_and_count.at((i << 1) + 1); }
a61af66fc99e Initial load
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parents:
diff changeset
2083
a61af66fc99e Initial load
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parents:
diff changeset
2084 int number_of_ops() const { return _ops.length(); }
a61af66fc99e Initial load
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parents:
diff changeset
2085 LIR_Op* op_at(int i) const { return _ops.at(i); }
a61af66fc99e Initial load
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parents:
diff changeset
2086
a61af66fc99e Initial load
duke
parents:
diff changeset
2087 // append an instruction to the buffer
a61af66fc99e Initial load
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parents:
diff changeset
2088 void append(int index, LIR_Op* op);
a61af66fc99e Initial load
duke
parents:
diff changeset
2089
a61af66fc99e Initial load
duke
parents:
diff changeset
2090 // instruction
a61af66fc99e Initial load
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parents:
diff changeset
2091 void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
a61af66fc99e Initial load
duke
parents:
diff changeset
2092 };
a61af66fc99e Initial load
duke
parents:
diff changeset
2093
a61af66fc99e Initial load
duke
parents:
diff changeset
2094
a61af66fc99e Initial load
duke
parents:
diff changeset
2095 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2096 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way.
a61af66fc99e Initial load
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parents:
diff changeset
2097 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes
a61af66fc99e Initial load
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parents:
diff changeset
2098 // information about the input, output and temporaries used by the
a61af66fc99e Initial load
duke
parents:
diff changeset
2099 // op to be recorded. It also records whether the op has call semantics
a61af66fc99e Initial load
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parents:
diff changeset
2100 // and also records all the CodeEmitInfos used by this op.
a61af66fc99e Initial load
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parents:
diff changeset
2101 //
a61af66fc99e Initial load
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parents:
diff changeset
2102
a61af66fc99e Initial load
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parents:
diff changeset
2103
a61af66fc99e Initial load
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parents:
diff changeset
2104 class LIR_OpVisitState: public StackObj {
a61af66fc99e Initial load
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parents:
diff changeset
2105 public:
a61af66fc99e Initial load
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parents:
diff changeset
2106 typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode;
a61af66fc99e Initial load
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parents:
diff changeset
2107
a61af66fc99e Initial load
duke
parents:
diff changeset
2108 enum {
1175
614b7e3a9f48 6879943: CTW failure jdk6_18/hotspot/src/share/vm/c1/c1_LIR.hpp:2029
never
parents: 953
diff changeset
2109 maxNumberOfOperands = 16,
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2110 maxNumberOfInfos = 4
a61af66fc99e Initial load
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parents:
diff changeset
2111 };
a61af66fc99e Initial load
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parents:
diff changeset
2112
a61af66fc99e Initial load
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parents:
diff changeset
2113 private:
a61af66fc99e Initial load
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parents:
diff changeset
2114 LIR_Op* _op;
a61af66fc99e Initial load
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parents:
diff changeset
2115
a61af66fc99e Initial load
duke
parents:
diff changeset
2116 // optimization: the operands and infos are not stored in a variable-length
a61af66fc99e Initial load
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parents:
diff changeset
2117 // list, but in a fixed-size array to save time of size checks and resizing
a61af66fc99e Initial load
duke
parents:
diff changeset
2118 int _oprs_len[numModes];
a61af66fc99e Initial load
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parents:
diff changeset
2119 LIR_Opr* _oprs_new[numModes][maxNumberOfOperands];
a61af66fc99e Initial load
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parents:
diff changeset
2120 int _info_len;
a61af66fc99e Initial load
duke
parents:
diff changeset
2121 CodeEmitInfo* _info_new[maxNumberOfInfos];
a61af66fc99e Initial load
duke
parents:
diff changeset
2122
a61af66fc99e Initial load
duke
parents:
diff changeset
2123 bool _has_call;
a61af66fc99e Initial load
duke
parents:
diff changeset
2124 bool _has_slow_case;
a61af66fc99e Initial load
duke
parents:
diff changeset
2125
a61af66fc99e Initial load
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parents:
diff changeset
2126
a61af66fc99e Initial load
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parents:
diff changeset
2127 // only include register operands
a61af66fc99e Initial load
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parents:
diff changeset
2128 // addresses are decomposed to the base and index registers
a61af66fc99e Initial load
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parents:
diff changeset
2129 // constants and stack operands are ignored
a61af66fc99e Initial load
duke
parents:
diff changeset
2130 void append(LIR_Opr& opr, OprMode mode) {
a61af66fc99e Initial load
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parents:
diff changeset
2131 assert(opr->is_valid(), "should not call this otherwise");
a61af66fc99e Initial load
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parents:
diff changeset
2132 assert(mode >= 0 && mode < numModes, "bad mode");
a61af66fc99e Initial load
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parents:
diff changeset
2133
a61af66fc99e Initial load
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parents:
diff changeset
2134 if (opr->is_register()) {
a61af66fc99e Initial load
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parents:
diff changeset
2135 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
a61af66fc99e Initial load
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parents:
diff changeset
2136 _oprs_new[mode][_oprs_len[mode]++] = &opr;
a61af66fc99e Initial load
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parents:
diff changeset
2137
a61af66fc99e Initial load
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parents:
diff changeset
2138 } else if (opr->is_pointer()) {
a61af66fc99e Initial load
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parents:
diff changeset
2139 LIR_Address* address = opr->as_address_ptr();
a61af66fc99e Initial load
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parents:
diff changeset
2140 if (address != NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2141 // special handling for addresses: add base and index register of the address
a61af66fc99e Initial load
duke
parents:
diff changeset
2142 // both are always input operands!
a61af66fc99e Initial load
duke
parents:
diff changeset
2143 if (address->_base->is_valid()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2144 assert(address->_base->is_register(), "must be");
a61af66fc99e Initial load
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parents:
diff changeset
2145 assert(_oprs_len[inputMode] < maxNumberOfOperands, "array overflow");
a61af66fc99e Initial load
duke
parents:
diff changeset
2146 _oprs_new[inputMode][_oprs_len[inputMode]++] = &address->_base;
a61af66fc99e Initial load
duke
parents:
diff changeset
2147 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2148 if (address->_index->is_valid()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2149 assert(address->_index->is_register(), "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
2150 assert(_oprs_len[inputMode] < maxNumberOfOperands, "array overflow");
a61af66fc99e Initial load
duke
parents:
diff changeset
2151 _oprs_new[inputMode][_oprs_len[inputMode]++] = &address->_index;
a61af66fc99e Initial load
duke
parents:
diff changeset
2152 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2153
a61af66fc99e Initial load
duke
parents:
diff changeset
2154 } else {
a61af66fc99e Initial load
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parents:
diff changeset
2155 assert(opr->is_constant(), "constant operands are not processed");
a61af66fc99e Initial load
duke
parents:
diff changeset
2156 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2157 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
2158 assert(opr->is_stack(), "stack operands are not processed");
a61af66fc99e Initial load
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parents:
diff changeset
2159 }
a61af66fc99e Initial load
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parents:
diff changeset
2160 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2161
a61af66fc99e Initial load
duke
parents:
diff changeset
2162 void append(CodeEmitInfo* info) {
a61af66fc99e Initial load
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parents:
diff changeset
2163 assert(info != NULL, "should not call this otherwise");
a61af66fc99e Initial load
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parents:
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2164 assert(_info_len < maxNumberOfInfos, "array overflow");
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2165 _info_new[_info_len++] = info;
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2166 }
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2167
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2168 public:
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2169 LIR_OpVisitState() { reset(); }
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2170
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2171 LIR_Op* op() const { return _op; }
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2172 void set_op(LIR_Op* op) { reset(); _op = op; }
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2173
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2174 bool has_call() const { return _has_call; }
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2175 bool has_slow_case() const { return _has_slow_case; }
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2176
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2177 void reset() {
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2178 _op = NULL;
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2179 _has_call = false;
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2180 _has_slow_case = false;
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2181
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2182 _oprs_len[inputMode] = 0;
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2183 _oprs_len[tempMode] = 0;
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2184 _oprs_len[outputMode] = 0;
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2185 _info_len = 0;
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2186 }
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2187
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2188
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2189 int opr_count(OprMode mode) const {
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2190 assert(mode >= 0 && mode < numModes, "bad mode");
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2191 return _oprs_len[mode];
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2192 }
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2193
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2194 LIR_Opr opr_at(OprMode mode, int index) const {
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2195 assert(mode >= 0 && mode < numModes, "bad mode");
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2196 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
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2197 return *_oprs_new[mode][index];
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2198 }
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2199
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2200 void set_opr_at(OprMode mode, int index, LIR_Opr opr) const {
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2201 assert(mode >= 0 && mode < numModes, "bad mode");
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2202 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
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2203 *_oprs_new[mode][index] = opr;
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2204 }
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2205
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2206 int info_count() const {
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2207 return _info_len;
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2208 }
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2209
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2210 CodeEmitInfo* info_at(int index) const {
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2211 assert(index < _info_len, "index out of bounds");
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2212 return _info_new[index];
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2213 }
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2214
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2215 XHandlers* all_xhandler();
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2216
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2217 // collects all register operands of the instruction
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2218 void visit(LIR_Op* op);
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2219
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2220 #if ASSERT
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2221 // check that an operation has no operands
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2222 bool no_operands(LIR_Op* op);
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2223 #endif
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2224
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parents:
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2225 // LIR_Op visitor functions use these to fill in the state
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2226 void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); }
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2227 void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); }
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2228 void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); }
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2229 void do_info(CodeEmitInfo* info) { append(info); }
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2230
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2231 void do_stub(CodeStub* stub);
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2232 void do_call() { _has_call = true; }
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2233 void do_slow_case() { _has_slow_case = true; }
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2234 void do_slow_case(CodeEmitInfo* info) {
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parents:
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2235 _has_slow_case = true;
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parents:
diff changeset
2236 append(info);
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2237 }
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2238 };
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2239
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parents:
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2240
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2241 inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; };