Mercurial > hg > truffle
annotate src/share/vm/opto/reg_split.cpp @ 1721:413ad0331a0c
6977924: Changes for 6975078 produce build error with certain gcc versions
Summary: The changes introduced for 6975078 assign badHeapOopVal to the _allocation field in the ResourceObj class. In 32 bit linux builds with certain versions of gcc this assignment will be flagged as an error while compiling allocation.cpp. In 32 bit builds the constant value badHeapOopVal (which is cast to an intptr_t) is negative. The _allocation field is typed as an unsigned intptr_t and gcc catches this as an error.
Reviewed-by: jcoomes, ysr, phh
| author | johnc |
|---|---|
| date | Wed, 18 Aug 2010 10:59:06 -0700 |
| parents | 6c9cc03d8726 |
| children | f55c4f82ab9d |
| rev | line source |
|---|---|
| 0 | 1 /* |
|
1552
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
628
diff
changeset
|
2 * Copyright (c) 2000, 2009, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
1552
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
628
diff
changeset
|
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
|
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
628
diff
changeset
|
20 * or visit www.oracle.com if you need additional information or have any |
|
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
628
diff
changeset
|
21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 25 #include "incls/_precompiled.incl" | |
| 26 #include "incls/_reg_split.cpp.incl" | |
| 27 | |
| 28 //------------------------------Split-------------------------------------- | |
| 605 | 29 // Walk the graph in RPO and for each lrg which spills, propagate reaching |
| 30 // definitions. During propagation, split the live range around regions of | |
| 0 | 31 // High Register Pressure (HRP). If a Def is in a region of Low Register |
| 32 // Pressure (LRP), it will not get spilled until we encounter a region of | |
| 33 // HRP between it and one of its uses. We will spill at the transition | |
| 34 // point between LRP and HRP. Uses in the HRP region will use the spilled | |
| 35 // Def. The first Use outside the HRP region will generate a SpillCopy to | |
| 36 // hoist the live range back up into a register, and all subsequent uses | |
| 37 // will use that new Def until another HRP region is encountered. Defs in | |
| 38 // HRP regions will get trailing SpillCopies to push the LRG down into the | |
| 39 // stack immediately. | |
| 40 // | |
| 41 // As a side effect, unlink from (hence make dead) coalesced copies. | |
| 42 // | |
| 43 | |
| 44 static const char out_of_nodes[] = "out of nodes during split"; | |
| 45 | |
| 46 //------------------------------get_spillcopy_wide----------------------------- | |
| 47 // Get a SpillCopy node with wide-enough masks. Use the 'wide-mask', the | |
| 48 // wide ideal-register spill-mask if possible. If the 'wide-mask' does | |
| 49 // not cover the input (or output), use the input (or output) mask instead. | |
| 50 Node *PhaseChaitin::get_spillcopy_wide( Node *def, Node *use, uint uidx ) { | |
| 51 // If ideal reg doesn't exist we've got a bad schedule happening | |
| 52 // that is forcing us to spill something that isn't spillable. | |
| 53 // Bail rather than abort | |
| 54 int ireg = def->ideal_reg(); | |
| 55 if( ireg == 0 || ireg == Op_RegFlags ) { | |
|
415
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
337
diff
changeset
|
56 assert(false, "attempted to spill a non-spillable item"); |
| 0 | 57 C->record_method_not_compilable("attempted to spill a non-spillable item"); |
| 58 return NULL; | |
| 59 } | |
| 60 if (C->check_node_count(NodeLimitFudgeFactor, out_of_nodes)) { | |
| 61 return NULL; | |
| 62 } | |
| 63 const RegMask *i_mask = &def->out_RegMask(); | |
| 64 const RegMask *w_mask = C->matcher()->idealreg2spillmask[ireg]; | |
| 65 const RegMask *o_mask = use ? &use->in_RegMask(uidx) : w_mask; | |
| 66 const RegMask *w_i_mask = w_mask->overlap( *i_mask ) ? w_mask : i_mask; | |
| 67 const RegMask *w_o_mask; | |
| 68 | |
| 69 if( w_mask->overlap( *o_mask ) && // Overlap AND | |
| 70 ((ireg != Op_RegL && ireg != Op_RegD // Single use or aligned | |
| 71 #ifdef _LP64 | |
| 72 && ireg != Op_RegP | |
| 73 #endif | |
| 74 ) || o_mask->is_aligned_Pairs()) ) { | |
| 75 // Don't come here for mis-aligned doubles | |
| 76 w_o_mask = w_mask; | |
| 77 } else { // wide ideal mask does not overlap with o_mask | |
| 78 // Mis-aligned doubles come here and XMM->FPR moves on x86. | |
| 79 w_o_mask = o_mask; // Must target desired registers | |
| 80 // Does the ideal-reg-mask overlap with o_mask? I.e., can I use | |
| 81 // a reg-reg move or do I need a trip across register classes | |
| 82 // (and thus through memory)? | |
| 83 if( !C->matcher()->idealreg2regmask[ireg]->overlap( *o_mask) && o_mask->is_UP() ) | |
| 84 // Here we assume a trip through memory is required. | |
| 85 w_i_mask = &C->FIRST_STACK_mask(); | |
| 86 } | |
| 87 return new (C) MachSpillCopyNode( def, *w_i_mask, *w_o_mask ); | |
| 88 } | |
| 89 | |
| 90 //------------------------------insert_proj------------------------------------ | |
| 605 | 91 // Insert the spill at chosen location. Skip over any intervening Proj's or |
| 0 | 92 // Phis. Skip over a CatchNode and projs, inserting in the fall-through block |
| 93 // instead. Update high-pressure indices. Create a new live range. | |
| 94 void PhaseChaitin::insert_proj( Block *b, uint i, Node *spill, uint maxlrg ) { | |
| 95 // Skip intervening ProjNodes. Do not insert between a ProjNode and | |
| 96 // its definer. | |
| 97 while( i < b->_nodes.size() && | |
| 98 (b->_nodes[i]->is_Proj() || | |
|
566
91263420e1c6
6791852: assert(b->_nodes[insidx] == n,"got insidx set incorrectly")
kvn
parents:
550
diff
changeset
|
99 b->_nodes[i]->is_Phi() ) ) |
| 0 | 100 i++; |
| 101 | |
| 102 // Do not insert between a call and his Catch | |
| 103 if( b->_nodes[i]->is_Catch() ) { | |
| 104 // Put the instruction at the top of the fall-thru block. | |
| 105 // Find the fall-thru projection | |
| 106 while( 1 ) { | |
| 107 const CatchProjNode *cp = b->_nodes[++i]->as_CatchProj(); | |
| 108 if( cp->_con == CatchProjNode::fall_through_index ) | |
| 109 break; | |
| 110 } | |
| 111 int sidx = i - b->end_idx()-1; | |
| 112 b = b->_succs[sidx]; // Switch to successor block | |
| 113 i = 1; // Right at start of block | |
| 114 } | |
| 115 | |
| 116 b->_nodes.insert(i,spill); // Insert node in block | |
| 117 _cfg._bbs.map(spill->_idx,b); // Update node->block mapping to reflect | |
| 118 // Adjust the point where we go hi-pressure | |
| 119 if( i <= b->_ihrp_index ) b->_ihrp_index++; | |
| 120 if( i <= b->_fhrp_index ) b->_fhrp_index++; | |
| 121 | |
| 122 // Assign a new Live Range Number to the SpillCopy and grow | |
| 123 // the node->live range mapping. | |
| 124 new_lrg(spill,maxlrg); | |
| 125 } | |
| 126 | |
| 127 //------------------------------split_DEF-------------------------------------- | |
| 605 | 128 // There are four categories of Split; UP/DOWN x DEF/USE |
| 0 | 129 // Only three of these really occur as DOWN/USE will always color |
| 130 // Any Split with a DEF cannot CISC-Spill now. Thus we need | |
| 131 // two helper routines, one for Split DEFS (insert after instruction), | |
| 132 // one for Split USES (insert before instruction). DEF insertion | |
| 133 // happens inside Split, where the Leaveblock array is updated. | |
| 134 uint PhaseChaitin::split_DEF( Node *def, Block *b, int loc, uint maxlrg, Node **Reachblock, Node **debug_defs, GrowableArray<uint> splits, int slidx ) { | |
| 135 #ifdef ASSERT | |
| 136 // Increment the counter for this lrg | |
| 137 splits.at_put(slidx, splits.at(slidx)+1); | |
| 138 #endif | |
| 139 // If we are spilling the memory op for an implicit null check, at the | |
| 140 // null check location (ie - null check is in HRP block) we need to do | |
| 141 // the null-check first, then spill-down in the following block. | |
| 142 // (The implicit_null_check function ensures the use is also dominated | |
| 143 // by the branch-not-taken block.) | |
| 144 Node *be = b->end(); | |
| 145 if( be->is_MachNullCheck() && be->in(1) == def && def == b->_nodes[loc] ) { | |
| 146 // Spill goes in the branch-not-taken block | |
| 147 b = b->_succs[b->_nodes[b->end_idx()+1]->Opcode() == Op_IfTrue]; | |
| 148 loc = 0; // Just past the Region | |
| 149 } | |
| 150 assert( loc >= 0, "must insert past block head" ); | |
| 151 | |
| 152 // Get a def-side SpillCopy | |
| 153 Node *spill = get_spillcopy_wide(def,NULL,0); | |
| 154 // Did we fail to split?, then bail | |
| 155 if (!spill) { | |
| 156 return 0; | |
| 157 } | |
| 158 | |
| 159 // Insert the spill at chosen location | |
| 160 insert_proj( b, loc+1, spill, maxlrg++); | |
| 161 | |
| 162 // Insert new node into Reaches array | |
| 163 Reachblock[slidx] = spill; | |
| 164 // Update debug list of reaching down definitions by adding this one | |
| 165 debug_defs[slidx] = spill; | |
| 166 | |
| 167 // return updated count of live ranges | |
| 168 return maxlrg; | |
| 169 } | |
| 170 | |
| 171 //------------------------------split_USE-------------------------------------- | |
| 172 // Splits at uses can involve redeffing the LRG, so no CISC Spilling there. | |
| 173 // Debug uses want to know if def is already stack enabled. | |
| 174 uint PhaseChaitin::split_USE( Node *def, Block *b, Node *use, uint useidx, uint maxlrg, bool def_down, bool cisc_sp, GrowableArray<uint> splits, int slidx ) { | |
| 175 #ifdef ASSERT | |
| 176 // Increment the counter for this lrg | |
| 177 splits.at_put(slidx, splits.at(slidx)+1); | |
| 178 #endif | |
| 179 | |
| 180 // Some setup stuff for handling debug node uses | |
| 181 JVMState* jvms = use->jvms(); | |
| 182 uint debug_start = jvms ? jvms->debug_start() : 999999; | |
| 183 uint debug_end = jvms ? jvms->debug_end() : 999999; | |
| 184 | |
| 185 //------------------------------------------- | |
| 186 // Check for use of debug info | |
| 187 if (useidx >= debug_start && useidx < debug_end) { | |
| 188 // Actually it's perfectly legal for constant debug info to appear | |
| 189 // just unlikely. In this case the optimizer left a ConI of a 4 | |
| 190 // as both inputs to a Phi with only a debug use. It's a single-def | |
| 191 // live range of a rematerializable value. The live range spills, | |
| 192 // rematerializes and now the ConI directly feeds into the debug info. | |
| 193 // assert(!def->is_Con(), "constant debug info already constructed directly"); | |
| 194 | |
| 195 // Special split handling for Debug Info | |
| 196 // If DEF is DOWN, just hook the edge and return | |
| 197 // If DEF is UP, Split it DOWN for this USE. | |
| 198 if( def->is_Mach() ) { | |
| 199 if( def_down ) { | |
| 200 // DEF is DOWN, so connect USE directly to the DEF | |
| 201 use->set_req(useidx, def); | |
| 202 } else { | |
| 203 // Block and index where the use occurs. | |
| 204 Block *b = _cfg._bbs[use->_idx]; | |
| 205 // Put the clone just prior to use | |
| 206 int bindex = b->find_node(use); | |
| 207 // DEF is UP, so must copy it DOWN and hook in USE | |
| 208 // Insert SpillCopy before the USE, which uses DEF as its input, | |
| 209 // and defs a new live range, which is used by this node. | |
| 210 Node *spill = get_spillcopy_wide(def,use,useidx); | |
| 211 // did we fail to split? | |
| 212 if (!spill) { | |
| 213 // Bail | |
| 214 return 0; | |
| 215 } | |
| 216 // insert into basic block | |
| 217 insert_proj( b, bindex, spill, maxlrg++ ); | |
| 218 // Use the new split | |
| 219 use->set_req(useidx,spill); | |
| 220 } | |
| 221 // No further split handling needed for this use | |
| 222 return maxlrg; | |
| 223 } // End special splitting for debug info live range | |
| 224 } // If debug info | |
| 225 | |
| 226 // CISC-SPILLING | |
| 227 // Finally, check to see if USE is CISC-Spillable, and if so, | |
| 228 // gather_lrg_masks will add the flags bit to its mask, and | |
| 229 // no use side copy is needed. This frees up the live range | |
| 230 // register choices without causing copy coalescing, etc. | |
| 231 if( UseCISCSpill && cisc_sp ) { | |
| 232 int inp = use->cisc_operand(); | |
| 233 if( inp != AdlcVMDeps::Not_cisc_spillable ) | |
| 234 // Convert operand number to edge index number | |
| 235 inp = use->as_Mach()->operand_index(inp); | |
| 236 if( inp == (int)useidx ) { | |
| 237 use->set_req(useidx, def); | |
| 238 #ifndef PRODUCT | |
| 239 if( TraceCISCSpill ) { | |
| 240 tty->print(" set_split: "); | |
| 241 use->dump(); | |
| 242 } | |
| 243 #endif | |
| 244 return maxlrg; | |
| 245 } | |
| 246 } | |
| 247 | |
| 248 //------------------------------------------- | |
| 249 // Insert a Copy before the use | |
| 250 | |
| 251 // Block and index where the use occurs. | |
| 252 int bindex; | |
| 253 // Phi input spill-copys belong at the end of the prior block | |
| 254 if( use->is_Phi() ) { | |
| 255 b = _cfg._bbs[b->pred(useidx)->_idx]; | |
| 256 bindex = b->end_idx(); | |
| 257 } else { | |
| 258 // Put the clone just prior to use | |
| 259 bindex = b->find_node(use); | |
| 260 } | |
| 261 | |
| 262 Node *spill = get_spillcopy_wide( def, use, useidx ); | |
| 263 if( !spill ) return 0; // Bailed out | |
| 264 // Insert SpillCopy before the USE, which uses the reaching DEF as | |
| 265 // its input, and defs a new live range, which is used by this node. | |
| 266 insert_proj( b, bindex, spill, maxlrg++ ); | |
| 267 // Use the spill/clone | |
| 268 use->set_req(useidx,spill); | |
| 269 | |
| 270 // return updated live range count | |
| 271 return maxlrg; | |
| 272 } | |
| 273 | |
|
1693
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
274 //------------------------------clone_node---------------------------- |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
275 // Clone node with anti dependence check. |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
276 Node* clone_node(Node* def, Block *b, Compile* C) { |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
277 if (def->needs_anti_dependence_check()) { |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
278 #ifdef ASSERT |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
279 if (Verbose) { |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
280 tty->print_cr("RA attempts to clone node with anti_dependence:"); |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
281 def->dump(-1); tty->cr(); |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
282 tty->print_cr("into block:"); |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
283 b->dump(); |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
284 } |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
285 #endif |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
286 if (C->subsume_loads() == true && !C->failing()) { |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
287 // Retry with subsume_loads == false |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
288 // If this is the first failure, the sentinel string will "stick" |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
289 // to the Compile object, and the C2Compiler will see it and retry. |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
290 C->record_failure(C2Compiler::retry_no_subsuming_loads()); |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
291 } else { |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
292 // Bailout without retry |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
293 C->record_method_not_compilable("RA Split failed: attempt to clone node with anti_dependence"); |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
294 } |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
295 return 0; |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
296 } |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
297 return def->clone(); |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
298 } |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
299 |
| 0 | 300 //------------------------------split_Rematerialize---------------------------- |
| 301 // Clone a local copy of the def. | |
| 302 Node *PhaseChaitin::split_Rematerialize( Node *def, Block *b, uint insidx, uint &maxlrg, GrowableArray<uint> splits, int slidx, uint *lrg2reach, Node **Reachblock, bool walkThru ) { | |
| 303 // The input live ranges will be stretched to the site of the new | |
| 304 // instruction. They might be stretched past a def and will thus | |
| 305 // have the old and new values of the same live range alive at the | |
| 306 // same time - a definite no-no. Split out private copies of | |
| 307 // the inputs. | |
| 308 if( def->req() > 1 ) { | |
| 309 for( uint i = 1; i < def->req(); i++ ) { | |
| 310 Node *in = def->in(i); | |
| 311 // Check for single-def (LRG cannot redefined) | |
| 312 uint lidx = n2lidx(in); | |
| 313 if( lidx >= _maxlrg ) continue; // Value is a recent spill-copy | |
|
295
ea18057223c4
6732194: Data corruption dependent on -server/-client/-Xbatch
never
parents:
0
diff
changeset
|
314 if (lrgs(lidx).is_singledef()) continue; |
| 0 | 315 |
| 316 Block *b_def = _cfg._bbs[def->_idx]; | |
| 317 int idx_def = b_def->find_node(def); | |
| 318 Node *in_spill = get_spillcopy_wide( in, def, i ); | |
| 319 if( !in_spill ) return 0; // Bailed out | |
| 320 insert_proj(b_def,idx_def,in_spill,maxlrg++); | |
| 321 if( b_def == b ) | |
| 322 insidx++; | |
| 323 def->set_req(i,in_spill); | |
| 324 } | |
| 325 } | |
| 326 | |
|
1693
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
327 Node *spill = clone_node(def, b, C); |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
328 if (spill == NULL || C->check_node_count(NodeLimitFudgeFactor, out_of_nodes)) { |
| 0 | 329 // Check when generating nodes |
| 330 return 0; | |
| 331 } | |
| 332 | |
| 333 // See if any inputs are currently being spilled, and take the | |
| 334 // latest copy of spilled inputs. | |
| 335 if( spill->req() > 1 ) { | |
| 336 for( uint i = 1; i < spill->req(); i++ ) { | |
| 337 Node *in = spill->in(i); | |
| 338 uint lidx = Find_id(in); | |
| 339 | |
| 340 // Walk backwards thru spill copy node intermediates | |
|
295
ea18057223c4
6732194: Data corruption dependent on -server/-client/-Xbatch
never
parents:
0
diff
changeset
|
341 if (walkThru) { |
| 0 | 342 while ( in->is_SpillCopy() && lidx >= _maxlrg ) { |
| 343 in = in->in(1); | |
| 344 lidx = Find_id(in); | |
| 345 } | |
| 346 | |
|
295
ea18057223c4
6732194: Data corruption dependent on -server/-client/-Xbatch
never
parents:
0
diff
changeset
|
347 if (lidx < _maxlrg && lrgs(lidx).is_multidef()) { |
|
ea18057223c4
6732194: Data corruption dependent on -server/-client/-Xbatch
never
parents:
0
diff
changeset
|
348 // walkThru found a multidef LRG, which is unsafe to use, so |
|
ea18057223c4
6732194: Data corruption dependent on -server/-client/-Xbatch
never
parents:
0
diff
changeset
|
349 // just keep the original def used in the clone. |
|
ea18057223c4
6732194: Data corruption dependent on -server/-client/-Xbatch
never
parents:
0
diff
changeset
|
350 in = spill->in(i); |
|
ea18057223c4
6732194: Data corruption dependent on -server/-client/-Xbatch
never
parents:
0
diff
changeset
|
351 lidx = Find_id(in); |
|
ea18057223c4
6732194: Data corruption dependent on -server/-client/-Xbatch
never
parents:
0
diff
changeset
|
352 } |
|
ea18057223c4
6732194: Data corruption dependent on -server/-client/-Xbatch
never
parents:
0
diff
changeset
|
353 } |
|
ea18057223c4
6732194: Data corruption dependent on -server/-client/-Xbatch
never
parents:
0
diff
changeset
|
354 |
| 0 | 355 if( lidx < _maxlrg && lrgs(lidx).reg() >= LRG::SPILL_REG ) { |
| 356 Node *rdef = Reachblock[lrg2reach[lidx]]; | |
| 357 if( rdef ) spill->set_req(i,rdef); | |
| 358 } | |
| 359 } | |
| 360 } | |
| 361 | |
| 362 | |
| 363 assert( spill->out_RegMask().is_UP(), "rematerialize to a reg" ); | |
| 364 // Rematerialized op is def->spilled+1 | |
| 365 set_was_spilled(spill); | |
| 366 if( _spilled_once.test(def->_idx) ) | |
| 367 set_was_spilled(spill); | |
| 368 | |
| 369 insert_proj( b, insidx, spill, maxlrg++ ); | |
| 370 #ifdef ASSERT | |
| 371 // Increment the counter for this lrg | |
| 372 splits.at_put(slidx, splits.at(slidx)+1); | |
| 373 #endif | |
| 374 // See if the cloned def kills any flags, and copy those kills as well | |
| 375 uint i = insidx+1; | |
| 376 if( clone_projs( b, i, def, spill, maxlrg ) ) { | |
| 377 // Adjust the point where we go hi-pressure | |
| 378 if( i <= b->_ihrp_index ) b->_ihrp_index++; | |
| 379 if( i <= b->_fhrp_index ) b->_fhrp_index++; | |
| 380 } | |
| 381 | |
| 382 return spill; | |
| 383 } | |
| 384 | |
| 385 //------------------------------is_high_pressure------------------------------- | |
| 386 // Function to compute whether or not this live range is "high pressure" | |
| 387 // in this block - whether it spills eagerly or not. | |
| 388 bool PhaseChaitin::is_high_pressure( Block *b, LRG *lrg, uint insidx ) { | |
| 389 if( lrg->_was_spilled1 ) return true; | |
| 390 // Forced spilling due to conflict? Then split only at binding uses | |
| 391 // or defs, not for supposed capacity problems. | |
| 392 // CNC - Turned off 7/8/99, causes too much spilling | |
| 393 // if( lrg->_is_bound ) return false; | |
| 394 | |
| 395 // Not yet reached the high-pressure cutoff point, so low pressure | |
| 396 uint hrp_idx = lrg->_is_float ? b->_fhrp_index : b->_ihrp_index; | |
| 397 if( insidx < hrp_idx ) return false; | |
| 398 // Register pressure for the block as a whole depends on reg class | |
| 399 int block_pres = lrg->_is_float ? b->_freg_pressure : b->_reg_pressure; | |
| 400 // Bound live ranges will split at the binding points first; | |
| 401 // Intermediate splits should assume the live range's register set | |
| 402 // got "freed up" and that num_regs will become INT_PRESSURE. | |
| 403 int bound_pres = lrg->_is_float ? FLOATPRESSURE : INTPRESSURE; | |
| 404 // Effective register pressure limit. | |
| 405 int lrg_pres = (lrg->get_invalid_mask_size() > lrg->num_regs()) | |
| 406 ? (lrg->get_invalid_mask_size() >> (lrg->num_regs()-1)) : bound_pres; | |
| 407 // High pressure if block pressure requires more register freedom | |
| 408 // than live range has. | |
| 409 return block_pres >= lrg_pres; | |
| 410 } | |
| 411 | |
| 412 | |
| 413 //------------------------------prompt_use--------------------------------- | |
| 414 // True if lidx is used before any real register is def'd in the block | |
| 415 bool PhaseChaitin::prompt_use( Block *b, uint lidx ) { | |
| 416 if( lrgs(lidx)._was_spilled2 ) return false; | |
| 417 | |
| 418 // Scan block for 1st use. | |
| 419 for( uint i = 1; i <= b->end_idx(); i++ ) { | |
| 420 Node *n = b->_nodes[i]; | |
| 421 // Ignore PHI use, these can be up or down | |
| 422 if( n->is_Phi() ) continue; | |
| 423 for( uint j = 1; j < n->req(); j++ ) | |
| 424 if( Find_id(n->in(j)) == lidx ) | |
| 425 return true; // Found 1st use! | |
| 426 if( n->out_RegMask().is_NotEmpty() ) return false; | |
| 427 } | |
| 428 return false; | |
| 429 } | |
| 430 | |
| 431 //------------------------------Split-------------------------------------- | |
| 432 //----------Split Routine---------- | |
| 433 // ***** NEW SPLITTING HEURISTIC ***** | |
| 434 // DEFS: If the DEF is in a High Register Pressure(HRP) Block, split there. | |
| 435 // Else, no split unless there is a HRP block between a DEF and | |
| 436 // one of its uses, and then split at the HRP block. | |
| 437 // | |
| 438 // USES: If USE is in HRP, split at use to leave main LRG on stack. | |
| 439 // Else, hoist LRG back up to register only (ie - split is also DEF) | |
| 440 // We will compute a new maxlrg as we go | |
| 441 uint PhaseChaitin::Split( uint maxlrg ) { | |
| 442 NOT_PRODUCT( Compile::TracePhase t3("regAllocSplit", &_t_regAllocSplit, TimeCompiler); ) | |
| 443 | |
| 444 uint bidx, pidx, slidx, insidx, inpidx, twoidx; | |
| 445 uint non_phi = 1, spill_cnt = 0; | |
| 446 Node **Reachblock; | |
| 447 Node *n1, *n2, *n3; | |
| 448 Node_List *defs,*phis; | |
| 449 bool *UPblock; | |
| 450 bool u1, u2, u3; | |
| 451 Block *b, *pred; | |
| 452 PhiNode *phi; | |
| 453 GrowableArray<uint> lidxs; | |
| 454 | |
| 455 // Array of counters to count splits per live range | |
| 456 GrowableArray<uint> splits; | |
| 457 | |
| 458 //----------Setup Code---------- | |
| 459 // Create a convenient mapping from lrg numbers to reaches/leaves indices | |
| 460 uint *lrg2reach = NEW_RESOURCE_ARRAY( uint, _maxlrg ); | |
| 461 // Keep track of DEFS & Phis for later passes | |
| 462 defs = new Node_List(); | |
| 463 phis = new Node_List(); | |
| 464 // Gather info on which LRG's are spilling, and build maps | |
| 465 for( bidx = 1; bidx < _maxlrg; bidx++ ) { | |
| 466 if( lrgs(bidx).alive() && lrgs(bidx).reg() >= LRG::SPILL_REG ) { | |
| 467 assert(!lrgs(bidx).mask().is_AllStack(),"AllStack should color"); | |
| 468 lrg2reach[bidx] = spill_cnt; | |
| 469 spill_cnt++; | |
| 470 lidxs.append(bidx); | |
| 471 #ifdef ASSERT | |
| 472 // Initialize the split counts to zero | |
| 473 splits.append(0); | |
| 474 #endif | |
| 475 #ifndef PRODUCT | |
| 476 if( PrintOpto && WizardMode && lrgs(bidx)._was_spilled1 ) | |
| 477 tty->print_cr("Warning, 2nd spill of L%d",bidx); | |
| 478 #endif | |
| 479 } | |
| 480 } | |
| 481 | |
| 482 // Create side arrays for propagating reaching defs info. | |
| 483 // Each block needs a node pointer for each spilling live range for the | |
| 484 // Def which is live into the block. Phi nodes handle multiple input | |
| 485 // Defs by querying the output of their predecessor blocks and resolving | |
| 486 // them to a single Def at the phi. The pointer is updated for each | |
| 487 // Def in the block, and then becomes the output for the block when | |
| 488 // processing of the block is complete. We also need to track whether | |
| 489 // a Def is UP or DOWN. UP means that it should get a register (ie - | |
| 490 // it is always in LRP regions), and DOWN means that it is probably | |
| 491 // on the stack (ie - it crosses HRP regions). | |
| 492 Node ***Reaches = NEW_RESOURCE_ARRAY( Node**, _cfg._num_blocks+1 ); | |
| 493 bool **UP = NEW_RESOURCE_ARRAY( bool*, _cfg._num_blocks+1 ); | |
| 494 Node **debug_defs = NEW_RESOURCE_ARRAY( Node*, spill_cnt ); | |
| 495 VectorSet **UP_entry= NEW_RESOURCE_ARRAY( VectorSet*, spill_cnt ); | |
| 496 | |
| 497 // Initialize Reaches & UP | |
| 498 for( bidx = 0; bidx < _cfg._num_blocks+1; bidx++ ) { | |
| 499 Reaches[bidx] = NEW_RESOURCE_ARRAY( Node*, spill_cnt ); | |
| 500 UP[bidx] = NEW_RESOURCE_ARRAY( bool, spill_cnt ); | |
| 501 Node **Reachblock = Reaches[bidx]; | |
| 502 bool *UPblock = UP[bidx]; | |
| 503 for( slidx = 0; slidx < spill_cnt; slidx++ ) { | |
| 504 UPblock[slidx] = true; // Assume they start in registers | |
| 505 Reachblock[slidx] = NULL; // Assume that no def is present | |
| 506 } | |
| 507 } | |
| 508 | |
| 509 // Initialize to array of empty vectorsets | |
| 510 for( slidx = 0; slidx < spill_cnt; slidx++ ) | |
| 511 UP_entry[slidx] = new VectorSet(Thread::current()->resource_area()); | |
| 512 | |
| 513 //----------PASS 1---------- | |
| 514 //----------Propagation & Node Insertion Code---------- | |
| 515 // Walk the Blocks in RPO for DEF & USE info | |
| 516 for( bidx = 0; bidx < _cfg._num_blocks; bidx++ ) { | |
| 517 | |
| 518 if (C->check_node_count(spill_cnt, out_of_nodes)) { | |
| 519 return 0; | |
| 520 } | |
| 521 | |
| 522 b = _cfg._blocks[bidx]; | |
| 523 // Reaches & UP arrays for this block | |
| 524 Reachblock = Reaches[b->_pre_order]; | |
| 525 UPblock = UP[b->_pre_order]; | |
| 526 // Reset counter of start of non-Phi nodes in block | |
| 527 non_phi = 1; | |
| 528 //----------Block Entry Handling---------- | |
| 529 // Check for need to insert a new phi | |
| 530 // Cycle through this block's predecessors, collecting Reaches | |
| 531 // info for each spilled LRG. If they are identical, no phi is | |
| 532 // needed. If they differ, check for a phi, and insert if missing, | |
| 533 // or update edges if present. Set current block's Reaches set to | |
| 534 // be either the phi's or the reaching def, as appropriate. | |
| 535 // If no Phi is needed, check if the LRG needs to spill on entry | |
| 536 // to the block due to HRP. | |
| 537 for( slidx = 0; slidx < spill_cnt; slidx++ ) { | |
| 538 // Grab the live range number | |
| 539 uint lidx = lidxs.at(slidx); | |
| 540 // Do not bother splitting or putting in Phis for single-def | |
| 541 // rematerialized live ranges. This happens alot to constants | |
| 542 // with long live ranges. | |
|
295
ea18057223c4
6732194: Data corruption dependent on -server/-client/-Xbatch
never
parents:
0
diff
changeset
|
543 if( lrgs(lidx).is_singledef() && |
| 0 | 544 lrgs(lidx)._def->rematerialize() ) { |
| 545 // reset the Reaches & UP entries | |
| 546 Reachblock[slidx] = lrgs(lidx)._def; | |
| 547 UPblock[slidx] = true; | |
| 548 // Record following instruction in case 'n' rematerializes and | |
| 549 // kills flags | |
| 550 Block *pred1 = _cfg._bbs[b->pred(1)->_idx]; | |
| 551 continue; | |
| 552 } | |
| 553 | |
| 554 // Initialize needs_phi and needs_split | |
| 555 bool needs_phi = false; | |
| 556 bool needs_split = false; | |
|
330
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
557 bool has_phi = false; |
| 0 | 558 // Walk the predecessor blocks to check inputs for that live range |
| 559 // Grab predecessor block header | |
| 560 n1 = b->pred(1); | |
| 561 // Grab the appropriate reaching def info for inpidx | |
| 562 pred = _cfg._bbs[n1->_idx]; | |
| 563 pidx = pred->_pre_order; | |
| 564 Node **Ltmp = Reaches[pidx]; | |
| 565 bool *Utmp = UP[pidx]; | |
| 566 n1 = Ltmp[slidx]; | |
| 567 u1 = Utmp[slidx]; | |
| 568 // Initialize node for saving type info | |
| 569 n3 = n1; | |
| 570 u3 = u1; | |
| 571 | |
| 572 // Compare inputs to see if a Phi is needed | |
| 573 for( inpidx = 2; inpidx < b->num_preds(); inpidx++ ) { | |
| 574 // Grab predecessor block headers | |
| 575 n2 = b->pred(inpidx); | |
| 576 // Grab the appropriate reaching def info for inpidx | |
| 577 pred = _cfg._bbs[n2->_idx]; | |
| 578 pidx = pred->_pre_order; | |
| 579 Ltmp = Reaches[pidx]; | |
| 580 Utmp = UP[pidx]; | |
| 581 n2 = Ltmp[slidx]; | |
| 582 u2 = Utmp[slidx]; | |
| 583 // For each LRG, decide if a phi is necessary | |
| 584 if( n1 != n2 ) { | |
| 585 needs_phi = true; | |
| 586 } | |
| 587 // See if the phi has mismatched inputs, UP vs. DOWN | |
| 588 if( n1 && n2 && (u1 != u2) ) { | |
| 589 needs_split = true; | |
| 590 } | |
| 591 // Move n2/u2 to n1/u1 for next iteration | |
| 592 n1 = n2; | |
| 593 u1 = u2; | |
| 594 // Preserve a non-NULL predecessor for later type referencing | |
| 595 if( (n3 == NULL) && (n2 != NULL) ){ | |
| 596 n3 = n2; | |
| 597 u3 = u2; | |
| 598 } | |
| 599 } // End for all potential Phi inputs | |
| 600 | |
|
330
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
601 // check block for appropriate phinode & update edges |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
602 for( insidx = 1; insidx <= b->end_idx(); insidx++ ) { |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
603 n1 = b->_nodes[insidx]; |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
604 // bail if this is not a phi |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
605 phi = n1->is_Phi() ? n1->as_Phi() : NULL; |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
606 if( phi == NULL ) { |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
607 // Keep track of index of first non-PhiNode instruction in block |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
608 non_phi = insidx; |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
609 // break out of the for loop as we have handled all phi nodes |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
610 break; |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
611 } |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
612 // must be looking at a phi |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
613 if( Find_id(n1) == lidxs.at(slidx) ) { |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
614 // found the necessary phi |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
615 needs_phi = false; |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
616 has_phi = true; |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
617 // initialize the Reaches entry for this LRG |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
618 Reachblock[slidx] = phi; |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
619 break; |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
620 } // end if found correct phi |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
621 } // end for all phi's |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
622 |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
623 // If a phi is needed or exist, check for it |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
624 if( needs_phi || has_phi ) { |
| 0 | 625 // add new phinode if one not already found |
| 626 if( needs_phi ) { | |
| 627 // create a new phi node and insert it into the block | |
| 628 // type is taken from left over pointer to a predecessor | |
| 629 assert(n3,"No non-NULL reaching DEF for a Phi"); | |
| 630 phi = new (C, b->num_preds()) PhiNode(b->head(), n3->bottom_type()); | |
| 631 // initialize the Reaches entry for this LRG | |
| 632 Reachblock[slidx] = phi; | |
| 633 | |
| 634 // add node to block & node_to_block mapping | |
| 635 insert_proj( b, insidx++, phi, maxlrg++ ); | |
| 636 non_phi++; | |
| 637 // Reset new phi's mapping to be the spilling live range | |
| 638 _names.map(phi->_idx, lidx); | |
| 639 assert(Find_id(phi) == lidx,"Bad update on Union-Find mapping"); | |
| 640 } // end if not found correct phi | |
| 641 // Here you have either found or created the Phi, so record it | |
| 642 assert(phi != NULL,"Must have a Phi Node here"); | |
| 643 phis->push(phi); | |
| 644 // PhiNodes should either force the LRG UP or DOWN depending | |
| 645 // on its inputs and the register pressure in the Phi's block. | |
| 646 UPblock[slidx] = true; // Assume new DEF is UP | |
| 647 // If entering a high-pressure area with no immediate use, | |
| 648 // assume Phi is DOWN | |
| 649 if( is_high_pressure( b, &lrgs(lidx), b->end_idx()) && !prompt_use(b,lidx) ) | |
| 650 UPblock[slidx] = false; | |
| 651 // If we are not split up/down and all inputs are down, then we | |
| 652 // are down | |
| 653 if( !needs_split && !u3 ) | |
| 654 UPblock[slidx] = false; | |
| 655 } // end if phi is needed | |
| 656 | |
| 657 // Do not need a phi, so grab the reaching DEF | |
| 658 else { | |
| 659 // Grab predecessor block header | |
| 660 n1 = b->pred(1); | |
| 661 // Grab the appropriate reaching def info for k | |
| 662 pred = _cfg._bbs[n1->_idx]; | |
| 663 pidx = pred->_pre_order; | |
| 664 Node **Ltmp = Reaches[pidx]; | |
| 665 bool *Utmp = UP[pidx]; | |
| 666 // reset the Reaches & UP entries | |
| 667 Reachblock[slidx] = Ltmp[slidx]; | |
| 668 UPblock[slidx] = Utmp[slidx]; | |
| 669 } // end else no Phi is needed | |
| 670 } // end for all spilling live ranges | |
| 671 // DEBUG | |
| 672 #ifndef PRODUCT | |
| 673 if(trace_spilling()) { | |
| 674 tty->print("/`\nBlock %d: ", b->_pre_order); | |
| 675 tty->print("Reaching Definitions after Phi handling\n"); | |
| 676 for( uint x = 0; x < spill_cnt; x++ ) { | |
| 677 tty->print("Spill Idx %d: UP %d: Node\n",x,UPblock[x]); | |
| 678 if( Reachblock[x] ) | |
| 679 Reachblock[x]->dump(); | |
| 680 else | |
| 681 tty->print("Undefined\n"); | |
| 682 } | |
| 683 } | |
| 684 #endif | |
| 685 | |
| 686 //----------Non-Phi Node Splitting---------- | |
| 687 // Since phi-nodes have now been handled, the Reachblock array for this | |
| 688 // block is initialized with the correct starting value for the defs which | |
| 689 // reach non-phi instructions in this block. Thus, process non-phi | |
| 690 // instructions normally, inserting SpillCopy nodes for all spill | |
| 691 // locations. | |
| 692 | |
| 693 // Memoize any DOWN reaching definitions for use as DEBUG info | |
| 694 for( insidx = 0; insidx < spill_cnt; insidx++ ) { | |
| 695 debug_defs[insidx] = (UPblock[insidx]) ? NULL : Reachblock[insidx]; | |
| 696 if( UPblock[insidx] ) // Memoize UP decision at block start | |
| 697 UP_entry[insidx]->set( b->_pre_order ); | |
| 698 } | |
| 699 | |
| 700 //----------Walk Instructions in the Block and Split---------- | |
| 701 // For all non-phi instructions in the block | |
| 702 for( insidx = 1; insidx <= b->end_idx(); insidx++ ) { | |
| 703 Node *n = b->_nodes[insidx]; | |
| 704 // Find the defining Node's live range index | |
| 705 uint defidx = Find_id(n); | |
| 706 uint cnt = n->req(); | |
| 707 | |
| 708 if( n->is_Phi() ) { | |
| 709 // Skip phi nodes after removing dead copies. | |
| 710 if( defidx < _maxlrg ) { | |
| 711 // Check for useless Phis. These appear if we spill, then | |
| 712 // coalesce away copies. Dont touch Phis in spilling live | |
| 713 // ranges; they are busy getting modifed in this pass. | |
| 714 if( lrgs(defidx).reg() < LRG::SPILL_REG ) { | |
| 715 uint i; | |
| 716 Node *u = NULL; | |
| 717 // Look for the Phi merging 2 unique inputs | |
| 718 for( i = 1; i < cnt; i++ ) { | |
| 719 // Ignore repeats and self | |
| 720 if( n->in(i) != u && n->in(i) != n ) { | |
| 721 // Found a unique input | |
| 722 if( u != NULL ) // If it's the 2nd, bail out | |
| 723 break; | |
| 724 u = n->in(i); // Else record it | |
| 725 } | |
| 726 } | |
| 727 assert( u, "at least 1 valid input expected" ); | |
|
330
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
728 if( i >= cnt ) { // Found one unique input |
|
1c6e3bfb543a
6746892: Register Allocator does not process a data phi with one unique input correctly
kvn
parents:
295
diff
changeset
|
729 assert(Find_id(n) == Find_id(u), "should be the same lrg"); |
| 0 | 730 n->replace_by(u); // Then replace with unique input |
| 731 n->disconnect_inputs(NULL); | |
| 732 b->_nodes.remove(insidx); | |
| 733 insidx--; | |
| 734 b->_ihrp_index--; | |
| 735 b->_fhrp_index--; | |
| 736 } | |
| 737 } | |
| 738 } | |
| 739 continue; | |
| 740 } | |
| 741 assert( insidx > b->_ihrp_index || | |
| 742 (b->_reg_pressure < (uint)INTPRESSURE) || | |
| 743 b->_ihrp_index > 4000000 || | |
| 744 b->_ihrp_index >= b->end_idx() || | |
| 745 !b->_nodes[b->_ihrp_index]->is_Proj(), "" ); | |
| 746 assert( insidx > b->_fhrp_index || | |
| 747 (b->_freg_pressure < (uint)FLOATPRESSURE) || | |
| 748 b->_fhrp_index > 4000000 || | |
| 749 b->_fhrp_index >= b->end_idx() || | |
| 750 !b->_nodes[b->_fhrp_index]->is_Proj(), "" ); | |
| 751 | |
| 752 // ********** Handle Crossing HRP Boundry ********** | |
| 753 if( (insidx == b->_ihrp_index) || (insidx == b->_fhrp_index) ) { | |
| 754 for( slidx = 0; slidx < spill_cnt; slidx++ ) { | |
| 605 | 755 // Check for need to split at HRP boundary - split if UP |
| 0 | 756 n1 = Reachblock[slidx]; |
| 757 // bail out if no reaching DEF | |
| 758 if( n1 == NULL ) continue; | |
| 759 // bail out if live range is 'isolated' around inner loop | |
| 760 uint lidx = lidxs.at(slidx); | |
| 761 // If live range is currently UP | |
| 762 if( UPblock[slidx] ) { | |
| 763 // set location to insert spills at | |
| 764 // SPLIT DOWN HERE - NO CISC SPILL | |
| 765 if( is_high_pressure( b, &lrgs(lidx), insidx ) && | |
| 766 !n1->rematerialize() ) { | |
| 767 // If there is already a valid stack definition available, use it | |
| 768 if( debug_defs[slidx] != NULL ) { | |
| 769 Reachblock[slidx] = debug_defs[slidx]; | |
| 770 } | |
| 771 else { | |
| 772 // Insert point is just past last use or def in the block | |
| 773 int insert_point = insidx-1; | |
| 774 while( insert_point > 0 ) { | |
| 775 Node *n = b->_nodes[insert_point]; | |
| 776 // Hit top of block? Quit going backwards | |
| 777 if( n->is_Phi() ) break; | |
| 778 // Found a def? Better split after it. | |
| 779 if( n2lidx(n) == lidx ) break; | |
| 780 // Look for a use | |
| 781 uint i; | |
| 782 for( i = 1; i < n->req(); i++ ) | |
| 783 if( n2lidx(n->in(i)) == lidx ) | |
| 784 break; | |
| 785 // Found a use? Better split after it. | |
| 786 if( i < n->req() ) break; | |
| 787 insert_point--; | |
| 788 } | |
| 789 maxlrg = split_DEF( n1, b, insert_point, maxlrg, Reachblock, debug_defs, splits, slidx); | |
| 790 // If it wasn't split bail | |
| 791 if (!maxlrg) { | |
| 792 return 0; | |
| 793 } | |
| 794 insidx++; | |
| 795 } | |
| 796 // This is a new DEF, so update UP | |
| 797 UPblock[slidx] = false; | |
| 798 #ifndef PRODUCT | |
| 799 // DEBUG | |
| 800 if( trace_spilling() ) { | |
| 801 tty->print("\nNew Split DOWN DEF of Spill Idx "); | |
| 802 tty->print("%d, UP %d:\n",slidx,false); | |
| 803 n1->dump(); | |
| 804 } | |
| 805 #endif | |
| 806 } | |
| 807 } // end if LRG is UP | |
| 808 } // end for all spilling live ranges | |
| 809 assert( b->_nodes[insidx] == n, "got insidx set incorrectly" ); | |
| 810 } // end if crossing HRP Boundry | |
| 811 | |
| 812 // If the LRG index is oob, then this is a new spillcopy, skip it. | |
| 813 if( defidx >= _maxlrg ) { | |
| 814 continue; | |
| 815 } | |
| 816 LRG &deflrg = lrgs(defidx); | |
| 817 uint copyidx = n->is_Copy(); | |
| 818 // Remove coalesced copy from CFG | |
| 819 if( copyidx && defidx == n2lidx(n->in(copyidx)) ) { | |
| 820 n->replace_by( n->in(copyidx) ); | |
| 821 n->set_req( copyidx, NULL ); | |
| 822 b->_nodes.remove(insidx--); | |
| 823 b->_ihrp_index--; // Adjust the point where we go hi-pressure | |
| 824 b->_fhrp_index--; | |
| 825 continue; | |
| 826 } | |
| 827 | |
| 828 #define DERIVED 0 | |
| 829 | |
| 830 // ********** Handle USES ********** | |
| 831 bool nullcheck = false; | |
| 832 // Implicit null checks never use the spilled value | |
| 833 if( n->is_MachNullCheck() ) | |
| 834 nullcheck = true; | |
| 835 if( !nullcheck ) { | |
| 836 // Search all inputs for a Spill-USE | |
| 837 JVMState* jvms = n->jvms(); | |
| 838 uint oopoff = jvms ? jvms->oopoff() : cnt; | |
| 839 uint old_last = cnt - 1; | |
| 840 for( inpidx = 1; inpidx < cnt; inpidx++ ) { | |
| 841 // Derived/base pairs may be added to our inputs during this loop. | |
| 842 // If inpidx > old_last, then one of these new inputs is being | |
| 843 // handled. Skip the derived part of the pair, but process | |
| 844 // the base like any other input. | |
| 845 if( inpidx > old_last && ((inpidx - oopoff) & 1) == DERIVED ) { | |
| 846 continue; // skip derived_debug added below | |
| 847 } | |
| 848 // Get lidx of input | |
| 849 uint useidx = Find_id(n->in(inpidx)); | |
| 850 // Not a brand-new split, and it is a spill use | |
| 851 if( useidx < _maxlrg && lrgs(useidx).reg() >= LRG::SPILL_REG ) { | |
| 852 // Check for valid reaching DEF | |
| 853 slidx = lrg2reach[useidx]; | |
| 854 Node *def = Reachblock[slidx]; | |
| 855 assert( def != NULL, "Using Undefined Value in Split()\n"); | |
| 856 | |
| 857 // (+++) %%%% remove this in favor of pre-pass in matcher.cpp | |
| 858 // monitor references do not care where they live, so just hook | |
| 859 if ( jvms && jvms->is_monitor_use(inpidx) ) { | |
| 860 // The effect of this clone is to drop the node out of the block, | |
| 861 // so that the allocator does not see it anymore, and therefore | |
| 862 // does not attempt to assign it a register. | |
|
1693
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
863 def = clone_node(def, b, C); |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
864 if (def == NULL || C->check_node_count(NodeLimitFudgeFactor, out_of_nodes)) { |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
865 return 0; |
|
6c9cc03d8726
6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents:
1552
diff
changeset
|
866 } |
| 0 | 867 _names.extend(def->_idx,0); |
| 868 _cfg._bbs.map(def->_idx,b); | |
| 869 n->set_req(inpidx, def); | |
| 870 continue; | |
| 871 } | |
| 872 | |
| 873 // Rematerializable? Then clone def at use site instead | |
| 874 // of store/load | |
| 875 if( def->rematerialize() ) { | |
| 876 int old_size = b->_nodes.size(); | |
| 877 def = split_Rematerialize( def, b, insidx, maxlrg, splits, slidx, lrg2reach, Reachblock, true ); | |
| 878 if( !def ) return 0; // Bail out | |
| 879 insidx += b->_nodes.size()-old_size; | |
| 880 } | |
| 881 | |
| 882 MachNode *mach = n->is_Mach() ? n->as_Mach() : NULL; | |
| 883 // Base pointers and oopmap references do not care where they live. | |
| 884 if ((inpidx >= oopoff) || | |
| 885 (mach && mach->ideal_Opcode() == Op_AddP && inpidx == AddPNode::Base)) { | |
| 886 if (def->rematerialize() && lrgs(useidx)._was_spilled2) { | |
| 887 // This def has been rematerialized a couple of times without | |
| 888 // progress. It doesn't care if it lives UP or DOWN, so | |
| 889 // spill it down now. | |
| 890 maxlrg = split_USE(def,b,n,inpidx,maxlrg,false,false,splits,slidx); | |
| 891 // If it wasn't split bail | |
| 892 if (!maxlrg) { | |
| 893 return 0; | |
| 894 } | |
| 895 insidx++; // Reset iterator to skip USE side split | |
| 896 } else { | |
| 897 // Just hook the def edge | |
| 898 n->set_req(inpidx, def); | |
| 899 } | |
| 900 | |
| 901 if (inpidx >= oopoff) { | |
| 902 // After oopoff, we have derived/base pairs. We must mention all | |
| 903 // derived pointers here as derived/base pairs for GC. If the | |
| 904 // derived value is spilling and we have a copy both in Reachblock | |
| 905 // (called here 'def') and debug_defs[slidx] we need to mention | |
| 906 // both in derived/base pairs or kill one. | |
| 907 Node *derived_debug = debug_defs[slidx]; | |
| 908 if( ((inpidx - oopoff) & 1) == DERIVED && // derived vs base? | |
| 909 mach && mach->ideal_Opcode() != Op_Halt && | |
| 910 derived_debug != NULL && | |
| 911 derived_debug != def ) { // Actual 2nd value appears | |
| 912 // We have already set 'def' as a derived value. | |
| 913 // Also set debug_defs[slidx] as a derived value. | |
| 914 uint k; | |
| 915 for( k = oopoff; k < cnt; k += 2 ) | |
| 916 if( n->in(k) == derived_debug ) | |
| 917 break; // Found an instance of debug derived | |
| 918 if( k == cnt ) {// No instance of debug_defs[slidx] | |
| 919 // Add a derived/base pair to cover the debug info. | |
| 920 // We have to process the added base later since it is not | |
| 921 // handled yet at this point but skip derived part. | |
| 922 assert(((n->req() - oopoff) & 1) == DERIVED, | |
| 923 "must match skip condition above"); | |
| 924 n->add_req( derived_debug ); // this will be skipped above | |
| 925 n->add_req( n->in(inpidx+1) ); // this will be processed | |
| 926 // Increment cnt to handle added input edges on | |
| 927 // subsequent iterations. | |
| 928 cnt += 2; | |
| 929 } | |
| 930 } | |
| 931 } | |
| 932 continue; | |
| 933 } | |
| 934 // Special logic for DEBUG info | |
| 935 if( jvms && b->_freq > BLOCK_FREQUENCY(0.5) ) { | |
| 936 uint debug_start = jvms->debug_start(); | |
| 937 // If this is debug info use & there is a reaching DOWN def | |
| 938 if ((debug_start <= inpidx) && (debug_defs[slidx] != NULL)) { | |
| 939 assert(inpidx < oopoff, "handle only debug info here"); | |
| 940 // Just hook it in & move on | |
| 941 n->set_req(inpidx, debug_defs[slidx]); | |
| 942 // (Note that this can make two sides of a split live at the | |
| 943 // same time: The debug def on stack, and another def in a | |
| 944 // register. The GC needs to know about both of them, but any | |
| 945 // derived pointers after oopoff will refer to only one of the | |
| 946 // two defs and the GC would therefore miss the other. Thus | |
| 947 // this hack is only allowed for debug info which is Java state | |
| 948 // and therefore never a derived pointer.) | |
| 949 continue; | |
| 950 } | |
| 951 } | |
| 952 // Grab register mask info | |
| 953 const RegMask &dmask = def->out_RegMask(); | |
| 954 const RegMask &umask = n->in_RegMask(inpidx); | |
| 955 | |
| 956 assert(inpidx < oopoff, "cannot use-split oop map info"); | |
| 957 | |
| 958 bool dup = UPblock[slidx]; | |
| 959 bool uup = umask.is_UP(); | |
| 960 | |
| 961 // Need special logic to handle bound USES. Insert a split at this | |
| 962 // bound use if we can't rematerialize the def, or if we need the | |
| 963 // split to form a misaligned pair. | |
| 964 if( !umask.is_AllStack() && | |
| 965 (int)umask.Size() <= lrgs(useidx).num_regs() && | |
| 966 (!def->rematerialize() || | |
| 967 umask.is_misaligned_Pair())) { | |
| 968 // These need a Split regardless of overlap or pressure | |
| 969 // SPLIT - NO DEF - NO CISC SPILL | |
| 970 maxlrg = split_USE(def,b,n,inpidx,maxlrg,dup,false, splits,slidx); | |
| 971 // If it wasn't split bail | |
| 972 if (!maxlrg) { | |
| 973 return 0; | |
| 974 } | |
| 975 insidx++; // Reset iterator to skip USE side split | |
| 976 continue; | |
| 977 } | |
| 978 // Here is the logic chart which describes USE Splitting: | |
| 979 // 0 = false or DOWN, 1 = true or UP | |
| 980 // | |
| 981 // Overlap | DEF | USE | Action | |
| 982 //------------------------------------------------------- | |
| 983 // 0 | 0 | 0 | Copy - mem -> mem | |
| 984 // 0 | 0 | 1 | Split-UP - Check HRP | |
| 985 // 0 | 1 | 0 | Split-DOWN - Debug Info? | |
| 986 // 0 | 1 | 1 | Copy - reg -> reg | |
| 987 // 1 | 0 | 0 | Reset Input Edge (no Split) | |
| 988 // 1 | 0 | 1 | Split-UP - Check HRP | |
| 989 // 1 | 1 | 0 | Split-DOWN - Debug Info? | |
| 990 // 1 | 1 | 1 | Reset Input Edge (no Split) | |
| 991 // | |
| 992 // So, if (dup == uup), then overlap test determines action, | |
| 993 // with true being no split, and false being copy. Else, | |
| 994 // if DEF is DOWN, Split-UP, and check HRP to decide on | |
| 995 // resetting DEF. Finally if DEF is UP, Split-DOWN, with | |
| 996 // special handling for Debug Info. | |
| 997 if( dup == uup ) { | |
| 998 if( dmask.overlap(umask) ) { | |
| 999 // Both are either up or down, and there is overlap, No Split | |
| 1000 n->set_req(inpidx, def); | |
| 1001 } | |
| 1002 else { // Both are either up or down, and there is no overlap | |
| 1003 if( dup ) { // If UP, reg->reg copy | |
| 1004 // COPY ACROSS HERE - NO DEF - NO CISC SPILL | |
| 1005 maxlrg = split_USE(def,b,n,inpidx,maxlrg,false,false, splits,slidx); | |
| 1006 // If it wasn't split bail | |
| 1007 if (!maxlrg) { | |
| 1008 return 0; | |
| 1009 } | |
| 1010 insidx++; // Reset iterator to skip USE side split | |
| 1011 } | |
| 1012 else { // DOWN, mem->mem copy | |
| 1013 // COPY UP & DOWN HERE - NO DEF - NO CISC SPILL | |
| 1014 // First Split-UP to move value into Register | |
| 1015 uint def_ideal = def->ideal_reg(); | |
| 1016 const RegMask* tmp_rm = Matcher::idealreg2regmask[def_ideal]; | |
| 1017 Node *spill = new (C) MachSpillCopyNode(def, dmask, *tmp_rm); | |
| 1018 insert_proj( b, insidx, spill, maxlrg ); | |
| 1019 // Then Split-DOWN as if previous Split was DEF | |
| 1020 maxlrg = split_USE(spill,b,n,inpidx,maxlrg,false,false, splits,slidx); | |
| 1021 // If it wasn't split bail | |
| 1022 if (!maxlrg) { | |
| 1023 return 0; | |
| 1024 } | |
| 1025 insidx += 2; // Reset iterator to skip USE side splits | |
| 1026 } | |
| 1027 } // End else no overlap | |
| 1028 } // End if dup == uup | |
| 1029 // dup != uup, so check dup for direction of Split | |
| 1030 else { | |
| 1031 if( dup ) { // If UP, Split-DOWN and check Debug Info | |
| 1032 // If this node is already a SpillCopy, just patch the edge | |
| 1033 // except the case of spilling to stack. | |
| 1034 if( n->is_SpillCopy() ) { | |
| 1035 RegMask tmp_rm(umask); | |
| 1036 tmp_rm.SUBTRACT(Matcher::STACK_ONLY_mask); | |
| 1037 if( dmask.overlap(tmp_rm) ) { | |
| 1038 if( def != n->in(inpidx) ) { | |
| 1039 n->set_req(inpidx, def); | |
| 1040 } | |
| 1041 continue; | |
| 1042 } | |
| 1043 } | |
| 1044 // COPY DOWN HERE - NO DEF - NO CISC SPILL | |
| 1045 maxlrg = split_USE(def,b,n,inpidx,maxlrg,false,false, splits,slidx); | |
| 1046 // If it wasn't split bail | |
| 1047 if (!maxlrg) { | |
| 1048 return 0; | |
| 1049 } | |
| 1050 insidx++; // Reset iterator to skip USE side split | |
| 1051 // Check for debug-info split. Capture it for later | |
| 1052 // debug splits of the same value | |
| 1053 if (jvms && jvms->debug_start() <= inpidx && inpidx < oopoff) | |
| 1054 debug_defs[slidx] = n->in(inpidx); | |
| 1055 | |
| 1056 } | |
| 1057 else { // DOWN, Split-UP and check register pressure | |
| 1058 if( is_high_pressure( b, &lrgs(useidx), insidx ) ) { | |
| 1059 // COPY UP HERE - NO DEF - CISC SPILL | |
| 1060 maxlrg = split_USE(def,b,n,inpidx,maxlrg,true,true, splits,slidx); | |
| 1061 // If it wasn't split bail | |
| 1062 if (!maxlrg) { | |
| 1063 return 0; | |
| 1064 } | |
| 1065 insidx++; // Reset iterator to skip USE side split | |
| 1066 } else { // LRP | |
| 1067 // COPY UP HERE - WITH DEF - NO CISC SPILL | |
| 1068 maxlrg = split_USE(def,b,n,inpidx,maxlrg,true,false, splits,slidx); | |
| 1069 // If it wasn't split bail | |
| 1070 if (!maxlrg) { | |
| 1071 return 0; | |
| 1072 } | |
| 1073 // Flag this lift-up in a low-pressure block as | |
| 1074 // already-spilled, so if it spills again it will | |
| 1075 // spill hard (instead of not spilling hard and | |
| 1076 // coalescing away). | |
| 1077 set_was_spilled(n->in(inpidx)); | |
| 1078 // Since this is a new DEF, update Reachblock & UP | |
| 1079 Reachblock[slidx] = n->in(inpidx); | |
| 1080 UPblock[slidx] = true; | |
| 1081 insidx++; // Reset iterator to skip USE side split | |
| 1082 } | |
| 1083 } // End else DOWN | |
| 1084 } // End dup != uup | |
| 1085 } // End if Spill USE | |
| 1086 } // End For All Inputs | |
| 1087 } // End If not nullcheck | |
| 1088 | |
| 1089 // ********** Handle DEFS ********** | |
| 1090 // DEFS either Split DOWN in HRP regions or when the LRG is bound, or | |
| 1091 // just reset the Reaches info in LRP regions. DEFS must always update | |
| 1092 // UP info. | |
| 1093 if( deflrg.reg() >= LRG::SPILL_REG ) { // Spilled? | |
| 1094 uint slidx = lrg2reach[defidx]; | |
| 1095 // Add to defs list for later assignment of new live range number | |
| 1096 defs->push(n); | |
| 1097 // Set a flag on the Node indicating it has already spilled. | |
| 1098 // Only do it for capacity spills not conflict spills. | |
| 1099 if( !deflrg._direct_conflict ) | |
| 1100 set_was_spilled(n); | |
| 1101 assert(!n->is_Phi(),"Cannot insert Phi into DEFS list"); | |
| 1102 // Grab UP info for DEF | |
| 1103 const RegMask &dmask = n->out_RegMask(); | |
| 1104 bool defup = dmask.is_UP(); | |
| 1105 // Only split at Def if this is a HRP block or bound (and spilled once) | |
| 1106 if( !n->rematerialize() && | |
| 1107 (((dmask.is_bound1() || dmask.is_bound2() || dmask.is_misaligned_Pair()) && | |
| 1108 (deflrg._direct_conflict || deflrg._must_spill)) || | |
| 1109 // Check for LRG being up in a register and we are inside a high | |
| 1110 // pressure area. Spill it down immediately. | |
| 1111 (defup && is_high_pressure(b,&deflrg,insidx))) ) { | |
| 1112 assert( !n->rematerialize(), "" ); | |
| 1113 assert( !n->is_SpillCopy(), "" ); | |
| 1114 // Do a split at the def site. | |
| 1115 maxlrg = split_DEF( n, b, insidx, maxlrg, Reachblock, debug_defs, splits, slidx ); | |
| 1116 // If it wasn't split bail | |
| 1117 if (!maxlrg) { | |
| 1118 return 0; | |
| 1119 } | |
| 1120 // Split DEF's Down | |
| 1121 UPblock[slidx] = 0; | |
| 1122 #ifndef PRODUCT | |
| 1123 // DEBUG | |
| 1124 if( trace_spilling() ) { | |
| 1125 tty->print("\nNew Split DOWN DEF of Spill Idx "); | |
| 1126 tty->print("%d, UP %d:\n",slidx,false); | |
| 1127 n->dump(); | |
| 1128 } | |
| 1129 #endif | |
| 1130 } | |
| 1131 else { // Neither bound nor HRP, must be LRP | |
| 1132 // otherwise, just record the def | |
| 1133 Reachblock[slidx] = n; | |
| 1134 // UP should come from the outRegmask() of the DEF | |
| 1135 UPblock[slidx] = defup; | |
| 1136 // Update debug list of reaching down definitions, kill if DEF is UP | |
| 1137 debug_defs[slidx] = defup ? NULL : n; | |
| 1138 #ifndef PRODUCT | |
| 1139 // DEBUG | |
| 1140 if( trace_spilling() ) { | |
| 1141 tty->print("\nNew DEF of Spill Idx "); | |
| 1142 tty->print("%d, UP %d:\n",slidx,defup); | |
| 1143 n->dump(); | |
| 1144 } | |
| 1145 #endif | |
| 1146 } // End else LRP | |
| 1147 } // End if spill def | |
| 1148 | |
| 1149 // ********** Split Left Over Mem-Mem Moves ********** | |
| 1150 // Check for mem-mem copies and split them now. Do not do this | |
| 1151 // to copies about to be spilled; they will be Split shortly. | |
| 1152 if( copyidx ) { | |
| 1153 Node *use = n->in(copyidx); | |
| 1154 uint useidx = Find_id(use); | |
| 1155 if( useidx < _maxlrg && // This is not a new split | |
| 1156 OptoReg::is_stack(deflrg.reg()) && | |
| 1157 deflrg.reg() < LRG::SPILL_REG ) { // And DEF is from stack | |
| 1158 LRG &uselrg = lrgs(useidx); | |
| 1159 if( OptoReg::is_stack(uselrg.reg()) && | |
| 1160 uselrg.reg() < LRG::SPILL_REG && // USE is from stack | |
| 1161 deflrg.reg() != uselrg.reg() ) { // Not trivially removed | |
| 1162 uint def_ideal_reg = Matcher::base2reg[n->bottom_type()->base()]; | |
| 1163 const RegMask &def_rm = *Matcher::idealreg2regmask[def_ideal_reg]; | |
| 1164 const RegMask &use_rm = n->in_RegMask(copyidx); | |
| 1165 if( def_rm.overlap(use_rm) && n->is_SpillCopy() ) { // Bug 4707800, 'n' may be a storeSSL | |
| 1166 if (C->check_node_count(NodeLimitFudgeFactor, out_of_nodes)) { // Check when generating nodes | |
| 1167 return 0; | |
| 1168 } | |
| 1169 Node *spill = new (C) MachSpillCopyNode(use,use_rm,def_rm); | |
| 1170 n->set_req(copyidx,spill); | |
| 1171 n->as_MachSpillCopy()->set_in_RegMask(def_rm); | |
| 1172 // Put the spill just before the copy | |
| 1173 insert_proj( b, insidx++, spill, maxlrg++ ); | |
| 1174 } | |
| 1175 } | |
| 1176 } | |
| 1177 } | |
| 1178 } // End For All Instructions in Block - Non-PHI Pass | |
| 1179 | |
| 1180 // Check if each LRG is live out of this block so as not to propagate | |
| 1181 // beyond the last use of a LRG. | |
| 1182 for( slidx = 0; slidx < spill_cnt; slidx++ ) { | |
| 1183 uint defidx = lidxs.at(slidx); | |
| 1184 IndexSet *liveout = _live->live(b); | |
| 1185 if( !liveout->member(defidx) ) { | |
| 1186 #ifdef ASSERT | |
| 1187 // The index defidx is not live. Check the liveout array to ensure that | |
| 1188 // it contains no members which compress to defidx. Finding such an | |
| 1189 // instance may be a case to add liveout adjustment in compress_uf_map(). | |
| 1190 // See 5063219. | |
| 1191 uint member; | |
| 1192 IndexSetIterator isi(liveout); | |
| 1193 while ((member = isi.next()) != 0) { | |
| 1194 assert(defidx != Find_const(member), "Live out member has not been compressed"); | |
| 1195 } | |
| 1196 #endif | |
| 1197 Reachblock[slidx] = NULL; | |
| 1198 } else { | |
| 1199 assert(Reachblock[slidx] != NULL,"No reaching definition for liveout value"); | |
| 1200 } | |
| 1201 } | |
| 1202 #ifndef PRODUCT | |
| 1203 if( trace_spilling() ) | |
| 1204 b->dump(); | |
| 1205 #endif | |
| 1206 } // End For All Blocks | |
| 1207 | |
| 1208 //----------PASS 2---------- | |
| 1209 // Reset all DEF live range numbers here | |
| 1210 for( insidx = 0; insidx < defs->size(); insidx++ ) { | |
| 1211 // Grab the def | |
| 1212 n1 = defs->at(insidx); | |
| 1213 // Set new lidx for DEF | |
| 1214 new_lrg(n1, maxlrg++); | |
| 1215 } | |
| 1216 //----------Phi Node Splitting---------- | |
| 1217 // Clean up a phi here, and assign a new live range number | |
| 1218 // Cycle through this block's predecessors, collecting Reaches | |
| 1219 // info for each spilled LRG and update edges. | |
| 1220 // Walk the phis list to patch inputs, split phis, and name phis | |
| 1221 for( insidx = 0; insidx < phis->size(); insidx++ ) { | |
| 1222 Node *phi = phis->at(insidx); | |
| 1223 assert(phi->is_Phi(),"This list must only contain Phi Nodes"); | |
| 1224 Block *b = _cfg._bbs[phi->_idx]; | |
| 1225 // Grab the live range number | |
| 1226 uint lidx = Find_id(phi); | |
| 1227 uint slidx = lrg2reach[lidx]; | |
| 1228 // Update node to lidx map | |
| 1229 new_lrg(phi, maxlrg++); | |
| 1230 // Get PASS1's up/down decision for the block. | |
| 1231 int phi_up = !!UP_entry[slidx]->test(b->_pre_order); | |
| 1232 | |
| 1233 // Force down if double-spilling live range | |
| 1234 if( lrgs(lidx)._was_spilled1 ) | |
| 1235 phi_up = false; | |
| 1236 | |
| 1237 // When splitting a Phi we an split it normal or "inverted". | |
| 1238 // An inverted split makes the splits target the Phi's UP/DOWN | |
| 1239 // sense inverted; then the Phi is followed by a final def-side | |
| 1240 // split to invert back. It changes which blocks the spill code | |
| 1241 // goes in. | |
| 1242 | |
| 1243 // Walk the predecessor blocks and assign the reaching def to the Phi. | |
| 1244 // Split Phi nodes by placing USE side splits wherever the reaching | |
| 1245 // DEF has the wrong UP/DOWN value. | |
| 1246 for( uint i = 1; i < b->num_preds(); i++ ) { | |
| 1247 // Get predecessor block pre-order number | |
| 1248 Block *pred = _cfg._bbs[b->pred(i)->_idx]; | |
| 1249 pidx = pred->_pre_order; | |
| 1250 // Grab reaching def | |
| 1251 Node *def = Reaches[pidx][slidx]; | |
| 1252 assert( def, "must have reaching def" ); | |
| 1253 // If input up/down sense and reg-pressure DISagree | |
| 1254 if( def->rematerialize() ) { | |
| 1255 def = split_Rematerialize( def, pred, pred->end_idx(), maxlrg, splits, slidx, lrg2reach, Reachblock, false ); | |
| 1256 if( !def ) return 0; // Bail out | |
| 1257 } | |
| 1258 // Update the Phi's input edge array | |
| 1259 phi->set_req(i,def); | |
| 1260 // Grab the UP/DOWN sense for the input | |
| 1261 u1 = UP[pidx][slidx]; | |
| 1262 if( u1 != (phi_up != 0)) { | |
| 1263 maxlrg = split_USE(def, b, phi, i, maxlrg, !u1, false, splits,slidx); | |
| 1264 // If it wasn't split bail | |
| 1265 if (!maxlrg) { | |
| 1266 return 0; | |
| 1267 } | |
| 1268 } | |
| 1269 } // End for all inputs to the Phi | |
| 1270 } // End for all Phi Nodes | |
| 1271 // Update _maxlrg to save Union asserts | |
| 1272 _maxlrg = maxlrg; | |
| 1273 | |
| 1274 | |
| 1275 //----------PASS 3---------- | |
| 1276 // Pass over all Phi's to union the live ranges | |
| 1277 for( insidx = 0; insidx < phis->size(); insidx++ ) { | |
| 1278 Node *phi = phis->at(insidx); | |
| 1279 assert(phi->is_Phi(),"This list must only contain Phi Nodes"); | |
| 1280 // Walk all inputs to Phi and Union input live range with Phi live range | |
| 1281 for( uint i = 1; i < phi->req(); i++ ) { | |
| 1282 // Grab the input node | |
| 1283 Node *n = phi->in(i); | |
| 1284 assert( n, "" ); | |
| 1285 uint lidx = Find(n); | |
| 1286 uint pidx = Find(phi); | |
| 1287 if( lidx < pidx ) | |
| 1288 Union(n, phi); | |
| 1289 else if( lidx > pidx ) | |
| 1290 Union(phi, n); | |
| 1291 } // End for all inputs to the Phi Node | |
| 1292 } // End for all Phi Nodes | |
| 1293 // Now union all two address instructions | |
| 1294 for( insidx = 0; insidx < defs->size(); insidx++ ) { | |
| 1295 // Grab the def | |
| 1296 n1 = defs->at(insidx); | |
| 1297 // Set new lidx for DEF & handle 2-addr instructions | |
| 1298 if( n1->is_Mach() && ((twoidx = n1->as_Mach()->two_adr()) != 0) ) { | |
| 1299 assert( Find(n1->in(twoidx)) < maxlrg,"Assigning bad live range index"); | |
| 1300 // Union the input and output live ranges | |
| 1301 uint lr1 = Find(n1); | |
| 1302 uint lr2 = Find(n1->in(twoidx)); | |
| 1303 if( lr1 < lr2 ) | |
| 1304 Union(n1, n1->in(twoidx)); | |
| 1305 else if( lr1 > lr2 ) | |
| 1306 Union(n1->in(twoidx), n1); | |
| 1307 } // End if two address | |
| 1308 } // End for all defs | |
| 1309 // DEBUG | |
| 1310 #ifdef ASSERT | |
| 1311 // Validate all live range index assignments | |
| 1312 for( bidx = 0; bidx < _cfg._num_blocks; bidx++ ) { | |
| 1313 b = _cfg._blocks[bidx]; | |
| 1314 for( insidx = 0; insidx <= b->end_idx(); insidx++ ) { | |
| 1315 Node *n = b->_nodes[insidx]; | |
| 1316 uint defidx = Find(n); | |
| 1317 assert(defidx < _maxlrg,"Bad live range index in Split"); | |
| 1318 assert(defidx < maxlrg,"Bad live range index in Split"); | |
| 1319 } | |
| 1320 } | |
| 1321 // Issue a warning if splitting made no progress | |
| 1322 int noprogress = 0; | |
| 1323 for( slidx = 0; slidx < spill_cnt; slidx++ ) { | |
| 1324 if( PrintOpto && WizardMode && splits.at(slidx) == 0 ) { | |
| 1325 tty->print_cr("Failed to split live range %d", lidxs.at(slidx)); | |
| 1326 //BREAKPOINT; | |
| 1327 } | |
| 1328 else { | |
| 1329 noprogress++; | |
| 1330 } | |
| 1331 } | |
| 1332 if(!noprogress) { | |
| 1333 tty->print_cr("Failed to make progress in Split"); | |
| 1334 //BREAKPOINT; | |
| 1335 } | |
| 1336 #endif | |
| 1337 // Return updated count of live ranges | |
| 1338 return maxlrg; | |
| 1339 } |