Mercurial > hg > truffle
annotate src/share/vm/c1/c1_FrameMap.hpp @ 4710:41406797186b
7113012: G1: rename not-fully-young GCs as "mixed"
Summary: Renamed partially-young GCs as mixed and fully-young GCs as young. Change all external output that includes those terms (GC log and GC ergo log) as well as any comments, fields, methods, etc. The changeset also includes very minor code tidying up (added some curly brackets).
Reviewed-by: johnc, brutisso
author | tonyp |
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date | Fri, 16 Dec 2011 02:14:27 -0500 |
parents | 1d1603768966 |
children | 1d7922586cf6 |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 2000, 2011, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #ifndef SHARE_VM_C1_C1_FRAMEMAP_HPP |
26 #define SHARE_VM_C1_C1_FRAMEMAP_HPP | |
27 | |
28 #include "asm/assembler.hpp" | |
29 #include "c1/c1_Defs.hpp" | |
30 #include "c1/c1_LIR.hpp" | |
31 #include "code/vmreg.hpp" | |
32 #include "memory/allocation.hpp" | |
33 #include "runtime/frame.hpp" | |
34 #include "runtime/synchronizer.hpp" | |
35 #include "utilities/globalDefinitions.hpp" | |
36 | |
0 | 37 class ciMethod; |
38 class CallingConvention; | |
39 class BasicTypeArray; | |
40 class BasicTypeList; | |
41 | |
42 //-------------------------------------------------------- | |
43 // FrameMap | |
44 //-------------------------------------------------------- | |
45 | |
46 // This class is responsible of mapping items (locals, monitors, spill | |
47 // slots and registers to their frame location | |
48 // | |
49 // The monitors are specified by a consecutive index, although each monitor entry | |
50 // occupies two words. The monitor_index is 0.._num_monitors | |
51 // The spill index is similar to local index; it is in range 0..(open) | |
52 // | |
53 // The CPU registers are mapped using a fixed table; register with number 0 | |
54 // is the most used one. | |
55 | |
56 | |
57 // stack grow direction --> SP | |
58 // +----------+---+----------+-------+------------------------+-----+ | |
59 // |arguments | x | monitors | spill | reserved argument area | ABI | | |
60 // +----------+---+----------+-------+------------------------+-----+ | |
61 // | |
62 // x = ABI area (SPARC) or return adress and link (i486) | |
63 // ABI = ABI area (SPARC) or nothing (i486) | |
64 | |
65 | |
66 class LIR_OprDesc; | |
67 typedef LIR_OprDesc* LIR_Opr; | |
68 | |
69 | |
70 class FrameMap : public CompilationResourceObj { | |
71 public: | |
72 enum { | |
73 nof_cpu_regs = pd_nof_cpu_regs_frame_map, | |
74 nof_fpu_regs = pd_nof_fpu_regs_frame_map, | |
75 | |
76 nof_cpu_regs_reg_alloc = pd_nof_cpu_regs_reg_alloc, | |
77 nof_fpu_regs_reg_alloc = pd_nof_fpu_regs_reg_alloc, | |
78 | |
2002 | 79 max_nof_caller_save_cpu_regs = pd_nof_caller_save_cpu_regs_frame_map, |
80 nof_caller_save_fpu_regs = pd_nof_caller_save_fpu_regs_frame_map, | |
0 | 81 |
82 spill_slot_size_in_bytes = 4 | |
83 }; | |
84 | |
1972 | 85 #ifdef TARGET_ARCH_x86 |
86 # include "c1_FrameMap_x86.hpp" | |
87 #endif | |
88 #ifdef TARGET_ARCH_sparc | |
89 # include "c1_FrameMap_sparc.hpp" | |
90 #endif | |
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91 #ifdef TARGET_ARCH_arm |
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92 # include "c1_FrameMap_arm.hpp" |
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93 #endif |
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94 #ifdef TARGET_ARCH_ppc |
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95 # include "c1_FrameMap_ppc.hpp" |
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96 #endif |
1972 | 97 |
0 | 98 |
99 friend class LIR_OprDesc; | |
100 | |
101 private: | |
102 static bool _init_done; | |
103 static Register _cpu_rnr2reg [nof_cpu_regs]; | |
104 static int _cpu_reg2rnr [nof_cpu_regs]; | |
105 | |
2002 | 106 static LIR_Opr _caller_save_cpu_regs [max_nof_caller_save_cpu_regs]; |
0 | 107 static LIR_Opr _caller_save_fpu_regs [nof_caller_save_fpu_regs]; |
108 | |
109 int _framesize; | |
110 int _argcount; | |
111 int _num_monitors; | |
112 int _num_spills; | |
113 int _reserved_argument_area_size; | |
114 int _oop_map_arg_count; | |
115 | |
116 CallingConvention* _incoming_arguments; | |
117 intArray* _argument_locations; | |
118 | |
119 void check_spill_index (int spill_index) const { assert(spill_index >= 0, "bad index"); } | |
120 void check_monitor_index (int monitor_index) const { assert(monitor_index >= 0 && | |
121 monitor_index < _num_monitors, "bad index"); } | |
122 | |
123 static Register cpu_rnr2reg (int rnr) { | |
124 assert(_init_done, "tables not initialized"); | |
125 debug_only(cpu_range_check(rnr);) | |
126 return _cpu_rnr2reg[rnr]; | |
127 } | |
128 | |
129 static int cpu_reg2rnr (Register reg) { | |
130 assert(_init_done, "tables not initialized"); | |
131 debug_only(cpu_range_check(reg->encoding());) | |
132 return _cpu_reg2rnr[reg->encoding()]; | |
133 } | |
134 | |
135 static void map_register(int rnr, Register reg) { | |
136 debug_only(cpu_range_check(rnr);) | |
137 debug_only(cpu_range_check(reg->encoding());) | |
138 _cpu_rnr2reg[rnr] = reg; | |
139 _cpu_reg2rnr[reg->encoding()] = rnr; | |
140 } | |
141 | |
142 void update_reserved_argument_area_size (int size) { | |
143 assert(size >= 0, "check"); | |
144 _reserved_argument_area_size = MAX2(_reserved_argument_area_size, size); | |
145 } | |
146 | |
147 protected: | |
148 #ifndef PRODUCT | |
149 static void cpu_range_check (int rnr) { assert(0 <= rnr && rnr < nof_cpu_regs, "cpu register number is too big"); } | |
150 static void fpu_range_check (int rnr) { assert(0 <= rnr && rnr < nof_fpu_regs, "fpu register number is too big"); } | |
151 #endif | |
152 | |
153 | |
154 ByteSize sp_offset_for_monitor_base(const int idx) const; | |
155 | |
156 Address make_new_address(ByteSize sp_offset) const; | |
157 | |
158 ByteSize sp_offset_for_slot(const int idx) const; | |
159 ByteSize sp_offset_for_double_slot(const int idx) const; | |
160 ByteSize sp_offset_for_spill(const int idx) const; | |
161 ByteSize sp_offset_for_monitor_lock(int monitor_index) const; | |
162 ByteSize sp_offset_for_monitor_object(int monitor_index) const; | |
163 | |
164 VMReg sp_offset2vmreg(ByteSize offset) const; | |
165 | |
166 // platform dependent hook used to check that frame is properly | |
167 // addressable on the platform. Used by sparc to verify that all | |
168 // stack addresses are expressable in a simm13. | |
169 bool validate_frame(); | |
170 | |
171 static LIR_Opr map_to_opr(BasicType type, VMRegPair* reg, bool incoming); | |
172 | |
173 public: | |
174 // Opr representing the stack_pointer on this platform | |
175 static LIR_Opr stack_pointer(); | |
176 | |
1564 | 177 // JSR 292 |
178 static LIR_Opr method_handle_invoke_SP_save_opr(); | |
179 | |
0 | 180 static BasicTypeArray* signature_type_array_for(const ciMethod* method); |
181 | |
182 // for outgoing calls, these also update the reserved area to | |
183 // include space for arguments and any ABI area. | |
184 CallingConvention* c_calling_convention (const BasicTypeArray* signature); | |
185 CallingConvention* java_calling_convention (const BasicTypeArray* signature, bool outgoing); | |
186 | |
187 // deopt support | |
188 ByteSize sp_offset_for_orig_pc() { return sp_offset_for_monitor_base(_num_monitors); } | |
189 | |
190 static LIR_Opr as_opr(Register r) { | |
191 return LIR_OprFact::single_cpu(cpu_reg2rnr(r)); | |
192 } | |
193 static LIR_Opr as_oop_opr(Register r) { | |
194 return LIR_OprFact::single_cpu_oop(cpu_reg2rnr(r)); | |
195 } | |
196 | |
197 FrameMap(ciMethod* method, int monitors, int reserved_argument_area_size); | |
198 bool finalize_frame(int nof_slots); | |
199 | |
200 int reserved_argument_area_size () const { return _reserved_argument_area_size; } | |
201 int framesize () const { assert(_framesize != -1, "hasn't been calculated"); return _framesize; } | |
202 ByteSize framesize_in_bytes () const { return in_ByteSize(framesize() * 4); } | |
203 int num_monitors () const { return _num_monitors; } | |
204 int num_spills () const { assert(_num_spills >= 0, "not set"); return _num_spills; } | |
205 int argcount () const { assert(_argcount >= 0, "not set"); return _argcount; } | |
206 | |
207 int oop_map_arg_count() const { return _oop_map_arg_count; } | |
208 | |
209 CallingConvention* incoming_arguments() const { return _incoming_arguments; } | |
210 | |
211 // convenience routines | |
212 Address address_for_slot(int index, int sp_adjust = 0) const { | |
213 return make_new_address(sp_offset_for_slot(index) + in_ByteSize(sp_adjust)); | |
214 } | |
215 Address address_for_double_slot(int index, int sp_adjust = 0) const { | |
216 return make_new_address(sp_offset_for_double_slot(index) + in_ByteSize(sp_adjust)); | |
217 } | |
218 Address address_for_monitor_lock(int monitor_index) const { | |
219 return make_new_address(sp_offset_for_monitor_lock(monitor_index)); | |
220 } | |
221 Address address_for_monitor_object(int monitor_index) const { | |
222 return make_new_address(sp_offset_for_monitor_object(monitor_index)); | |
223 } | |
224 | |
225 void print_frame_layout() const; | |
226 | |
227 // Creates Location describing desired slot and returns it via pointer | |
228 // to Location object. Returns true if the stack frame offset was legal | |
229 // (as defined by Location::legal_offset_in_bytes()), false otherwise. | |
230 // Do not use the returned location if this returns false. | |
231 bool location_for_sp_offset(ByteSize byte_offset_from_sp, | |
232 Location::Type loc_type, Location* loc) const; | |
233 | |
234 bool location_for_monitor_lock (int monitor_index, Location* loc) const { | |
235 return location_for_sp_offset(sp_offset_for_monitor_lock(monitor_index), Location::normal, loc); | |
236 } | |
237 bool location_for_monitor_object(int monitor_index, Location* loc) const { | |
238 return location_for_sp_offset(sp_offset_for_monitor_object(monitor_index), Location::oop, loc); | |
239 } | |
240 bool locations_for_slot (int index, Location::Type loc_type, | |
241 Location* loc, Location* second = NULL) const; | |
242 | |
243 VMReg slot_regname(int index) const { | |
244 return sp_offset2vmreg(sp_offset_for_slot(index)); | |
245 } | |
246 VMReg monitor_object_regname(int monitor_index) const { | |
247 return sp_offset2vmreg(sp_offset_for_monitor_object(monitor_index)); | |
248 } | |
249 VMReg regname(LIR_Opr opr) const; | |
250 | |
251 static LIR_Opr caller_save_cpu_reg_at(int i) { | |
2002 | 252 assert(i >= 0 && i < max_nof_caller_save_cpu_regs, "out of bounds"); |
0 | 253 return _caller_save_cpu_regs[i]; |
254 } | |
255 | |
256 static LIR_Opr caller_save_fpu_reg_at(int i) { | |
257 assert(i >= 0 && i < nof_caller_save_fpu_regs, "out of bounds"); | |
258 return _caller_save_fpu_regs[i]; | |
259 } | |
260 | |
1584 | 261 static void initialize(); |
0 | 262 }; |
263 | |
264 // CallingConvention | |
265 //-------------------------------------------------------- | |
266 | |
267 class CallingConvention: public ResourceObj { | |
268 private: | |
269 LIR_OprList* _args; | |
270 int _reserved_stack_slots; | |
271 | |
272 public: | |
273 CallingConvention (LIR_OprList* args, int reserved_stack_slots) | |
274 : _args(args) | |
275 , _reserved_stack_slots(reserved_stack_slots) {} | |
276 | |
277 LIR_OprList* args() { return _args; } | |
278 | |
279 LIR_Opr at(int i) const { return _args->at(i); } | |
280 int length() const { return _args->length(); } | |
281 | |
282 // Indicates number of real frame slots used by arguments passed on stack. | |
283 int reserved_stack_slots() const { return _reserved_stack_slots; } | |
284 | |
285 #ifndef PRODUCT | |
286 void print () const { | |
287 for (int i = 0; i < length(); i++) { | |
288 at(i)->print(); | |
289 } | |
290 } | |
291 #endif // PRODUCT | |
292 }; | |
1972 | 293 |
294 #endif // SHARE_VM_C1_C1_FRAMEMAP_HPP |