Mercurial > hg > truffle
annotate src/cpu/x86/vm/sharedRuntime_x86_64.cpp @ 5111:422c979ff392
fixed two cases where DeoptAction was invalid
author | Christian Haeubl <christian.haeubl@oracle.com> |
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date | Thu, 15 Mar 2012 16:34:31 -0700 |
parents | 6766253384bf |
children | 957c266d8bc5 |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
26 #include "asm/assembler.hpp" | |
27 #include "assembler_x86.inline.hpp" | |
28 #include "code/debugInfoRec.hpp" | |
29 #include "code/icBuffer.hpp" | |
30 #include "code/vtableStubs.hpp" | |
31 #include "interpreter/interpreter.hpp" | |
32 #include "oops/compiledICHolderOop.hpp" | |
33 #include "prims/jvmtiRedefineClassesTrace.hpp" | |
34 #include "runtime/sharedRuntime.hpp" | |
35 #include "runtime/vframeArray.hpp" | |
36 #include "vmreg_x86.inline.hpp" | |
37 #ifdef COMPILER1 | |
38 #include "c1/c1_Runtime1.hpp" | |
39 #endif | |
40 #ifdef COMPILER2 | |
41 #include "opto/runtime.hpp" | |
42 #endif | |
0 | 43 |
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44 #define __ masm-> |
0 | 45 |
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46 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; |
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47 |
0 | 48 class SimpleRuntimeFrame { |
49 | |
50 public: | |
51 | |
52 // Most of the runtime stubs have this simple frame layout. | |
53 // This class exists to make the layout shared in one place. | |
54 // Offsets are for compiler stack slots, which are jints. | |
55 enum layout { | |
56 // The frame sender code expects that rbp will be in the "natural" place and | |
57 // will override any oopMap setting for it. We must therefore force the layout | |
58 // so that it agrees with the frame sender code. | |
59 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt, | |
60 rbp_off2, | |
61 return_off, return_off2, | |
62 framesize | |
63 }; | |
64 }; | |
65 | |
66 class RegisterSaver { | |
67 // Capture info about frame layout. Layout offsets are in jint | |
68 // units because compiler frame slots are jints. | |
69 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off | |
70 enum layout { | |
71 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area | |
72 xmm_off = fpu_state_off + 160/BytesPerInt, // offset in fxsave save area | |
73 DEF_XMM_OFFS(0), | |
74 DEF_XMM_OFFS(1), | |
75 DEF_XMM_OFFS(2), | |
76 DEF_XMM_OFFS(3), | |
77 DEF_XMM_OFFS(4), | |
78 DEF_XMM_OFFS(5), | |
79 DEF_XMM_OFFS(6), | |
80 DEF_XMM_OFFS(7), | |
81 DEF_XMM_OFFS(8), | |
82 DEF_XMM_OFFS(9), | |
83 DEF_XMM_OFFS(10), | |
84 DEF_XMM_OFFS(11), | |
85 DEF_XMM_OFFS(12), | |
86 DEF_XMM_OFFS(13), | |
87 DEF_XMM_OFFS(14), | |
88 DEF_XMM_OFFS(15), | |
89 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt), | |
90 fpu_stateH_end, | |
91 r15_off, r15H_off, | |
92 r14_off, r14H_off, | |
93 r13_off, r13H_off, | |
94 r12_off, r12H_off, | |
95 r11_off, r11H_off, | |
96 r10_off, r10H_off, | |
97 r9_off, r9H_off, | |
98 r8_off, r8H_off, | |
99 rdi_off, rdiH_off, | |
100 rsi_off, rsiH_off, | |
101 ignore_off, ignoreH_off, // extra copy of rbp | |
102 rsp_off, rspH_off, | |
103 rbx_off, rbxH_off, | |
104 rdx_off, rdxH_off, | |
105 rcx_off, rcxH_off, | |
106 rax_off, raxH_off, | |
107 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state | |
108 align_off, alignH_off, | |
109 flags_off, flagsH_off, | |
110 // The frame sender code expects that rbp will be in the "natural" place and | |
111 // will override any oopMap setting for it. We must therefore force the layout | |
112 // so that it agrees with the frame sender code. | |
113 rbp_off, rbpH_off, // copy of rbp we will restore | |
114 return_off, returnH_off, // slot for return address | |
115 reg_save_size // size in compiler stack slots | |
116 }; | |
117 | |
118 public: | |
119 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words); | |
120 static void restore_live_registers(MacroAssembler* masm); | |
121 | |
122 // Offsets into the register save area | |
123 // Used by deoptimization when it is managing result register | |
124 // values on its own | |
125 | |
126 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; } | |
304 | 127 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; } |
0 | 128 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; } |
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129 static int r10_offset_in_bytes(void) { return BytesPerInt * r10_off; } |
0 | 130 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; } |
131 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; } | |
132 | |
133 // During deoptimization only the result registers need to be restored, | |
134 // all the other values have already been extracted. | |
135 static void restore_result_registers(MacroAssembler* masm); | |
136 }; | |
137 | |
138 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) { | |
139 | |
140 // Always make the frame size 16-byte aligned | |
141 int frame_size_in_bytes = round_to(additional_frame_words*wordSize + | |
142 reg_save_size*BytesPerInt, 16); | |
143 // OopMap frame size is in compiler stack slots (jint's) not bytes or words | |
144 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt; | |
145 // The caller will allocate additional_frame_words | |
146 int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt; | |
147 // CodeBlob frame size is in words. | |
148 int frame_size_in_words = frame_size_in_bytes / wordSize; | |
149 *total_frame_words = frame_size_in_words; | |
150 | |
151 // Save registers, fpu state, and flags. | |
152 // We assume caller has already pushed the return address onto the | |
153 // stack, so rsp is 8-byte aligned here. | |
154 // We push rpb twice in this sequence because we want the real rbp | |
155 // to be under the return like a normal enter. | |
156 | |
157 __ enter(); // rsp becomes 16-byte aligned here | |
158 __ push_CPU_state(); // Push a multiple of 16 bytes | |
159 if (frame::arg_reg_save_area_bytes != 0) { | |
160 // Allocate argument register save area | |
304 | 161 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 162 } |
163 | |
164 // Set an oopmap for the call site. This oopmap will map all | |
165 // oop-registers and debug-info registers as callee-saved. This | |
166 // will allow deoptimization at this safepoint to find all possible | |
167 // debug-info recordings, as well as let GC find all oops. | |
168 | |
169 OopMapSet *oop_maps = new OopMapSet(); | |
170 OopMap* map = new OopMap(frame_size_in_slots, 0); | |
171 map->set_callee_saved(VMRegImpl::stack2reg( rax_off + additional_frame_slots), rax->as_VMReg()); | |
172 map->set_callee_saved(VMRegImpl::stack2reg( rcx_off + additional_frame_slots), rcx->as_VMReg()); | |
173 map->set_callee_saved(VMRegImpl::stack2reg( rdx_off + additional_frame_slots), rdx->as_VMReg()); | |
174 map->set_callee_saved(VMRegImpl::stack2reg( rbx_off + additional_frame_slots), rbx->as_VMReg()); | |
175 // rbp location is known implicitly by the frame sender code, needs no oopmap | |
176 // and the location where rbp was saved by is ignored | |
177 map->set_callee_saved(VMRegImpl::stack2reg( rsi_off + additional_frame_slots), rsi->as_VMReg()); | |
178 map->set_callee_saved(VMRegImpl::stack2reg( rdi_off + additional_frame_slots), rdi->as_VMReg()); | |
179 map->set_callee_saved(VMRegImpl::stack2reg( r8_off + additional_frame_slots), r8->as_VMReg()); | |
180 map->set_callee_saved(VMRegImpl::stack2reg( r9_off + additional_frame_slots), r9->as_VMReg()); | |
181 map->set_callee_saved(VMRegImpl::stack2reg( r10_off + additional_frame_slots), r10->as_VMReg()); | |
182 map->set_callee_saved(VMRegImpl::stack2reg( r11_off + additional_frame_slots), r11->as_VMReg()); | |
183 map->set_callee_saved(VMRegImpl::stack2reg( r12_off + additional_frame_slots), r12->as_VMReg()); | |
184 map->set_callee_saved(VMRegImpl::stack2reg( r13_off + additional_frame_slots), r13->as_VMReg()); | |
185 map->set_callee_saved(VMRegImpl::stack2reg( r14_off + additional_frame_slots), r14->as_VMReg()); | |
186 map->set_callee_saved(VMRegImpl::stack2reg( r15_off + additional_frame_slots), r15->as_VMReg()); | |
187 map->set_callee_saved(VMRegImpl::stack2reg(xmm0_off + additional_frame_slots), xmm0->as_VMReg()); | |
188 map->set_callee_saved(VMRegImpl::stack2reg(xmm1_off + additional_frame_slots), xmm1->as_VMReg()); | |
189 map->set_callee_saved(VMRegImpl::stack2reg(xmm2_off + additional_frame_slots), xmm2->as_VMReg()); | |
190 map->set_callee_saved(VMRegImpl::stack2reg(xmm3_off + additional_frame_slots), xmm3->as_VMReg()); | |
191 map->set_callee_saved(VMRegImpl::stack2reg(xmm4_off + additional_frame_slots), xmm4->as_VMReg()); | |
192 map->set_callee_saved(VMRegImpl::stack2reg(xmm5_off + additional_frame_slots), xmm5->as_VMReg()); | |
193 map->set_callee_saved(VMRegImpl::stack2reg(xmm6_off + additional_frame_slots), xmm6->as_VMReg()); | |
194 map->set_callee_saved(VMRegImpl::stack2reg(xmm7_off + additional_frame_slots), xmm7->as_VMReg()); | |
195 map->set_callee_saved(VMRegImpl::stack2reg(xmm8_off + additional_frame_slots), xmm8->as_VMReg()); | |
196 map->set_callee_saved(VMRegImpl::stack2reg(xmm9_off + additional_frame_slots), xmm9->as_VMReg()); | |
197 map->set_callee_saved(VMRegImpl::stack2reg(xmm10_off + additional_frame_slots), xmm10->as_VMReg()); | |
198 map->set_callee_saved(VMRegImpl::stack2reg(xmm11_off + additional_frame_slots), xmm11->as_VMReg()); | |
199 map->set_callee_saved(VMRegImpl::stack2reg(xmm12_off + additional_frame_slots), xmm12->as_VMReg()); | |
200 map->set_callee_saved(VMRegImpl::stack2reg(xmm13_off + additional_frame_slots), xmm13->as_VMReg()); | |
201 map->set_callee_saved(VMRegImpl::stack2reg(xmm14_off + additional_frame_slots), xmm14->as_VMReg()); | |
202 map->set_callee_saved(VMRegImpl::stack2reg(xmm15_off + additional_frame_slots), xmm15->as_VMReg()); | |
203 | |
204 // %%% These should all be a waste but we'll keep things as they were for now | |
205 if (true) { | |
206 map->set_callee_saved(VMRegImpl::stack2reg( raxH_off + additional_frame_slots), | |
207 rax->as_VMReg()->next()); | |
208 map->set_callee_saved(VMRegImpl::stack2reg( rcxH_off + additional_frame_slots), | |
209 rcx->as_VMReg()->next()); | |
210 map->set_callee_saved(VMRegImpl::stack2reg( rdxH_off + additional_frame_slots), | |
211 rdx->as_VMReg()->next()); | |
212 map->set_callee_saved(VMRegImpl::stack2reg( rbxH_off + additional_frame_slots), | |
213 rbx->as_VMReg()->next()); | |
214 // rbp location is known implicitly by the frame sender code, needs no oopmap | |
215 map->set_callee_saved(VMRegImpl::stack2reg( rsiH_off + additional_frame_slots), | |
216 rsi->as_VMReg()->next()); | |
217 map->set_callee_saved(VMRegImpl::stack2reg( rdiH_off + additional_frame_slots), | |
218 rdi->as_VMReg()->next()); | |
219 map->set_callee_saved(VMRegImpl::stack2reg( r8H_off + additional_frame_slots), | |
220 r8->as_VMReg()->next()); | |
221 map->set_callee_saved(VMRegImpl::stack2reg( r9H_off + additional_frame_slots), | |
222 r9->as_VMReg()->next()); | |
223 map->set_callee_saved(VMRegImpl::stack2reg( r10H_off + additional_frame_slots), | |
224 r10->as_VMReg()->next()); | |
225 map->set_callee_saved(VMRegImpl::stack2reg( r11H_off + additional_frame_slots), | |
226 r11->as_VMReg()->next()); | |
227 map->set_callee_saved(VMRegImpl::stack2reg( r12H_off + additional_frame_slots), | |
228 r12->as_VMReg()->next()); | |
229 map->set_callee_saved(VMRegImpl::stack2reg( r13H_off + additional_frame_slots), | |
230 r13->as_VMReg()->next()); | |
231 map->set_callee_saved(VMRegImpl::stack2reg( r14H_off + additional_frame_slots), | |
232 r14->as_VMReg()->next()); | |
233 map->set_callee_saved(VMRegImpl::stack2reg( r15H_off + additional_frame_slots), | |
234 r15->as_VMReg()->next()); | |
235 map->set_callee_saved(VMRegImpl::stack2reg(xmm0H_off + additional_frame_slots), | |
236 xmm0->as_VMReg()->next()); | |
237 map->set_callee_saved(VMRegImpl::stack2reg(xmm1H_off + additional_frame_slots), | |
238 xmm1->as_VMReg()->next()); | |
239 map->set_callee_saved(VMRegImpl::stack2reg(xmm2H_off + additional_frame_slots), | |
240 xmm2->as_VMReg()->next()); | |
241 map->set_callee_saved(VMRegImpl::stack2reg(xmm3H_off + additional_frame_slots), | |
242 xmm3->as_VMReg()->next()); | |
243 map->set_callee_saved(VMRegImpl::stack2reg(xmm4H_off + additional_frame_slots), | |
244 xmm4->as_VMReg()->next()); | |
245 map->set_callee_saved(VMRegImpl::stack2reg(xmm5H_off + additional_frame_slots), | |
246 xmm5->as_VMReg()->next()); | |
247 map->set_callee_saved(VMRegImpl::stack2reg(xmm6H_off + additional_frame_slots), | |
248 xmm6->as_VMReg()->next()); | |
249 map->set_callee_saved(VMRegImpl::stack2reg(xmm7H_off + additional_frame_slots), | |
250 xmm7->as_VMReg()->next()); | |
251 map->set_callee_saved(VMRegImpl::stack2reg(xmm8H_off + additional_frame_slots), | |
252 xmm8->as_VMReg()->next()); | |
253 map->set_callee_saved(VMRegImpl::stack2reg(xmm9H_off + additional_frame_slots), | |
254 xmm9->as_VMReg()->next()); | |
255 map->set_callee_saved(VMRegImpl::stack2reg(xmm10H_off + additional_frame_slots), | |
256 xmm10->as_VMReg()->next()); | |
257 map->set_callee_saved(VMRegImpl::stack2reg(xmm11H_off + additional_frame_slots), | |
258 xmm11->as_VMReg()->next()); | |
259 map->set_callee_saved(VMRegImpl::stack2reg(xmm12H_off + additional_frame_slots), | |
260 xmm12->as_VMReg()->next()); | |
261 map->set_callee_saved(VMRegImpl::stack2reg(xmm13H_off + additional_frame_slots), | |
262 xmm13->as_VMReg()->next()); | |
263 map->set_callee_saved(VMRegImpl::stack2reg(xmm14H_off + additional_frame_slots), | |
264 xmm14->as_VMReg()->next()); | |
265 map->set_callee_saved(VMRegImpl::stack2reg(xmm15H_off + additional_frame_slots), | |
266 xmm15->as_VMReg()->next()); | |
267 } | |
268 | |
269 return map; | |
270 } | |
271 | |
272 void RegisterSaver::restore_live_registers(MacroAssembler* masm) { | |
273 if (frame::arg_reg_save_area_bytes != 0) { | |
274 // Pop arg register save area | |
304 | 275 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 276 } |
277 // Recover CPU state | |
278 __ pop_CPU_state(); | |
279 // Get the rbp described implicitly by the calling convention (no oopMap) | |
304 | 280 __ pop(rbp); |
0 | 281 } |
282 | |
283 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
284 | |
285 // Just restore result register. Only used by deoptimization. By | |
286 // now any callee save register that needs to be restored to a c2 | |
287 // caller of the deoptee has been extracted into the vframeArray | |
288 // and will be stuffed into the c2i adapter we create for later | |
289 // restoration so only result registers need to be restored here. | |
290 | |
291 // Restore fp result register | |
292 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes())); | |
293 // Restore integer result register | |
304 | 294 __ movptr(rax, Address(rsp, rax_offset_in_bytes())); |
295 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes())); | |
296 | |
0 | 297 // Pop all of the register save are off the stack except the return address |
304 | 298 __ addptr(rsp, return_offset_in_bytes()); |
0 | 299 } |
300 | |
301 // The java_calling_convention describes stack locations as ideal slots on | |
302 // a frame with no abi restrictions. Since we must observe abi restrictions | |
303 // (like the placement of the register window) the slots must be biased by | |
304 // the following value. | |
305 static int reg2offset_in(VMReg r) { | |
306 // Account for saved rbp and return address | |
307 // This should really be in_preserve_stack_slots | |
308 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size; | |
309 } | |
310 | |
311 static int reg2offset_out(VMReg r) { | |
312 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
313 } | |
314 | |
315 // --------------------------------------------------------------------------- | |
316 // Read the array of BasicTypes from a signature, and compute where the | |
317 // arguments should go. Values in the VMRegPair regs array refer to 4-byte | |
318 // quantities. Values less than VMRegImpl::stack0 are registers, those above | |
319 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer | |
320 // as framesizes are fixed. | |
321 // VMRegImpl::stack0 refers to the first slot 0(sp). | |
322 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
323 // up to RegisterImpl::number_of_registers) are the 64-bit | |
324 // integer registers. | |
325 | |
326 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
327 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
328 // units regardless of build. Of course for i486 there is no 64 bit build | |
329 | |
330 // The Java calling convention is a "shifted" version of the C ABI. | |
331 // By skipping the first C ABI register we can call non-static jni methods | |
332 // with small numbers of arguments without having to shuffle the arguments | |
333 // at all. Since we control the java ABI we ought to at least get some | |
334 // advantage out of it. | |
335 | |
336 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
337 VMRegPair *regs, | |
338 int total_args_passed, | |
339 int is_outgoing) { | |
340 | |
341 // Create the mapping between argument positions and | |
342 // registers. | |
343 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = { | |
344 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5 | |
345 }; | |
346 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = { | |
347 j_farg0, j_farg1, j_farg2, j_farg3, | |
348 j_farg4, j_farg5, j_farg6, j_farg7 | |
349 }; | |
350 | |
351 | |
352 uint int_args = 0; | |
353 uint fp_args = 0; | |
354 uint stk_args = 0; // inc by 2 each time | |
355 | |
356 for (int i = 0; i < total_args_passed; i++) { | |
357 switch (sig_bt[i]) { | |
358 case T_BOOLEAN: | |
359 case T_CHAR: | |
360 case T_BYTE: | |
361 case T_SHORT: | |
362 case T_INT: | |
363 if (int_args < Argument::n_int_register_parameters_j) { | |
364 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
365 } else { | |
366 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
367 stk_args += 2; | |
368 } | |
369 break; | |
370 case T_VOID: | |
371 // halves of T_LONG or T_DOUBLE | |
372 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
373 regs[i].set_bad(); | |
374 break; | |
375 case T_LONG: | |
376 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
377 // fall through | |
378 case T_OBJECT: | |
379 case T_ARRAY: | |
380 case T_ADDRESS: | |
381 if (int_args < Argument::n_int_register_parameters_j) { | |
382 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
383 } else { | |
384 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
385 stk_args += 2; | |
386 } | |
387 break; | |
388 case T_FLOAT: | |
389 if (fp_args < Argument::n_float_register_parameters_j) { | |
390 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
391 } else { | |
392 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
393 stk_args += 2; | |
394 } | |
395 break; | |
396 case T_DOUBLE: | |
397 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
398 if (fp_args < Argument::n_float_register_parameters_j) { | |
399 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
400 } else { | |
401 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
402 stk_args += 2; | |
403 } | |
404 break; | |
405 default: | |
406 ShouldNotReachHere(); | |
407 break; | |
408 } | |
409 } | |
410 | |
411 return round_to(stk_args, 2); | |
412 } | |
413 | |
414 // Patch the callers callsite with entry to compiled code if it exists. | |
415 static void patch_callers_callsite(MacroAssembler *masm) { | |
416 Label L; | |
417 __ verify_oop(rbx); | |
304 | 418 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD); |
0 | 419 __ jcc(Assembler::equal, L); |
420 | |
421 // Save the current stack pointer | |
304 | 422 __ mov(r13, rsp); |
0 | 423 // Schedule the branch target address early. |
424 // Call into the VM to patch the caller, then jump to compiled callee | |
425 // rax isn't live so capture return address while we easily can | |
304 | 426 __ movptr(rax, Address(rsp, 0)); |
0 | 427 |
428 // align stack so push_CPU_state doesn't fault | |
304 | 429 __ andptr(rsp, -(StackAlignmentInBytes)); |
0 | 430 __ push_CPU_state(); |
431 | |
432 | |
433 __ verify_oop(rbx); | |
434 // VM needs caller's callsite | |
435 // VM needs target method | |
436 // This needs to be a long call since we will relocate this adapter to | |
437 // the codeBuffer and it may not reach | |
438 | |
439 // Allocate argument register save area | |
440 if (frame::arg_reg_save_area_bytes != 0) { | |
304 | 441 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 442 } |
304 | 443 __ mov(c_rarg0, rbx); |
444 __ mov(c_rarg1, rax); | |
0 | 445 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); |
446 | |
447 // De-allocate argument register save area | |
448 if (frame::arg_reg_save_area_bytes != 0) { | |
304 | 449 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 450 } |
451 | |
452 __ pop_CPU_state(); | |
453 // restore sp | |
304 | 454 __ mov(rsp, r13); |
0 | 455 __ bind(L); |
456 } | |
457 | |
458 | |
459 static void gen_c2i_adapter(MacroAssembler *masm, | |
460 int total_args_passed, | |
461 int comp_args_on_stack, | |
462 const BasicType *sig_bt, | |
463 const VMRegPair *regs, | |
464 Label& skip_fixup) { | |
465 // Before we get into the guts of the C2I adapter, see if we should be here | |
466 // at all. We've come from compiled code and are attempting to jump to the | |
467 // interpreter, which means the caller made a static call to get here | |
468 // (vcalls always get a compiled target if there is one). Check for a | |
469 // compiled target. If there is one, we need to patch the caller's call. | |
470 patch_callers_callsite(masm); | |
471 | |
472 __ bind(skip_fixup); | |
473 | |
474 // Since all args are passed on the stack, total_args_passed * | |
475 // Interpreter::stackElementSize is the space we need. Plus 1 because | |
476 // we also account for the return address location since | |
477 // we store it first rather than hold it in rax across all the shuffling | |
478 | |
1506 | 479 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize; |
0 | 480 |
481 // stack is aligned, keep it that way | |
482 extraspace = round_to(extraspace, 2*wordSize); | |
483 | |
484 // Get return address | |
304 | 485 __ pop(rax); |
0 | 486 |
487 // set senderSP value | |
304 | 488 __ mov(r13, rsp); |
489 | |
490 __ subptr(rsp, extraspace); | |
0 | 491 |
492 // Store the return address in the expected location | |
304 | 493 __ movptr(Address(rsp, 0), rax); |
0 | 494 |
495 // Now write the args into the outgoing interpreter space | |
496 for (int i = 0; i < total_args_passed; i++) { | |
497 if (sig_bt[i] == T_VOID) { | |
498 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
499 continue; | |
500 } | |
501 | |
502 // offset to start parameters | |
1506 | 503 int st_off = (total_args_passed - i) * Interpreter::stackElementSize; |
504 int next_off = st_off - Interpreter::stackElementSize; | |
0 | 505 |
506 // Say 4 args: | |
507 // i st_off | |
508 // 0 32 T_LONG | |
509 // 1 24 T_VOID | |
510 // 2 16 T_OBJECT | |
511 // 3 8 T_BOOL | |
512 // - 0 return address | |
513 // | |
514 // However to make thing extra confusing. Because we can fit a long/double in | |
515 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter | |
516 // leaves one slot empty and only stores to a single slot. In this case the | |
517 // slot that is occupied is the T_VOID slot. See I said it was confusing. | |
518 | |
519 VMReg r_1 = regs[i].first(); | |
520 VMReg r_2 = regs[i].second(); | |
521 if (!r_1->is_valid()) { | |
522 assert(!r_2->is_valid(), ""); | |
523 continue; | |
524 } | |
525 if (r_1->is_stack()) { | |
526 // memory to memory use rax | |
527 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; | |
528 if (!r_2->is_valid()) { | |
529 // sign extend?? | |
530 __ movl(rax, Address(rsp, ld_off)); | |
304 | 531 __ movptr(Address(rsp, st_off), rax); |
0 | 532 |
533 } else { | |
534 | |
535 __ movq(rax, Address(rsp, ld_off)); | |
536 | |
537 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
538 // T_DOUBLE and T_LONG use two slots in the interpreter | |
539 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
540 // ld_off == LSW, ld_off+wordSize == MSW | |
541 // st_off == MSW, next_off == LSW | |
542 __ movq(Address(rsp, next_off), rax); | |
543 #ifdef ASSERT | |
544 // Overwrite the unused slot with known junk | |
545 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); | |
304 | 546 __ movptr(Address(rsp, st_off), rax); |
0 | 547 #endif /* ASSERT */ |
548 } else { | |
549 __ movq(Address(rsp, st_off), rax); | |
550 } | |
551 } | |
552 } else if (r_1->is_Register()) { | |
553 Register r = r_1->as_Register(); | |
554 if (!r_2->is_valid()) { | |
555 // must be only an int (or less ) so move only 32bits to slot | |
556 // why not sign extend?? | |
557 __ movl(Address(rsp, st_off), r); | |
558 } else { | |
559 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
560 // T_DOUBLE and T_LONG use two slots in the interpreter | |
561 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
562 // long/double in gpr | |
563 #ifdef ASSERT | |
564 // Overwrite the unused slot with known junk | |
565 __ mov64(rax, CONST64(0xdeadffffdeadaaab)); | |
304 | 566 __ movptr(Address(rsp, st_off), rax); |
0 | 567 #endif /* ASSERT */ |
568 __ movq(Address(rsp, next_off), r); | |
569 } else { | |
304 | 570 __ movptr(Address(rsp, st_off), r); |
0 | 571 } |
572 } | |
573 } else { | |
574 assert(r_1->is_XMMRegister(), ""); | |
575 if (!r_2->is_valid()) { | |
576 // only a float use just part of the slot | |
577 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); | |
578 } else { | |
579 #ifdef ASSERT | |
580 // Overwrite the unused slot with known junk | |
581 __ mov64(rax, CONST64(0xdeadffffdeadaaac)); | |
304 | 582 __ movptr(Address(rsp, st_off), rax); |
0 | 583 #endif /* ASSERT */ |
584 __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister()); | |
585 } | |
586 } | |
587 } | |
588 | |
589 // Schedule the branch target address early. | |
304 | 590 __ movptr(rcx, Address(rbx, in_bytes(methodOopDesc::interpreter_entry_offset()))); |
0 | 591 __ jmp(rcx); |
592 } | |
593 | |
594 static void gen_i2c_adapter(MacroAssembler *masm, | |
595 int total_args_passed, | |
596 int comp_args_on_stack, | |
597 const BasicType *sig_bt, | |
598 const VMRegPair *regs) { | |
599 | |
600 // Note: r13 contains the senderSP on entry. We must preserve it since | |
601 // we may do a i2c -> c2i transition if we lose a race where compiled | |
602 // code goes non-entrant while we get args ready. | |
603 // In addition we use r13 to locate all the interpreter args as | |
604 // we must align the stack to 16 bytes on an i2c entry else we | |
605 // lose alignment we expect in all compiled code and register | |
606 // save code can segv when fxsave instructions find improperly | |
607 // aligned stack pointer. | |
608 | |
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609 // Pick up the return address |
304 | 610 __ movptr(rax, Address(rsp, 0)); |
0 | 611 |
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612 // Must preserve original SP for loading incoming arguments because |
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613 // we need to align the outgoing SP for compiled code. |
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614 __ movptr(r11, rsp); |
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615 |
0 | 616 // Cut-out for having no stack args. Since up to 2 int/oop args are passed |
617 // in registers, we will occasionally have no stack args. | |
618 int comp_words_on_stack = 0; | |
619 if (comp_args_on_stack) { | |
620 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in | |
621 // registers are below. By subtracting stack0, we either get a negative | |
622 // number (all values in registers) or the maximum stack slot accessed. | |
623 | |
624 // Convert 4-byte c2 stack slots to words. | |
625 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; | |
626 // Round up to miminum stack alignment, in wordSize | |
627 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
304 | 628 __ subptr(rsp, comp_words_on_stack * wordSize); |
0 | 629 } |
630 | |
631 | |
632 // Ensure compiled code always sees stack at proper alignment | |
304 | 633 __ andptr(rsp, -16); |
0 | 634 |
635 // push the return address and misalign the stack that youngest frame always sees | |
636 // as far as the placement of the call instruction | |
304 | 637 __ push(rax); |
0 | 638 |
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639 // Put saved SP in another register |
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640 const Register saved_sp = rax; |
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641 __ movptr(saved_sp, r11); |
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642 |
0 | 643 // Will jump to the compiled code just as if compiled code was doing it. |
644 // Pre-load the register-jump target early, to schedule it better. | |
304 | 645 __ movptr(r11, Address(rbx, in_bytes(methodOopDesc::from_compiled_offset()))); |
0 | 646 |
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647 #ifdef GRAAL |
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648 // check if this call should be routed towards a specific entry point |
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649 __ cmpptr(Address(r15_thread, in_bytes(JavaThread::graal_alternate_call_target_offset())), 0); |
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650 Label no_alternative_target; |
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651 __ jcc(Assembler::equal, no_alternative_target); |
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652 __ movptr(r11, Address(r15_thread, in_bytes(JavaThread::graal_alternate_call_target_offset()))); |
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653 __ movptr(Address(r15_thread, in_bytes(JavaThread::graal_alternate_call_target_offset())), 0); |
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654 __ bind(no_alternative_target); |
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655 #endif |
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656 |
0 | 657 // Now generate the shuffle code. Pick up all register args and move the |
658 // rest through the floating point stack top. | |
659 for (int i = 0; i < total_args_passed; i++) { | |
660 if (sig_bt[i] == T_VOID) { | |
661 // Longs and doubles are passed in native word order, but misaligned | |
662 // in the 32-bit build. | |
663 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
664 continue; | |
665 } | |
666 | |
667 // Pick up 0, 1 or 2 words from SP+offset. | |
668 | |
669 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), | |
670 "scrambled load targets?"); | |
671 // Load in argument order going down. | |
1506 | 672 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize; |
0 | 673 // Point to interpreter value (vs. tag) |
1506 | 674 int next_off = ld_off - Interpreter::stackElementSize; |
0 | 675 // |
676 // | |
677 // | |
678 VMReg r_1 = regs[i].first(); | |
679 VMReg r_2 = regs[i].second(); | |
680 if (!r_1->is_valid()) { | |
681 assert(!r_2->is_valid(), ""); | |
682 continue; | |
683 } | |
684 if (r_1->is_stack()) { | |
685 // Convert stack slot to an SP offset (+ wordSize to account for return address ) | |
686 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; | |
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687 |
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688 // We can use r13 as a temp here because compiled code doesn't need r13 as an input |
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689 // and if we end up going thru a c2i because of a miss a reasonable value of r13 |
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690 // will be generated. |
0 | 691 if (!r_2->is_valid()) { |
692 // sign extend??? | |
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693 __ movl(r13, Address(saved_sp, ld_off)); |
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694 __ movptr(Address(rsp, st_off), r13); |
0 | 695 } else { |
696 // | |
697 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
698 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
699 // So we must adjust where to pick up the data to match the interpreter. | |
700 // | |
701 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
702 // are accessed as negative so LSW is at LOW address | |
703 | |
704 // ld_off is MSW so get LSW | |
705 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
706 next_off : ld_off; | |
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707 __ movq(r13, Address(saved_sp, offset)); |
0 | 708 // st_off is LSW (i.e. reg.first()) |
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709 __ movq(Address(rsp, st_off), r13); |
0 | 710 } |
711 } else if (r_1->is_Register()) { // Register argument | |
712 Register r = r_1->as_Register(); | |
713 assert(r != rax, "must be different"); | |
714 if (r_2->is_valid()) { | |
715 // | |
716 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
717 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
718 // So we must adjust where to pick up the data to match the interpreter. | |
719 | |
720 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
721 next_off : ld_off; | |
722 | |
723 // this can be a misaligned move | |
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724 __ movq(r, Address(saved_sp, offset)); |
0 | 725 } else { |
726 // sign extend and use a full word? | |
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727 __ movl(r, Address(saved_sp, ld_off)); |
0 | 728 } |
729 } else { | |
730 if (!r_2->is_valid()) { | |
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731 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); |
0 | 732 } else { |
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733 __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off)); |
0 | 734 } |
735 } | |
736 } | |
737 | |
738 // 6243940 We might end up in handle_wrong_method if | |
739 // the callee is deoptimized as we race thru here. If that | |
740 // happens we don't want to take a safepoint because the | |
741 // caller frame will look interpreted and arguments are now | |
742 // "compiled" so it is much better to make this transition | |
743 // invisible to the stack walking code. Unfortunately if | |
744 // we try and find the callee by normal means a safepoint | |
745 // is possible. So we stash the desired callee in the thread | |
746 // and the vm will find there should this case occur. | |
747 | |
304 | 748 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx); |
0 | 749 |
750 // put methodOop where a c2i would expect should we end up there | |
751 // only needed becaus eof c2 resolve stubs return methodOop as a result in | |
752 // rax | |
304 | 753 __ mov(rax, rbx); |
0 | 754 __ jmp(r11); |
755 } | |
756 | |
757 // --------------------------------------------------------------- | |
758 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
759 int total_args_passed, | |
760 int comp_args_on_stack, | |
761 const BasicType *sig_bt, | |
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762 const VMRegPair *regs, |
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763 AdapterFingerPrint* fingerprint) { |
0 | 764 address i2c_entry = __ pc(); |
765 | |
766 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); | |
767 | |
768 // ------------------------------------------------------------------------- | |
769 // Generate a C2I adapter. On entry we know rbx holds the methodOop during calls | |
770 // to the interpreter. The args start out packed in the compiled layout. They | |
771 // need to be unpacked into the interpreter layout. This will almost always | |
772 // require some stack space. We grow the current (compiled) stack, then repack | |
773 // the args. We finally end in a jump to the generic interpreter entry point. | |
774 // On exit from the interpreter, the interpreter will restore our SP (lest the | |
775 // compiled code, which relys solely on SP and not RBP, get sick). | |
776 | |
777 address c2i_unverified_entry = __ pc(); | |
778 Label skip_fixup; | |
779 Label ok; | |
780 | |
781 Register holder = rax; | |
782 Register receiver = j_rarg0; | |
783 Register temp = rbx; | |
784 | |
785 { | |
786 __ verify_oop(holder); | |
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787 __ load_klass(temp, receiver); |
0 | 788 __ verify_oop(temp); |
789 | |
304 | 790 __ cmpptr(temp, Address(holder, compiledICHolderOopDesc::holder_klass_offset())); |
791 __ movptr(rbx, Address(holder, compiledICHolderOopDesc::holder_method_offset())); | |
0 | 792 __ jcc(Assembler::equal, ok); |
793 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
794 | |
795 __ bind(ok); | |
796 // Method might have been compiled since the call site was patched to | |
797 // interpreted if that is the case treat it as a miss so we can get | |
798 // the call site corrected. | |
304 | 799 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD); |
0 | 800 __ jcc(Assembler::equal, skip_fixup); |
801 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
802 } | |
803 | |
804 address c2i_entry = __ pc(); | |
805 | |
806 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); | |
807 | |
808 __ flush(); | |
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809 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
0 | 810 } |
811 | |
812 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
813 VMRegPair *regs, | |
814 int total_args_passed) { | |
815 // We return the amount of VMRegImpl stack slots we need to reserve for all | |
816 // the arguments NOT counting out_preserve_stack_slots. | |
817 | |
818 // NOTE: These arrays will have to change when c1 is ported | |
819 #ifdef _WIN64 | |
820 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
821 c_rarg0, c_rarg1, c_rarg2, c_rarg3 | |
822 }; | |
823 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
824 c_farg0, c_farg1, c_farg2, c_farg3 | |
825 }; | |
826 #else | |
827 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
828 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5 | |
829 }; | |
830 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
831 c_farg0, c_farg1, c_farg2, c_farg3, | |
832 c_farg4, c_farg5, c_farg6, c_farg7 | |
833 }; | |
834 #endif // _WIN64 | |
835 | |
836 | |
837 uint int_args = 0; | |
838 uint fp_args = 0; | |
839 uint stk_args = 0; // inc by 2 each time | |
840 | |
841 for (int i = 0; i < total_args_passed; i++) { | |
842 switch (sig_bt[i]) { | |
843 case T_BOOLEAN: | |
844 case T_CHAR: | |
845 case T_BYTE: | |
846 case T_SHORT: | |
847 case T_INT: | |
848 if (int_args < Argument::n_int_register_parameters_c) { | |
849 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
850 #ifdef _WIN64 | |
851 fp_args++; | |
852 // Allocate slots for callee to stuff register args the stack. | |
853 stk_args += 2; | |
854 #endif | |
855 } else { | |
856 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
857 stk_args += 2; | |
858 } | |
859 break; | |
860 case T_LONG: | |
861 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
862 // fall through | |
863 case T_OBJECT: | |
864 case T_ARRAY: | |
865 case T_ADDRESS: | |
866 if (int_args < Argument::n_int_register_parameters_c) { | |
867 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
868 #ifdef _WIN64 | |
869 fp_args++; | |
870 stk_args += 2; | |
871 #endif | |
872 } else { | |
873 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
874 stk_args += 2; | |
875 } | |
876 break; | |
877 case T_FLOAT: | |
878 if (fp_args < Argument::n_float_register_parameters_c) { | |
879 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
880 #ifdef _WIN64 | |
881 int_args++; | |
882 // Allocate slots for callee to stuff register args the stack. | |
883 stk_args += 2; | |
884 #endif | |
885 } else { | |
886 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
887 stk_args += 2; | |
888 } | |
889 break; | |
890 case T_DOUBLE: | |
891 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
892 if (fp_args < Argument::n_float_register_parameters_c) { | |
893 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
894 #ifdef _WIN64 | |
895 int_args++; | |
896 // Allocate slots for callee to stuff register args the stack. | |
897 stk_args += 2; | |
898 #endif | |
899 } else { | |
900 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
901 stk_args += 2; | |
902 } | |
903 break; | |
904 case T_VOID: // Halves of longs and doubles | |
905 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
906 regs[i].set_bad(); | |
907 break; | |
908 default: | |
909 ShouldNotReachHere(); | |
910 break; | |
911 } | |
912 } | |
913 #ifdef _WIN64 | |
914 // windows abi requires that we always allocate enough stack space | |
915 // for 4 64bit registers to be stored down. | |
916 if (stk_args < 8) { | |
917 stk_args = 8; | |
918 } | |
919 #endif // _WIN64 | |
920 | |
921 return stk_args; | |
922 } | |
923 | |
924 // On 64 bit we will store integer like items to the stack as | |
925 // 64 bits items (sparc abi) even though java would only store | |
926 // 32bits for a parameter. On 32bit it will simply be 32 bits | |
927 // So this routine will do 32->32 on 32bit and 32->64 on 64bit | |
928 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
929 if (src.first()->is_stack()) { | |
930 if (dst.first()->is_stack()) { | |
931 // stack to stack | |
932 __ movslq(rax, Address(rbp, reg2offset_in(src.first()))); | |
933 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
934 } else { | |
935 // stack to reg | |
936 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); | |
937 } | |
938 } else if (dst.first()->is_stack()) { | |
939 // reg to stack | |
940 // Do we really have to sign extend??? | |
941 // __ movslq(src.first()->as_Register(), src.first()->as_Register()); | |
942 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
943 } else { | |
944 // Do we really have to sign extend??? | |
945 // __ movslq(dst.first()->as_Register(), src.first()->as_Register()); | |
946 if (dst.first() != src.first()) { | |
947 __ movq(dst.first()->as_Register(), src.first()->as_Register()); | |
948 } | |
949 } | |
950 } | |
951 | |
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952 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
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953 if (src.first()->is_stack()) { |
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954 if (dst.first()->is_stack()) { |
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955 // stack to stack |
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956 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
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957 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); |
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958 } else { |
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959 // stack to reg |
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960 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); |
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961 } |
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962 } else if (dst.first()->is_stack()) { |
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963 // reg to stack |
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964 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); |
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965 } else { |
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966 if (dst.first() != src.first()) { |
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967 __ movq(dst.first()->as_Register(), src.first()->as_Register()); |
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968 } |
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969 } |
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970 } |
0 | 971 |
972 // An oop arg. Must pass a handle not the oop itself | |
973 static void object_move(MacroAssembler* masm, | |
974 OopMap* map, | |
975 int oop_handle_offset, | |
976 int framesize_in_slots, | |
977 VMRegPair src, | |
978 VMRegPair dst, | |
979 bool is_receiver, | |
980 int* receiver_offset) { | |
981 | |
982 // must pass a handle. First figure out the location we use as a handle | |
983 | |
984 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register(); | |
985 | |
986 // See if oop is NULL if it is we need no handle | |
987 | |
988 if (src.first()->is_stack()) { | |
989 | |
990 // Oop is already on the stack as an argument | |
991 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
992 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
993 if (is_receiver) { | |
994 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
995 } | |
996 | |
304 | 997 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); |
998 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); | |
0 | 999 // conditionally move a NULL |
304 | 1000 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first()))); |
0 | 1001 } else { |
1002 | |
1003 // Oop is in an a register we must store it to the space we reserve | |
1004 // on the stack for oop_handles and pass a handle if oop is non-NULL | |
1005 | |
1006 const Register rOop = src.first()->as_Register(); | |
1007 int oop_slot; | |
1008 if (rOop == j_rarg0) | |
1009 oop_slot = 0; | |
1010 else if (rOop == j_rarg1) | |
1011 oop_slot = 1; | |
1012 else if (rOop == j_rarg2) | |
1013 oop_slot = 2; | |
1014 else if (rOop == j_rarg3) | |
1015 oop_slot = 3; | |
1016 else if (rOop == j_rarg4) | |
1017 oop_slot = 4; | |
1018 else { | |
1019 assert(rOop == j_rarg5, "wrong register"); | |
1020 oop_slot = 5; | |
1021 } | |
1022 | |
1023 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset; | |
1024 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
1025 | |
1026 map->set_oop(VMRegImpl::stack2reg(oop_slot)); | |
1027 // Store oop in handle area, may be NULL | |
304 | 1028 __ movptr(Address(rsp, offset), rOop); |
0 | 1029 if (is_receiver) { |
1030 *receiver_offset = offset; | |
1031 } | |
1032 | |
304 | 1033 __ cmpptr(rOop, (int32_t)NULL_WORD); |
1034 __ lea(rHandle, Address(rsp, offset)); | |
0 | 1035 // conditionally move a NULL from the handle area where it was just stored |
304 | 1036 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset)); |
0 | 1037 } |
1038 | |
1039 // If arg is on the stack then place it otherwise it is already in correct reg. | |
1040 if (dst.first()->is_stack()) { | |
304 | 1041 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
0 | 1042 } |
1043 } | |
1044 | |
1045 // A float arg may have to do float reg int reg conversion | |
1046 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1047 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
1048 | |
1049 // The calling conventions assures us that each VMregpair is either | |
1050 // all really one physical register or adjacent stack slots. | |
1051 // This greatly simplifies the cases here compared to sparc. | |
1052 | |
1053 if (src.first()->is_stack()) { | |
1054 if (dst.first()->is_stack()) { | |
1055 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); | |
304 | 1056 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); |
0 | 1057 } else { |
1058 // stack to reg | |
1059 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
1060 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first()))); | |
1061 } | |
1062 } else if (dst.first()->is_stack()) { | |
1063 // reg to stack | |
1064 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
1065 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1066 } else { | |
1067 // reg to reg | |
1068 // In theory these overlap but the ordering is such that this is likely a nop | |
1069 if ( src.first() != dst.first()) { | |
1070 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
1071 } | |
1072 } | |
1073 } | |
1074 | |
1075 // A long move | |
1076 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1077 | |
1078 // The calling conventions assures us that each VMregpair is either | |
1079 // all really one physical register or adjacent stack slots. | |
1080 // This greatly simplifies the cases here compared to sparc. | |
1081 | |
1082 if (src.is_single_phys_reg() ) { | |
1083 if (dst.is_single_phys_reg()) { | |
1084 if (dst.first() != src.first()) { | |
304 | 1085 __ mov(dst.first()->as_Register(), src.first()->as_Register()); |
0 | 1086 } |
1087 } else { | |
1088 assert(dst.is_single_reg(), "not a stack pair"); | |
1089 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
1090 } | |
1091 } else if (dst.is_single_phys_reg()) { | |
1092 assert(src.is_single_reg(), "not a stack pair"); | |
1093 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first()))); | |
1094 } else { | |
1095 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
1096 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1097 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1098 } | |
1099 } | |
1100 | |
1101 // A double move | |
1102 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1103 | |
1104 // The calling conventions assures us that each VMregpair is either | |
1105 // all really one physical register or adjacent stack slots. | |
1106 // This greatly simplifies the cases here compared to sparc. | |
1107 | |
1108 if (src.is_single_phys_reg() ) { | |
1109 if (dst.is_single_phys_reg()) { | |
1110 // In theory these overlap but the ordering is such that this is likely a nop | |
1111 if ( src.first() != dst.first()) { | |
1112 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
1113 } | |
1114 } else { | |
1115 assert(dst.is_single_reg(), "not a stack pair"); | |
1116 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1117 } | |
1118 } else if (dst.is_single_phys_reg()) { | |
1119 assert(src.is_single_reg(), "not a stack pair"); | |
1120 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first()))); | |
1121 } else { | |
1122 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
1123 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1124 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1125 } | |
1126 } | |
1127 | |
1128 | |
1129 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1130 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1131 // which by this time is free to use | |
1132 switch (ret_type) { | |
1133 case T_FLOAT: | |
1134 __ movflt(Address(rbp, -wordSize), xmm0); | |
1135 break; | |
1136 case T_DOUBLE: | |
1137 __ movdbl(Address(rbp, -wordSize), xmm0); | |
1138 break; | |
1139 case T_VOID: break; | |
1140 default: { | |
304 | 1141 __ movptr(Address(rbp, -wordSize), rax); |
0 | 1142 } |
1143 } | |
1144 } | |
1145 | |
1146 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1147 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1148 // which by this time is free to use | |
1149 switch (ret_type) { | |
1150 case T_FLOAT: | |
1151 __ movflt(xmm0, Address(rbp, -wordSize)); | |
1152 break; | |
1153 case T_DOUBLE: | |
1154 __ movdbl(xmm0, Address(rbp, -wordSize)); | |
1155 break; | |
1156 case T_VOID: break; | |
1157 default: { | |
304 | 1158 __ movptr(rax, Address(rbp, -wordSize)); |
0 | 1159 } |
1160 } | |
1161 } | |
1162 | |
1163 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
1164 for ( int i = first_arg ; i < arg_count ; i++ ) { | |
1165 if (args[i].first()->is_Register()) { | |
304 | 1166 __ push(args[i].first()->as_Register()); |
0 | 1167 } else if (args[i].first()->is_XMMRegister()) { |
304 | 1168 __ subptr(rsp, 2*wordSize); |
0 | 1169 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister()); |
1170 } | |
1171 } | |
1172 } | |
1173 | |
1174 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
1175 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) { | |
1176 if (args[i].first()->is_Register()) { | |
304 | 1177 __ pop(args[i].first()->as_Register()); |
0 | 1178 } else if (args[i].first()->is_XMMRegister()) { |
1179 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0)); | |
304 | 1180 __ addptr(rsp, 2*wordSize); |
0 | 1181 } |
1182 } | |
1183 } | |
1184 | |
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1185 |
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1186 static void save_or_restore_arguments(MacroAssembler* masm, |
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1187 const int stack_slots, |
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1188 const int total_in_args, |
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1189 const int arg_save_area, |
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1190 OopMap* map, |
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1191 VMRegPair* in_regs, |
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1192 BasicType* in_sig_bt) { |
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1193 // if map is non-NULL then the code should store the values, |
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1194 // otherwise it should load them. |
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1195 int handle_index = 0; |
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1196 // Save down double word first |
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1197 for ( int i = 0; i < total_in_args; i++) { |
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1198 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) { |
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1199 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area; |
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1200 int offset = slot * VMRegImpl::stack_slot_size; |
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1201 handle_index += 2; |
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1202 assert(handle_index <= stack_slots, "overflow"); |
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1203 if (map != NULL) { |
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1204 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1205 } else { |
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1206 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1207 } |
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1208 } |
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1209 if (in_regs[i].first()->is_Register() && |
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1210 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) { |
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1211 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area; |
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1212 int offset = slot * VMRegImpl::stack_slot_size; |
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1213 handle_index += 2; |
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1214 assert(handle_index <= stack_slots, "overflow"); |
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1215 if (map != NULL) { |
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1216 __ movq(Address(rsp, offset), in_regs[i].first()->as_Register()); |
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1217 if (in_sig_bt[i] == T_ARRAY) { |
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1218 map->set_oop(VMRegImpl::stack2reg(slot));; |
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1219 } |
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1220 } else { |
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1221 __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset)); |
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1222 } |
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1223 } |
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1224 } |
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1225 // Save or restore single word registers |
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1226 for ( int i = 0; i < total_in_args; i++) { |
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1227 if (in_regs[i].first()->is_Register()) { |
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1228 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area; |
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1229 int offset = slot * VMRegImpl::stack_slot_size; |
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1230 assert(handle_index <= stack_slots, "overflow"); |
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1231 |
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1232 // Value is in an input register pass we must flush it to the stack |
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1233 const Register reg = in_regs[i].first()->as_Register(); |
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1234 switch (in_sig_bt[i]) { |
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1235 case T_BOOLEAN: |
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1236 case T_CHAR: |
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1237 case T_BYTE: |
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1238 case T_SHORT: |
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1239 case T_INT: |
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1240 if (map != NULL) { |
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1241 __ movl(Address(rsp, offset), reg); |
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1242 } else { |
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1243 __ movl(reg, Address(rsp, offset)); |
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1244 } |
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1245 break; |
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1246 case T_ARRAY: |
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1247 case T_LONG: |
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1248 // handled above |
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1249 break; |
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1250 case T_OBJECT: |
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1251 default: ShouldNotReachHere(); |
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1252 } |
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1253 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1254 if (in_sig_bt[i] == T_FLOAT) { |
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1255 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area; |
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1256 int offset = slot * VMRegImpl::stack_slot_size; |
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1257 assert(handle_index <= stack_slots, "overflow"); |
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1258 if (map != NULL) { |
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1259 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1260 } else { |
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1261 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1262 } |
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1263 } |
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1264 } else if (in_regs[i].first()->is_stack()) { |
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1265 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
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1266 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
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1267 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); |
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1268 } |
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1269 } |
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1270 } |
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1271 } |
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1272 |
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1273 |
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1274 // Check GC_locker::needs_gc and enter the runtime if it's true. This |
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1275 // keeps a new JNI critical region from starting until a GC has been |
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1276 // forced. Save down any oops in registers and describe them in an |
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1277 // OopMap. |
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1278 static void check_needs_gc_for_critical_native(MacroAssembler* masm, |
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1279 int stack_slots, |
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1280 int total_c_args, |
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1281 int total_in_args, |
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1282 int arg_save_area, |
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1283 OopMapSet* oop_maps, |
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1284 VMRegPair* in_regs, |
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1285 BasicType* in_sig_bt) { |
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1286 __ block_comment("check GC_locker::needs_gc"); |
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1287 Label cont; |
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1288 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false); |
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1289 __ jcc(Assembler::equal, cont); |
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1290 |
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1291 // Save down any incoming oops and call into the runtime to halt for a GC |
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1292 |
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1293 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1294 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1295 arg_save_area, map, in_regs, in_sig_bt); |
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1296 |
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1297 address the_pc = __ pc(); |
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1298 oop_maps->add_gc_map( __ offset(), map); |
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1299 __ set_last_Java_frame(rsp, noreg, the_pc); |
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1300 |
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1301 __ block_comment("block_for_jni_critical"); |
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1302 __ movptr(c_rarg0, r15_thread); |
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1303 __ mov(r12, rsp); // remember sp |
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1304 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows |
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1305 __ andptr(rsp, -16); // align stack as required by ABI |
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1306 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical))); |
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1307 __ mov(rsp, r12); // restore sp |
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1308 __ reinit_heapbase(); |
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1309 |
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1310 __ reset_last_Java_frame(false, true); |
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1311 |
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1312 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1313 arg_save_area, NULL, in_regs, in_sig_bt); |
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1314 |
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1315 __ bind(cont); |
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1316 #ifdef ASSERT |
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1317 if (StressCriticalJNINatives) { |
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1318 // Stress register saving |
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1319 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1320 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1321 arg_save_area, map, in_regs, in_sig_bt); |
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1322 // Destroy argument registers |
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1323 for (int i = 0; i < total_in_args - 1; i++) { |
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1324 if (in_regs[i].first()->is_Register()) { |
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1325 const Register reg = in_regs[i].first()->as_Register(); |
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1326 __ xorptr(reg, reg); |
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1327 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1328 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister()); |
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1329 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1330 ShouldNotReachHere(); |
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1331 } else if (in_regs[i].first()->is_stack()) { |
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1332 // Nothing to do |
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1333 } else { |
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1334 ShouldNotReachHere(); |
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1335 } |
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1336 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) { |
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1337 i++; |
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1338 } |
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1339 } |
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1340 |
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1341 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1342 arg_save_area, NULL, in_regs, in_sig_bt); |
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1343 } |
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1344 #endif |
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1345 } |
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1346 |
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1347 // Unpack an array argument into a pointer to the body and the length |
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1348 // if the array is non-null, otherwise pass 0 for both. |
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1349 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { |
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1350 Register tmp_reg = rax; |
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1351 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg, |
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1352 "possible collision"); |
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1353 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg, |
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1354 "possible collision"); |
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1355 |
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1356 // Pass the length, ptr pair |
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1357 Label is_null, done; |
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1358 VMRegPair tmp; |
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1359 tmp.set_ptr(tmp_reg->as_VMReg()); |
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1360 if (reg.first()->is_stack()) { |
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1361 // Load the arg up from the stack |
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1362 move_ptr(masm, reg, tmp); |
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1363 reg = tmp; |
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1364 } |
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1365 __ testptr(reg.first()->as_Register(), reg.first()->as_Register()); |
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1366 __ jccb(Assembler::equal, is_null); |
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1367 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1368 move_ptr(masm, tmp, body_arg); |
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1369 // load the length relative to the body. |
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1370 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() - |
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1371 arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1372 move32_64(masm, tmp, length_arg); |
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1373 __ jmpb(done); |
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1374 __ bind(is_null); |
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1375 // Pass zeros |
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1376 __ xorptr(tmp_reg, tmp_reg); |
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1377 move_ptr(masm, tmp, body_arg); |
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1378 move32_64(masm, tmp, length_arg); |
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1379 __ bind(done); |
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1380 } |
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1381 |
0 | 1382 // --------------------------------------------------------------------------- |
1383 // Generate a native wrapper for a given method. The method takes arguments | |
1384 // in the Java compiled code convention, marshals them to the native | |
1385 // convention (handlizes oops, etc), transitions to native, makes the call, | |
1386 // returns to java state (possibly blocking), unhandlizes any result and | |
1387 // returns. | |
1388 nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm, | |
1389 methodHandle method, | |
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1390 int compile_id, |
0 | 1391 int total_in_args, |
1392 int comp_args_on_stack, | |
1393 BasicType *in_sig_bt, | |
1394 VMRegPair *in_regs, | |
1395 BasicType ret_type) { | |
4873
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1396 bool is_critical_native = true; |
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1397 address native_func = method->critical_native_function(); |
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1398 if (native_func == NULL) { |
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1399 native_func = method->native_function(); |
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1400 is_critical_native = false; |
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1401 } |
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1402 assert(native_func != NULL, "must have function"); |
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1403 |
0 | 1404 // An OopMap for lock (and class if static) |
1405 OopMapSet *oop_maps = new OopMapSet(); | |
1406 intptr_t start = (intptr_t)__ pc(); | |
1407 | |
1408 // We have received a description of where all the java arg are located | |
1409 // on entry to the wrapper. We need to convert these args to where | |
1410 // the jni function will expect them. To figure out where they go | |
1411 // we convert the java signature to a C signature by inserting | |
1412 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
1413 | |
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1414 int total_c_args = total_in_args; |
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1415 if (!is_critical_native) { |
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1416 total_c_args += 1; |
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1417 if (method->is_static()) { |
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1418 total_c_args++; |
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1419 } |
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1420 } else { |
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1421 for (int i = 0; i < total_in_args; i++) { |
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1422 if (in_sig_bt[i] == T_ARRAY) { |
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1423 total_c_args++; |
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1424 } |
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1425 } |
0 | 1426 } |
1427 | |
1428 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
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1429 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); |
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1430 BasicType* in_elem_bt = NULL; |
0 | 1431 |
1432 int argc = 0; | |
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1433 if (!is_critical_native) { |
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1434 out_sig_bt[argc++] = T_ADDRESS; |
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1435 if (method->is_static()) { |
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1436 out_sig_bt[argc++] = T_OBJECT; |
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1437 } |
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1438 |
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1439 for (int i = 0; i < total_in_args ; i++ ) { |
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1440 out_sig_bt[argc++] = in_sig_bt[i]; |
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1441 } |
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1442 } else { |
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1443 Thread* THREAD = Thread::current(); |
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1444 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); |
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1445 SignatureStream ss(method->signature()); |
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1446 for (int i = 0; i < total_in_args ; i++ ) { |
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1447 if (in_sig_bt[i] == T_ARRAY) { |
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1448 // Arrays are passed as int, elem* pair |
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1449 out_sig_bt[argc++] = T_INT; |
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1450 out_sig_bt[argc++] = T_ADDRESS; |
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1451 Symbol* atype = ss.as_symbol(CHECK_NULL); |
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1452 const char* at = atype->as_C_string(); |
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1453 if (strlen(at) == 2) { |
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1454 assert(at[0] == '[', "must be"); |
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1455 switch (at[1]) { |
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1456 case 'B': in_elem_bt[i] = T_BYTE; break; |
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1457 case 'C': in_elem_bt[i] = T_CHAR; break; |
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1458 case 'D': in_elem_bt[i] = T_DOUBLE; break; |
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1459 case 'F': in_elem_bt[i] = T_FLOAT; break; |
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1460 case 'I': in_elem_bt[i] = T_INT; break; |
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1461 case 'J': in_elem_bt[i] = T_LONG; break; |
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1462 case 'S': in_elem_bt[i] = T_SHORT; break; |
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1463 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; |
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1464 default: ShouldNotReachHere(); |
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1465 } |
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1466 } |
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1467 } else { |
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1468 out_sig_bt[argc++] = in_sig_bt[i]; |
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1469 in_elem_bt[i] = T_VOID; |
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1470 } |
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1471 if (in_sig_bt[i] != T_VOID) { |
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1472 assert(in_sig_bt[i] == ss.type(), "must match"); |
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1473 ss.next(); |
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1474 } |
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1475 } |
0 | 1476 } |
1477 | |
1478 // Now figure out where the args must be stored and how much stack space | |
1479 // they require. | |
1480 int out_arg_slots; | |
1481 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); | |
1482 | |
1483 // Compute framesize for the wrapper. We need to handlize all oops in | |
1484 // incoming registers | |
1485 | |
1486 // Calculate the total number of stack slots we will need. | |
1487 | |
1488 // First count the abi requirement plus all of the outgoing args | |
1489 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
1490 | |
1491 // Now the space for the inbound oop handle area | |
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1492 int total_save_slots = 6 * VMRegImpl::slots_per_word; // 6 arguments passed in registers |
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1493 if (is_critical_native) { |
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1494 // Critical natives may have to call out so they need a save area |
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1495 // for register arguments. |
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1496 int double_slots = 0; |
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1497 int single_slots = 0; |
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1498 for ( int i = 0; i < total_in_args; i++) { |
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1499 if (in_regs[i].first()->is_Register()) { |
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1500 const Register reg = in_regs[i].first()->as_Register(); |
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1501 switch (in_sig_bt[i]) { |
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1502 case T_ARRAY: |
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1503 case T_BOOLEAN: |
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1504 case T_BYTE: |
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1505 case T_SHORT: |
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1506 case T_CHAR: |
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1507 case T_INT: single_slots++; break; |
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1508 case T_LONG: double_slots++; break; |
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1509 default: ShouldNotReachHere(); |
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1510 } |
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1511 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1512 switch (in_sig_bt[i]) { |
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1513 case T_FLOAT: single_slots++; break; |
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1514 case T_DOUBLE: double_slots++; break; |
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1515 default: ShouldNotReachHere(); |
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1516 } |
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1517 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1518 ShouldNotReachHere(); |
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1519 } |
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1520 } |
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1521 total_save_slots = double_slots * 2 + single_slots; |
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1522 // align the save area |
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1523 if (double_slots != 0) { |
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1524 stack_slots = round_to(stack_slots, 2); |
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1525 } |
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1526 } |
0 | 1527 |
1528 int oop_handle_offset = stack_slots; | |
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1529 stack_slots += total_save_slots; |
0 | 1530 |
1531 // Now any space we need for handlizing a klass if static method | |
1532 | |
1533 int klass_slot_offset = 0; | |
1534 int klass_offset = -1; | |
1535 int lock_slot_offset = 0; | |
1536 bool is_static = false; | |
1537 | |
1538 if (method->is_static()) { | |
1539 klass_slot_offset = stack_slots; | |
1540 stack_slots += VMRegImpl::slots_per_word; | |
1541 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
1542 is_static = true; | |
1543 } | |
1544 | |
1545 // Plus a lock if needed | |
1546 | |
1547 if (method->is_synchronized()) { | |
1548 lock_slot_offset = stack_slots; | |
1549 stack_slots += VMRegImpl::slots_per_word; | |
1550 } | |
1551 | |
1552 // Now a place (+2) to save return values or temp during shuffling | |
1553 // + 4 for return address (which we own) and saved rbp | |
1554 stack_slots += 6; | |
1555 | |
1556 // Ok The space we have allocated will look like: | |
1557 // | |
1558 // | |
1559 // FP-> | | | |
1560 // |---------------------| | |
1561 // | 2 slots for moves | | |
1562 // |---------------------| | |
1563 // | lock box (if sync) | | |
1564 // |---------------------| <- lock_slot_offset | |
1565 // | klass (if static) | | |
1566 // |---------------------| <- klass_slot_offset | |
1567 // | oopHandle area | | |
1568 // |---------------------| <- oop_handle_offset (6 java arg registers) | |
1569 // | outbound memory | | |
1570 // | based arguments | | |
1571 // | | | |
1572 // |---------------------| | |
1573 // | | | |
1574 // SP-> | out_preserved_slots | | |
1575 // | |
1576 // | |
1577 | |
1578 | |
1579 // Now compute actual number of stack words we need rounding to make | |
1580 // stack properly aligned. | |
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1581 stack_slots = round_to(stack_slots, StackAlignmentInSlots); |
0 | 1582 |
1583 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
1584 | |
1585 // First thing make an ic check to see if we should even be here | |
1586 | |
1587 // We are free to use all registers as temps without saving them and | |
1588 // restoring them except rbp. rbp is the only callee save register | |
1589 // as far as the interpreter and the compiler(s) are concerned. | |
1590 | |
1591 | |
1592 const Register ic_reg = rax; | |
1593 const Register receiver = j_rarg0; | |
1594 | |
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1595 Label hit; |
0 | 1596 Label exception_pending; |
1597 | |
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1598 assert_different_registers(ic_reg, receiver, rscratch1); |
0 | 1599 __ verify_oop(receiver); |
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1600 __ load_klass(rscratch1, receiver); |
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1601 __ cmpq(ic_reg, rscratch1); |
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1602 __ jcc(Assembler::equal, hit); |
0 | 1603 |
1604 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
1605 | |
1606 // Verified entry point must be aligned | |
1607 __ align(8); | |
1608 | |
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1609 __ bind(hit); |
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1610 |
0 | 1611 int vep_offset = ((intptr_t)__ pc()) - start; |
1612 | |
1613 // The instruction at the verified entry point must be 5 bytes or longer | |
1614 // because it can be patched on the fly by make_non_entrant. The stack bang | |
1615 // instruction fits that requirement. | |
1616 | |
1617 // Generate stack overflow check | |
1618 | |
1619 if (UseStackBanging) { | |
1620 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); | |
1621 } else { | |
1622 // need a 5 byte instruction to allow MT safe patching to non-entrant | |
1623 __ fat_nop(); | |
1624 } | |
1625 | |
1626 // Generate a new frame for the wrapper. | |
1627 __ enter(); | |
1628 // -2 because return address is already present and so is saved rbp | |
304 | 1629 __ subptr(rsp, stack_size - 2*wordSize); |
0 | 1630 |
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1631 // Frame is now completed as far as size and linkage. |
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1632 int frame_complete = ((intptr_t)__ pc()) - start; |
0 | 1633 |
1634 #ifdef ASSERT | |
1635 { | |
1636 Label L; | |
304 | 1637 __ mov(rax, rsp); |
605 | 1638 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI) |
304 | 1639 __ cmpptr(rax, rsp); |
0 | 1640 __ jcc(Assembler::equal, L); |
1641 __ stop("improperly aligned stack"); | |
1642 __ bind(L); | |
1643 } | |
1644 #endif /* ASSERT */ | |
1645 | |
1646 | |
1647 // We use r14 as the oop handle for the receiver/klass | |
1648 // It is callee save so it survives the call to native | |
1649 | |
1650 const Register oop_handle_reg = r14; | |
1651 | |
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1652 if (is_critical_native) { |
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1653 check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args, |
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1654 oop_handle_offset, oop_maps, in_regs, in_sig_bt); |
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1655 } |
0 | 1656 |
1657 // | |
1658 // We immediately shuffle the arguments so that any vm call we have to | |
1659 // make from here on out (sync slow path, jvmti, etc.) we will have | |
1660 // captured the oops from our caller and have a valid oopMap for | |
1661 // them. | |
1662 | |
1663 // ----------------- | |
1664 // The Grand Shuffle | |
1665 | |
1666 // The Java calling convention is either equal (linux) or denser (win64) than the | |
1667 // c calling convention. However the because of the jni_env argument the c calling | |
1668 // convention always has at least one more (and two for static) arguments than Java. | |
1669 // Therefore if we move the args from java -> c backwards then we will never have | |
1670 // a register->register conflict and we don't have to build a dependency graph | |
1671 // and figure out how to break any cycles. | |
1672 // | |
1673 | |
1674 // Record esp-based slot for receiver on stack for non-static methods | |
1675 int receiver_offset = -1; | |
1676 | |
1677 // This is a trick. We double the stack slots so we can claim | |
1678 // the oops in the caller's frame. Since we are sure to have | |
1679 // more args than the caller doubling is enough to make | |
1680 // sure we can capture all the incoming oop args from the | |
1681 // caller. | |
1682 // | |
1683 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
1684 | |
1685 // Mark location of rbp (someday) | |
1686 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp)); | |
1687 | |
1688 // Use eax, ebx as temporaries during any memory-memory moves we have to do | |
1689 // All inbound args are referenced based on rbp and all outbound args via rsp. | |
1690 | |
1691 | |
1692 #ifdef ASSERT | |
1693 bool reg_destroyed[RegisterImpl::number_of_registers]; | |
1694 bool freg_destroyed[XMMRegisterImpl::number_of_registers]; | |
1695 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { | |
1696 reg_destroyed[r] = false; | |
1697 } | |
1698 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) { | |
1699 freg_destroyed[f] = false; | |
1700 } | |
1701 | |
1702 #endif /* ASSERT */ | |
1703 | |
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1704 if (is_critical_native) { |
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1705 // The mapping of Java and C arguments passed in registers are |
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1706 // rotated by one, which helps when passing arguments to regular |
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1707 // Java method but for critical natives that creates a cycle which |
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1708 // can cause arguments to be killed before they are used. Break |
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1709 // the cycle by moving the first argument into a temporary |
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1710 // register. |
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1711 for (int i = 0; i < total_c_args; i++) { |
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1712 if (in_regs[i].first()->is_Register() && |
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1713 in_regs[i].first()->as_Register() == rdi) { |
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1714 __ mov(rbx, rdi); |
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1715 in_regs[i].set1(rbx->as_VMReg()); |
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1716 } |
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1717 } |
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1718 } |
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1719 |
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1720 // This may iterate in two different directions depending on the |
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1721 // kind of native it is. The reason is that for regular JNI natives |
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1722 // the incoming and outgoing registers are offset upwards and for |
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1723 // critical natives they are offset down. |
0 | 1724 int c_arg = total_c_args - 1; |
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1725 int stride = -1; |
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1726 int init = total_in_args - 1; |
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1727 if (is_critical_native) { |
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1728 // stride forwards |
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1729 c_arg = 0; |
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1730 stride = 1; |
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1731 init = 0; |
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1732 } |
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1733 for (int i = init, count = 0; count < total_in_args; i += stride, c_arg += stride, count++ ) { |
0 | 1734 #ifdef ASSERT |
1735 if (in_regs[i].first()->is_Register()) { | |
1736 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!"); | |
1737 } else if (in_regs[i].first()->is_XMMRegister()) { | |
1738 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!"); | |
1739 } | |
1740 if (out_regs[c_arg].first()->is_Register()) { | |
1741 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; | |
1742 } else if (out_regs[c_arg].first()->is_XMMRegister()) { | |
1743 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; | |
1744 } | |
1745 #endif /* ASSERT */ | |
1746 switch (in_sig_bt[i]) { | |
1747 case T_ARRAY: | |
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1748 if (is_critical_native) { |
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1749 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); |
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1750 c_arg++; |
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1751 #ifdef ASSERT |
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1752 if (out_regs[c_arg].first()->is_Register()) { |
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1753 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; |
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1754 } else if (out_regs[c_arg].first()->is_XMMRegister()) { |
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1755 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; |
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1756 } |
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1757 #endif |
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1758 break; |
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1759 } |
0 | 1760 case T_OBJECT: |
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1761 assert(!is_critical_native, "no oop arguments"); |
0 | 1762 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], |
1763 ((i == 0) && (!is_static)), | |
1764 &receiver_offset); | |
1765 break; | |
1766 case T_VOID: | |
1767 break; | |
1768 | |
1769 case T_FLOAT: | |
1770 float_move(masm, in_regs[i], out_regs[c_arg]); | |
1771 break; | |
1772 | |
1773 case T_DOUBLE: | |
1774 assert( i + 1 < total_in_args && | |
1775 in_sig_bt[i + 1] == T_VOID && | |
1776 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
1777 double_move(masm, in_regs[i], out_regs[c_arg]); | |
1778 break; | |
1779 | |
1780 case T_LONG : | |
1781 long_move(masm, in_regs[i], out_regs[c_arg]); | |
1782 break; | |
1783 | |
1784 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
1785 | |
1786 default: | |
1787 move32_64(masm, in_regs[i], out_regs[c_arg]); | |
1788 } | |
1789 } | |
1790 | |
1791 // point c_arg at the first arg that is already loaded in case we | |
1792 // need to spill before we call out | |
1793 c_arg++; | |
1794 | |
1795 // Pre-load a static method's oop into r14. Used both by locking code and | |
1796 // the normal JNI call code. | |
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1797 if (method->is_static() && !is_critical_native) { |
0 | 1798 |
1799 // load oop into a register | |
1800 __ movoop(oop_handle_reg, JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror())); | |
1801 | |
1802 // Now handlize the static class mirror it's known not-null. | |
304 | 1803 __ movptr(Address(rsp, klass_offset), oop_handle_reg); |
0 | 1804 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
1805 | |
1806 // Now get the handle | |
304 | 1807 __ lea(oop_handle_reg, Address(rsp, klass_offset)); |
0 | 1808 // store the klass handle as second argument |
304 | 1809 __ movptr(c_rarg1, oop_handle_reg); |
0 | 1810 // and protect the arg if we must spill |
1811 c_arg--; | |
1812 } | |
1813 | |
1814 // Change state to native (we save the return address in the thread, since it might not | |
1815 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() | |
1816 // points into the right code segment. It does not have to be the correct return pc. | |
1817 // We use the same pc/oopMap repeatedly when we call out | |
1818 | |
1819 intptr_t the_pc = (intptr_t) __ pc(); | |
1820 oop_maps->add_gc_map(the_pc - start, map); | |
1821 | |
1822 __ set_last_Java_frame(rsp, noreg, (address)the_pc); | |
1823 | |
1824 | |
1825 // We have all of the arguments setup at this point. We must not touch any register | |
1826 // argument registers at this point (what if we save/restore them there are no oop? | |
1827 | |
1828 { | |
1829 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
1830 // protect the args we've loaded | |
1831 save_args(masm, total_c_args, c_arg, out_regs); | |
1832 __ movoop(c_rarg1, JNIHandles::make_local(method())); | |
1833 __ call_VM_leaf( | |
1834 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
1835 r15_thread, c_rarg1); | |
1836 restore_args(masm, total_c_args, c_arg, out_regs); | |
1837 } | |
1838 | |
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1839 // RedefineClasses() tracing support for obsolete method entry |
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1840 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
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1841 // protect the args we've loaded |
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1842 save_args(masm, total_c_args, c_arg, out_regs); |
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1843 __ movoop(c_rarg1, JNIHandles::make_local(method())); |
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1844 __ call_VM_leaf( |
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1845 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
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1846 r15_thread, c_rarg1); |
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1847 restore_args(masm, total_c_args, c_arg, out_regs); |
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1848 } |
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1849 |
0 | 1850 // Lock a synchronized method |
1851 | |
1852 // Register definitions used by locking and unlocking | |
1853 | |
1854 const Register swap_reg = rax; // Must use rax for cmpxchg instruction | |
1855 const Register obj_reg = rbx; // Will contain the oop | |
1856 const Register lock_reg = r13; // Address of compiler lock object (BasicLock) | |
1857 const Register old_hdr = r13; // value of old header at unlock time | |
1858 | |
1859 Label slow_path_lock; | |
1860 Label lock_done; | |
1861 | |
1862 if (method->is_synchronized()) { | |
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1863 assert(!is_critical_native, "unhandled"); |
0 | 1864 |
1865 | |
1866 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); | |
1867 | |
1868 // Get the handle (the 2nd argument) | |
304 | 1869 __ mov(oop_handle_reg, c_rarg1); |
0 | 1870 |
1871 // Get address of the box | |
1872 | |
304 | 1873 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
0 | 1874 |
1875 // Load the oop from the handle | |
304 | 1876 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 1877 |
1878 if (UseBiasedLocking) { | |
1879 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock); | |
1880 } | |
1881 | |
1882 // Load immediate 1 into swap_reg %rax | |
1883 __ movl(swap_reg, 1); | |
1884 | |
1885 // Load (object->mark() | 1) into swap_reg %rax | |
304 | 1886 __ orptr(swap_reg, Address(obj_reg, 0)); |
0 | 1887 |
1888 // Save (object->mark() | 1) into BasicLock's displaced header | |
304 | 1889 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 1890 |
1891 if (os::is_MP()) { | |
1892 __ lock(); | |
1893 } | |
1894 | |
1895 // src -> dest iff dest == rax else rax <- dest | |
304 | 1896 __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); |
0 | 1897 __ jcc(Assembler::equal, lock_done); |
1898 | |
1899 // Hmm should this move to the slow path code area??? | |
1900 | |
1901 // Test if the oopMark is an obvious stack pointer, i.e., | |
1902 // 1) (mark & 3) == 0, and | |
1903 // 2) rsp <= mark < mark + os::pagesize() | |
1904 // These 3 tests can be done by evaluating the following | |
1905 // expression: ((mark - rsp) & (3 - os::vm_page_size())), | |
1906 // assuming both stack pointer and pagesize have their | |
1907 // least significant 2 bits clear. | |
1908 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg | |
1909 | |
304 | 1910 __ subptr(swap_reg, rsp); |
1911 __ andptr(swap_reg, 3 - os::vm_page_size()); | |
0 | 1912 |
1913 // Save the test result, for recursive case, the result is zero | |
304 | 1914 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 1915 __ jcc(Assembler::notEqual, slow_path_lock); |
1916 | |
1917 // Slow path will re-enter here | |
1918 | |
1919 __ bind(lock_done); | |
1920 } | |
1921 | |
1922 | |
1923 // Finally just about ready to make the JNI call | |
1924 | |
1925 | |
1926 // get JNIEnv* which is first argument to native | |
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1927 if (!is_critical_native) { |
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1928 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset()))); |
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1929 } |
0 | 1930 |
1931 // Now set thread in native | |
304 | 1932 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native); |
0 | 1933 |
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1934 __ call(RuntimeAddress(native_func)); |
0 | 1935 |
1936 // Either restore the MXCSR register after returning from the JNI Call | |
1937 // or verify that it wasn't changed. | |
1938 if (RestoreMXCSROnJNICalls) { | |
304 | 1939 __ ldmxcsr(ExternalAddress(StubRoutines::x86::mxcsr_std())); |
0 | 1940 |
1941 } | |
1942 else if (CheckJNICalls ) { | |
304 | 1943 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::verify_mxcsr_entry()))); |
0 | 1944 } |
1945 | |
1946 | |
1947 // Unpack native results. | |
1948 switch (ret_type) { | |
1949 case T_BOOLEAN: __ c2bool(rax); break; | |
1950 case T_CHAR : __ movzwl(rax, rax); break; | |
1951 case T_BYTE : __ sign_extend_byte (rax); break; | |
1952 case T_SHORT : __ sign_extend_short(rax); break; | |
1953 case T_INT : /* nothing to do */ break; | |
1954 case T_DOUBLE : | |
1955 case T_FLOAT : | |
1956 // Result is in xmm0 we'll save as needed | |
1957 break; | |
1958 case T_ARRAY: // Really a handle | |
1959 case T_OBJECT: // Really a handle | |
1960 break; // can't de-handlize until after safepoint check | |
1961 case T_VOID: break; | |
1962 case T_LONG: break; | |
1963 default : ShouldNotReachHere(); | |
1964 } | |
1965 | |
1966 // Switch thread to "native transition" state before reading the synchronization state. | |
1967 // This additional state is necessary because reading and testing the synchronization | |
1968 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
1969 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
1970 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
1971 // Thread A is resumed to finish this native method, but doesn't block here since it | |
1972 // didn't see any synchronization is progress, and escapes. | |
304 | 1973 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans); |
0 | 1974 |
1975 if(os::is_MP()) { | |
1976 if (UseMembar) { | |
1977 // Force this write out before the read below | |
1978 __ membar(Assembler::Membar_mask_bits( | |
1979 Assembler::LoadLoad | Assembler::LoadStore | | |
1980 Assembler::StoreLoad | Assembler::StoreStore)); | |
1981 } else { | |
1982 // Write serialization page so VM thread can do a pseudo remote membar. | |
1983 // We use the current thread pointer to calculate a thread specific | |
1984 // offset to write to within the page. This minimizes bus traffic | |
1985 // due to cache line collision. | |
1986 __ serialize_memory(r15_thread, rcx); | |
1987 } | |
1988 } | |
1989 | |
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1990 Label after_transition; |
0 | 1991 |
1992 // check for safepoint operation in progress and/or pending suspend requests | |
1993 { | |
1994 Label Continue; | |
1995 | |
1996 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), | |
1997 SafepointSynchronize::_not_synchronized); | |
1998 | |
1999 Label L; | |
2000 __ jcc(Assembler::notEqual, L); | |
2001 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0); | |
2002 __ jcc(Assembler::equal, Continue); | |
2003 __ bind(L); | |
2004 | |
2005 // Don't use call_VM as it will see a possible pending exception and forward it | |
2006 // and never return here preventing us from clearing _last_native_pc down below. | |
2007 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are | |
2008 // preserved and correspond to the bcp/locals pointers. So we do a runtime call | |
2009 // by hand. | |
2010 // | |
2011 save_native_result(masm, ret_type, stack_slots); | |
304 | 2012 __ mov(c_rarg0, r15_thread); |
2013 __ mov(r12, rsp); // remember sp | |
2014 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2015 __ andptr(rsp, -16); // align stack as required by ABI | |
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2016 if (!is_critical_native) { |
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2017 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans))); |
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2018 } else { |
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2019 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition))); |
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2020 } |
304 | 2021 __ mov(rsp, r12); // restore sp |
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2022 __ reinit_heapbase(); |
0 | 2023 // Restore any method result value |
2024 restore_native_result(masm, ret_type, stack_slots); | |
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2025 |
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2026 if (is_critical_native) { |
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2027 // The call above performed the transition to thread_in_Java so |
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2028 // skip the transition logic below. |
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2029 __ jmpb(after_transition); |
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2030 } |
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2031 |
0 | 2032 __ bind(Continue); |
2033 } | |
2034 | |
2035 // change thread state | |
2036 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java); | |
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2037 __ bind(after_transition); |
0 | 2038 |
2039 Label reguard; | |
2040 Label reguard_done; | |
2041 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); | |
2042 __ jcc(Assembler::equal, reguard); | |
2043 __ bind(reguard_done); | |
2044 | |
2045 // native result if any is live | |
2046 | |
2047 // Unlock | |
2048 Label unlock_done; | |
2049 Label slow_path_unlock; | |
2050 if (method->is_synchronized()) { | |
2051 | |
2052 // Get locked oop from the handle we passed to jni | |
304 | 2053 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 2054 |
2055 Label done; | |
2056 | |
2057 if (UseBiasedLocking) { | |
2058 __ biased_locking_exit(obj_reg, old_hdr, done); | |
2059 } | |
2060 | |
2061 // Simple recursive lock? | |
2062 | |
304 | 2063 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD); |
0 | 2064 __ jcc(Assembler::equal, done); |
2065 | |
2066 // Must save rax if if it is live now because cmpxchg must use it | |
2067 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
2068 save_native_result(masm, ret_type, stack_slots); | |
2069 } | |
2070 | |
2071 | |
2072 // get address of the stack lock | |
304 | 2073 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
0 | 2074 // get old displaced header |
304 | 2075 __ movptr(old_hdr, Address(rax, 0)); |
0 | 2076 |
2077 // Atomic swap old header if oop still contains the stack lock | |
2078 if (os::is_MP()) { | |
2079 __ lock(); | |
2080 } | |
304 | 2081 __ cmpxchgptr(old_hdr, Address(obj_reg, 0)); |
0 | 2082 __ jcc(Assembler::notEqual, slow_path_unlock); |
2083 | |
2084 // slow path re-enters here | |
2085 __ bind(unlock_done); | |
2086 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
2087 restore_native_result(masm, ret_type, stack_slots); | |
2088 } | |
2089 | |
2090 __ bind(done); | |
2091 | |
2092 } | |
2093 { | |
2094 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
2095 save_native_result(masm, ret_type, stack_slots); | |
2096 __ movoop(c_rarg1, JNIHandles::make_local(method())); | |
2097 __ call_VM_leaf( | |
2098 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
2099 r15_thread, c_rarg1); | |
2100 restore_native_result(masm, ret_type, stack_slots); | |
2101 } | |
2102 | |
2103 __ reset_last_Java_frame(false, true); | |
2104 | |
2105 // Unpack oop result | |
2106 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
2107 Label L; | |
304 | 2108 __ testptr(rax, rax); |
0 | 2109 __ jcc(Assembler::zero, L); |
304 | 2110 __ movptr(rax, Address(rax, 0)); |
0 | 2111 __ bind(L); |
2112 __ verify_oop(rax); | |
2113 } | |
2114 | |
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2115 if (!is_critical_native) { |
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2116 // reset handle block |
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2117 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset())); |
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2118 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD); |
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2119 } |
0 | 2120 |
2121 // pop our frame | |
2122 | |
2123 __ leave(); | |
2124 | |
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2125 if (!is_critical_native) { |
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2126 // Any exception pending? |
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2127 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
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2128 __ jcc(Assembler::notEqual, exception_pending); |
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2129 } |
0 | 2130 |
2131 // Return | |
2132 | |
2133 __ ret(0); | |
2134 | |
2135 // Unexpected paths are out of line and go here | |
2136 | |
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2137 if (!is_critical_native) { |
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2138 // forward the exception |
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2139 __ bind(exception_pending); |
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2140 |
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2141 // and forward the exception |
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2142 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
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2143 } |
0 | 2144 |
2145 // Slow path locking & unlocking | |
2146 if (method->is_synchronized()) { | |
2147 | |
2148 // BEGIN Slow path lock | |
2149 __ bind(slow_path_lock); | |
2150 | |
2151 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM | |
2152 // args are (oop obj, BasicLock* lock, JavaThread* thread) | |
2153 | |
2154 // protect the args we've loaded | |
2155 save_args(masm, total_c_args, c_arg, out_regs); | |
2156 | |
304 | 2157 __ mov(c_rarg0, obj_reg); |
2158 __ mov(c_rarg1, lock_reg); | |
2159 __ mov(c_rarg2, r15_thread); | |
0 | 2160 |
2161 // Not a leaf but we have last_Java_frame setup as we want | |
2162 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3); | |
2163 restore_args(masm, total_c_args, c_arg, out_regs); | |
2164 | |
2165 #ifdef ASSERT | |
2166 { Label L; | |
304 | 2167 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
0 | 2168 __ jcc(Assembler::equal, L); |
2169 __ stop("no pending exception allowed on exit from monitorenter"); | |
2170 __ bind(L); | |
2171 } | |
2172 #endif | |
2173 __ jmp(lock_done); | |
2174 | |
2175 // END Slow path lock | |
2176 | |
2177 // BEGIN Slow path unlock | |
2178 __ bind(slow_path_unlock); | |
2179 | |
2180 // If we haven't already saved the native result we must save it now as xmm registers | |
2181 // are still exposed. | |
2182 | |
2183 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
2184 save_native_result(masm, ret_type, stack_slots); | |
2185 } | |
2186 | |
304 | 2187 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
2188 | |
2189 __ mov(c_rarg0, obj_reg); | |
2190 __ mov(r12, rsp); // remember sp | |
2191 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2192 __ andptr(rsp, -16); // align stack as required by ABI | |
0 | 2193 |
2194 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) | |
2195 // NOTE that obj_reg == rbx currently | |
304 | 2196 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset()))); |
2197 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); | |
0 | 2198 |
2199 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); | |
304 | 2200 __ mov(rsp, r12); // restore sp |
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2201 __ reinit_heapbase(); |
0 | 2202 #ifdef ASSERT |
2203 { | |
2204 Label L; | |
304 | 2205 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); |
0 | 2206 __ jcc(Assembler::equal, L); |
2207 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); | |
2208 __ bind(L); | |
2209 } | |
2210 #endif /* ASSERT */ | |
2211 | |
304 | 2212 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx); |
0 | 2213 |
2214 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
2215 restore_native_result(masm, ret_type, stack_slots); | |
2216 } | |
2217 __ jmp(unlock_done); | |
2218 | |
2219 // END Slow path unlock | |
2220 | |
2221 } // synchronized | |
2222 | |
2223 // SLOW PATH Reguard the stack if needed | |
2224 | |
2225 __ bind(reguard); | |
2226 save_native_result(masm, ret_type, stack_slots); | |
304 | 2227 __ mov(r12, rsp); // remember sp |
2228 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2229 __ andptr(rsp, -16); // align stack as required by ABI | |
0 | 2230 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); |
304 | 2231 __ mov(rsp, r12); // restore sp |
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2232 __ reinit_heapbase(); |
0 | 2233 restore_native_result(masm, ret_type, stack_slots); |
2234 // and continue | |
2235 __ jmp(reguard_done); | |
2236 | |
2237 | |
2238 | |
2239 __ flush(); | |
2240 | |
2241 nmethod *nm = nmethod::new_native_nmethod(method, | |
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2242 compile_id, |
0 | 2243 masm->code(), |
2244 vep_offset, | |
2245 frame_complete, | |
2246 stack_slots / VMRegImpl::slots_per_word, | |
2247 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
2248 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), | |
2249 oop_maps); | |
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2250 |
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2251 if (is_critical_native) { |
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2252 nm->set_lazy_critical_native(true); |
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2253 } |
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2254 |
0 | 2255 return nm; |
2256 | |
2257 } | |
2258 | |
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2259 #ifdef HAVE_DTRACE_H |
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2260 // --------------------------------------------------------------------------- |
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2261 // Generate a dtrace nmethod for a given signature. The method takes arguments |
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2262 // in the Java compiled code convention, marshals them to the native |
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2263 // abi and then leaves nops at the position you would expect to call a native |
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2264 // function. When the probe is enabled the nops are replaced with a trap |
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2265 // instruction that dtrace inserts and the trace will cause a notification |
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2266 // to dtrace. |
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2267 // |
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2268 // The probes are only able to take primitive types and java/lang/String as |
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2269 // arguments. No other java types are allowed. Strings are converted to utf8 |
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2270 // strings so that from dtrace point of view java strings are converted to C |
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2271 // strings. There is an arbitrary fixed limit on the total space that a method |
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2272 // can use for converting the strings. (256 chars per string in the signature). |
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2273 // So any java string larger then this is truncated. |
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2274 |
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2275 static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 }; |
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2276 static bool offsets_initialized = false; |
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2277 |
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2278 |
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2279 nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm, |
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2280 methodHandle method) { |
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2281 |
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2282 |
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2283 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
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2284 // be single threaded in this method. |
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2285 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
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2286 |
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2287 if (!offsets_initialized) { |
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2288 fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize; |
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2289 fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize; |
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2290 fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize; |
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2291 fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize; |
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2292 fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize; |
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2293 fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize; |
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2294 |
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2295 fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize; |
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2296 fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize; |
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2297 fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize; |
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2298 fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize; |
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2299 fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize; |
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2300 fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize; |
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2301 fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize; |
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2302 fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize; |
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2303 |
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2304 offsets_initialized = true; |
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2305 } |
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2306 // Fill in the signature array, for the calling-convention call. |
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2307 int total_args_passed = method->size_of_parameters(); |
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2308 |
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2309 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
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2310 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
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2311 |
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2312 // The signature we are going to use for the trap that dtrace will see |
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2313 // java/lang/String is converted. We drop "this" and any other object |
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2314 // is converted to NULL. (A one-slot java/lang/Long object reference |
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2315 // is converted to a two-slot long, which is why we double the allocation). |
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2316 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
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2317 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
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2318 |
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2319 int i=0; |
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2320 int total_strings = 0; |
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2321 int first_arg_to_pass = 0; |
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2322 int total_c_args = 0; |
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2323 |
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2324 // Skip the receiver as dtrace doesn't want to see it |
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2325 if( !method->is_static() ) { |
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2326 in_sig_bt[i++] = T_OBJECT; |
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2327 first_arg_to_pass = 1; |
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2328 } |
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2329 |
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2330 // We need to convert the java args to where a native (non-jni) function |
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2331 // would expect them. To figure out where they go we convert the java |
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2332 // signature to a C signature. |
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2333 |
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2334 SignatureStream ss(method->signature()); |
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2335 for ( ; !ss.at_return_type(); ss.next()) { |
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2336 BasicType bt = ss.type(); |
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2337 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
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2338 out_sig_bt[total_c_args++] = bt; |
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2339 if( bt == T_OBJECT) { |
2177
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2340 Symbol* s = ss.as_symbol_or_null(); // symbol is created |
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2341 if (s == vmSymbols::java_lang_String()) { |
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2342 total_strings++; |
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2343 out_sig_bt[total_c_args-1] = T_ADDRESS; |
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2344 } else if (s == vmSymbols::java_lang_Boolean() || |
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2345 s == vmSymbols::java_lang_Character() || |
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2346 s == vmSymbols::java_lang_Byte() || |
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2347 s == vmSymbols::java_lang_Short() || |
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2348 s == vmSymbols::java_lang_Integer() || |
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2349 s == vmSymbols::java_lang_Float()) { |
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2350 out_sig_bt[total_c_args-1] = T_INT; |
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2351 } else if (s == vmSymbols::java_lang_Long() || |
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2352 s == vmSymbols::java_lang_Double()) { |
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2353 out_sig_bt[total_c_args-1] = T_LONG; |
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2354 out_sig_bt[total_c_args++] = T_VOID; |
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2355 } |
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2356 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
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2357 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
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2358 // We convert double to long |
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2359 out_sig_bt[total_c_args-1] = T_LONG; |
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2360 out_sig_bt[total_c_args++] = T_VOID; |
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2361 } else if ( bt == T_FLOAT) { |
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2362 // We convert float to int |
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2363 out_sig_bt[total_c_args-1] = T_INT; |
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2364 } |
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2365 } |
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2366 |
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2367 assert(i==total_args_passed, "validly parsed signature"); |
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2368 |
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2369 // Now get the compiled-Java layout as input arguments |
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2370 int comp_args_on_stack; |
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2371 comp_args_on_stack = SharedRuntime::java_calling_convention( |
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2372 in_sig_bt, in_regs, total_args_passed, false); |
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2373 |
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2374 // Now figure out where the args must be stored and how much stack space |
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2375 // they require (neglecting out_preserve_stack_slots but space for storing |
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2376 // the 1st six register arguments). It's weird see int_stk_helper. |
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2377 |
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2378 int out_arg_slots; |
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2379 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); |
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2380 |
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2381 // Calculate the total number of stack slots we will need. |
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2382 |
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2383 // First count the abi requirement plus all of the outgoing args |
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2384 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
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2385 |
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2386 // Now space for the string(s) we must convert |
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2387 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1); |
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2388 for (i = 0; i < total_strings ; i++) { |
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2389 string_locs[i] = stack_slots; |
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2390 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size; |
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2391 } |
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2392 |
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2393 // Plus the temps we might need to juggle register args |
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2394 // regs take two slots each |
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2395 stack_slots += (Argument::n_int_register_parameters_c + |
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2396 Argument::n_float_register_parameters_c) * 2; |
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2397 |
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2398 |
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2399 // + 4 for return address (which we own) and saved rbp, |
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2400 |
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2401 stack_slots += 4; |
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2402 |
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2403 // Ok The space we have allocated will look like: |
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2404 // |
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2405 // |
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2406 // FP-> | | |
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2407 // |---------------------| |
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2408 // | string[n] | |
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2409 // |---------------------| <- string_locs[n] |
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2410 // | string[n-1] | |
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2411 // |---------------------| <- string_locs[n-1] |
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2412 // | ... | |
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2413 // | ... | |
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2414 // |---------------------| <- string_locs[1] |
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2415 // | string[0] | |
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2416 // |---------------------| <- string_locs[0] |
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2417 // | outbound memory | |
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2418 // | based arguments | |
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2419 // | | |
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2420 // |---------------------| |
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2421 // | | |
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2422 // SP-> | out_preserved_slots | |
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2423 // |
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2424 // |
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2425 |
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2426 // Now compute actual number of stack words we need rounding to make |
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2427 // stack properly aligned. |
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2428 stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word); |
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2429 |
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2430 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
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2431 |
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2432 intptr_t start = (intptr_t)__ pc(); |
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2433 |
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2434 // First thing make an ic check to see if we should even be here |
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2435 |
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2436 // We are free to use all registers as temps without saving them and |
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2437 // restoring them except rbp. rbp, is the only callee save register |
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2438 // as far as the interpreter and the compiler(s) are concerned. |
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2439 |
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2440 const Register ic_reg = rax; |
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2441 const Register receiver = rcx; |
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2442 Label hit; |
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2443 Label exception_pending; |
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2444 |
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2445 |
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2446 __ verify_oop(receiver); |
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2447 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
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2448 __ jcc(Assembler::equal, hit); |
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2449 |
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2450 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); |
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2451 |
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2452 // verified entry must be aligned for code patching. |
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2453 // and the first 5 bytes must be in the same cache line |
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2454 // if we align at 8 then we will be sure 5 bytes are in the same line |
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2455 __ align(8); |
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2456 |
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2457 __ bind(hit); |
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2458 |
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2459 int vep_offset = ((intptr_t)__ pc()) - start; |
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2460 |
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2461 |
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2462 // The instruction at the verified entry point must be 5 bytes or longer |
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2463 // because it can be patched on the fly by make_non_entrant. The stack bang |
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2464 // instruction fits that requirement. |
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2465 |
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2466 // Generate stack overflow check |
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2467 |
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2468 if (UseStackBanging) { |
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2469 if (stack_size <= StackShadowPages*os::vm_page_size()) { |
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2470 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); |
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2471 } else { |
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2472 __ movl(rax, stack_size); |
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2473 __ bang_stack_size(rax, rbx); |
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2474 } |
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2475 } else { |
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2476 // need a 5 byte instruction to allow MT safe patching to non-entrant |
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2477 __ fat_nop(); |
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2478 } |
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2479 |
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2480 assert(((uintptr_t)__ pc() - start - vep_offset) >= 5, |
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2481 "valid size for make_non_entrant"); |
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2482 |
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2483 // Generate a new frame for the wrapper. |
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2484 __ enter(); |
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2485 |
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2486 // -4 because return address is already present and so is saved rbp, |
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2487 if (stack_size - 2*wordSize != 0) { |
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2488 __ subq(rsp, stack_size - 2*wordSize); |
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2489 } |
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2490 |
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2491 // Frame is now completed as far a size and linkage. |
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2492 |
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2493 int frame_complete = ((intptr_t)__ pc()) - start; |
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2494 |
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2495 int c_arg, j_arg; |
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2496 |
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2497 // State of input register args |
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2498 |
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2499 bool live[ConcreteRegisterImpl::number_of_registers]; |
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2500 |
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2501 live[j_rarg0->as_VMReg()->value()] = false; |
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2502 live[j_rarg1->as_VMReg()->value()] = false; |
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2503 live[j_rarg2->as_VMReg()->value()] = false; |
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2504 live[j_rarg3->as_VMReg()->value()] = false; |
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2505 live[j_rarg4->as_VMReg()->value()] = false; |
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2506 live[j_rarg5->as_VMReg()->value()] = false; |
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2507 |
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2508 live[j_farg0->as_VMReg()->value()] = false; |
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2509 live[j_farg1->as_VMReg()->value()] = false; |
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2510 live[j_farg2->as_VMReg()->value()] = false; |
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2511 live[j_farg3->as_VMReg()->value()] = false; |
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2512 live[j_farg4->as_VMReg()->value()] = false; |
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2513 live[j_farg5->as_VMReg()->value()] = false; |
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2514 live[j_farg6->as_VMReg()->value()] = false; |
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2515 live[j_farg7->as_VMReg()->value()] = false; |
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2516 |
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2517 |
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2518 bool rax_is_zero = false; |
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2519 |
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2520 // All args (except strings) destined for the stack are moved first |
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2521 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2522 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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2523 VMRegPair src = in_regs[j_arg]; |
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2524 VMRegPair dst = out_regs[c_arg]; |
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2525 |
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2526 // Get the real reg value or a dummy (rsp) |
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2527 |
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2528 int src_reg = src.first()->is_reg() ? |
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2529 src.first()->value() : |
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2530 rsp->as_VMReg()->value(); |
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2531 |
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2532 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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2533 (in_sig_bt[j_arg] == T_OBJECT && |
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2534 out_sig_bt[c_arg] != T_INT && |
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2535 out_sig_bt[c_arg] != T_ADDRESS && |
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2536 out_sig_bt[c_arg] != T_LONG); |
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2537 |
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2538 live[src_reg] = !useless; |
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2539 |
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2540 if (dst.first()->is_stack()) { |
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2541 |
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2542 // Even though a string arg in a register is still live after this loop |
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2543 // after the string conversion loop (next) it will be dead so we take |
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2544 // advantage of that now for simpler code to manage live. |
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2545 |
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2546 live[src_reg] = false; |
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2547 switch (in_sig_bt[j_arg]) { |
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2548 |
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2549 case T_ARRAY: |
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2550 case T_OBJECT: |
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2551 { |
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2552 Address stack_dst(rsp, reg2offset_out(dst.first())); |
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2553 |
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2554 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
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2555 // need to unbox a one-word value |
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2556 Register in_reg = rax; |
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2557 if ( src.first()->is_reg() ) { |
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2558 in_reg = src.first()->as_Register(); |
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2559 } else { |
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2560 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
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2561 rax_is_zero = false; |
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2562 } |
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2563 Label skipUnbox; |
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2564 __ movptr(Address(rsp, reg2offset_out(dst.first())), |
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2565 (int32_t)NULL_WORD); |
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2566 __ testq(in_reg, in_reg); |
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2567 __ jcc(Assembler::zero, skipUnbox); |
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2568 |
165
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2569 BasicType bt = out_sig_bt[c_arg]; |
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2570 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
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2571 Address src1(in_reg, box_offset); |
165
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2572 if ( bt == T_LONG ) { |
116
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2573 __ movq(in_reg, src1); |
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2574 __ movq(stack_dst, in_reg); |
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2575 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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2576 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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|
2577 } else { |
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|
2578 __ movl(in_reg, src1); |
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|
2579 __ movl(stack_dst, in_reg); |
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113
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|
2580 } |
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|
2581 |
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|
2582 __ bind(skipUnbox); |
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2583 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
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2584 // Convert the arg to NULL |
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2585 if (!rax_is_zero) { |
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2586 __ xorq(rax, rax); |
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2587 rax_is_zero = true; |
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|
2588 } |
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|
2589 __ movq(stack_dst, rax); |
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|
2590 } |
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|
2591 } |
018d5b58dd4f
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113
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|
2592 break; |
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113
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|
2593 |
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|
2594 case T_VOID: |
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|
2595 break; |
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113
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|
2596 |
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113
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|
2597 case T_FLOAT: |
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|
2598 // This does the right thing since we know it is destined for the |
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2599 // stack |
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|
2600 float_move(masm, src, dst); |
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|
2601 break; |
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113
diff
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|
2602 |
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|
2603 case T_DOUBLE: |
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2604 // This does the right thing since we know it is destined for the |
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2605 // stack |
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|
2606 double_move(masm, src, dst); |
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|
2607 break; |
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|
2608 |
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113
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|
2609 case T_LONG : |
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|
2610 long_move(masm, src, dst); |
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113
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|
2611 break; |
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113
diff
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|
2612 |
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|
2613 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
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113
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|
2614 |
018d5b58dd4f
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113
diff
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|
2615 default: |
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113
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|
2616 move32_64(masm, src, dst); |
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|
2617 } |
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|
2618 } |
018d5b58dd4f
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113
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|
2619 |
018d5b58dd4f
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113
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|
2620 } |
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113
diff
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|
2621 |
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113
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|
2622 // If we have any strings we must store any register based arg to the stack |
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2623 // This includes any still live xmm registers too. |
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113
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|
2624 |
018d5b58dd4f
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113
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|
2625 int sid = 0; |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2626 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
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|
2627 if (total_strings > 0 ) { |
018d5b58dd4f
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113
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|
2628 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2629 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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kamg
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113
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|
2630 VMRegPair src = in_regs[j_arg]; |
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113
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|
2631 VMRegPair dst = out_regs[c_arg]; |
018d5b58dd4f
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113
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|
2632 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
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|
2633 if (src.first()->is_reg()) { |
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113
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|
2634 Address src_tmp(rbp, fp_offset[src.first()->value()]); |
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kamg
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113
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|
2635 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
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|
2636 // string oops were left untouched by the previous loop even if the |
018d5b58dd4f
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113
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|
2637 // eventual (converted) arg is destined for the stack so park them |
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113
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|
2638 // away now (except for first) |
018d5b58dd4f
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113
diff
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|
2639 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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|
2640 if (out_sig_bt[c_arg] == T_ADDRESS) { |
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|
2641 Address utf8_addr = Address( |
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|
2642 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
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|
2643 if (sid != 1) { |
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|
2644 // The first string arg won't be killed until after the utf8 |
018d5b58dd4f
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113
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|
2645 // conversion |
018d5b58dd4f
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|
2646 __ movq(utf8_addr, src.first()->as_Register()); |
018d5b58dd4f
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kamg
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|
2647 } |
018d5b58dd4f
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|
2648 } else if (dst.first()->is_reg()) { |
018d5b58dd4f
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|
2649 if (in_sig_bt[j_arg] == T_FLOAT || in_sig_bt[j_arg] == T_DOUBLE) { |
018d5b58dd4f
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113
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|
2650 |
018d5b58dd4f
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113
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|
2651 // Convert the xmm register to an int and store it in the reserved |
018d5b58dd4f
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113
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|
2652 // location for the eventual c register arg |
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|
2653 XMMRegister f = src.first()->as_XMMRegister(); |
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|
2654 if (in_sig_bt[j_arg] == T_FLOAT) { |
018d5b58dd4f
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|
2655 __ movflt(src_tmp, f); |
018d5b58dd4f
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113
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|
2656 } else { |
018d5b58dd4f
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113
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|
2657 __ movdbl(src_tmp, f); |
018d5b58dd4f
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kamg
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113
diff
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|
2658 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
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|
2659 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
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|
2660 // If the arg is an oop type we don't support don't bother to store |
018d5b58dd4f
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113
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|
2661 // it remember string was handled above. |
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|
2662 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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|
2663 (in_sig_bt[j_arg] == T_OBJECT && |
018d5b58dd4f
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|
2664 out_sig_bt[c_arg] != T_INT && |
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|
2665 out_sig_bt[c_arg] != T_LONG); |
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113
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|
2666 |
018d5b58dd4f
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|
2667 if (!useless) { |
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|
2668 __ movq(src_tmp, src.first()->as_Register()); |
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|
2669 } |
018d5b58dd4f
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kamg
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113
diff
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|
2670 } |
018d5b58dd4f
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kamg
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113
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|
2671 } |
018d5b58dd4f
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kamg
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113
diff
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|
2672 } |
018d5b58dd4f
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|
2673 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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|
2674 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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|
2675 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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|
2676 } |
018d5b58dd4f
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kamg
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113
diff
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|
2677 } |
018d5b58dd4f
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kamg
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113
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|
2678 |
018d5b58dd4f
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|
2679 // Now that the volatile registers are safe, convert all the strings |
018d5b58dd4f
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|
2680 sid = 0; |
018d5b58dd4f
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|
2681 |
018d5b58dd4f
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|
2682 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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|
2683 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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|
2684 if (out_sig_bt[c_arg] == T_ADDRESS) { |
018d5b58dd4f
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|
2685 // It's a string |
018d5b58dd4f
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|
2686 Address utf8_addr = Address( |
018d5b58dd4f
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|
2687 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
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|
2688 // The first string we find might still be in the original java arg |
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|
2689 // register |
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|
2690 |
018d5b58dd4f
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|
2691 VMReg src = in_regs[j_arg].first(); |
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|
2692 |
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2693 // We will need to eventually save the final argument to the trap |
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2694 // in the von-volatile location dedicated to src. This is the offset |
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2695 // from fp we will use. |
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2696 int src_off = src->is_reg() ? |
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2697 fp_offset[src->value()] : reg2offset_in(src); |
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2698 |
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2699 // This is where the argument will eventually reside |
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2700 VMRegPair dst = out_regs[c_arg]; |
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2701 |
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2702 if (src->is_reg()) { |
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2703 if (sid == 1) { |
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2704 __ movq(c_rarg0, src->as_Register()); |
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2705 } else { |
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2706 __ movq(c_rarg0, utf8_addr); |
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2707 } |
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2708 } else { |
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2709 // arg is still in the original location |
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2710 __ movq(c_rarg0, Address(rbp, reg2offset_in(src))); |
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2711 } |
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2712 Label done, convert; |
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2713 |
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2714 // see if the oop is NULL |
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2715 __ testq(c_rarg0, c_rarg0); |
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2716 __ jcc(Assembler::notEqual, convert); |
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2717 |
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2718 if (dst.first()->is_reg()) { |
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2719 // Save the ptr to utf string in the origina src loc or the tmp |
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2720 // dedicated to it |
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2721 __ movq(Address(rbp, src_off), c_rarg0); |
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2722 } else { |
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2723 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg0); |
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2724 } |
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2725 __ jmp(done); |
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2726 |
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2727 __ bind(convert); |
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2728 |
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2729 __ lea(c_rarg1, utf8_addr); |
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2730 if (dst.first()->is_reg()) { |
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2731 __ movq(Address(rbp, src_off), c_rarg1); |
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2732 } else { |
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2733 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1); |
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2734 } |
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2735 // And do the conversion |
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2736 __ call(RuntimeAddress( |
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2737 CAST_FROM_FN_PTR(address, SharedRuntime::get_utf))); |
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2738 |
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2739 __ bind(done); |
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2740 } |
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2741 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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2742 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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2743 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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2744 } |
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2745 } |
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2746 // The get_utf call killed all the c_arg registers |
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2747 live[c_rarg0->as_VMReg()->value()] = false; |
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2748 live[c_rarg1->as_VMReg()->value()] = false; |
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2749 live[c_rarg2->as_VMReg()->value()] = false; |
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2750 live[c_rarg3->as_VMReg()->value()] = false; |
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2751 live[c_rarg4->as_VMReg()->value()] = false; |
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2752 live[c_rarg5->as_VMReg()->value()] = false; |
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2753 |
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2754 live[c_farg0->as_VMReg()->value()] = false; |
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2755 live[c_farg1->as_VMReg()->value()] = false; |
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2756 live[c_farg2->as_VMReg()->value()] = false; |
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2757 live[c_farg3->as_VMReg()->value()] = false; |
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2758 live[c_farg4->as_VMReg()->value()] = false; |
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2759 live[c_farg5->as_VMReg()->value()] = false; |
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2760 live[c_farg6->as_VMReg()->value()] = false; |
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2761 live[c_farg7->as_VMReg()->value()] = false; |
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2762 } |
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2763 |
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2764 // Now we can finally move the register args to their desired locations |
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2765 |
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2766 rax_is_zero = false; |
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2767 |
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2768 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2769 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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2770 |
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2771 VMRegPair src = in_regs[j_arg]; |
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2772 VMRegPair dst = out_regs[c_arg]; |
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2773 |
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2774 // Only need to look for args destined for the interger registers (since we |
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2775 // convert float/double args to look like int/long outbound) |
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2776 if (dst.first()->is_reg()) { |
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2777 Register r = dst.first()->as_Register(); |
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2778 |
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2779 // Check if the java arg is unsupported and thereofre useless |
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2780 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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2781 (in_sig_bt[j_arg] == T_OBJECT && |
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2782 out_sig_bt[c_arg] != T_INT && |
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2783 out_sig_bt[c_arg] != T_ADDRESS && |
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2784 out_sig_bt[c_arg] != T_LONG); |
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2785 |
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2786 |
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2787 // If we're going to kill an existing arg save it first |
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2788 if (live[dst.first()->value()]) { |
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2789 // you can't kill yourself |
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2790 if (src.first() != dst.first()) { |
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2791 __ movq(Address(rbp, fp_offset[dst.first()->value()]), r); |
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2792 } |
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2793 } |
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2794 if (src.first()->is_reg()) { |
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2795 if (live[src.first()->value()] ) { |
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2796 if (in_sig_bt[j_arg] == T_FLOAT) { |
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2797 __ movdl(r, src.first()->as_XMMRegister()); |
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2798 } else if (in_sig_bt[j_arg] == T_DOUBLE) { |
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2799 __ movdq(r, src.first()->as_XMMRegister()); |
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2800 } else if (r != src.first()->as_Register()) { |
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2801 if (!useless) { |
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2802 __ movq(r, src.first()->as_Register()); |
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2803 } |
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2804 } |
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2805 } else { |
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2806 // If the arg is an oop type we don't support don't bother to store |
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2807 // it |
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2808 if (!useless) { |
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2809 if (in_sig_bt[j_arg] == T_DOUBLE || |
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2810 in_sig_bt[j_arg] == T_LONG || |
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2811 in_sig_bt[j_arg] == T_OBJECT ) { |
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2812 __ movq(r, Address(rbp, fp_offset[src.first()->value()])); |
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2813 } else { |
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2814 __ movl(r, Address(rbp, fp_offset[src.first()->value()])); |
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2815 } |
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2816 } |
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2817 } |
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2818 live[src.first()->value()] = false; |
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2819 } else if (!useless) { |
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2820 // full sized move even for int should be ok |
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2821 __ movq(r, Address(rbp, reg2offset_in(src.first()))); |
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2822 } |
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2823 |
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2824 // At this point r has the original java arg in the final location |
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2825 // (assuming it wasn't useless). If the java arg was an oop |
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2826 // we have a bit more to do |
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2827 |
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2828 if (in_sig_bt[j_arg] == T_ARRAY || in_sig_bt[j_arg] == T_OBJECT ) { |
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2829 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
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2830 // need to unbox a one-word value |
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2831 Label skip; |
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2832 __ testq(r, r); |
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2833 __ jcc(Assembler::equal, skip); |
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2834 BasicType bt = out_sig_bt[c_arg]; |
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2835 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
116
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2836 Address src1(r, box_offset); |
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2837 if ( bt == T_LONG ) { |
116
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2838 __ movq(r, src1); |
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2839 } else { |
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2840 __ movl(r, src1); |
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2841 } |
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2842 __ bind(skip); |
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2843 |
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2844 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
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2845 // Convert the arg to NULL |
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2846 __ xorq(r, r); |
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2847 } |
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2848 } |
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2849 |
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2850 // dst can longer be holding an input value |
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2851 live[dst.first()->value()] = false; |
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2852 } |
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2853 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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2854 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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2855 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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2856 } |
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2857 } |
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2858 |
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2859 |
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2860 // Ok now we are done. Need to place the nop that dtrace wants in order to |
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2861 // patch in the trap |
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2862 int patch_offset = ((intptr_t)__ pc()) - start; |
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2863 |
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2864 __ nop(); |
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2865 |
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2866 |
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2867 // Return |
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2868 |
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2869 __ leave(); |
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2870 __ ret(0); |
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2871 |
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2872 __ flush(); |
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2873 |
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2874 nmethod *nm = nmethod::new_dtrace_nmethod( |
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2875 method, masm->code(), vep_offset, patch_offset, frame_complete, |
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2876 stack_slots / VMRegImpl::slots_per_word); |
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2877 return nm; |
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2878 |
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2879 } |
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2880 |
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2881 #endif // HAVE_DTRACE_H |
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2882 |
0 | 2883 // this function returns the adjust size (in number of words) to a c2i adapter |
2884 // activation for use during deoptimization | |
2885 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { | |
1506 | 2886 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
0 | 2887 } |
2888 | |
2889 | |
2890 uint SharedRuntime::out_preserve_stack_slots() { | |
2891 return 0; | |
2892 } | |
2893 | |
2894 | |
2895 //------------------------------generate_deopt_blob---------------------------- | |
2896 void SharedRuntime::generate_deopt_blob() { | |
2897 // Allocate space for the code | |
2898 ResourceMark rm; | |
2899 // Setup code generation tools | |
2900 CodeBuffer buffer("deopt_blob", 2048, 1024); | |
2901 MacroAssembler* masm = new MacroAssembler(&buffer); | |
2902 int frame_size_in_words; | |
2903 OopMap* map = NULL; | |
2904 OopMapSet *oop_maps = new OopMapSet(); | |
2905 | |
2906 // ------------- | |
2907 // This code enters when returning to a de-optimized nmethod. A return | |
2908 // address has been pushed on the the stack, and return values are in | |
2909 // registers. | |
2910 // If we are doing a normal deopt then we were called from the patched | |
2911 // nmethod from the point we returned to the nmethod. So the return | |
2912 // address on the stack is wrong by NativeCall::instruction_size | |
2913 // We will adjust the value so it looks like we have the original return | |
2914 // address on the stack (like when we eagerly deoptimized). | |
2915 // In the case of an exception pending when deoptimizing, we enter | |
2916 // with a return address on the stack that points after the call we patched | |
2917 // into the exception handler. We have the following register state from, | |
2918 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp). | |
2919 // rax: exception oop | |
2920 // rbx: exception handler | |
2921 // rdx: throwing pc | |
2922 // So in this case we simply jam rdx into the useless return address and | |
2923 // the stack looks just like we want. | |
2924 // | |
2925 // At this point we need to de-opt. We save the argument return | |
2926 // registers. We call the first C routine, fetch_unroll_info(). This | |
2927 // routine captures the return values and returns a structure which | |
2928 // describes the current frame size and the sizes of all replacement frames. | |
2929 // The current frame is compiled code and may contain many inlined | |
2930 // functions, each with their own JVM state. We pop the current frame, then | |
2931 // push all the new frames. Then we call the C routine unpack_frames() to | |
2932 // populate these frames. Finally unpack_frames() returns us the new target | |
2933 // address. Notice that callee-save registers are BLOWN here; they have | |
2934 // already been captured in the vframeArray at the time the return PC was | |
2935 // patched. | |
2936 address start = __ pc(); | |
2937 Label cont; | |
2938 | |
2939 // Prolog for non exception case! | |
2940 | |
2941 // Save everything in sight. | |
2942 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
2943 | |
2944 // Normal deoptimization. Save exec mode for unpack_frames. | |
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2945 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved |
0 | 2946 __ jmp(cont); |
304 | 2947 |
2948 int reexecute_offset = __ pc() - start; | |
2949 | |
2950 // Reexecute case | |
2951 // return address is the pc describes what bci to do re-execute at | |
2952 | |
2953 // No need to update map as each call to save_live_registers will produce identical oopmap | |
2954 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
2955 | |
2956 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved | |
2957 __ jmp(cont); | |
2958 | |
0 | 2959 int exception_offset = __ pc() - start; |
2960 | |
2961 // Prolog for exception case | |
2962 | |
304 | 2963 // all registers are dead at this entry point, except for rax, and |
2964 // rdx which contain the exception oop and exception pc | |
2965 // respectively. Set them in TLS and fall thru to the | |
2966 // unpack_with_exception_in_tls entry point. | |
2967 | |
2968 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
2969 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax); | |
2970 | |
2971 int exception_in_tls_offset = __ pc() - start; | |
2972 | |
2973 // new implementation because exception oop is now passed in JavaThread | |
2974 | |
2975 // Prolog for exception case | |
2976 // All registers must be preserved because they might be used by LinearScan | |
2977 // Exceptiop oop and throwing PC are passed in JavaThread | |
2978 // tos: stack at point of call to method that threw the exception (i.e. only | |
2979 // args are on the stack, no return address) | |
2980 | |
2981 // make room on stack for the return address | |
2982 // It will be patched later with the throwing pc. The correct value is not | |
2983 // available now because loading it from memory would destroy registers. | |
2984 __ push(0); | |
0 | 2985 |
2986 // Save everything in sight. | |
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2987 RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); |
0 | 2988 |
304 | 2989 // Now it is safe to overwrite any register |
2990 | |
0 | 2991 // Deopt during an exception. Save exec mode for unpack_frames. |
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2992 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved |
0 | 2993 |
304 | 2994 // load throwing pc from JavaThread and patch it as the return address |
2995 // of the current frame. Then clear the field in JavaThread | |
2996 | |
2997 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
2998 __ movptr(Address(rbp, wordSize), rdx); | |
2999 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
3000 | |
3001 #ifdef ASSERT | |
3002 // verify that there is really an exception oop in JavaThread | |
3003 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
3004 __ verify_oop(rax); | |
3005 | |
3006 // verify that there is no pending exception | |
3007 Label no_pending_exception; | |
3008 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); | |
3009 __ testptr(rax, rax); | |
3010 __ jcc(Assembler::zero, no_pending_exception); | |
3011 __ stop("must not have pending exception here"); | |
3012 __ bind(no_pending_exception); | |
3013 #endif | |
3014 | |
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|
3015 #ifdef GRAAL |
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3016 __ jmp(cont); |
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diff
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|
3017 |
5111
422c979ff392
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Christian Haeubl <christian.haeubl@oracle.com>
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|
3018 int implicit_exception_uncommon_trap_offset = __ pc() - start; |
2605
98fa88528319
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diff
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|
3019 __ pushptr(Address(r15_thread, in_bytes(JavaThread::ScratchA_offset()))); |
5111
422c979ff392
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|
3020 __ movptr(rscratch1, Address(r15_thread, in_bytes(JavaThread::ScratchB_offset()))); |
2605
98fa88528319
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|
3021 |
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|
3022 int uncommon_trap_offset = __ pc() - start; |
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|
3023 |
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diff
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|
3024 // Save everything in sight. |
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|
3025 RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); |
2059
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diff
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|
3026 // fetch_unroll_info needs to call last_java_frame() |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3027 __ set_last_Java_frame(noreg, noreg, NULL); |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3028 |
2935
9b8f30608e62
deoptimization action (invalidate, reprofile, ...)
Lukas Stadler <lukas.stadler@jku.at>
parents:
2928
diff
changeset
|
3029 assert(r10 == rscratch1, "scratch register should be r10"); |
4675
c2384f5b2e6e
Small changes to the deopt stub.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4661
diff
changeset
|
3030 __ movl(c_rarg1, Address(rsp, RegisterSaver::r10_offset_in_bytes())); |
5109
6766253384bf
more preparations for disabling runtime feedback selectively based on deoptimization history
Christian Haeubl <christian.haeubl@oracle.com>
parents:
4993
diff
changeset
|
3031 |
2928
1e13559b112d
small fix in deopt stub, more branch prediction code
Lukas Stadler <lukas.stadler@jku.at>
parents:
2891
diff
changeset
|
3032 __ movl(r14, (int32_t)Deoptimization::Unpack_reexecute); |
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3033 __ mov(c_rarg0, r15_thread); |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3034 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3035 oop_maps->add_gc_map( __ pc()-start, map->deep_copy()); |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3036 |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3037 __ reset_last_Java_frame(false, false); |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3038 |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3039 Label after_fetch_unroll_info_call; |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3040 __ jmp(after_fetch_unroll_info_call); |
5109
6766253384bf
more preparations for disabling runtime feedback selectively based on deoptimization history
Christian Haeubl <christian.haeubl@oracle.com>
parents:
4993
diff
changeset
|
3041 #endif // GRAAL |
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3042 |
0 | 3043 __ bind(cont); |
3044 | |
3045 // Call C code. Need thread and this frame, but NOT official VM entry | |
3046 // crud. We cannot block on this call, no GC can happen. | |
3047 // | |
3048 // UnrollBlock* fetch_unroll_info(JavaThread* thread) | |
3049 | |
3050 // fetch_unroll_info needs to call last_java_frame(). | |
3051 | |
3052 __ set_last_Java_frame(noreg, noreg, NULL); | |
3053 #ifdef ASSERT | |
3054 { Label L; | |
304 | 3055 __ cmpptr(Address(r15_thread, |
0 | 3056 JavaThread::last_Java_fp_offset()), |
304 | 3057 (int32_t)0); |
0 | 3058 __ jcc(Assembler::equal, L); |
3059 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared"); | |
3060 __ bind(L); | |
3061 } | |
3062 #endif // ASSERT | |
304 | 3063 __ mov(c_rarg0, r15_thread); |
0 | 3064 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); |
3065 | |
3066 // Need to have an oopmap that tells fetch_unroll_info where to | |
3067 // find any register it might need. | |
3068 oop_maps->add_gc_map(__ pc() - start, map); | |
3069 | |
3070 __ reset_last_Java_frame(false, false); | |
3071 | |
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3072 #ifdef GRAAL |
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3073 __ bind(after_fetch_unroll_info_call); |
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3074 #endif |
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3075 |
0 | 3076 // Load UnrollBlock* into rdi |
304 | 3077 __ mov(rdi, rax); |
3078 | |
3079 Label noException; | |
682
69aefafe69c1
6824463: deopt blob is testing wrong register on 64-bit x86
never
parents:
628
diff
changeset
|
3080 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending? |
304 | 3081 __ jcc(Assembler::notEqual, noException); |
3082 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
3083 // QQQ this is useless it was NULL above | |
3084 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
3085 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); | |
3086 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
3087 | |
3088 __ verify_oop(rax); | |
3089 | |
3090 // Overwrite the result registers with the exception results. | |
3091 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
3092 // I think this is useless | |
3093 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx); | |
3094 | |
3095 __ bind(noException); | |
0 | 3096 |
3097 // Only register save data is on the stack. | |
3098 // Now restore the result registers. Everything else is either dead | |
3099 // or captured in the vframeArray. | |
3100 RegisterSaver::restore_result_registers(masm); | |
3101 | |
3102 // All of the register save area has been popped of the stack. Only the | |
3103 // return address remains. | |
3104 | |
3105 // Pop all the frames we must move/replace. | |
3106 // | |
3107 // Frame picture (youngest to oldest) | |
3108 // 1: self-frame (no frame link) | |
3109 // 2: deopting frame (no frame link) | |
3110 // 3: caller of deopting frame (could be compiled/interpreted). | |
3111 // | |
3112 // Note: by leaving the return address of self-frame on the stack | |
3113 // and using the size of frame 2 to adjust the stack | |
3114 // when we are done the return to frame 3 will still be on the stack. | |
3115 | |
3116 // Pop deoptimized frame | |
3117 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); | |
304 | 3118 __ addptr(rsp, rcx); |
0 | 3119 |
3120 // rsp should be pointing at the return address to the caller (3) | |
3121 | |
3122 // Stack bang to make sure there's enough room for these interpreter frames. | |
3123 if (UseStackBanging) { | |
3124 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
3125 __ bang_stack_size(rbx, rcx); | |
3126 } | |
3127 | |
3128 // Load address of array of frame pcs into rcx | |
304 | 3129 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
0 | 3130 |
3131 // Trash the old pc | |
304 | 3132 __ addptr(rsp, wordSize); |
0 | 3133 |
3134 // Load address of array of frame sizes into rsi | |
304 | 3135 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
0 | 3136 |
3137 // Load counter into rdx | |
3138 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
3139 | |
3140 // Pick up the initial fp we should save | |
3931
5432047c7db7
7087445: Improve platform independence of JSR292 shared code
bdelsart
parents:
3442
diff
changeset
|
3141 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
0 | 3142 |
3143 // Now adjust the caller's stack to make up for the extra locals | |
3144 // but record the original sp so that we can save it in the skeletal interpreter | |
3145 // frame and the stack walking of interpreter_sender will get the unextended sp | |
3146 // value and not the "real" sp value. | |
3147 | |
3148 const Register sender_sp = r8; | |
3149 | |
304 | 3150 __ mov(sender_sp, rsp); |
0 | 3151 __ movl(rbx, Address(rdi, |
3152 Deoptimization::UnrollBlock:: | |
3153 caller_adjustment_offset_in_bytes())); | |
304 | 3154 __ subptr(rsp, rbx); |
0 | 3155 |
3156 // Push interpreter frames in a loop | |
3157 Label loop; | |
3158 __ bind(loop); | |
304 | 3159 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
3160 #ifdef CC_INTERP | |
3161 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and | |
3162 #ifdef ASSERT | |
3163 __ push(0xDEADDEAD); // Make a recognizable pattern | |
3164 __ push(0xDEADDEAD); | |
3165 #else /* ASSERT */ | |
3166 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" | |
3167 #endif /* ASSERT */ | |
3168 #else | |
3169 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand | |
3170 #endif // CC_INTERP | |
3171 __ pushptr(Address(rcx, 0)); // Save return address | |
0 | 3172 __ enter(); // Save old & set new ebp |
304 | 3173 __ subptr(rsp, rbx); // Prolog |
3174 #ifdef CC_INTERP | |
3175 __ movptr(Address(rbp, | |
3176 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), | |
3177 sender_sp); // Make it walkable | |
3178 #else /* CC_INTERP */ | |
0 | 3179 // This value is corrected by layout_activation_impl |
304 | 3180 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
3181 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable | |
3182 #endif /* CC_INTERP */ | |
3183 __ mov(sender_sp, rsp); // Pass sender_sp to next frame | |
3184 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
3185 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
0 | 3186 __ decrementl(rdx); // Decrement counter |
3187 __ jcc(Assembler::notZero, loop); | |
304 | 3188 __ pushptr(Address(rcx, 0)); // Save final return address |
0 | 3189 |
3190 // Re-push self-frame | |
3191 __ enter(); // Save old & set new ebp | |
3192 | |
3193 // Allocate a full sized register save area. | |
3194 // Return address and rbp are in place, so we allocate two less words. | |
304 | 3195 __ subptr(rsp, (frame_size_in_words - 2) * wordSize); |
0 | 3196 |
3197 // Restore frame locals after moving the frame | |
3198 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0); | |
304 | 3199 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); |
0 | 3200 |
3201 // Call C code. Need thread but NOT official VM entry | |
3202 // crud. We cannot block on this call, no GC can happen. Call should | |
3203 // restore return values to their stack-slots with the new SP. | |
3204 // | |
3205 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode) | |
3206 | |
3207 // Use rbp because the frames look interpreted now | |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3208 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3209 // Don't need the precise return PC here, just precise enough to point into this code blob. |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3210 address the_pc = __ pc(); |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3211 __ set_last_Java_frame(noreg, rbp, the_pc); |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3212 |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3213 __ andptr(rsp, -(StackAlignmentInBytes)); // Fix stack alignment as required by ABI |
304 | 3214 __ mov(c_rarg0, r15_thread); |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
3215 __ movl(c_rarg1, r14); // second arg: exec_mode |
0 | 3216 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3217 // Revert SP alignment after call since we're going to do some SP relative addressing below |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3218 __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset())); |
0 | 3219 |
3220 // Set an oopmap for the call site | |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3221 // Use the same PC we used for the last java frame |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3222 oop_maps->add_gc_map(the_pc - start, |
0 | 3223 new OopMap( frame_size_in_words, 0 )); |
3224 | |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3225 // Clear fp AND pc |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3226 __ reset_last_Java_frame(true, true); |
0 | 3227 |
3228 // Collect return values | |
3229 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes())); | |
304 | 3230 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes())); |
3231 // I think this is useless (throwing pc?) | |
3232 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes())); | |
0 | 3233 |
3234 // Pop self-frame. | |
3235 __ leave(); // Epilog | |
3236 | |
3237 // Jump to interpreter | |
3238 __ ret(0); | |
3239 | |
3240 // Make sure all code is generated | |
3241 masm->flush(); | |
3242 | |
304 | 3243 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); |
3244 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3245 #ifdef GRAAL |
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3246 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset); |
5111
422c979ff392
fixed two cases where DeoptAction was invalid
Christian Haeubl <christian.haeubl@oracle.com>
parents:
5109
diff
changeset
|
3247 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset); |
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3248 #endif |
0 | 3249 } |
3250 | |
3251 #ifdef COMPILER2 | |
3252 //------------------------------generate_uncommon_trap_blob-------------------- | |
3253 void SharedRuntime::generate_uncommon_trap_blob() { | |
3254 // Allocate space for the code | |
3255 ResourceMark rm; | |
3256 // Setup code generation tools | |
3257 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024); | |
3258 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3259 | |
3260 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
3261 | |
3262 address start = __ pc(); | |
3263 | |
3264 // Push self-frame. We get here with a return address on the | |
3265 // stack, so rsp is 8-byte aligned until we allocate our frame. | |
304 | 3266 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog! |
0 | 3267 |
3268 // No callee saved registers. rbp is assumed implicitly saved | |
304 | 3269 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
0 | 3270 |
3271 // compiler left unloaded_class_index in j_rarg0 move to where the | |
3272 // runtime expects it. | |
3273 __ movl(c_rarg1, j_rarg0); | |
3274 | |
3275 __ set_last_Java_frame(noreg, noreg, NULL); | |
3276 | |
3277 // Call C code. Need thread but NOT official VM entry | |
3278 // crud. We cannot block on this call, no GC can happen. Call should | |
3279 // capture callee-saved registers as well as return values. | |
3280 // Thread is in rdi already. | |
3281 // | |
3282 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index); | |
3283 | |
304 | 3284 __ mov(c_rarg0, r15_thread); |
0 | 3285 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
3286 | |
3287 // Set an oopmap for the call site | |
3288 OopMapSet* oop_maps = new OopMapSet(); | |
3289 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0); | |
3290 | |
3291 // location of rbp is known implicitly by the frame sender code | |
3292 | |
3293 oop_maps->add_gc_map(__ pc() - start, map); | |
3294 | |
3295 __ reset_last_Java_frame(false, false); | |
3296 | |
3297 // Load UnrollBlock* into rdi | |
304 | 3298 __ mov(rdi, rax); |
0 | 3299 |
3300 // Pop all the frames we must move/replace. | |
3301 // | |
3302 // Frame picture (youngest to oldest) | |
3303 // 1: self-frame (no frame link) | |
3304 // 2: deopting frame (no frame link) | |
3305 // 3: caller of deopting frame (could be compiled/interpreted). | |
3306 | |
3307 // Pop self-frame. We have no frame, and must rely only on rax and rsp. | |
304 | 3308 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog! |
0 | 3309 |
3310 // Pop deoptimized frame (int) | |
3311 __ movl(rcx, Address(rdi, | |
3312 Deoptimization::UnrollBlock:: | |
3313 size_of_deoptimized_frame_offset_in_bytes())); | |
304 | 3314 __ addptr(rsp, rcx); |
0 | 3315 |
3316 // rsp should be pointing at the return address to the caller (3) | |
3317 | |
3318 // Stack bang to make sure there's enough room for these interpreter frames. | |
3319 if (UseStackBanging) { | |
3320 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
3321 __ bang_stack_size(rbx, rcx); | |
3322 } | |
3323 | |
3324 // Load address of array of frame pcs into rcx (address*) | |
304 | 3325 __ movptr(rcx, |
3326 Address(rdi, | |
3327 Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); | |
0 | 3328 |
3329 // Trash the return pc | |
304 | 3330 __ addptr(rsp, wordSize); |
0 | 3331 |
3332 // Load address of array of frame sizes into rsi (intptr_t*) | |
304 | 3333 __ movptr(rsi, Address(rdi, |
3334 Deoptimization::UnrollBlock:: | |
3335 frame_sizes_offset_in_bytes())); | |
0 | 3336 |
3337 // Counter | |
3338 __ movl(rdx, Address(rdi, | |
3339 Deoptimization::UnrollBlock:: | |
3340 number_of_frames_offset_in_bytes())); // (int) | |
3341 | |
3342 // Pick up the initial fp we should save | |
304 | 3343 __ movptr(rbp, |
3344 Address(rdi, | |
3931
5432047c7db7
7087445: Improve platform independence of JSR292 shared code
bdelsart
parents:
3442
diff
changeset
|
3345 Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
0 | 3346 |
3347 // Now adjust the caller's stack to make up for the extra locals but | |
3348 // record the original sp so that we can save it in the skeletal | |
3349 // interpreter frame and the stack walking of interpreter_sender | |
3350 // will get the unextended sp value and not the "real" sp value. | |
3351 | |
3352 const Register sender_sp = r8; | |
3353 | |
304 | 3354 __ mov(sender_sp, rsp); |
0 | 3355 __ movl(rbx, Address(rdi, |
3356 Deoptimization::UnrollBlock:: | |
3357 caller_adjustment_offset_in_bytes())); // (int) | |
304 | 3358 __ subptr(rsp, rbx); |
0 | 3359 |
3360 // Push interpreter frames in a loop | |
3361 Label loop; | |
3362 __ bind(loop); | |
304 | 3363 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
3364 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand | |
3365 __ pushptr(Address(rcx, 0)); // Save return address | |
3366 __ enter(); // Save old & set new rbp | |
3367 __ subptr(rsp, rbx); // Prolog | |
520
52a431267315
6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents:
304
diff
changeset
|
3368 #ifdef CC_INTERP |
52a431267315
6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents:
304
diff
changeset
|
3369 __ movptr(Address(rbp, |
52a431267315
6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents:
304
diff
changeset
|
3370 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
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3371 sender_sp); // Make it walkable |
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3372 #else // CC_INTERP |
304 | 3373 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), |
3374 sender_sp); // Make it walkable | |
0 | 3375 // This value is corrected by layout_activation_impl |
304 | 3376 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
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3377 #endif // CC_INTERP |
304 | 3378 __ mov(sender_sp, rsp); // Pass sender_sp to next frame |
3379 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
3380 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
3381 __ decrementl(rdx); // Decrement counter | |
0 | 3382 __ jcc(Assembler::notZero, loop); |
304 | 3383 __ pushptr(Address(rcx, 0)); // Save final return address |
0 | 3384 |
3385 // Re-push self-frame | |
3386 __ enter(); // Save old & set new rbp | |
304 | 3387 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt); |
0 | 3388 // Prolog |
3389 | |
3390 // Use rbp because the frames look interpreted now | |
4057
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3391 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
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3392 // Don't need the precise return PC here, just precise enough to point into this code blob. |
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3393 address the_pc = __ pc(); |
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3394 __ set_last_Java_frame(noreg, rbp, the_pc); |
0 | 3395 |
3396 // Call C code. Need thread but NOT official VM entry | |
3397 // crud. We cannot block on this call, no GC can happen. Call should | |
3398 // restore return values to their stack-slots with the new SP. | |
3399 // Thread is in rdi already. | |
3400 // | |
3401 // BasicType unpack_frames(JavaThread* thread, int exec_mode); | |
3402 | |
4057
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3403 __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI |
304 | 3404 __ mov(c_rarg0, r15_thread); |
0 | 3405 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap); |
3406 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
3407 | |
3408 // Set an oopmap for the call site | |
4057
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3409 // Use the same PC we used for the last java frame |
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3410 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
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3411 |
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3412 // Clear fp AND pc |
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3413 __ reset_last_Java_frame(true, true); |
0 | 3414 |
3415 // Pop self-frame. | |
3416 __ leave(); // Epilog | |
3417 | |
3418 // Jump to interpreter | |
3419 __ ret(0); | |
3420 | |
3421 // Make sure all code is generated | |
3422 masm->flush(); | |
3423 | |
3424 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, | |
3425 SimpleRuntimeFrame::framesize >> 1); | |
3426 } | |
3427 #endif // COMPILER2 | |
3428 | |
3429 | |
3430 //------------------------------generate_handler_blob------ | |
3431 // | |
3432 // Generate a special Compile2Runtime blob that saves all registers, | |
3433 // and setup oopmap. | |
3434 // | |
3442
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3435 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, bool cause_return) { |
0 | 3436 assert(StubRoutines::forward_exception_entry() != NULL, |
3437 "must be generated before"); | |
3438 | |
3439 ResourceMark rm; | |
3440 OopMapSet *oop_maps = new OopMapSet(); | |
3441 OopMap* map; | |
3442 | |
3443 // Allocate space for the code. Setup code generation tools. | |
3444 CodeBuffer buffer("handler_blob", 2048, 1024); | |
3445 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3446 | |
3447 address start = __ pc(); | |
3448 address call_pc = NULL; | |
3449 int frame_size_in_words; | |
3450 | |
3451 // Make room for return address (or push it again) | |
3452 if (!cause_return) { | |
304 | 3453 __ push(rbx); |
0 | 3454 } |
3455 | |
3456 // Save registers, fpu state, and flags | |
3457 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3458 | |
3459 // The following is basically a call_VM. However, we need the precise | |
3460 // address of the call in order to generate an oopmap. Hence, we do all the | |
3461 // work outselves. | |
3462 | |
3463 __ set_last_Java_frame(noreg, noreg, NULL); | |
3464 | |
3465 // The return address must always be correct so that frame constructor never | |
3466 // sees an invalid pc. | |
3467 | |
3468 if (!cause_return) { | |
3469 // overwrite the dummy value we pushed on entry | |
304 | 3470 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset())); |
3471 __ movptr(Address(rbp, wordSize), c_rarg0); | |
0 | 3472 } |
3473 | |
3474 // Do the call | |
304 | 3475 __ mov(c_rarg0, r15_thread); |
0 | 3476 __ call(RuntimeAddress(call_ptr)); |
3477 | |
3478 // Set an oopmap for the call site. This oopmap will map all | |
3479 // oop-registers and debug-info registers as callee-saved. This | |
3480 // will allow deoptimization at this safepoint to find all possible | |
3481 // debug-info recordings, as well as let GC find all oops. | |
3482 | |
3483 oop_maps->add_gc_map( __ pc() - start, map); | |
3484 | |
3485 Label noException; | |
3486 | |
3487 __ reset_last_Java_frame(false, false); | |
3488 | |
304 | 3489 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 3490 __ jcc(Assembler::equal, noException); |
3491 | |
3492 // Exception pending | |
3493 | |
3494 RegisterSaver::restore_live_registers(masm); | |
3495 | |
3496 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
3497 | |
3498 // No exception case | |
3499 __ bind(noException); | |
3500 | |
3501 // Normal exit, restore registers and exit. | |
3502 RegisterSaver::restore_live_registers(masm); | |
3503 | |
3504 __ ret(0); | |
3505 | |
3506 // Make sure all code is generated | |
3507 masm->flush(); | |
3508 | |
3509 // Fill-out other meta info | |
3510 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); | |
3511 } | |
3512 | |
3513 // | |
3514 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
3515 // | |
3516 // Generate a stub that calls into vm to find out the proper destination | |
3517 // of a java call. All the argument registers are live at this point | |
3518 // but since this is generic code we don't know what they are and the caller | |
3519 // must do any gc of the args. | |
3520 // | |
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3521 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
0 | 3522 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
3523 | |
3524 // allocate space for the code | |
3525 ResourceMark rm; | |
3526 | |
3527 CodeBuffer buffer(name, 1000, 512); | |
3528 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3529 | |
3530 int frame_size_in_words; | |
3531 | |
3532 OopMapSet *oop_maps = new OopMapSet(); | |
3533 OopMap* map = NULL; | |
3534 | |
3535 int start = __ offset(); | |
3536 | |
3537 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3538 | |
3539 int frame_complete = __ offset(); | |
3540 | |
3541 __ set_last_Java_frame(noreg, noreg, NULL); | |
3542 | |
304 | 3543 __ mov(c_rarg0, r15_thread); |
0 | 3544 |
3545 __ call(RuntimeAddress(destination)); | |
3546 | |
3547 | |
3548 // Set an oopmap for the call site. | |
3549 // We need this not only for callee-saved registers, but also for volatile | |
3550 // registers that the compiler might be keeping live across a safepoint. | |
3551 | |
3552 oop_maps->add_gc_map( __ offset() - start, map); | |
3553 | |
3554 // rax contains the address we are going to jump to assuming no exception got installed | |
3555 | |
3556 // clear last_Java_sp | |
3557 __ reset_last_Java_frame(false, false); | |
3558 // check for pending exceptions | |
3559 Label pending; | |
304 | 3560 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 3561 __ jcc(Assembler::notEqual, pending); |
3562 | |
3563 // get the returned methodOop | |
304 | 3564 __ movptr(rbx, Address(r15_thread, JavaThread::vm_result_offset())); |
3565 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx); | |
3566 | |
3567 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
0 | 3568 |
3569 RegisterSaver::restore_live_registers(masm); | |
3570 | |
3571 // We are back the the original state on entry and ready to go. | |
3572 | |
3573 __ jmp(rax); | |
3574 | |
3575 // Pending exception after the safepoint | |
3576 | |
3577 __ bind(pending); | |
3578 | |
3579 RegisterSaver::restore_live_registers(masm); | |
3580 | |
3581 // exception pending => remove activation and forward to exception handler | |
3582 | |
3583 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD); | |
3584 | |
304 | 3585 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); |
0 | 3586 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
3587 | |
3588 // ------------- | |
3589 // make sure all code is generated | |
3590 masm->flush(); | |
3591 | |
3592 // return the blob | |
3593 // frame_size_words or bytes?? | |
3594 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true); | |
3595 } | |
3596 | |
3597 | |
3598 #ifdef COMPILER2 | |
3599 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame | |
3600 // | |
3601 //------------------------------generate_exception_blob--------------------------- | |
3602 // creates exception blob at the end | |
3603 // Using exception blob, this code is jumped from a compiled method. | |
3604 // (see emit_exception_handler in x86_64.ad file) | |
3605 // | |
3606 // Given an exception pc at a call we call into the runtime for the | |
3607 // handler in this method. This handler might merely restore state | |
3608 // (i.e. callee save registers) unwind the frame and jump to the | |
3609 // exception handler for the nmethod if there is no Java level handler | |
3610 // for the nmethod. | |
3611 // | |
3612 // This code is entered with a jmp. | |
3613 // | |
3614 // Arguments: | |
3615 // rax: exception oop | |
3616 // rdx: exception pc | |
3617 // | |
3618 // Results: | |
3619 // rax: exception oop | |
3620 // rdx: exception pc in caller or ??? | |
3621 // destination: exception handler of caller | |
3622 // | |
3623 // Note: the exception pc MUST be at a call (precise debug information) | |
3624 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved. | |
3625 // | |
3626 | |
3627 void OptoRuntime::generate_exception_blob() { | |
3628 assert(!OptoRuntime::is_callee_saved_register(RDX_num), ""); | |
3629 assert(!OptoRuntime::is_callee_saved_register(RAX_num), ""); | |
3630 assert(!OptoRuntime::is_callee_saved_register(RCX_num), ""); | |
3631 | |
3632 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
3633 | |
3634 // Allocate space for the code | |
3635 ResourceMark rm; | |
3636 // Setup code generation tools | |
3637 CodeBuffer buffer("exception_blob", 2048, 1024); | |
3638 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3639 | |
3640 | |
3641 address start = __ pc(); | |
3642 | |
3643 // Exception pc is 'return address' for stack walker | |
304 | 3644 __ push(rdx); |
3645 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog | |
0 | 3646 |
3647 // Save callee-saved registers. See x86_64.ad. | |
3648 | |
3649 // rbp is an implicitly saved callee saved register (i.e. the calling | |
3650 // convention will save restore it in prolog/epilog) Other than that | |
3651 // there are no callee save registers now that adapter frames are gone. | |
3652 | |
304 | 3653 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
0 | 3654 |
3655 // Store exception in Thread object. We cannot pass any arguments to the | |
3656 // handle_exception call, since we do not want to make any assumption | |
3657 // about the size of the frame where the exception happened in. | |
3658 // c_rarg0 is either rdi (Linux) or rcx (Windows). | |
304 | 3659 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax); |
3660 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
0 | 3661 |
3662 // This call does all the hard work. It checks if an exception handler | |
3663 // exists in the method. | |
3664 // If so, it returns the handler address. | |
3665 // If not, it prepares for stack-unwinding, restoring the callee-save | |
3666 // registers of the frame being removed. | |
3667 // | |
3668 // address OptoRuntime::handle_exception_C(JavaThread* thread) | |
3669 | |
3670 __ set_last_Java_frame(noreg, noreg, NULL); | |
304 | 3671 __ mov(c_rarg0, r15_thread); |
0 | 3672 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C))); |
3673 | |
3674 // Set an oopmap for the call site. This oopmap will only be used if we | |
3675 // are unwinding the stack. Hence, all locations will be dead. | |
3676 // Callee-saved registers will be the same as the frame above (i.e., | |
3677 // handle_exception_stub), since they were restored when we got the | |
3678 // exception. | |
3679 | |
3680 OopMapSet* oop_maps = new OopMapSet(); | |
3681 | |
3682 oop_maps->add_gc_map( __ pc()-start, new OopMap(SimpleRuntimeFrame::framesize, 0)); | |
3683 | |
3684 __ reset_last_Java_frame(false, false); | |
3685 | |
3686 // Restore callee-saved registers | |
3687 | |
3688 // rbp is an implicitly saved callee saved register (i.e. the calling | |
3689 // convention will save restore it in prolog/epilog) Other than that | |
3690 // there are no callee save registers no that adapter frames are gone. | |
3691 | |
304 | 3692 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt)); |
3693 | |
3694 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog | |
3695 __ pop(rdx); // No need for exception pc anymore | |
0 | 3696 |
3697 // rax: exception handler | |
3698 | |
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3699 // Restore SP from BP if the exception PC is a MethodHandle call site. |
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3700 __ cmpl(Address(r15_thread, JavaThread::is_method_handle_return_offset()), 0); |
1567 | 3701 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
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3702 |
0 | 3703 // We have a handler in rax (could be deopt blob). |
304 | 3704 __ mov(r8, rax); |
0 | 3705 |
3706 // Get the exception oop | |
304 | 3707 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); |
0 | 3708 // Get the exception pc in case we are deoptimized |
304 | 3709 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); |
0 | 3710 #ifdef ASSERT |
3711 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD); | |
3712 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD); | |
3713 #endif | |
3714 // Clear the exception oop so GC no longer processes it as a root. | |
3715 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD); | |
3716 | |
3717 // rax: exception oop | |
3718 // r8: exception handler | |
3719 // rdx: exception pc | |
3720 // Jump to handler | |
3721 | |
3722 __ jmp(r8); | |
3723 | |
3724 // Make sure all code is generated | |
3725 masm->flush(); | |
3726 | |
3727 // Set exception blob | |
3728 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1); | |
3729 } | |
3730 #endif // COMPILER2 |