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1 /*
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2 * Copyright 2000-2006 Sun Microsystems, Inc. All Rights Reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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20 * CA 95054 USA or visit www.sun.com if you need additional information or
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21 * have any questions.
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22 *
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23 */
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24
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25 class Compilation;
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26 class ScopeValue;
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342
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27 class BarrierSet;
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28
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29 class LIR_Assembler: public CompilationResourceObj {
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30 private:
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31 C1_MacroAssembler* _masm;
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32 CodeStubList* _slow_case_stubs;
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342
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33 BarrierSet* _bs;
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34
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35 Compilation* _compilation;
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36 FrameMap* _frame_map;
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37 BlockBegin* _current_block;
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38
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39 Instruction* _pending_non_safepoint;
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40 int _pending_non_safepoint_offset;
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41
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42 #ifdef ASSERT
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43 BlockList _branch_target_blocks;
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44 void check_no_unbound_labels();
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45 #endif
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46
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47 FrameMap* frame_map() const { return _frame_map; }
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48
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49 void set_current_block(BlockBegin* b) { _current_block = b; }
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50 BlockBegin* current_block() const { return _current_block; }
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51
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52 // non-safepoint debug info management
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53 void flush_debug_info(int before_pc_offset) {
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54 if (_pending_non_safepoint != NULL) {
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55 if (_pending_non_safepoint_offset < before_pc_offset)
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56 record_non_safepoint_debug_info();
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57 _pending_non_safepoint = NULL;
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58 }
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59 }
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60 void process_debug_info(LIR_Op* op);
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61 void record_non_safepoint_debug_info();
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62
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63 // unified bailout support
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64 void bailout(const char* msg) const { compilation()->bailout(msg); }
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65 bool bailed_out() const { return compilation()->bailed_out(); }
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66
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67 // code emission patterns and accessors
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68 void check_codespace();
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69 bool needs_icache(ciMethod* method) const;
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70
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71 // returns offset of icache check
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72 int check_icache();
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73
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74 void jobject2reg(jobject o, Register reg);
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75 void jobject2reg_with_patching(Register reg, CodeEmitInfo* info);
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76
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77 void emit_stubs(CodeStubList* stub_list);
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78
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79 // addresses
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80 Address as_Address(LIR_Address* addr);
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81 Address as_Address_lo(LIR_Address* addr);
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82 Address as_Address_hi(LIR_Address* addr);
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83
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84 // debug information
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85 void add_call_info(int pc_offset, CodeEmitInfo* cinfo);
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86 void add_debug_info_for_branch(CodeEmitInfo* info);
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87 void add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo);
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88 void add_debug_info_for_div0_here(CodeEmitInfo* info);
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89 void add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo);
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90 void add_debug_info_for_null_check_here(CodeEmitInfo* info);
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91
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92 void set_24bit_FPU();
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93 void reset_FPU();
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94 void fpop();
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95 void fxch(int i);
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96 void fld(int i);
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97 void ffree(int i);
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98
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99 void breakpoint();
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100 void push(LIR_Opr opr);
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101 void pop(LIR_Opr opr);
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102
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103 // patching
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104 void append_patching_stub(PatchingStub* stub);
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105 void patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info);
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106
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107 void comp_op(LIR_Condition condition, LIR_Opr src, LIR_Opr result, LIR_Op2* op);
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108
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109 public:
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110 LIR_Assembler(Compilation* c);
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111 ~LIR_Assembler();
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112 C1_MacroAssembler* masm() const { return _masm; }
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113 Compilation* compilation() const { return _compilation; }
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114 ciMethod* method() const { return compilation()->method(); }
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115
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116 CodeOffsets* offsets() const { return _compilation->offsets(); }
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117 int code_offset() const;
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118 address pc() const;
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119
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120 int initial_frame_size_in_bytes();
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121
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122 // test for constants which can be encoded directly in instructions
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123 static bool is_small_constant(LIR_Opr opr);
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124
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125 static LIR_Opr receiverOpr();
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126 static LIR_Opr incomingReceiverOpr();
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127 static LIR_Opr osrBufferPointer();
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128
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129 // stubs
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130 void emit_slow_case_stubs();
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131 void emit_static_call_stub();
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132 void emit_code_stub(CodeStub* op);
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133 void add_call_info_here(CodeEmitInfo* info) { add_call_info(code_offset(), info); }
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134
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135 // code patterns
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136 void emit_exception_handler();
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137 void emit_exception_entries(ExceptionInfoList* info_list);
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138 void emit_deopt_handler();
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139
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140 void emit_code(BlockList* hir);
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141 void emit_block(BlockBegin* block);
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142 void emit_lir_list(LIR_List* list);
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143
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144 // any last minute peephole optimizations are performed here. In
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145 // particular sparc uses this for delay slot filling.
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146 void peephole(LIR_List* list);
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147
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148 void emit_string_compare(LIR_Opr left, LIR_Opr right, LIR_Opr dst, CodeEmitInfo* info);
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149
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150 void return_op(LIR_Opr result);
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151
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152 // returns offset of poll instruction
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153 int safepoint_poll(LIR_Opr result, CodeEmitInfo* info);
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154
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155 void const2reg (LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code, CodeEmitInfo* info);
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156 void const2stack(LIR_Opr src, LIR_Opr dest);
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157 void const2mem (LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmitInfo* info);
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158 void reg2stack (LIR_Opr src, LIR_Opr dest, BasicType type, bool pop_fpu_stack);
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159 void reg2reg (LIR_Opr src, LIR_Opr dest);
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160 void reg2mem (LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned);
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161 void stack2reg (LIR_Opr src, LIR_Opr dest, BasicType type);
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162 void stack2stack(LIR_Opr src, LIR_Opr dest, BasicType type);
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163 void mem2reg (LIR_Opr src, LIR_Opr dest, BasicType type,
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164 LIR_PatchCode patch_code = lir_patch_none,
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165 CodeEmitInfo* info = NULL, bool unaligned = false);
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166
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167 void prefetchr (LIR_Opr src);
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168 void prefetchw (LIR_Opr src);
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169
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170 void shift_op(LIR_Code code, LIR_Opr left, LIR_Opr count, LIR_Opr dest, LIR_Opr tmp);
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171 void shift_op(LIR_Code code, LIR_Opr left, jint count, LIR_Opr dest);
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172
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173 void move_regs(Register from_reg, Register to_reg);
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174 void swap_reg(Register a, Register b);
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175
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176 void emit_op0(LIR_Op0* op);
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177 void emit_op1(LIR_Op1* op);
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178 void emit_op2(LIR_Op2* op);
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179 void emit_op3(LIR_Op3* op);
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180 void emit_opBranch(LIR_OpBranch* op);
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181 void emit_opLabel(LIR_OpLabel* op);
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182 void emit_arraycopy(LIR_OpArrayCopy* op);
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183 void emit_opConvert(LIR_OpConvert* op);
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184 void emit_alloc_obj(LIR_OpAllocObj* op);
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185 void emit_alloc_array(LIR_OpAllocArray* op);
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186 void emit_opTypeCheck(LIR_OpTypeCheck* op);
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187 void emit_compare_and_swap(LIR_OpCompareAndSwap* op);
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188 void emit_lock(LIR_OpLock* op);
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189 void emit_call(LIR_OpJavaCall* op);
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190 void emit_rtcall(LIR_OpRTCall* op);
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191 void emit_profile_call(LIR_OpProfileCall* op);
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192 void emit_delay(LIR_OpDelay* op);
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193
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194 void arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack);
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195 void arithmetic_idiv(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr temp, LIR_Opr result, CodeEmitInfo* info);
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196 void intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr unused, LIR_Opr dest, LIR_Op* op);
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197
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198 void logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest);
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199
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200 void roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack);
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201 void move_op(LIR_Opr src, LIR_Opr result, BasicType type,
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202 LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned);
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203 void volatile_move_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info);
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204 void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); // info set for null exceptions
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205 void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op);
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206 void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result);
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207
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208 void ic_call(address destination, CodeEmitInfo* info);
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209 void vtable_call(int vtable_offset, CodeEmitInfo* info);
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210 void call(address entry, relocInfo::relocType rtype, CodeEmitInfo* info);
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211
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212 void osr_entry();
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213
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214 void build_frame();
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215
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216 void throw_op(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info, bool unwind);
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217 void monitor_address(int monitor_ix, LIR_Opr dst);
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218
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219 void align_backward_branch_target();
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220 void align_call(LIR_Code code);
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221
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222 void negate(LIR_Opr left, LIR_Opr dest);
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223 void leal(LIR_Opr left, LIR_Opr dest);
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224
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225 void rt_call(LIR_Opr result, address dest, const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info);
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226
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227 void membar();
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228 void membar_acquire();
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229 void membar_release();
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230 void get_thread(LIR_Opr result);
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231
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232 void verify_oop_map(CodeEmitInfo* info);
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233
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234 #include "incls/_c1_LIRAssembler_pd.hpp.incl"
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235 };
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