Mercurial > hg > truffle
annotate graal/com.oracle.graal.api.code/src/com/oracle/graal/api/code/Architecture.java @ 7496:57e651659b4d
Fix for lock elimination phase.
author | Thomas Wuerthinger <thomas.wuerthinger@oracle.com> |
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date | Thu, 17 Jan 2013 00:41:44 +0100 |
parents | cc32ce37eddc |
children | 5e3d1a68664e |
rev | line source |
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1 /* |
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2 * Copyright (c) 2009, 2011, Oracle and/or its affiliates. All rights reserved. |
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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4 * |
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5 * This code is free software; you can redistribute it and/or modify it |
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6 * under the terms of the GNU General Public License version 2 only, as |
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7 * published by the Free Software Foundation. |
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8 * |
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9 * This code is distributed in the hope that it will be useful, but WITHOUT |
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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12 * version 2 for more details (a copy is included in the LICENSE file that |
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13 * accompanied this code). |
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14 * |
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15 * You should have received a copy of the GNU General Public License version |
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16 * 2 along with this work; if not, write to the Free Software Foundation, |
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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18 * |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
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22 */ |
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23 package com.oracle.graal.api.code; |
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24 |
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25 import java.util.*; |
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26 |
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27 import com.oracle.graal.api.code.Register.*; |
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28 |
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29 |
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30 /** |
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31 * Represents a CPU architecture, including information such as its endianness, CPU |
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32 * registers, word width, etc. |
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33 */ |
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34 public abstract class Architecture { |
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35 |
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36 /** |
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37 * The endianness of the architecture. |
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38 */ |
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39 public static enum ByteOrder { |
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40 LittleEndian, |
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41 BigEndian |
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42 } |
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43 |
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44 /** |
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45 * The number of bits required in a bit map covering all the registers that may store references. |
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46 * The bit position of a register in the map is the register's {@linkplain Register#number number}. |
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47 */ |
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48 private final int registerReferenceMapBitCount; |
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49 |
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50 /** |
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51 * Represents the natural size of words (typically registers and pointers) of this architecture, in bytes. |
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52 */ |
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53 private final int wordSize; |
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54 |
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55 /** |
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56 * The name of this architecture (e.g. "AMD64", "SPARCv9"). |
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57 */ |
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58 private final String name; |
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59 |
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60 /** |
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61 * Array of all available registers on this architecture. The index of each register in this |
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62 * array is equal to its {@linkplain Register#number number}. |
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63 */ |
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64 private final Register[] registers; |
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65 |
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66 /** |
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67 * The byte ordering can be either little or big endian. |
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68 */ |
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69 private final ByteOrder byteOrder; |
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70 |
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71 /** |
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72 * Mask of the barrier constants denoting the barriers that |
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73 * are not required to be explicitly inserted under this architecture. |
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74 */ |
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75 private final int implicitMemoryBarriers; |
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76 |
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77 /** |
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78 * Offset in bytes from the beginning of a call instruction to the displacement. |
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79 */ |
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80 private final int machineCodeCallDisplacementOffset; |
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81 |
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82 /** |
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83 * The size of the return address pushed to the stack by a call instruction. |
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84 * A value of 0 denotes that call linkage uses registers instead (e.g. SPARC). |
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85 */ |
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86 private final int returnAddressSize; |
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87 |
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88 private final EnumMap<RegisterFlag, Register[]> registersByTypeAndEncoding; |
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89 |
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90 /** |
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91 * Gets the register for a given {@linkplain Register#encoding encoding} and type. |
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92 * |
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93 * @param encoding a register value as used in a machine instruction |
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94 * @param type the type of the register |
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95 */ |
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96 public Register registerFor(int encoding, RegisterFlag type) { |
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97 Register[] regs = registersByTypeAndEncoding.get(type); |
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98 assert encoding >= 0 && encoding < regs.length; |
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99 Register reg = regs[encoding]; |
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100 assert reg != null; |
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101 return reg; |
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102 } |
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103 |
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104 protected Architecture(String name, |
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105 int wordSize, |
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106 ByteOrder byteOrder, |
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107 Register[] registers, |
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108 int implicitMemoryBarriers, |
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109 int nativeCallDisplacementOffset, |
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110 int registerReferenceMapBitCount, |
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111 int returnAddressSize) { |
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112 this.name = name; |
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113 this.registers = registers; |
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114 this.wordSize = wordSize; |
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115 this.byteOrder = byteOrder; |
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116 this.implicitMemoryBarriers = implicitMemoryBarriers; |
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117 this.machineCodeCallDisplacementOffset = nativeCallDisplacementOffset; |
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118 this.registerReferenceMapBitCount = registerReferenceMapBitCount; |
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119 this.returnAddressSize = returnAddressSize; |
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120 |
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121 registersByTypeAndEncoding = new EnumMap<>(RegisterFlag.class); |
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122 EnumMap<RegisterFlag, Register[]> categorizedRegs = Register.categorize(registers); |
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123 for (RegisterFlag type : RegisterFlag.values()) { |
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124 Register[] regs = categorizedRegs.get(type); |
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125 int max = Register.maxRegisterEncoding(regs); |
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126 Register[] regsByEnc = new Register[max + 1]; |
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127 for (Register reg : regs) { |
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128 regsByEnc[reg.encoding] = reg; |
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129 } |
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130 registersByTypeAndEncoding.put(type, regsByEnc); |
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131 } |
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132 } |
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133 |
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134 /** |
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135 * Converts this architecture to a string. |
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136 * @return the string representation of this architecture |
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137 */ |
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138 @Override |
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139 public final String toString() { |
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140 return getName().toLowerCase(); |
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141 } |
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142 |
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143 public int getRegisterReferenceMapBitCount() { |
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144 return registerReferenceMapBitCount; |
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145 } |
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146 |
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147 /** |
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148 * Gets the natural size of words (typically registers and pointers) of this architecture, in bytes. |
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149 */ |
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150 public int getWordSize() { |
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151 return wordSize; |
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152 } |
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153 |
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154 /** |
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155 * Gets the name of this architecture. |
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156 */ |
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157 public String getName() { |
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158 return name; |
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159 } |
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160 |
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161 /** |
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162 * Gets an array of all available registers on this architecture. The index of each register in this |
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163 * array is equal to its {@linkplain Register#number number}. |
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164 */ |
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165 public Register[] getRegisters() { |
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166 return registers.clone(); |
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167 } |
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168 |
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169 public ByteOrder getByteOrder() { |
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170 return byteOrder; |
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171 } |
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172 |
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173 /** |
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174 * Gets a mask of the barrier constants denoting the barriers that |
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175 * are not required to be explicitly inserted under this architecture. |
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176 */ |
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177 public int getImplicitMemoryBarriers() { |
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178 return implicitMemoryBarriers; |
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179 } |
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180 |
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181 /** |
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182 * Gets the size of the return address pushed to the stack by a call instruction. |
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183 * A value of 0 denotes that call linkage uses registers instead. |
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184 */ |
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185 public int getReturnAddressSize() { |
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186 return returnAddressSize; |
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187 } |
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188 |
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189 /** |
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190 * Gets the offset in bytes from the beginning of a call instruction to the displacement. |
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191 */ |
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192 public int getMachineCodeCallDisplacementOffset() { |
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193 return machineCodeCallDisplacementOffset; |
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194 } |
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195 |
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196 /** |
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197 * Determines the barriers in a given barrier mask that are explicitly required on this architecture. |
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198 * |
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199 * @param barriers a mask of the barrier constants |
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200 * @return the value of {@code barriers} minus the barriers unnecessary on this architecture |
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201 */ |
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202 public final int requiredBarriers(int barriers) { |
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203 return barriers & ~implicitMemoryBarriers; |
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204 } |
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205 } |