Mercurial > hg > truffle
annotate src/cpu/x86/vm/c1_FpuStackSim_x86.hpp @ 12962:5ccbab1c69f3
8026251: New type profiling points: parameters to methods
Summary: x86 interpreter and c1 type profiling for parameters on method entries
Reviewed-by: kvn, twisti
| author | roland |
|---|---|
| date | Tue, 22 Oct 2013 09:51:47 +0200 |
| parents | f95d63e2154a |
| children |
| rev | line source |
|---|---|
| 0 | 1 /* |
| 1972 | 2 * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #ifndef CPU_X86_VM_C1_FPUSTACKSIM_X86_HPP |
| 26 #define CPU_X86_VM_C1_FPUSTACKSIM_X86_HPP | |
| 27 | |
| 0 | 28 // Simulates the FPU stack and maintains mapping [fpu-register -> stack offset] |
| 29 // FPU registers are described as numbers from 0..nof_fpu_regs-1 | |
| 30 | |
| 31 class Compilation; | |
| 32 | |
| 33 class FpuStackSim VALUE_OBJ_CLASS_SPEC { | |
| 34 private: | |
| 35 Compilation* _compilation; | |
| 36 int _stack_size; | |
| 37 int _regs[FrameMap::nof_fpu_regs]; | |
| 38 | |
| 39 int tos_index() const { return _stack_size - 1; } | |
| 40 | |
| 41 int regs_at(int i) const; | |
| 42 void set_regs_at(int i, int val); | |
| 43 void dec_stack_size(); | |
| 44 void inc_stack_size(); | |
| 45 | |
| 46 // unified bailout support | |
| 47 Compilation* compilation() const { return _compilation; } | |
| 48 void bailout(const char* msg) const { compilation()->bailout(msg); } | |
| 49 bool bailed_out() const { return compilation()->bailed_out(); } | |
| 50 | |
| 51 public: | |
| 52 FpuStackSim(Compilation* compilation); | |
| 53 void pop (); | |
| 54 void pop (int rnr); // rnr must be on tos | |
| 55 void push(int rnr); | |
| 56 void swap(int offset); // exchange tos with tos + offset | |
| 57 int offset_from_tos(int rnr) const; // return the offset of the topmost instance of rnr from TOS | |
| 58 int get_slot(int tos_offset) const; // return the entry at the given offset from TOS | |
| 59 void set_slot(int tos_offset, int rnr); // set the entry at the given offset from TOS | |
| 60 void rename(int old_rnr, int new_rnr); // rename all instances of old_rnr to new_rnr | |
| 61 bool contains(int rnr); // debugging support only | |
| 62 bool is_empty(); | |
| 63 bool slot_is_empty(int tos_offset); | |
| 64 int stack_size() const { return _stack_size; } | |
| 65 void clear(); | |
| 66 intArray* write_state(); | |
| 67 void read_state(intArray* fpu_stack_state); | |
| 68 | |
| 69 void print() PRODUCT_RETURN; | |
| 70 }; | |
| 1972 | 71 |
| 72 #endif // CPU_X86_VM_C1_FPUSTACKSIM_X86_HPP |