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1 /*
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2 * Copyright 2000-2007 Sun Microsystems, Inc. All Rights Reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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20 * CA 95054 USA or visit www.sun.com if you need additional information or
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21 * have any questions.
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22 *
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23 */
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24
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25 class VMRegImpl;
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26 typedef VMRegImpl* VMReg;
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27
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28 // Use Register as shortcut
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29 class RegisterImpl;
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30 typedef RegisterImpl* Register;
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31
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32
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33 // The implementation of integer registers for the ia32 architecture
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34 inline Register as_Register(int encoding) {
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35 return (Register)(intptr_t) encoding;
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36 }
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37
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38 class RegisterImpl: public AbstractRegisterImpl {
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39 public:
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40 enum {
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41 #ifndef AMD64
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42 number_of_registers = 8,
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43 number_of_byte_registers = 4
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44 #else
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45 number_of_registers = 16,
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46 number_of_byte_registers = 16
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47 #endif // AMD64
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48 };
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49
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50 // derived registers, offsets, and addresses
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51 Register successor() const { return as_Register(encoding() + 1); }
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52
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53 // construction
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54 inline friend Register as_Register(int encoding);
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55
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56 VMReg as_VMReg();
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57
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58 // accessors
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59 int encoding() const { assert(is_valid(), "invalid register"); return (intptr_t)this; }
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60 bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; }
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61 bool has_byte_register() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_byte_registers; }
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62 const char* name() const;
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63 };
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64
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65 // The integer registers of the ia32/amd64 architecture
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66
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67 CONSTANT_REGISTER_DECLARATION(Register, noreg, (-1));
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68
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69
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70 CONSTANT_REGISTER_DECLARATION(Register, rax, (0));
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71 CONSTANT_REGISTER_DECLARATION(Register, rcx, (1));
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72 CONSTANT_REGISTER_DECLARATION(Register, rdx, (2));
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73 CONSTANT_REGISTER_DECLARATION(Register, rbx, (3));
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74 CONSTANT_REGISTER_DECLARATION(Register, rsp, (4));
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75 CONSTANT_REGISTER_DECLARATION(Register, rbp, (5));
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76 CONSTANT_REGISTER_DECLARATION(Register, rsi, (6));
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77 CONSTANT_REGISTER_DECLARATION(Register, rdi, (7));
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78 #ifdef AMD64
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79 CONSTANT_REGISTER_DECLARATION(Register, r8, (8));
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80 CONSTANT_REGISTER_DECLARATION(Register, r9, (9));
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81 CONSTANT_REGISTER_DECLARATION(Register, r10, (10));
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82 CONSTANT_REGISTER_DECLARATION(Register, r11, (11));
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83 CONSTANT_REGISTER_DECLARATION(Register, r12, (12));
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84 CONSTANT_REGISTER_DECLARATION(Register, r13, (13));
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85 CONSTANT_REGISTER_DECLARATION(Register, r14, (14));
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86 CONSTANT_REGISTER_DECLARATION(Register, r15, (15));
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87 #endif // AMD64
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88
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89 // Use FloatRegister as shortcut
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90 class FloatRegisterImpl;
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91 typedef FloatRegisterImpl* FloatRegister;
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92
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93 inline FloatRegister as_FloatRegister(int encoding) {
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94 return (FloatRegister)(intptr_t) encoding;
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95 }
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96
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97 // The implementation of floating point registers for the ia32 architecture
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98 class FloatRegisterImpl: public AbstractRegisterImpl {
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99 public:
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100 enum {
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101 number_of_registers = 8
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102 };
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103
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104 // construction
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105 inline friend FloatRegister as_FloatRegister(int encoding);
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106
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107 VMReg as_VMReg();
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108
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109 // derived registers, offsets, and addresses
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110 FloatRegister successor() const { return as_FloatRegister(encoding() + 1); }
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111
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112 // accessors
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113 int encoding() const { assert(is_valid(), "invalid register"); return (intptr_t)this; }
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114 bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; }
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115 const char* name() const;
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116
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117 };
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118
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119 // Use XMMRegister as shortcut
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120 class XMMRegisterImpl;
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121 typedef XMMRegisterImpl* XMMRegister;
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122
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123 // Use MMXRegister as shortcut
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124 class MMXRegisterImpl;
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125 typedef MMXRegisterImpl* MMXRegister;
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126
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127 inline XMMRegister as_XMMRegister(int encoding) {
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128 return (XMMRegister)(intptr_t)encoding;
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129 }
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130
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131 inline MMXRegister as_MMXRegister(int encoding) {
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132 return (MMXRegister)(intptr_t)encoding;
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133 }
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134
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135 // The implementation of XMM registers for the IA32 architecture
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136 class XMMRegisterImpl: public AbstractRegisterImpl {
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137 public:
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138 enum {
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139 #ifndef AMD64
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140 number_of_registers = 8
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141 #else
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142 number_of_registers = 16
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143 #endif // AMD64
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144 };
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145
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146 // construction
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147 friend XMMRegister as_XMMRegister(int encoding);
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148
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149 VMReg as_VMReg();
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150
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151 // derived registers, offsets, and addresses
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152 XMMRegister successor() const { return as_XMMRegister(encoding() + 1); }
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153
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154 // accessors
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155 int encoding() const { assert(is_valid(), "invalid register"); return (intptr_t)this; }
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156 bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; }
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157 const char* name() const;
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158 };
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159
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160
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161 // The XMM registers, for P3 and up chips
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162 CONSTANT_REGISTER_DECLARATION(XMMRegister, xnoreg , (-1));
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163 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm0 , ( 0));
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164 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm1 , ( 1));
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165 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm2 , ( 2));
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166 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm3 , ( 3));
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167 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm4 , ( 4));
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168 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm5 , ( 5));
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169 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm6 , ( 6));
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170 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm7 , ( 7));
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171 #ifdef AMD64
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172 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm8, (8));
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173 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm9, (9));
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174 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm10, (10));
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175 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm11, (11));
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176 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm12, (12));
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177 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm13, (13));
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178 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm14, (14));
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179 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm15, (15));
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180 #endif // AMD64
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181
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182 // Only used by the 32bit stubGenerator. These can't be described by vmreg and hence
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183 // can't be described in oopMaps and therefore can't be used by the compilers (at least
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184 // were deopt might wan't to see them).
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185
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186 // The MMX registers, for P3 and up chips
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187 CONSTANT_REGISTER_DECLARATION(MMXRegister, mnoreg , (-1));
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188 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx0 , ( 0));
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189 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx1 , ( 1));
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190 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx2 , ( 2));
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191 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx3 , ( 3));
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192 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx4 , ( 4));
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193 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx5 , ( 5));
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194 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx6 , ( 6));
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195 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx7 , ( 7));
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196
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197
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198 // Need to know the total number of registers of all sorts for SharedInfo.
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199 // Define a class that exports it.
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200 class ConcreteRegisterImpl : public AbstractRegisterImpl {
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201 public:
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202 enum {
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203 // A big enough number for C2: all the registers plus flags
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204 // This number must be large enough to cover REG_COUNT (defined by c2) registers.
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205 // There is no requirement that any ordering here matches any ordering c2 gives
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206 // it's optoregs.
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207
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208 number_of_registers = RegisterImpl::number_of_registers +
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209 #ifdef AMD64
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210 RegisterImpl::number_of_registers + // "H" half of a 64bit register
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211 #endif // AMD64
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212 2 * FloatRegisterImpl::number_of_registers +
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213 2 * XMMRegisterImpl::number_of_registers +
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214 1 // eflags
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215 };
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216
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217 static const int max_gpr;
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218 static const int max_fpr;
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219 static const int max_xmm;
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220
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221 };
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