annotate src/cpu/x86/vm/stubGenerator_x86_32.cpp @ 2007:5ddfcf4b079e

7003554: (tiered) assert(is_null_object() || handle() != NULL) failed: cannot embed null pointer Summary: C1 with profiling doesn't check whether the MDO has been really allocated, which can silently fail if the perm gen is full. The solution is to check if the allocation failed and bailout out of inlining or compilation. Reviewed-by: kvn, never
author iveresov
date Thu, 02 Dec 2010 17:21:12 -0800
parents f95d63e2154a
children 638119ce7cfd
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1 /*
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2 * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #include "precompiled.hpp"
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26 #include "asm/assembler.hpp"
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27 #include "assembler_x86.inline.hpp"
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28 #include "interpreter/interpreter.hpp"
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29 #include "nativeInst_x86.hpp"
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30 #include "oops/instanceOop.hpp"
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31 #include "oops/methodOop.hpp"
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32 #include "oops/objArrayKlass.hpp"
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33 #include "oops/oop.inline.hpp"
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34 #include "prims/methodHandles.hpp"
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35 #include "runtime/frame.inline.hpp"
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36 #include "runtime/handles.inline.hpp"
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37 #include "runtime/sharedRuntime.hpp"
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38 #include "runtime/stubCodeGenerator.hpp"
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39 #include "runtime/stubRoutines.hpp"
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40 #include "utilities/top.hpp"
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41 #ifdef TARGET_OS_FAMILY_linux
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42 # include "thread_linux.inline.hpp"
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43 #endif
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44 #ifdef TARGET_OS_FAMILY_solaris
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45 # include "thread_solaris.inline.hpp"
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46 #endif
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47 #ifdef TARGET_OS_FAMILY_windows
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48 # include "thread_windows.inline.hpp"
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49 #endif
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50 #ifdef COMPILER2
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51 #include "opto/runtime.hpp"
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52 #endif
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53
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54 // Declaration and definition of StubGenerator (no .hpp file).
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55 // For a more detailed description of the stub routine structure
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56 // see the comment in stubRoutines.hpp
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57
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58 #define __ _masm->
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59 #define a__ ((Assembler*)_masm)->
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60
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61 #ifdef PRODUCT
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62 #define BLOCK_COMMENT(str) /* nothing */
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63 #else
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64 #define BLOCK_COMMENT(str) __ block_comment(str)
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65 #endif
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66
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67 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
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68
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69 const int MXCSR_MASK = 0xFFC0; // Mask out any pending exceptions
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70 const int FPU_CNTRL_WRD_MASK = 0xFFFF;
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71
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72 // -------------------------------------------------------------------------------------------------------------------------
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73 // Stub Code definitions
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74
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75 static address handle_unsafe_access() {
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76 JavaThread* thread = JavaThread::current();
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77 address pc = thread->saved_exception_pc();
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78 // pc is the instruction which we must emulate
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79 // doing a no-op is fine: return garbage from the load
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80 // therefore, compute npc
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81 address npc = Assembler::locate_next_instruction(pc);
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82
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83 // request an async exception
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84 thread->set_pending_unsafe_access_error();
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85
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86 // return address of next instruction to execute
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87 return npc;
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88 }
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89
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90 class StubGenerator: public StubCodeGenerator {
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91 private:
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92
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93 #ifdef PRODUCT
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94 #define inc_counter_np(counter) (0)
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95 #else
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96 void inc_counter_np_(int& counter) {
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97 __ incrementl(ExternalAddress((address)&counter));
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98 }
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99 #define inc_counter_np(counter) \
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100 BLOCK_COMMENT("inc_counter " #counter); \
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101 inc_counter_np_(counter);
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102 #endif //PRODUCT
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103
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104 void inc_copy_counter_np(BasicType t) {
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105 #ifndef PRODUCT
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106 switch (t) {
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107 case T_BYTE: inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr); return;
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108 case T_SHORT: inc_counter_np(SharedRuntime::_jshort_array_copy_ctr); return;
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109 case T_INT: inc_counter_np(SharedRuntime::_jint_array_copy_ctr); return;
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110 case T_LONG: inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); return;
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111 case T_OBJECT: inc_counter_np(SharedRuntime::_oop_array_copy_ctr); return;
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112 }
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113 ShouldNotReachHere();
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114 #endif //PRODUCT
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115 }
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116
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117 //------------------------------------------------------------------------------------------------------------------------
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118 // Call stubs are used to call Java from C
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119 //
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120 // [ return_from_Java ] <--- rsp
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121 // [ argument word n ]
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122 // ...
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123 // -N [ argument word 1 ]
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124 // -7 [ Possible padding for stack alignment ]
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125 // -6 [ Possible padding for stack alignment ]
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126 // -5 [ Possible padding for stack alignment ]
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127 // -4 [ mxcsr save ] <--- rsp_after_call
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128 // -3 [ saved rbx, ]
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129 // -2 [ saved rsi ]
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130 // -1 [ saved rdi ]
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131 // 0 [ saved rbp, ] <--- rbp,
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132 // 1 [ return address ]
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133 // 2 [ ptr. to call wrapper ]
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134 // 3 [ result ]
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135 // 4 [ result_type ]
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136 // 5 [ method ]
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137 // 6 [ entry_point ]
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138 // 7 [ parameters ]
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139 // 8 [ parameter_size ]
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140 // 9 [ thread ]
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141
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142
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143 address generate_call_stub(address& return_address) {
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144 StubCodeMark mark(this, "StubRoutines", "call_stub");
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145 address start = __ pc();
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146
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147 // stub code parameters / addresses
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148 assert(frame::entry_frame_call_wrapper_offset == 2, "adjust this code");
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149 bool sse_save = false;
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150 const Address rsp_after_call(rbp, -4 * wordSize); // same as in generate_catch_exception()!
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151 const int locals_count_in_bytes (4*wordSize);
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152 const Address mxcsr_save (rbp, -4 * wordSize);
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153 const Address saved_rbx (rbp, -3 * wordSize);
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154 const Address saved_rsi (rbp, -2 * wordSize);
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155 const Address saved_rdi (rbp, -1 * wordSize);
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156 const Address result (rbp, 3 * wordSize);
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157 const Address result_type (rbp, 4 * wordSize);
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158 const Address method (rbp, 5 * wordSize);
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159 const Address entry_point (rbp, 6 * wordSize);
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160 const Address parameters (rbp, 7 * wordSize);
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161 const Address parameter_size(rbp, 8 * wordSize);
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162 const Address thread (rbp, 9 * wordSize); // same as in generate_catch_exception()!
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163 sse_save = UseSSE > 0;
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164
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165 // stub code
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166 __ enter();
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167 __ movptr(rcx, parameter_size); // parameter counter
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168 __ shlptr(rcx, Interpreter::logStackElementSize); // convert parameter count to bytes
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169 __ addptr(rcx, locals_count_in_bytes); // reserve space for register saves
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170 __ subptr(rsp, rcx);
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171 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack
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172
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173 // save rdi, rsi, & rbx, according to C calling conventions
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174 __ movptr(saved_rdi, rdi);
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175 __ movptr(saved_rsi, rsi);
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176 __ movptr(saved_rbx, rbx);
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177 // save and initialize %mxcsr
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178 if (sse_save) {
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179 Label skip_ldmx;
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180 __ stmxcsr(mxcsr_save);
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181 __ movl(rax, mxcsr_save);
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182 __ andl(rax, MXCSR_MASK); // Only check control and mask bits
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183 ExternalAddress mxcsr_std(StubRoutines::addr_mxcsr_std());
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184 __ cmp32(rax, mxcsr_std);
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185 __ jcc(Assembler::equal, skip_ldmx);
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186 __ ldmxcsr(mxcsr_std);
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187 __ bind(skip_ldmx);
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188 }
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189
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190 // make sure the control word is correct.
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191 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
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192
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193 #ifdef ASSERT
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194 // make sure we have no pending exceptions
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195 { Label L;
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196 __ movptr(rcx, thread);
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197 __ cmpptr(Address(rcx, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
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198 __ jcc(Assembler::equal, L);
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199 __ stop("StubRoutines::call_stub: entered with pending exception");
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200 __ bind(L);
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201 }
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202 #endif
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203
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204 // pass parameters if any
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205 BLOCK_COMMENT("pass parameters if any");
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206 Label parameters_done;
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207 __ movl(rcx, parameter_size); // parameter counter
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208 __ testl(rcx, rcx);
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209 __ jcc(Assembler::zero, parameters_done);
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210
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211 // parameter passing loop
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212
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213 Label loop;
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214 // Copy Java parameters in reverse order (receiver last)
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215 // Note that the argument order is inverted in the process
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216 // source is rdx[rcx: N-1..0]
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217 // dest is rsp[rbx: 0..N-1]
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218
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219 __ movptr(rdx, parameters); // parameter pointer
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220 __ xorptr(rbx, rbx);
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221
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222 __ BIND(loop);
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223
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224 // get parameter
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225 __ movptr(rax, Address(rdx, rcx, Interpreter::stackElementScale(), -wordSize));
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226 __ movptr(Address(rsp, rbx, Interpreter::stackElementScale(),
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227 Interpreter::expr_offset_in_bytes(0)), rax); // store parameter
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228 __ increment(rbx);
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229 __ decrement(rcx);
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230 __ jcc(Assembler::notZero, loop);
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231
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232 // call Java function
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233 __ BIND(parameters_done);
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234 __ movptr(rbx, method); // get methodOop
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235 __ movptr(rax, entry_point); // get entry_point
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236 __ mov(rsi, rsp); // set sender sp
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237 BLOCK_COMMENT("call Java function");
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238 __ call(rax);
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239
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240 BLOCK_COMMENT("call_stub_return_address:");
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241 return_address = __ pc();
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242
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243 Label common_return;
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244
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245 __ BIND(common_return);
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246
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247 // store result depending on type
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248 // (everything that is not T_LONG, T_FLOAT or T_DOUBLE is treated as T_INT)
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249 __ movptr(rdi, result);
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250 Label is_long, is_float, is_double, exit;
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251 __ movl(rsi, result_type);
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252 __ cmpl(rsi, T_LONG);
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253 __ jcc(Assembler::equal, is_long);
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254 __ cmpl(rsi, T_FLOAT);
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255 __ jcc(Assembler::equal, is_float);
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256 __ cmpl(rsi, T_DOUBLE);
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257 __ jcc(Assembler::equal, is_double);
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258
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259 // handle T_INT case
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260 __ movl(Address(rdi, 0), rax);
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261 __ BIND(exit);
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262
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263 // check that FPU stack is empty
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264 __ verify_FPU(0, "generate_call_stub");
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265
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266 // pop parameters
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267 __ lea(rsp, rsp_after_call);
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268
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269 // restore %mxcsr
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270 if (sse_save) {
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271 __ ldmxcsr(mxcsr_save);
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272 }
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273
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274 // restore rdi, rsi and rbx,
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275 __ movptr(rbx, saved_rbx);
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276 __ movptr(rsi, saved_rsi);
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277 __ movptr(rdi, saved_rdi);
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278 __ addptr(rsp, 4*wordSize);
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279
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280 // return
304
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281 __ pop(rbp);
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282 __ ret(0);
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283
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284 // handle return types different from T_INT
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285 __ BIND(is_long);
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286 __ movl(Address(rdi, 0 * wordSize), rax);
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287 __ movl(Address(rdi, 1 * wordSize), rdx);
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288 __ jmp(exit);
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289
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290 __ BIND(is_float);
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291 // interpreter uses xmm0 for return values
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292 if (UseSSE >= 1) {
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293 __ movflt(Address(rdi, 0), xmm0);
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294 } else {
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295 __ fstp_s(Address(rdi, 0));
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296 }
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297 __ jmp(exit);
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298
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299 __ BIND(is_double);
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300 // interpreter uses xmm0 for return values
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301 if (UseSSE >= 2) {
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302 __ movdbl(Address(rdi, 0), xmm0);
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303 } else {
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304 __ fstp_d(Address(rdi, 0));
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305 }
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306 __ jmp(exit);
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307
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308 // If we call compiled code directly from the call stub we will
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309 // need to adjust the return back to the call stub to a specialized
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310 // piece of code that can handle compiled results and cleaning the fpu
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311 // stack. compiled code will be set to return here instead of the
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312 // return above that handles interpreter returns.
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313
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314 BLOCK_COMMENT("call_stub_compiled_return:");
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315 StubRoutines::x86::set_call_stub_compiled_return( __ pc());
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316
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317 #ifdef COMPILER2
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318 if (UseSSE >= 2) {
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319 __ verify_FPU(0, "call_stub_compiled_return");
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320 } else {
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321 for (int i = 1; i < 8; i++) {
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322 __ ffree(i);
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323 }
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324
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325 // UseSSE <= 1 so double result should be left on TOS
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326 __ movl(rsi, result_type);
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327 __ cmpl(rsi, T_DOUBLE);
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328 __ jcc(Assembler::equal, common_return);
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329 if (UseSSE == 0) {
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330 // UseSSE == 0 so float result should be left on TOS
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331 __ cmpl(rsi, T_FLOAT);
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332 __ jcc(Assembler::equal, common_return);
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333 }
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334 __ ffree(0);
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335 }
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336 #endif /* COMPILER2 */
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337 __ jmp(common_return);
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338
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339 return start;
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340 }
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341
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342
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343 //------------------------------------------------------------------------------------------------------------------------
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344 // Return point for a Java call if there's an exception thrown in Java code.
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345 // The exception is caught and transformed into a pending exception stored in
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346 // JavaThread that can be tested from within the VM.
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347 //
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348 // Note: Usually the parameters are removed by the callee. In case of an exception
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349 // crossing an activation frame boundary, that is not the case if the callee
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350 // is compiled code => need to setup the rsp.
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351 //
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352 // rax,: exception oop
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353
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354 address generate_catch_exception() {
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355 StubCodeMark mark(this, "StubRoutines", "catch_exception");
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356 const Address rsp_after_call(rbp, -4 * wordSize); // same as in generate_call_stub()!
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357 const Address thread (rbp, 9 * wordSize); // same as in generate_call_stub()!
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358 address start = __ pc();
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359
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360 // get thread directly
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361 __ movptr(rcx, thread);
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362 #ifdef ASSERT
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363 // verify that threads correspond
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364 { Label L;
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365 __ get_thread(rbx);
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366 __ cmpptr(rbx, rcx);
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367 __ jcc(Assembler::equal, L);
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368 __ stop("StubRoutines::catch_exception: threads must correspond");
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369 __ bind(L);
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370 }
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371 #endif
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372 // set pending exception
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373 __ verify_oop(rax);
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374 __ movptr(Address(rcx, Thread::pending_exception_offset()), rax );
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375 __ lea(Address(rcx, Thread::exception_file_offset ()),
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376 ExternalAddress((address)__FILE__));
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377 __ movl(Address(rcx, Thread::exception_line_offset ()), __LINE__ );
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378 // complete return to VM
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379 assert(StubRoutines::_call_stub_return_address != NULL, "_call_stub_return_address must have been generated before");
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380 __ jump(RuntimeAddress(StubRoutines::_call_stub_return_address));
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381
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382 return start;
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383 }
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384
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385
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386 //------------------------------------------------------------------------------------------------------------------------
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387 // Continuation point for runtime calls returning with a pending exception.
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388 // The pending exception check happened in the runtime or native call stub.
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389 // The pending exception in Thread is converted into a Java-level exception.
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390 //
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391 // Contract with Java-level exception handlers:
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392 // rax: exception
0
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393 // rdx: throwing pc
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394 //
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395 // NOTE: At entry of this stub, exception-pc must be on stack !!
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396
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397 address generate_forward_exception() {
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398 StubCodeMark mark(this, "StubRoutines", "forward exception");
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399 address start = __ pc();
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400 const Register thread = rcx;
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401
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402 // other registers used in this stub
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403 const Register exception_oop = rax;
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404 const Register handler_addr = rbx;
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405 const Register exception_pc = rdx;
0
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406
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407 // Upon entry, the sp points to the return address returning into Java
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408 // (interpreted or compiled) code; i.e., the return address becomes the
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409 // throwing pc.
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410 //
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411 // Arguments pushed before the runtime call are still on the stack but
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412 // the exception handler will reset the stack pointer -> ignore them.
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413 // A potential result in registers can be ignored as well.
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414
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415 #ifdef ASSERT
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416 // make sure this code is only executed if there is a pending exception
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417 { Label L;
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418 __ get_thread(thread);
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
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parents: 1192
diff changeset
419 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
0
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parents:
diff changeset
420 __ jcc(Assembler::notEqual, L);
a61af66fc99e Initial load
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parents:
diff changeset
421 __ stop("StubRoutines::forward exception: no pending exception (1)");
a61af66fc99e Initial load
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parents:
diff changeset
422 __ bind(L);
a61af66fc99e Initial load
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parents:
diff changeset
423 }
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parents:
diff changeset
424 #endif
a61af66fc99e Initial load
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parents:
diff changeset
425
a61af66fc99e Initial load
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parents:
diff changeset
426 // compute exception handler into rbx,
1295
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twisti
parents: 1192
diff changeset
427 __ get_thread(thread);
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
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parents: 1192
diff changeset
428 __ movptr(exception_pc, Address(rsp, 0));
0
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parents:
diff changeset
429 BLOCK_COMMENT("call exception_handler_for_return_address");
1295
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
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parents: 1192
diff changeset
430 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc);
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
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parents: 1192
diff changeset
431 __ mov(handler_addr, rax);
0
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parents:
diff changeset
432
1295
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1192
diff changeset
433 // setup rax & rdx, remove return address & clear pending exception
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
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parents: 1192
diff changeset
434 __ get_thread(thread);
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twisti
parents: 1192
diff changeset
435 __ pop(exception_pc);
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
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parents: 1192
diff changeset
436 __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset()));
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
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parents: 1192
diff changeset
437 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
0
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parents:
diff changeset
438
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parents:
diff changeset
439 #ifdef ASSERT
a61af66fc99e Initial load
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parents:
diff changeset
440 // make sure exception is set
a61af66fc99e Initial load
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parents:
diff changeset
441 { Label L;
1295
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diff changeset
442 __ testptr(exception_oop, exception_oop);
0
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parents:
diff changeset
443 __ jcc(Assembler::notEqual, L);
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parents:
diff changeset
444 __ stop("StubRoutines::forward exception: no pending exception (2)");
a61af66fc99e Initial load
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parents:
diff changeset
445 __ bind(L);
a61af66fc99e Initial load
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parents:
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446 }
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parents:
diff changeset
447 #endif
a61af66fc99e Initial load
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parents:
diff changeset
448
1295
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twisti
parents: 1192
diff changeset
449 // Verify that there is really a valid exception in RAX.
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
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parents: 1192
diff changeset
450 __ verify_oop(exception_oop);
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parents: 1192
diff changeset
451
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
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parents: 1192
diff changeset
452 // Restore SP from BP if the exception PC is a MethodHandle call site.
1368
93767e6a2dfd 6941529: SharedRuntime::raw_exception_handler_for_return_address must reset thread MethodHandle flag
twisti
parents: 1365
diff changeset
453 __ cmpl(Address(thread, JavaThread::is_method_handle_return_offset()), 0);
1295
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parents: 1192
diff changeset
454 __ cmovptr(Assembler::notEqual, rsp, rbp);
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 1192
diff changeset
455
0
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parents:
diff changeset
456 // continue at exception handler (return address removed)
1295
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parents: 1192
diff changeset
457 // rax: exception
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
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parents: 1192
diff changeset
458 // rbx: exception handler
0
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parents:
diff changeset
459 // rdx: throwing pc
1295
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
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parents: 1192
diff changeset
460 __ jmp(handler_addr);
0
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parents:
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461
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parents:
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462 return start;
a61af66fc99e Initial load
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parents:
diff changeset
463 }
a61af66fc99e Initial load
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parents:
diff changeset
464
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parents:
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465
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parents:
diff changeset
466 //----------------------------------------------------------------------------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
467 // Support for jint Atomic::xchg(jint exchange_value, volatile jint* dest)
a61af66fc99e Initial load
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parents:
diff changeset
468 //
a61af66fc99e Initial load
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parents:
diff changeset
469 // xchg exists as far back as 8086, lock needed for MP only
a61af66fc99e Initial load
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parents:
diff changeset
470 // Stack layout immediately after call:
a61af66fc99e Initial load
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parents:
diff changeset
471 //
a61af66fc99e Initial load
duke
parents:
diff changeset
472 // 0 [ret addr ] <--- rsp
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duke
parents:
diff changeset
473 // 1 [ ex ]
a61af66fc99e Initial load
duke
parents:
diff changeset
474 // 2 [ dest ]
a61af66fc99e Initial load
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parents:
diff changeset
475 //
a61af66fc99e Initial load
duke
parents:
diff changeset
476 // Result: *dest <- ex, return (old *dest)
a61af66fc99e Initial load
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parents:
diff changeset
477 //
a61af66fc99e Initial load
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parents:
diff changeset
478 // Note: win32 does not currently use this code
a61af66fc99e Initial load
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parents:
diff changeset
479
a61af66fc99e Initial load
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parents:
diff changeset
480 address generate_atomic_xchg() {
a61af66fc99e Initial load
duke
parents:
diff changeset
481 StubCodeMark mark(this, "StubRoutines", "atomic_xchg");
a61af66fc99e Initial load
duke
parents:
diff changeset
482 address start = __ pc();
a61af66fc99e Initial load
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parents:
diff changeset
483
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
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parents: 249
diff changeset
484 __ push(rdx);
0
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parents:
diff changeset
485 Address exchange(rsp, 2 * wordSize);
a61af66fc99e Initial load
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parents:
diff changeset
486 Address dest_addr(rsp, 3 * wordSize);
a61af66fc99e Initial load
duke
parents:
diff changeset
487 __ movl(rax, exchange);
304
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parents: 249
diff changeset
488 __ movptr(rdx, dest_addr);
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never
parents: 249
diff changeset
489 __ xchgl(rax, Address(rdx, 0));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
490 __ pop(rdx);
0
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parents:
diff changeset
491 __ ret(0);
a61af66fc99e Initial load
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parents:
diff changeset
492
a61af66fc99e Initial load
duke
parents:
diff changeset
493 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
494 }
a61af66fc99e Initial load
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parents:
diff changeset
495
a61af66fc99e Initial load
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parents:
diff changeset
496 //----------------------------------------------------------------------------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
497 // Support for void verify_mxcsr()
a61af66fc99e Initial load
duke
parents:
diff changeset
498 //
a61af66fc99e Initial load
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parents:
diff changeset
499 // This routine is used with -Xcheck:jni to verify that native
a61af66fc99e Initial load
duke
parents:
diff changeset
500 // JNI code does not return to Java code without restoring the
a61af66fc99e Initial load
duke
parents:
diff changeset
501 // MXCSR register to our expected state.
a61af66fc99e Initial load
duke
parents:
diff changeset
502
a61af66fc99e Initial load
duke
parents:
diff changeset
503
a61af66fc99e Initial load
duke
parents:
diff changeset
504 address generate_verify_mxcsr() {
a61af66fc99e Initial load
duke
parents:
diff changeset
505 StubCodeMark mark(this, "StubRoutines", "verify_mxcsr");
a61af66fc99e Initial load
duke
parents:
diff changeset
506 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
507
a61af66fc99e Initial load
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parents:
diff changeset
508 const Address mxcsr_save(rsp, 0);
a61af66fc99e Initial load
duke
parents:
diff changeset
509
a61af66fc99e Initial load
duke
parents:
diff changeset
510 if (CheckJNICalls && UseSSE > 0 ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
511 Label ok_ret;
a61af66fc99e Initial load
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parents:
diff changeset
512 ExternalAddress mxcsr_std(StubRoutines::addr_mxcsr_std());
304
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never
parents: 249
diff changeset
513 __ push(rax);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
514 __ subptr(rsp, wordSize); // allocate a temp location
0
a61af66fc99e Initial load
duke
parents:
diff changeset
515 __ stmxcsr(mxcsr_save);
a61af66fc99e Initial load
duke
parents:
diff changeset
516 __ movl(rax, mxcsr_save);
a61af66fc99e Initial load
duke
parents:
diff changeset
517 __ andl(rax, MXCSR_MASK);
a61af66fc99e Initial load
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parents:
diff changeset
518 __ cmp32(rax, mxcsr_std);
a61af66fc99e Initial load
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parents:
diff changeset
519 __ jcc(Assembler::equal, ok_ret);
a61af66fc99e Initial load
duke
parents:
diff changeset
520
a61af66fc99e Initial load
duke
parents:
diff changeset
521 __ warn("MXCSR changed by native JNI code.");
a61af66fc99e Initial load
duke
parents:
diff changeset
522
a61af66fc99e Initial load
duke
parents:
diff changeset
523 __ ldmxcsr(mxcsr_std);
a61af66fc99e Initial load
duke
parents:
diff changeset
524
a61af66fc99e Initial load
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parents:
diff changeset
525 __ bind(ok_ret);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
526 __ addptr(rsp, wordSize);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
527 __ pop(rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
528 }
a61af66fc99e Initial load
duke
parents:
diff changeset
529
a61af66fc99e Initial load
duke
parents:
diff changeset
530 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
531
a61af66fc99e Initial load
duke
parents:
diff changeset
532 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
533 }
a61af66fc99e Initial load
duke
parents:
diff changeset
534
a61af66fc99e Initial load
duke
parents:
diff changeset
535
a61af66fc99e Initial load
duke
parents:
diff changeset
536 //---------------------------------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
537 // Support for void verify_fpu_cntrl_wrd()
a61af66fc99e Initial load
duke
parents:
diff changeset
538 //
a61af66fc99e Initial load
duke
parents:
diff changeset
539 // This routine is used with -Xcheck:jni to verify that native
a61af66fc99e Initial load
duke
parents:
diff changeset
540 // JNI code does not return to Java code without restoring the
a61af66fc99e Initial load
duke
parents:
diff changeset
541 // FP control word to our expected state.
a61af66fc99e Initial load
duke
parents:
diff changeset
542
a61af66fc99e Initial load
duke
parents:
diff changeset
543 address generate_verify_fpu_cntrl_wrd() {
a61af66fc99e Initial load
duke
parents:
diff changeset
544 StubCodeMark mark(this, "StubRoutines", "verify_spcw");
a61af66fc99e Initial load
duke
parents:
diff changeset
545 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
546
a61af66fc99e Initial load
duke
parents:
diff changeset
547 const Address fpu_cntrl_wrd_save(rsp, 0);
a61af66fc99e Initial load
duke
parents:
diff changeset
548
a61af66fc99e Initial load
duke
parents:
diff changeset
549 if (CheckJNICalls) {
a61af66fc99e Initial load
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parents:
diff changeset
550 Label ok_ret;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
551 __ push(rax);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
552 __ subptr(rsp, wordSize); // allocate a temp location
0
a61af66fc99e Initial load
duke
parents:
diff changeset
553 __ fnstcw(fpu_cntrl_wrd_save);
a61af66fc99e Initial load
duke
parents:
diff changeset
554 __ movl(rax, fpu_cntrl_wrd_save);
a61af66fc99e Initial load
duke
parents:
diff changeset
555 __ andl(rax, FPU_CNTRL_WRD_MASK);
a61af66fc99e Initial load
duke
parents:
diff changeset
556 ExternalAddress fpu_std(StubRoutines::addr_fpu_cntrl_wrd_std());
a61af66fc99e Initial load
duke
parents:
diff changeset
557 __ cmp32(rax, fpu_std);
a61af66fc99e Initial load
duke
parents:
diff changeset
558 __ jcc(Assembler::equal, ok_ret);
a61af66fc99e Initial load
duke
parents:
diff changeset
559
a61af66fc99e Initial load
duke
parents:
diff changeset
560 __ warn("Floating point control word changed by native JNI code.");
a61af66fc99e Initial load
duke
parents:
diff changeset
561
a61af66fc99e Initial load
duke
parents:
diff changeset
562 __ fldcw(fpu_std);
a61af66fc99e Initial load
duke
parents:
diff changeset
563
a61af66fc99e Initial load
duke
parents:
diff changeset
564 __ bind(ok_ret);
304
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never
parents: 249
diff changeset
565 __ addptr(rsp, wordSize);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
566 __ pop(rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
567 }
a61af66fc99e Initial load
duke
parents:
diff changeset
568
a61af66fc99e Initial load
duke
parents:
diff changeset
569 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
570
a61af66fc99e Initial load
duke
parents:
diff changeset
571 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
572 }
a61af66fc99e Initial load
duke
parents:
diff changeset
573
a61af66fc99e Initial load
duke
parents:
diff changeset
574 //---------------------------------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
575 // Wrapper for slow-case handling of double-to-integer conversion
a61af66fc99e Initial load
duke
parents:
diff changeset
576 // d2i or f2i fast case failed either because it is nan or because
a61af66fc99e Initial load
duke
parents:
diff changeset
577 // of under/overflow.
a61af66fc99e Initial load
duke
parents:
diff changeset
578 // Input: FPU TOS: float value
a61af66fc99e Initial load
duke
parents:
diff changeset
579 // Output: rax, (rdx): integer (long) result
a61af66fc99e Initial load
duke
parents:
diff changeset
580
a61af66fc99e Initial load
duke
parents:
diff changeset
581 address generate_d2i_wrapper(BasicType t, address fcn) {
a61af66fc99e Initial load
duke
parents:
diff changeset
582 StubCodeMark mark(this, "StubRoutines", "d2i_wrapper");
a61af66fc99e Initial load
duke
parents:
diff changeset
583 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
584
a61af66fc99e Initial load
duke
parents:
diff changeset
585 // Capture info about frame layout
a61af66fc99e Initial load
duke
parents:
diff changeset
586 enum layout { FPUState_off = 0,
a61af66fc99e Initial load
duke
parents:
diff changeset
587 rbp_off = FPUStateSizeInWords,
a61af66fc99e Initial load
duke
parents:
diff changeset
588 rdi_off,
a61af66fc99e Initial load
duke
parents:
diff changeset
589 rsi_off,
a61af66fc99e Initial load
duke
parents:
diff changeset
590 rcx_off,
a61af66fc99e Initial load
duke
parents:
diff changeset
591 rbx_off,
a61af66fc99e Initial load
duke
parents:
diff changeset
592 saved_argument_off,
a61af66fc99e Initial load
duke
parents:
diff changeset
593 saved_argument_off2, // 2nd half of double
a61af66fc99e Initial load
duke
parents:
diff changeset
594 framesize
a61af66fc99e Initial load
duke
parents:
diff changeset
595 };
a61af66fc99e Initial load
duke
parents:
diff changeset
596
a61af66fc99e Initial load
duke
parents:
diff changeset
597 assert(FPUStateSizeInWords == 27, "update stack layout");
a61af66fc99e Initial load
duke
parents:
diff changeset
598
a61af66fc99e Initial load
duke
parents:
diff changeset
599 // Save outgoing argument to stack across push_FPU_state()
304
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never
parents: 249
diff changeset
600 __ subptr(rsp, wordSize * 2);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
601 __ fstp_d(Address(rsp, 0));
a61af66fc99e Initial load
duke
parents:
diff changeset
602
a61af66fc99e Initial load
duke
parents:
diff changeset
603 // Save CPU & FPU state
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
604 __ push(rbx);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
605 __ push(rcx);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
606 __ push(rsi);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
607 __ push(rdi);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
608 __ push(rbp);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
609 __ push_FPU_state();
a61af66fc99e Initial load
duke
parents:
diff changeset
610
a61af66fc99e Initial load
duke
parents:
diff changeset
611 // push_FPU_state() resets the FP top of stack
a61af66fc99e Initial load
duke
parents:
diff changeset
612 // Load original double into FP top of stack
a61af66fc99e Initial load
duke
parents:
diff changeset
613 __ fld_d(Address(rsp, saved_argument_off * wordSize));
a61af66fc99e Initial load
duke
parents:
diff changeset
614 // Store double into stack as outgoing argument
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
615 __ subptr(rsp, wordSize*2);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
616 __ fst_d(Address(rsp, 0));
a61af66fc99e Initial load
duke
parents:
diff changeset
617
a61af66fc99e Initial load
duke
parents:
diff changeset
618 // Prepare FPU for doing math in C-land
a61af66fc99e Initial load
duke
parents:
diff changeset
619 __ empty_FPU_stack();
a61af66fc99e Initial load
duke
parents:
diff changeset
620 // Call the C code to massage the double. Result in EAX
a61af66fc99e Initial load
duke
parents:
diff changeset
621 if (t == T_INT)
a61af66fc99e Initial load
duke
parents:
diff changeset
622 { BLOCK_COMMENT("SharedRuntime::d2i"); }
a61af66fc99e Initial load
duke
parents:
diff changeset
623 else if (t == T_LONG)
a61af66fc99e Initial load
duke
parents:
diff changeset
624 { BLOCK_COMMENT("SharedRuntime::d2l"); }
a61af66fc99e Initial load
duke
parents:
diff changeset
625 __ call_VM_leaf( fcn, 2 );
a61af66fc99e Initial load
duke
parents:
diff changeset
626
a61af66fc99e Initial load
duke
parents:
diff changeset
627 // Restore CPU & FPU state
a61af66fc99e Initial load
duke
parents:
diff changeset
628 __ pop_FPU_state();
304
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never
parents: 249
diff changeset
629 __ pop(rbp);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
630 __ pop(rdi);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
631 __ pop(rsi);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
632 __ pop(rcx);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
633 __ pop(rbx);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
634 __ addptr(rsp, wordSize * 2);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
635
a61af66fc99e Initial load
duke
parents:
diff changeset
636 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
637
a61af66fc99e Initial load
duke
parents:
diff changeset
638 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
639 }
a61af66fc99e Initial load
duke
parents:
diff changeset
640
a61af66fc99e Initial load
duke
parents:
diff changeset
641
a61af66fc99e Initial load
duke
parents:
diff changeset
642 //---------------------------------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
643 // The following routine generates a subroutine to throw an asynchronous
a61af66fc99e Initial load
duke
parents:
diff changeset
644 // UnknownError when an unsafe access gets a fault that could not be
a61af66fc99e Initial load
duke
parents:
diff changeset
645 // reasonably prevented by the programmer. (Example: SIGBUS/OBJERR.)
a61af66fc99e Initial load
duke
parents:
diff changeset
646 address generate_handler_for_unsafe_access() {
a61af66fc99e Initial load
duke
parents:
diff changeset
647 StubCodeMark mark(this, "StubRoutines", "handler_for_unsafe_access");
a61af66fc99e Initial load
duke
parents:
diff changeset
648 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
649
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
650 __ push(0); // hole for return address-to-be
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
651 __ pusha(); // push registers
0
a61af66fc99e Initial load
duke
parents:
diff changeset
652 Address next_pc(rsp, RegisterImpl::number_of_registers * BytesPerWord);
a61af66fc99e Initial load
duke
parents:
diff changeset
653 BLOCK_COMMENT("call handle_unsafe_access");
a61af66fc99e Initial load
duke
parents:
diff changeset
654 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, handle_unsafe_access)));
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
655 __ movptr(next_pc, rax); // stuff next address
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
656 __ popa();
0
a61af66fc99e Initial load
duke
parents:
diff changeset
657 __ ret(0); // jump to next address
a61af66fc99e Initial load
duke
parents:
diff changeset
658
a61af66fc99e Initial load
duke
parents:
diff changeset
659 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
660 }
a61af66fc99e Initial load
duke
parents:
diff changeset
661
a61af66fc99e Initial load
duke
parents:
diff changeset
662
a61af66fc99e Initial load
duke
parents:
diff changeset
663 //----------------------------------------------------------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
664 // Non-destructive plausibility checks for oops
a61af66fc99e Initial load
duke
parents:
diff changeset
665
a61af66fc99e Initial load
duke
parents:
diff changeset
666 address generate_verify_oop() {
a61af66fc99e Initial load
duke
parents:
diff changeset
667 StubCodeMark mark(this, "StubRoutines", "verify_oop");
a61af66fc99e Initial load
duke
parents:
diff changeset
668 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
669
a61af66fc99e Initial load
duke
parents:
diff changeset
670 // Incoming arguments on stack after saving rax,:
a61af66fc99e Initial load
duke
parents:
diff changeset
671 //
a61af66fc99e Initial load
duke
parents:
diff changeset
672 // [tos ]: saved rdx
a61af66fc99e Initial load
duke
parents:
diff changeset
673 // [tos + 1]: saved EFLAGS
a61af66fc99e Initial load
duke
parents:
diff changeset
674 // [tos + 2]: return address
a61af66fc99e Initial load
duke
parents:
diff changeset
675 // [tos + 3]: char* error message
a61af66fc99e Initial load
duke
parents:
diff changeset
676 // [tos + 4]: oop object to verify
a61af66fc99e Initial load
duke
parents:
diff changeset
677 // [tos + 5]: saved rax, - saved by caller and bashed
a61af66fc99e Initial load
duke
parents:
diff changeset
678
a61af66fc99e Initial load
duke
parents:
diff changeset
679 Label exit, error;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
680 __ pushf();
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
681 __ incrementl(ExternalAddress((address) StubRoutines::verify_oop_count_addr()));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
682 __ push(rdx); // save rdx
0
a61af66fc99e Initial load
duke
parents:
diff changeset
683 // make sure object is 'reasonable'
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
684 __ movptr(rax, Address(rsp, 4 * wordSize)); // get object
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
685 __ testptr(rax, rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
686 __ jcc(Assembler::zero, exit); // if obj is NULL it is ok
a61af66fc99e Initial load
duke
parents:
diff changeset
687
a61af66fc99e Initial load
duke
parents:
diff changeset
688 // Check if the oop is in the right area of memory
a61af66fc99e Initial load
duke
parents:
diff changeset
689 const int oop_mask = Universe::verify_oop_mask();
a61af66fc99e Initial load
duke
parents:
diff changeset
690 const int oop_bits = Universe::verify_oop_bits();
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
691 __ mov(rdx, rax);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
692 __ andptr(rdx, oop_mask);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
693 __ cmpptr(rdx, oop_bits);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
694 __ jcc(Assembler::notZero, error);
a61af66fc99e Initial load
duke
parents:
diff changeset
695
a61af66fc99e Initial load
duke
parents:
diff changeset
696 // make sure klass is 'reasonable'
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
697 __ movptr(rax, Address(rax, oopDesc::klass_offset_in_bytes())); // get klass
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
698 __ testptr(rax, rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
699 __ jcc(Assembler::zero, error); // if klass is NULL it is broken
a61af66fc99e Initial load
duke
parents:
diff changeset
700
a61af66fc99e Initial load
duke
parents:
diff changeset
701 // Check if the klass is in the right area of memory
a61af66fc99e Initial load
duke
parents:
diff changeset
702 const int klass_mask = Universe::verify_klass_mask();
a61af66fc99e Initial load
duke
parents:
diff changeset
703 const int klass_bits = Universe::verify_klass_bits();
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
704 __ mov(rdx, rax);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
705 __ andptr(rdx, klass_mask);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
706 __ cmpptr(rdx, klass_bits);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
707 __ jcc(Assembler::notZero, error);
a61af66fc99e Initial load
duke
parents:
diff changeset
708
a61af66fc99e Initial load
duke
parents:
diff changeset
709 // make sure klass' klass is 'reasonable'
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
710 __ movptr(rax, Address(rax, oopDesc::klass_offset_in_bytes())); // get klass' klass
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
711 __ testptr(rax, rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
712 __ jcc(Assembler::zero, error); // if klass' klass is NULL it is broken
a61af66fc99e Initial load
duke
parents:
diff changeset
713
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
714 __ mov(rdx, rax);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
715 __ andptr(rdx, klass_mask);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
716 __ cmpptr(rdx, klass_bits);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
717 __ jcc(Assembler::notZero, error); // if klass not in right area
a61af66fc99e Initial load
duke
parents:
diff changeset
718 // of memory it is broken too.
a61af66fc99e Initial load
duke
parents:
diff changeset
719
a61af66fc99e Initial load
duke
parents:
diff changeset
720 // return if everything seems ok
a61af66fc99e Initial load
duke
parents:
diff changeset
721 __ bind(exit);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
722 __ movptr(rax, Address(rsp, 5 * wordSize)); // get saved rax, back
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
723 __ pop(rdx); // restore rdx
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
724 __ popf(); // restore EFLAGS
0
a61af66fc99e Initial load
duke
parents:
diff changeset
725 __ ret(3 * wordSize); // pop arguments
a61af66fc99e Initial load
duke
parents:
diff changeset
726
a61af66fc99e Initial load
duke
parents:
diff changeset
727 // handle errors
a61af66fc99e Initial load
duke
parents:
diff changeset
728 __ bind(error);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
729 __ movptr(rax, Address(rsp, 5 * wordSize)); // get saved rax, back
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
730 __ pop(rdx); // get saved rdx back
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
731 __ popf(); // get saved EFLAGS off stack -- will be ignored
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
732 __ pusha(); // push registers (eip = return address & msg are already pushed)
0
a61af66fc99e Initial load
duke
parents:
diff changeset
733 BLOCK_COMMENT("call MacroAssembler::debug");
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
734 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, MacroAssembler::debug32)));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
735 __ popa();
0
a61af66fc99e Initial load
duke
parents:
diff changeset
736 __ ret(3 * wordSize); // pop arguments
a61af66fc99e Initial load
duke
parents:
diff changeset
737 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
738 }
a61af66fc99e Initial load
duke
parents:
diff changeset
739
a61af66fc99e Initial load
duke
parents:
diff changeset
740 //
a61af66fc99e Initial load
duke
parents:
diff changeset
741 // Generate pre-barrier for array stores
a61af66fc99e Initial load
duke
parents:
diff changeset
742 //
a61af66fc99e Initial load
duke
parents:
diff changeset
743 // Input:
a61af66fc99e Initial load
duke
parents:
diff changeset
744 // start - starting address
845
df6caf649ff7 6700789: G1: Enable use of compressed oops with G1 heaps
ysr
parents: 710
diff changeset
745 // count - element count
0
a61af66fc99e Initial load
duke
parents:
diff changeset
746 void gen_write_ref_array_pre_barrier(Register start, Register count) {
a61af66fc99e Initial load
duke
parents:
diff changeset
747 assert_different_registers(start, count);
a61af66fc99e Initial load
duke
parents:
diff changeset
748 BarrierSet* bs = Universe::heap()->barrier_set();
a61af66fc99e Initial load
duke
parents:
diff changeset
749 switch (bs->kind()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
750 case BarrierSet::G1SATBCT:
a61af66fc99e Initial load
duke
parents:
diff changeset
751 case BarrierSet::G1SATBCTLogging:
a61af66fc99e Initial load
duke
parents:
diff changeset
752 {
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
753 __ pusha(); // push registers
1192
776fb94f33cc 6918006: G1: spill space must be reserved on the stack for barrier calls on Windows x64
apetrusenko
parents: 1174
diff changeset
754 __ call_VM_leaf(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_pre),
776fb94f33cc 6918006: G1: spill space must be reserved on the stack for barrier calls on Windows x64
apetrusenko
parents: 1174
diff changeset
755 start, count);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
756 __ popa();
0
a61af66fc99e Initial load
duke
parents:
diff changeset
757 }
a61af66fc99e Initial load
duke
parents:
diff changeset
758 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
759 case BarrierSet::CardTableModRef:
a61af66fc99e Initial load
duke
parents:
diff changeset
760 case BarrierSet::CardTableExtension:
a61af66fc99e Initial load
duke
parents:
diff changeset
761 case BarrierSet::ModRef:
a61af66fc99e Initial load
duke
parents:
diff changeset
762 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
763 default :
a61af66fc99e Initial load
duke
parents:
diff changeset
764 ShouldNotReachHere();
a61af66fc99e Initial load
duke
parents:
diff changeset
765
a61af66fc99e Initial load
duke
parents:
diff changeset
766 }
a61af66fc99e Initial load
duke
parents:
diff changeset
767 }
a61af66fc99e Initial load
duke
parents:
diff changeset
768
a61af66fc99e Initial load
duke
parents:
diff changeset
769
a61af66fc99e Initial load
duke
parents:
diff changeset
770 //
a61af66fc99e Initial load
duke
parents:
diff changeset
771 // Generate a post-barrier for an array store
a61af66fc99e Initial load
duke
parents:
diff changeset
772 //
a61af66fc99e Initial load
duke
parents:
diff changeset
773 // start - starting address
a61af66fc99e Initial load
duke
parents:
diff changeset
774 // count - element count
a61af66fc99e Initial load
duke
parents:
diff changeset
775 //
a61af66fc99e Initial load
duke
parents:
diff changeset
776 // The two input registers are overwritten.
a61af66fc99e Initial load
duke
parents:
diff changeset
777 //
a61af66fc99e Initial load
duke
parents:
diff changeset
778 void gen_write_ref_array_post_barrier(Register start, Register count) {
a61af66fc99e Initial load
duke
parents:
diff changeset
779 BarrierSet* bs = Universe::heap()->barrier_set();
a61af66fc99e Initial load
duke
parents:
diff changeset
780 assert_different_registers(start, count);
a61af66fc99e Initial load
duke
parents:
diff changeset
781 switch (bs->kind()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
782 case BarrierSet::G1SATBCT:
a61af66fc99e Initial load
duke
parents:
diff changeset
783 case BarrierSet::G1SATBCTLogging:
a61af66fc99e Initial load
duke
parents:
diff changeset
784 {
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
785 __ pusha(); // push registers
1192
776fb94f33cc 6918006: G1: spill space must be reserved on the stack for barrier calls on Windows x64
apetrusenko
parents: 1174
diff changeset
786 __ call_VM_leaf(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_post),
776fb94f33cc 6918006: G1: spill space must be reserved on the stack for barrier calls on Windows x64
apetrusenko
parents: 1174
diff changeset
787 start, count);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
788 __ popa();
0
a61af66fc99e Initial load
duke
parents:
diff changeset
789 }
a61af66fc99e Initial load
duke
parents:
diff changeset
790 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
791
a61af66fc99e Initial load
duke
parents:
diff changeset
792 case BarrierSet::CardTableModRef:
a61af66fc99e Initial load
duke
parents:
diff changeset
793 case BarrierSet::CardTableExtension:
a61af66fc99e Initial load
duke
parents:
diff changeset
794 {
a61af66fc99e Initial load
duke
parents:
diff changeset
795 CardTableModRefBS* ct = (CardTableModRefBS*)bs;
a61af66fc99e Initial load
duke
parents:
diff changeset
796 assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
a61af66fc99e Initial load
duke
parents:
diff changeset
797
a61af66fc99e Initial load
duke
parents:
diff changeset
798 Label L_loop;
a61af66fc99e Initial load
duke
parents:
diff changeset
799 const Register end = count; // elements count; end == start+count-1
a61af66fc99e Initial load
duke
parents:
diff changeset
800 assert_different_registers(start, end);
a61af66fc99e Initial load
duke
parents:
diff changeset
801
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
802 __ lea(end, Address(start, count, Address::times_ptr, -wordSize));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
803 __ shrptr(start, CardTableModRefBS::card_shift);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
804 __ shrptr(end, CardTableModRefBS::card_shift);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
805 __ subptr(end, start); // end --> count
0
a61af66fc99e Initial load
duke
parents:
diff changeset
806 __ BIND(L_loop);
249
910a4cb98e9e 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 19
diff changeset
807 intptr_t disp = (intptr_t) ct->byte_map_base;
910a4cb98e9e 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 19
diff changeset
808 Address cardtable(start, count, Address::times_1, disp);
910a4cb98e9e 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 19
diff changeset
809 __ movb(cardtable, 0);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
810 __ decrement(count);
a61af66fc99e Initial load
duke
parents:
diff changeset
811 __ jcc(Assembler::greaterEqual, L_loop);
a61af66fc99e Initial load
duke
parents:
diff changeset
812 }
a61af66fc99e Initial load
duke
parents:
diff changeset
813 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
814 case BarrierSet::ModRef:
a61af66fc99e Initial load
duke
parents:
diff changeset
815 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
816 default :
a61af66fc99e Initial load
duke
parents:
diff changeset
817 ShouldNotReachHere();
a61af66fc99e Initial load
duke
parents:
diff changeset
818
a61af66fc99e Initial load
duke
parents:
diff changeset
819 }
a61af66fc99e Initial load
duke
parents:
diff changeset
820 }
a61af66fc99e Initial load
duke
parents:
diff changeset
821
405
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
822
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
823 // Copy 64 bytes chunks
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
824 //
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
825 // Inputs:
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
826 // from - source array address
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
827 // to_from - destination array address - from
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
828 // qword_count - 8-bytes element count, negative
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
829 //
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
830 void xmm_copy_forward(Register from, Register to_from, Register qword_count) {
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
831 assert( UseSSE >= 2, "supported cpu only" );
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
832 Label L_copy_64_bytes_loop, L_copy_64_bytes, L_copy_8_bytes, L_exit;
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
833 // Copy 64-byte chunks
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
834 __ jmpb(L_copy_64_bytes);
1365
6476042f815c 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 1299
diff changeset
835 __ align(OptoLoopAlignment);
405
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
836 __ BIND(L_copy_64_bytes_loop);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
837
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
838 if(UseUnalignedLoadStores) {
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
839 __ movdqu(xmm0, Address(from, 0));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
840 __ movdqu(Address(from, to_from, Address::times_1, 0), xmm0);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
841 __ movdqu(xmm1, Address(from, 16));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
842 __ movdqu(Address(from, to_from, Address::times_1, 16), xmm1);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
843 __ movdqu(xmm2, Address(from, 32));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
844 __ movdqu(Address(from, to_from, Address::times_1, 32), xmm2);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
845 __ movdqu(xmm3, Address(from, 48));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
846 __ movdqu(Address(from, to_from, Address::times_1, 48), xmm3);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
847
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
848 } else {
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
849 __ movq(xmm0, Address(from, 0));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
850 __ movq(Address(from, to_from, Address::times_1, 0), xmm0);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
851 __ movq(xmm1, Address(from, 8));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
852 __ movq(Address(from, to_from, Address::times_1, 8), xmm1);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
853 __ movq(xmm2, Address(from, 16));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
854 __ movq(Address(from, to_from, Address::times_1, 16), xmm2);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
855 __ movq(xmm3, Address(from, 24));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
856 __ movq(Address(from, to_from, Address::times_1, 24), xmm3);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
857 __ movq(xmm4, Address(from, 32));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
858 __ movq(Address(from, to_from, Address::times_1, 32), xmm4);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
859 __ movq(xmm5, Address(from, 40));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
860 __ movq(Address(from, to_from, Address::times_1, 40), xmm5);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
861 __ movq(xmm6, Address(from, 48));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
862 __ movq(Address(from, to_from, Address::times_1, 48), xmm6);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
863 __ movq(xmm7, Address(from, 56));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
864 __ movq(Address(from, to_from, Address::times_1, 56), xmm7);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
865 }
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
866
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
867 __ addl(from, 64);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
868 __ BIND(L_copy_64_bytes);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
869 __ subl(qword_count, 8);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
870 __ jcc(Assembler::greaterEqual, L_copy_64_bytes_loop);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
871 __ addl(qword_count, 8);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
872 __ jccb(Assembler::zero, L_exit);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
873 //
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
874 // length is too short, just copy qwords
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
875 //
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
876 __ BIND(L_copy_8_bytes);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
877 __ movq(xmm0, Address(from, 0));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
878 __ movq(Address(from, to_from, Address::times_1), xmm0);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
879 __ addl(from, 8);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
880 __ decrement(qword_count);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
881 __ jcc(Assembler::greater, L_copy_8_bytes);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
882 __ BIND(L_exit);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
883 }
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
884
0
a61af66fc99e Initial load
duke
parents:
diff changeset
885 // Copy 64 bytes chunks
a61af66fc99e Initial load
duke
parents:
diff changeset
886 //
a61af66fc99e Initial load
duke
parents:
diff changeset
887 // Inputs:
a61af66fc99e Initial load
duke
parents:
diff changeset
888 // from - source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
889 // to_from - destination array address - from
a61af66fc99e Initial load
duke
parents:
diff changeset
890 // qword_count - 8-bytes element count, negative
a61af66fc99e Initial load
duke
parents:
diff changeset
891 //
a61af66fc99e Initial load
duke
parents:
diff changeset
892 void mmx_copy_forward(Register from, Register to_from, Register qword_count) {
405
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
893 assert( VM_Version::supports_mmx(), "supported cpu only" );
0
a61af66fc99e Initial load
duke
parents:
diff changeset
894 Label L_copy_64_bytes_loop, L_copy_64_bytes, L_copy_8_bytes, L_exit;
a61af66fc99e Initial load
duke
parents:
diff changeset
895 // Copy 64-byte chunks
a61af66fc99e Initial load
duke
parents:
diff changeset
896 __ jmpb(L_copy_64_bytes);
1365
6476042f815c 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 1299
diff changeset
897 __ align(OptoLoopAlignment);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
898 __ BIND(L_copy_64_bytes_loop);
a61af66fc99e Initial load
duke
parents:
diff changeset
899 __ movq(mmx0, Address(from, 0));
a61af66fc99e Initial load
duke
parents:
diff changeset
900 __ movq(mmx1, Address(from, 8));
a61af66fc99e Initial load
duke
parents:
diff changeset
901 __ movq(mmx2, Address(from, 16));
a61af66fc99e Initial load
duke
parents:
diff changeset
902 __ movq(Address(from, to_from, Address::times_1, 0), mmx0);
a61af66fc99e Initial load
duke
parents:
diff changeset
903 __ movq(mmx3, Address(from, 24));
a61af66fc99e Initial load
duke
parents:
diff changeset
904 __ movq(Address(from, to_from, Address::times_1, 8), mmx1);
a61af66fc99e Initial load
duke
parents:
diff changeset
905 __ movq(mmx4, Address(from, 32));
a61af66fc99e Initial load
duke
parents:
diff changeset
906 __ movq(Address(from, to_from, Address::times_1, 16), mmx2);
a61af66fc99e Initial load
duke
parents:
diff changeset
907 __ movq(mmx5, Address(from, 40));
a61af66fc99e Initial load
duke
parents:
diff changeset
908 __ movq(Address(from, to_from, Address::times_1, 24), mmx3);
a61af66fc99e Initial load
duke
parents:
diff changeset
909 __ movq(mmx6, Address(from, 48));
a61af66fc99e Initial load
duke
parents:
diff changeset
910 __ movq(Address(from, to_from, Address::times_1, 32), mmx4);
a61af66fc99e Initial load
duke
parents:
diff changeset
911 __ movq(mmx7, Address(from, 56));
a61af66fc99e Initial load
duke
parents:
diff changeset
912 __ movq(Address(from, to_from, Address::times_1, 40), mmx5);
a61af66fc99e Initial load
duke
parents:
diff changeset
913 __ movq(Address(from, to_from, Address::times_1, 48), mmx6);
a61af66fc99e Initial load
duke
parents:
diff changeset
914 __ movq(Address(from, to_from, Address::times_1, 56), mmx7);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
915 __ addptr(from, 64);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
916 __ BIND(L_copy_64_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
917 __ subl(qword_count, 8);
a61af66fc99e Initial load
duke
parents:
diff changeset
918 __ jcc(Assembler::greaterEqual, L_copy_64_bytes_loop);
a61af66fc99e Initial load
duke
parents:
diff changeset
919 __ addl(qword_count, 8);
a61af66fc99e Initial load
duke
parents:
diff changeset
920 __ jccb(Assembler::zero, L_exit);
a61af66fc99e Initial load
duke
parents:
diff changeset
921 //
a61af66fc99e Initial load
duke
parents:
diff changeset
922 // length is too short, just copy qwords
a61af66fc99e Initial load
duke
parents:
diff changeset
923 //
a61af66fc99e Initial load
duke
parents:
diff changeset
924 __ BIND(L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
925 __ movq(mmx0, Address(from, 0));
a61af66fc99e Initial load
duke
parents:
diff changeset
926 __ movq(Address(from, to_from, Address::times_1), mmx0);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
927 __ addptr(from, 8);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
928 __ decrement(qword_count);
a61af66fc99e Initial load
duke
parents:
diff changeset
929 __ jcc(Assembler::greater, L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
930 __ BIND(L_exit);
a61af66fc99e Initial load
duke
parents:
diff changeset
931 __ emms();
a61af66fc99e Initial load
duke
parents:
diff changeset
932 }
a61af66fc99e Initial load
duke
parents:
diff changeset
933
a61af66fc99e Initial load
duke
parents:
diff changeset
934 address generate_disjoint_copy(BasicType t, bool aligned,
a61af66fc99e Initial load
duke
parents:
diff changeset
935 Address::ScaleFactor sf,
a61af66fc99e Initial load
duke
parents:
diff changeset
936 address* entry, const char *name) {
a61af66fc99e Initial load
duke
parents:
diff changeset
937 __ align(CodeEntryAlignment);
a61af66fc99e Initial load
duke
parents:
diff changeset
938 StubCodeMark mark(this, "StubRoutines", name);
a61af66fc99e Initial load
duke
parents:
diff changeset
939 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
940
a61af66fc99e Initial load
duke
parents:
diff changeset
941 Label L_0_count, L_exit, L_skip_align1, L_skip_align2, L_copy_byte;
a61af66fc99e Initial load
duke
parents:
diff changeset
942 Label L_copy_2_bytes, L_copy_4_bytes, L_copy_64_bytes;
a61af66fc99e Initial load
duke
parents:
diff changeset
943
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
944 int shift = Address::times_ptr - sf;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
945
a61af66fc99e Initial load
duke
parents:
diff changeset
946 const Register from = rsi; // source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
947 const Register to = rdi; // destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
948 const Register count = rcx; // elements count
a61af66fc99e Initial load
duke
parents:
diff changeset
949 const Register to_from = to; // (to - from)
a61af66fc99e Initial load
duke
parents:
diff changeset
950 const Register saved_to = rdx; // saved destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
951
a61af66fc99e Initial load
duke
parents:
diff changeset
952 __ enter(); // required for proper stackwalking of RuntimeStub frame
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
953 __ push(rsi);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
954 __ push(rdi);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
955 __ movptr(from , Address(rsp, 12+ 4));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
956 __ movptr(to , Address(rsp, 12+ 8));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
957 __ movl(count, Address(rsp, 12+ 12));
a61af66fc99e Initial load
duke
parents:
diff changeset
958 if (t == T_OBJECT) {
a61af66fc99e Initial load
duke
parents:
diff changeset
959 __ testl(count, count);
a61af66fc99e Initial load
duke
parents:
diff changeset
960 __ jcc(Assembler::zero, L_0_count);
a61af66fc99e Initial load
duke
parents:
diff changeset
961 gen_write_ref_array_pre_barrier(to, count);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
962 __ mov(saved_to, to); // save 'to'
0
a61af66fc99e Initial load
duke
parents:
diff changeset
963 }
a61af66fc99e Initial load
duke
parents:
diff changeset
964
a61af66fc99e Initial load
duke
parents:
diff changeset
965 *entry = __ pc(); // Entry point from conjoint arraycopy stub.
a61af66fc99e Initial load
duke
parents:
diff changeset
966 BLOCK_COMMENT("Entry:");
a61af66fc99e Initial load
duke
parents:
diff changeset
967
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
968 __ subptr(to, from); // to --> to_from
0
a61af66fc99e Initial load
duke
parents:
diff changeset
969 __ cmpl(count, 2<<shift); // Short arrays (< 8 bytes) copy by element
a61af66fc99e Initial load
duke
parents:
diff changeset
970 __ jcc(Assembler::below, L_copy_4_bytes); // use unsigned cmp
405
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
971 if (!UseUnalignedLoadStores && !aligned && (t == T_BYTE || t == T_SHORT)) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
972 // align source address at 4 bytes address boundary
a61af66fc99e Initial load
duke
parents:
diff changeset
973 if (t == T_BYTE) {
a61af66fc99e Initial load
duke
parents:
diff changeset
974 // One byte misalignment happens only for byte arrays
a61af66fc99e Initial load
duke
parents:
diff changeset
975 __ testl(from, 1);
a61af66fc99e Initial load
duke
parents:
diff changeset
976 __ jccb(Assembler::zero, L_skip_align1);
a61af66fc99e Initial load
duke
parents:
diff changeset
977 __ movb(rax, Address(from, 0));
a61af66fc99e Initial load
duke
parents:
diff changeset
978 __ movb(Address(from, to_from, Address::times_1, 0), rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
979 __ increment(from);
a61af66fc99e Initial load
duke
parents:
diff changeset
980 __ decrement(count);
a61af66fc99e Initial load
duke
parents:
diff changeset
981 __ BIND(L_skip_align1);
a61af66fc99e Initial load
duke
parents:
diff changeset
982 }
a61af66fc99e Initial load
duke
parents:
diff changeset
983 // Two bytes misalignment happens only for byte and short (char) arrays
a61af66fc99e Initial load
duke
parents:
diff changeset
984 __ testl(from, 2);
a61af66fc99e Initial load
duke
parents:
diff changeset
985 __ jccb(Assembler::zero, L_skip_align2);
a61af66fc99e Initial load
duke
parents:
diff changeset
986 __ movw(rax, Address(from, 0));
a61af66fc99e Initial load
duke
parents:
diff changeset
987 __ movw(Address(from, to_from, Address::times_1, 0), rax);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
988 __ addptr(from, 2);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
989 __ subl(count, 1<<(shift-1));
a61af66fc99e Initial load
duke
parents:
diff changeset
990 __ BIND(L_skip_align2);
a61af66fc99e Initial load
duke
parents:
diff changeset
991 }
a61af66fc99e Initial load
duke
parents:
diff changeset
992 if (!VM_Version::supports_mmx()) {
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
993 __ mov(rax, count); // save 'count'
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
994 __ shrl(count, shift); // bytes count
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
995 __ addptr(to_from, from);// restore 'to'
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
996 __ rep_mov();
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
997 __ subptr(to_from, from);// restore 'to_from'
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
998 __ mov(count, rax); // restore 'count'
0
a61af66fc99e Initial load
duke
parents:
diff changeset
999 __ jmpb(L_copy_2_bytes); // all dwords were copied
a61af66fc99e Initial load
duke
parents:
diff changeset
1000 } else {
405
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1001 if (!UseUnalignedLoadStores) {
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1002 // align to 8 bytes, we know we are 4 byte aligned to start
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1003 __ testptr(from, 4);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1004 __ jccb(Assembler::zero, L_copy_64_bytes);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1005 __ movl(rax, Address(from, 0));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1006 __ movl(Address(from, to_from, Address::times_1, 0), rax);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1007 __ addptr(from, 4);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1008 __ subl(count, 1<<shift);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1009 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1010 __ BIND(L_copy_64_bytes);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1011 __ mov(rax, count);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1012 __ shrl(rax, shift+1); // 8 bytes chunk count
a61af66fc99e Initial load
duke
parents:
diff changeset
1013 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1014 // Copy 8-byte chunks through MMX registers, 8 per iteration of the loop
a61af66fc99e Initial load
duke
parents:
diff changeset
1015 //
405
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1016 if (UseXMMForArrayCopy) {
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1017 xmm_copy_forward(from, to_from, rax);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1018 } else {
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1019 mmx_copy_forward(from, to_from, rax);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1020 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1021 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1022 // copy tailing dword
a61af66fc99e Initial load
duke
parents:
diff changeset
1023 __ BIND(L_copy_4_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1024 __ testl(count, 1<<shift);
a61af66fc99e Initial load
duke
parents:
diff changeset
1025 __ jccb(Assembler::zero, L_copy_2_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1026 __ movl(rax, Address(from, 0));
a61af66fc99e Initial load
duke
parents:
diff changeset
1027 __ movl(Address(from, to_from, Address::times_1, 0), rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
1028 if (t == T_BYTE || t == T_SHORT) {
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1029 __ addptr(from, 4);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1030 __ BIND(L_copy_2_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1031 // copy tailing word
a61af66fc99e Initial load
duke
parents:
diff changeset
1032 __ testl(count, 1<<(shift-1));
a61af66fc99e Initial load
duke
parents:
diff changeset
1033 __ jccb(Assembler::zero, L_copy_byte);
a61af66fc99e Initial load
duke
parents:
diff changeset
1034 __ movw(rax, Address(from, 0));
a61af66fc99e Initial load
duke
parents:
diff changeset
1035 __ movw(Address(from, to_from, Address::times_1, 0), rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
1036 if (t == T_BYTE) {
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1037 __ addptr(from, 2);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1038 __ BIND(L_copy_byte);
a61af66fc99e Initial load
duke
parents:
diff changeset
1039 // copy tailing byte
a61af66fc99e Initial load
duke
parents:
diff changeset
1040 __ testl(count, 1);
a61af66fc99e Initial load
duke
parents:
diff changeset
1041 __ jccb(Assembler::zero, L_exit);
a61af66fc99e Initial load
duke
parents:
diff changeset
1042 __ movb(rax, Address(from, 0));
a61af66fc99e Initial load
duke
parents:
diff changeset
1043 __ movb(Address(from, to_from, Address::times_1, 0), rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
1044 __ BIND(L_exit);
a61af66fc99e Initial load
duke
parents:
diff changeset
1045 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1046 __ BIND(L_copy_byte);
a61af66fc99e Initial load
duke
parents:
diff changeset
1047 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1048 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1049 __ BIND(L_copy_2_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1050 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1051
a61af66fc99e Initial load
duke
parents:
diff changeset
1052 if (t == T_OBJECT) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1053 __ movl(count, Address(rsp, 12+12)); // reread 'count'
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1054 __ mov(to, saved_to); // restore 'to'
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1055 gen_write_ref_array_post_barrier(to, count);
a61af66fc99e Initial load
duke
parents:
diff changeset
1056 __ BIND(L_0_count);
a61af66fc99e Initial load
duke
parents:
diff changeset
1057 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1058 inc_copy_counter_np(t);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1059 __ pop(rdi);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1060 __ pop(rsi);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1061 __ leave(); // required for proper stackwalking of RuntimeStub frame
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1062 __ xorptr(rax, rax); // return 0
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1063 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1064 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
1065 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1066
a61af66fc99e Initial load
duke
parents:
diff changeset
1067
1763
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1068 address generate_fill(BasicType t, bool aligned, const char *name) {
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1069 __ align(CodeEntryAlignment);
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1070 StubCodeMark mark(this, "StubRoutines", name);
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1071 address start = __ pc();
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1072
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1073 BLOCK_COMMENT("Entry:");
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1074
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1075 const Register to = rdi; // source array address
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1076 const Register value = rdx; // value
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1077 const Register count = rsi; // elements count
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1078
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1079 __ enter(); // required for proper stackwalking of RuntimeStub frame
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1080 __ push(rsi);
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1081 __ push(rdi);
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1082 __ movptr(to , Address(rsp, 12+ 4));
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1083 __ movl(value, Address(rsp, 12+ 8));
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1084 __ movl(count, Address(rsp, 12+ 12));
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1085
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1086 __ generate_fill(t, aligned, to, value, count, rax, xmm0);
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1087
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1088 __ pop(rdi);
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1089 __ pop(rsi);
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1090 __ leave(); // required for proper stackwalking of RuntimeStub frame
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1091 __ ret(0);
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1092 return start;
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1093 }
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
1094
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1095 address generate_conjoint_copy(BasicType t, bool aligned,
a61af66fc99e Initial load
duke
parents:
diff changeset
1096 Address::ScaleFactor sf,
a61af66fc99e Initial load
duke
parents:
diff changeset
1097 address nooverlap_target,
a61af66fc99e Initial load
duke
parents:
diff changeset
1098 address* entry, const char *name) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1099 __ align(CodeEntryAlignment);
a61af66fc99e Initial load
duke
parents:
diff changeset
1100 StubCodeMark mark(this, "StubRoutines", name);
a61af66fc99e Initial load
duke
parents:
diff changeset
1101 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
1102
a61af66fc99e Initial load
duke
parents:
diff changeset
1103 Label L_0_count, L_exit, L_skip_align1, L_skip_align2, L_copy_byte;
a61af66fc99e Initial load
duke
parents:
diff changeset
1104 Label L_copy_2_bytes, L_copy_4_bytes, L_copy_8_bytes, L_copy_8_bytes_loop;
a61af66fc99e Initial load
duke
parents:
diff changeset
1105
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1106 int shift = Address::times_ptr - sf;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1107
a61af66fc99e Initial load
duke
parents:
diff changeset
1108 const Register src = rax; // source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1109 const Register dst = rdx; // destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1110 const Register from = rsi; // source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1111 const Register to = rdi; // destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1112 const Register count = rcx; // elements count
a61af66fc99e Initial load
duke
parents:
diff changeset
1113 const Register end = rax; // array end address
a61af66fc99e Initial load
duke
parents:
diff changeset
1114
a61af66fc99e Initial load
duke
parents:
diff changeset
1115 __ enter(); // required for proper stackwalking of RuntimeStub frame
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1116 __ push(rsi);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1117 __ push(rdi);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1118 __ movptr(src , Address(rsp, 12+ 4)); // from
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1119 __ movptr(dst , Address(rsp, 12+ 8)); // to
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1120 __ movl2ptr(count, Address(rsp, 12+12)); // count
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1121 if (t == T_OBJECT) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1122 gen_write_ref_array_pre_barrier(dst, count);
a61af66fc99e Initial load
duke
parents:
diff changeset
1123 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1124
a61af66fc99e Initial load
duke
parents:
diff changeset
1125 if (entry != NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1126 *entry = __ pc(); // Entry point from generic arraycopy stub.
a61af66fc99e Initial load
duke
parents:
diff changeset
1127 BLOCK_COMMENT("Entry:");
a61af66fc99e Initial load
duke
parents:
diff changeset
1128 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1129
a61af66fc99e Initial load
duke
parents:
diff changeset
1130 if (t == T_OBJECT) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1131 __ testl(count, count);
a61af66fc99e Initial load
duke
parents:
diff changeset
1132 __ jcc(Assembler::zero, L_0_count);
a61af66fc99e Initial load
duke
parents:
diff changeset
1133 }
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1134 __ mov(from, src);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1135 __ mov(to , dst);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1136
a61af66fc99e Initial load
duke
parents:
diff changeset
1137 // arrays overlap test
a61af66fc99e Initial load
duke
parents:
diff changeset
1138 RuntimeAddress nooverlap(nooverlap_target);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1139 __ cmpptr(dst, src);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1140 __ lea(end, Address(src, count, sf, 0)); // src + count * elem_size
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1141 __ jump_cc(Assembler::belowEqual, nooverlap);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1142 __ cmpptr(dst, end);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1143 __ jump_cc(Assembler::aboveEqual, nooverlap);
a61af66fc99e Initial load
duke
parents:
diff changeset
1144
a61af66fc99e Initial load
duke
parents:
diff changeset
1145 // copy from high to low
a61af66fc99e Initial load
duke
parents:
diff changeset
1146 __ cmpl(count, 2<<shift); // Short arrays (< 8 bytes) copy by element
a61af66fc99e Initial load
duke
parents:
diff changeset
1147 __ jcc(Assembler::below, L_copy_4_bytes); // use unsigned cmp
a61af66fc99e Initial load
duke
parents:
diff changeset
1148 if (t == T_BYTE || t == T_SHORT) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1149 // Align the end of destination array at 4 bytes address boundary
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1150 __ lea(end, Address(dst, count, sf, 0));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1151 if (t == T_BYTE) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1152 // One byte misalignment happens only for byte arrays
a61af66fc99e Initial load
duke
parents:
diff changeset
1153 __ testl(end, 1);
a61af66fc99e Initial load
duke
parents:
diff changeset
1154 __ jccb(Assembler::zero, L_skip_align1);
a61af66fc99e Initial load
duke
parents:
diff changeset
1155 __ decrement(count);
a61af66fc99e Initial load
duke
parents:
diff changeset
1156 __ movb(rdx, Address(from, count, sf, 0));
a61af66fc99e Initial load
duke
parents:
diff changeset
1157 __ movb(Address(to, count, sf, 0), rdx);
a61af66fc99e Initial load
duke
parents:
diff changeset
1158 __ BIND(L_skip_align1);
a61af66fc99e Initial load
duke
parents:
diff changeset
1159 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1160 // Two bytes misalignment happens only for byte and short (char) arrays
a61af66fc99e Initial load
duke
parents:
diff changeset
1161 __ testl(end, 2);
a61af66fc99e Initial load
duke
parents:
diff changeset
1162 __ jccb(Assembler::zero, L_skip_align2);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1163 __ subptr(count, 1<<(shift-1));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1164 __ movw(rdx, Address(from, count, sf, 0));
a61af66fc99e Initial load
duke
parents:
diff changeset
1165 __ movw(Address(to, count, sf, 0), rdx);
a61af66fc99e Initial load
duke
parents:
diff changeset
1166 __ BIND(L_skip_align2);
a61af66fc99e Initial load
duke
parents:
diff changeset
1167 __ cmpl(count, 2<<shift); // Short arrays (< 8 bytes) copy by element
a61af66fc99e Initial load
duke
parents:
diff changeset
1168 __ jcc(Assembler::below, L_copy_4_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1169 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1170
a61af66fc99e Initial load
duke
parents:
diff changeset
1171 if (!VM_Version::supports_mmx()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1172 __ std();
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1173 __ mov(rax, count); // Save 'count'
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1174 __ mov(rdx, to); // Save 'to'
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1175 __ lea(rsi, Address(from, count, sf, -4));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1176 __ lea(rdi, Address(to , count, sf, -4));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1177 __ shrptr(count, shift); // bytes count
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1178 __ rep_mov();
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1179 __ cld();
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1180 __ mov(count, rax); // restore 'count'
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1181 __ andl(count, (1<<shift)-1); // mask the number of rest elements
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1182 __ movptr(from, Address(rsp, 12+4)); // reread 'from'
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1183 __ mov(to, rdx); // restore 'to'
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1184 __ jmpb(L_copy_2_bytes); // all dword were copied
a61af66fc99e Initial load
duke
parents:
diff changeset
1185 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1186 // Align to 8 bytes the end of array. It is aligned to 4 bytes already.
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1187 __ testptr(end, 4);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1188 __ jccb(Assembler::zero, L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1189 __ subl(count, 1<<shift);
a61af66fc99e Initial load
duke
parents:
diff changeset
1190 __ movl(rdx, Address(from, count, sf, 0));
a61af66fc99e Initial load
duke
parents:
diff changeset
1191 __ movl(Address(to, count, sf, 0), rdx);
a61af66fc99e Initial load
duke
parents:
diff changeset
1192 __ jmpb(L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1193
1365
6476042f815c 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 1299
diff changeset
1194 __ align(OptoLoopAlignment);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1195 // Move 8 bytes
a61af66fc99e Initial load
duke
parents:
diff changeset
1196 __ BIND(L_copy_8_bytes_loop);
405
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1197 if (UseXMMForArrayCopy) {
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1198 __ movq(xmm0, Address(from, count, sf, 0));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1199 __ movq(Address(to, count, sf, 0), xmm0);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1200 } else {
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1201 __ movq(mmx0, Address(from, count, sf, 0));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1202 __ movq(Address(to, count, sf, 0), mmx0);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1203 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1204 __ BIND(L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1205 __ subl(count, 2<<shift);
a61af66fc99e Initial load
duke
parents:
diff changeset
1206 __ jcc(Assembler::greaterEqual, L_copy_8_bytes_loop);
a61af66fc99e Initial load
duke
parents:
diff changeset
1207 __ addl(count, 2<<shift);
405
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1208 if (!UseXMMForArrayCopy) {
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1209 __ emms();
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1210 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1211 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1212 __ BIND(L_copy_4_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1213 // copy prefix qword
a61af66fc99e Initial load
duke
parents:
diff changeset
1214 __ testl(count, 1<<shift);
a61af66fc99e Initial load
duke
parents:
diff changeset
1215 __ jccb(Assembler::zero, L_copy_2_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1216 __ movl(rdx, Address(from, count, sf, -4));
a61af66fc99e Initial load
duke
parents:
diff changeset
1217 __ movl(Address(to, count, sf, -4), rdx);
a61af66fc99e Initial load
duke
parents:
diff changeset
1218
a61af66fc99e Initial load
duke
parents:
diff changeset
1219 if (t == T_BYTE || t == T_SHORT) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1220 __ subl(count, (1<<shift));
a61af66fc99e Initial load
duke
parents:
diff changeset
1221 __ BIND(L_copy_2_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1222 // copy prefix dword
a61af66fc99e Initial load
duke
parents:
diff changeset
1223 __ testl(count, 1<<(shift-1));
a61af66fc99e Initial load
duke
parents:
diff changeset
1224 __ jccb(Assembler::zero, L_copy_byte);
a61af66fc99e Initial load
duke
parents:
diff changeset
1225 __ movw(rdx, Address(from, count, sf, -2));
a61af66fc99e Initial load
duke
parents:
diff changeset
1226 __ movw(Address(to, count, sf, -2), rdx);
a61af66fc99e Initial load
duke
parents:
diff changeset
1227 if (t == T_BYTE) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1228 __ subl(count, 1<<(shift-1));
a61af66fc99e Initial load
duke
parents:
diff changeset
1229 __ BIND(L_copy_byte);
a61af66fc99e Initial load
duke
parents:
diff changeset
1230 // copy prefix byte
a61af66fc99e Initial load
duke
parents:
diff changeset
1231 __ testl(count, 1);
a61af66fc99e Initial load
duke
parents:
diff changeset
1232 __ jccb(Assembler::zero, L_exit);
a61af66fc99e Initial load
duke
parents:
diff changeset
1233 __ movb(rdx, Address(from, 0));
a61af66fc99e Initial load
duke
parents:
diff changeset
1234 __ movb(Address(to, 0), rdx);
a61af66fc99e Initial load
duke
parents:
diff changeset
1235 __ BIND(L_exit);
a61af66fc99e Initial load
duke
parents:
diff changeset
1236 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1237 __ BIND(L_copy_byte);
a61af66fc99e Initial load
duke
parents:
diff changeset
1238 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1239 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1240 __ BIND(L_copy_2_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1241 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1242 if (t == T_OBJECT) {
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1243 __ movl2ptr(count, Address(rsp, 12+12)); // reread count
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1244 gen_write_ref_array_post_barrier(to, count);
a61af66fc99e Initial load
duke
parents:
diff changeset
1245 __ BIND(L_0_count);
a61af66fc99e Initial load
duke
parents:
diff changeset
1246 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1247 inc_copy_counter_np(t);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1248 __ pop(rdi);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1249 __ pop(rsi);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1250 __ leave(); // required for proper stackwalking of RuntimeStub frame
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1251 __ xorptr(rax, rax); // return 0
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1252 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1253 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
1254 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1255
a61af66fc99e Initial load
duke
parents:
diff changeset
1256
a61af66fc99e Initial load
duke
parents:
diff changeset
1257 address generate_disjoint_long_copy(address* entry, const char *name) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1258 __ align(CodeEntryAlignment);
a61af66fc99e Initial load
duke
parents:
diff changeset
1259 StubCodeMark mark(this, "StubRoutines", name);
a61af66fc99e Initial load
duke
parents:
diff changeset
1260 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
1261
a61af66fc99e Initial load
duke
parents:
diff changeset
1262 Label L_copy_8_bytes, L_copy_8_bytes_loop;
a61af66fc99e Initial load
duke
parents:
diff changeset
1263 const Register from = rax; // source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1264 const Register to = rdx; // destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1265 const Register count = rcx; // elements count
a61af66fc99e Initial load
duke
parents:
diff changeset
1266 const Register to_from = rdx; // (to - from)
a61af66fc99e Initial load
duke
parents:
diff changeset
1267
a61af66fc99e Initial load
duke
parents:
diff changeset
1268 __ enter(); // required for proper stackwalking of RuntimeStub frame
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1269 __ movptr(from , Address(rsp, 8+0)); // from
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1270 __ movptr(to , Address(rsp, 8+4)); // to
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1271 __ movl2ptr(count, Address(rsp, 8+8)); // count
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1272
a61af66fc99e Initial load
duke
parents:
diff changeset
1273 *entry = __ pc(); // Entry point from conjoint arraycopy stub.
a61af66fc99e Initial load
duke
parents:
diff changeset
1274 BLOCK_COMMENT("Entry:");
a61af66fc99e Initial load
duke
parents:
diff changeset
1275
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1276 __ subptr(to, from); // to --> to_from
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1277 if (VM_Version::supports_mmx()) {
405
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1278 if (UseXMMForArrayCopy) {
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1279 xmm_copy_forward(from, to_from, count);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1280 } else {
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1281 mmx_copy_forward(from, to_from, count);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1282 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1283 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1284 __ jmpb(L_copy_8_bytes);
1365
6476042f815c 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 1299
diff changeset
1285 __ align(OptoLoopAlignment);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1286 __ BIND(L_copy_8_bytes_loop);
a61af66fc99e Initial load
duke
parents:
diff changeset
1287 __ fild_d(Address(from, 0));
a61af66fc99e Initial load
duke
parents:
diff changeset
1288 __ fistp_d(Address(from, to_from, Address::times_1));
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1289 __ addptr(from, 8);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1290 __ BIND(L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1291 __ decrement(count);
a61af66fc99e Initial load
duke
parents:
diff changeset
1292 __ jcc(Assembler::greaterEqual, L_copy_8_bytes_loop);
a61af66fc99e Initial load
duke
parents:
diff changeset
1293 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1294 inc_copy_counter_np(T_LONG);
a61af66fc99e Initial load
duke
parents:
diff changeset
1295 __ leave(); // required for proper stackwalking of RuntimeStub frame
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1296 __ xorptr(rax, rax); // return 0
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1297 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1298 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
1299 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1300
a61af66fc99e Initial load
duke
parents:
diff changeset
1301 address generate_conjoint_long_copy(address nooverlap_target,
a61af66fc99e Initial load
duke
parents:
diff changeset
1302 address* entry, const char *name) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1303 __ align(CodeEntryAlignment);
a61af66fc99e Initial load
duke
parents:
diff changeset
1304 StubCodeMark mark(this, "StubRoutines", name);
a61af66fc99e Initial load
duke
parents:
diff changeset
1305 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
1306
a61af66fc99e Initial load
duke
parents:
diff changeset
1307 Label L_copy_8_bytes, L_copy_8_bytes_loop;
a61af66fc99e Initial load
duke
parents:
diff changeset
1308 const Register from = rax; // source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1309 const Register to = rdx; // destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1310 const Register count = rcx; // elements count
a61af66fc99e Initial load
duke
parents:
diff changeset
1311 const Register end_from = rax; // source array end address
a61af66fc99e Initial load
duke
parents:
diff changeset
1312
a61af66fc99e Initial load
duke
parents:
diff changeset
1313 __ enter(); // required for proper stackwalking of RuntimeStub frame
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1314 __ movptr(from , Address(rsp, 8+0)); // from
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1315 __ movptr(to , Address(rsp, 8+4)); // to
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1316 __ movl2ptr(count, Address(rsp, 8+8)); // count
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1317
a61af66fc99e Initial load
duke
parents:
diff changeset
1318 *entry = __ pc(); // Entry point from generic arraycopy stub.
a61af66fc99e Initial load
duke
parents:
diff changeset
1319 BLOCK_COMMENT("Entry:");
a61af66fc99e Initial load
duke
parents:
diff changeset
1320
a61af66fc99e Initial load
duke
parents:
diff changeset
1321 // arrays overlap test
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1322 __ cmpptr(to, from);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1323 RuntimeAddress nooverlap(nooverlap_target);
a61af66fc99e Initial load
duke
parents:
diff changeset
1324 __ jump_cc(Assembler::belowEqual, nooverlap);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1325 __ lea(end_from, Address(from, count, Address::times_8, 0));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1326 __ cmpptr(to, end_from);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1327 __ movptr(from, Address(rsp, 8)); // from
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1328 __ jump_cc(Assembler::aboveEqual, nooverlap);
a61af66fc99e Initial load
duke
parents:
diff changeset
1329
a61af66fc99e Initial load
duke
parents:
diff changeset
1330 __ jmpb(L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1331
1365
6476042f815c 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 1299
diff changeset
1332 __ align(OptoLoopAlignment);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1333 __ BIND(L_copy_8_bytes_loop);
a61af66fc99e Initial load
duke
parents:
diff changeset
1334 if (VM_Version::supports_mmx()) {
405
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1335 if (UseXMMForArrayCopy) {
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1336 __ movq(xmm0, Address(from, count, Address::times_8));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1337 __ movq(Address(to, count, Address::times_8), xmm0);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1338 } else {
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1339 __ movq(mmx0, Address(from, count, Address::times_8));
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1340 __ movq(Address(to, count, Address::times_8), mmx0);
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1341 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1342 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1343 __ fild_d(Address(from, count, Address::times_8));
a61af66fc99e Initial load
duke
parents:
diff changeset
1344 __ fistp_d(Address(to, count, Address::times_8));
a61af66fc99e Initial load
duke
parents:
diff changeset
1345 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1346 __ BIND(L_copy_8_bytes);
a61af66fc99e Initial load
duke
parents:
diff changeset
1347 __ decrement(count);
a61af66fc99e Initial load
duke
parents:
diff changeset
1348 __ jcc(Assembler::greaterEqual, L_copy_8_bytes_loop);
a61af66fc99e Initial load
duke
parents:
diff changeset
1349
405
2649e5276dd7 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 362
diff changeset
1350 if (VM_Version::supports_mmx() && !UseXMMForArrayCopy) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1351 __ emms();
a61af66fc99e Initial load
duke
parents:
diff changeset
1352 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1353 inc_copy_counter_np(T_LONG);
a61af66fc99e Initial load
duke
parents:
diff changeset
1354 __ leave(); // required for proper stackwalking of RuntimeStub frame
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1355 __ xorptr(rax, rax); // return 0
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1356 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1357 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
1358 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1359
a61af66fc99e Initial load
duke
parents:
diff changeset
1360
a61af66fc99e Initial load
duke
parents:
diff changeset
1361 // Helper for generating a dynamic type check.
a61af66fc99e Initial load
duke
parents:
diff changeset
1362 // The sub_klass must be one of {rbx, rdx, rsi}.
a61af66fc99e Initial load
duke
parents:
diff changeset
1363 // The temp is killed.
a61af66fc99e Initial load
duke
parents:
diff changeset
1364 void generate_type_check(Register sub_klass,
a61af66fc99e Initial load
duke
parents:
diff changeset
1365 Address& super_check_offset_addr,
a61af66fc99e Initial load
duke
parents:
diff changeset
1366 Address& super_klass_addr,
a61af66fc99e Initial load
duke
parents:
diff changeset
1367 Register temp,
644
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 533
diff changeset
1368 Label* L_success, Label* L_failure) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1369 BLOCK_COMMENT("type_check:");
a61af66fc99e Initial load
duke
parents:
diff changeset
1370
a61af66fc99e Initial load
duke
parents:
diff changeset
1371 Label L_fallthrough;
644
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 533
diff changeset
1372 #define LOCAL_JCC(assembler_con, label_ptr) \
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 533
diff changeset
1373 if (label_ptr != NULL) __ jcc(assembler_con, *(label_ptr)); \
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 533
diff changeset
1374 else __ jcc(assembler_con, L_fallthrough) /*omit semi*/
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1375
644
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 533
diff changeset
1376 // The following is a strange variation of the fast path which requires
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 533
diff changeset
1377 // one less register, because needed values are on the argument stack.
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 533
diff changeset
1378 // __ check_klass_subtype_fast_path(sub_klass, *super_klass*, temp,
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 533
diff changeset
1379 // L_success, L_failure, NULL);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1380 assert_different_registers(sub_klass, temp);
a61af66fc99e Initial load
duke
parents:
diff changeset
1381
a61af66fc99e Initial load
duke
parents:
diff changeset
1382 int sc_offset = (klassOopDesc::header_size() * HeapWordSize +
a61af66fc99e Initial load
duke
parents:
diff changeset
1383 Klass::secondary_super_cache_offset_in_bytes());
a61af66fc99e Initial load
duke
parents:
diff changeset
1384
a61af66fc99e Initial load
duke
parents:
diff changeset
1385 // if the pointers are equal, we are done (e.g., String[] elements)
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1386 __ cmpptr(sub_klass, super_klass_addr);
644
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 533
diff changeset
1387 LOCAL_JCC(Assembler::equal, L_success);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1388
a61af66fc99e Initial load
duke
parents:
diff changeset
1389 // check the supertype display:
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1390 __ movl2ptr(temp, super_check_offset_addr);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1391 Address super_check_addr(sub_klass, temp, Address::times_1, 0);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1392 __ movptr(temp, super_check_addr); // load displayed supertype
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1393 __ cmpptr(temp, super_klass_addr); // test the super type
644
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 533
diff changeset
1394 LOCAL_JCC(Assembler::equal, L_success);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1395
a61af66fc99e Initial load
duke
parents:
diff changeset
1396 // if it was a primary super, we can just fail immediately
a61af66fc99e Initial load
duke
parents:
diff changeset
1397 __ cmpl(super_check_offset_addr, sc_offset);
644
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 533
diff changeset
1398 LOCAL_JCC(Assembler::notEqual, L_failure);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1399
644
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 533
diff changeset
1400 // The repne_scan instruction uses fixed registers, which will get spilled.
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 533
diff changeset
1401 // We happen to know this works best when super_klass is in rax.
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 533
diff changeset
1402 Register super_klass = temp;
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 533
diff changeset
1403 __ movptr(super_klass, super_klass_addr);
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 533
diff changeset
1404 __ check_klass_subtype_slow_path(sub_klass, super_klass, noreg, noreg,
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 533
diff changeset
1405 L_success, L_failure);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1406
644
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 533
diff changeset
1407 __ bind(L_fallthrough);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1408
644
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 533
diff changeset
1409 if (L_success == NULL) { BLOCK_COMMENT("L_success:"); }
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 533
diff changeset
1410 if (L_failure == NULL) { BLOCK_COMMENT("L_failure:"); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1411
644
c517646eef23 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 533
diff changeset
1412 #undef LOCAL_JCC
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1413 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1414
a61af66fc99e Initial load
duke
parents:
diff changeset
1415 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1416 // Generate checkcasting array copy stub
a61af66fc99e Initial load
duke
parents:
diff changeset
1417 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1418 // Input:
a61af66fc99e Initial load
duke
parents:
diff changeset
1419 // 4(rsp) - source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1420 // 8(rsp) - destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1421 // 12(rsp) - element count, can be zero
a61af66fc99e Initial load
duke
parents:
diff changeset
1422 // 16(rsp) - size_t ckoff (super_check_offset)
a61af66fc99e Initial load
duke
parents:
diff changeset
1423 // 20(rsp) - oop ckval (super_klass)
a61af66fc99e Initial load
duke
parents:
diff changeset
1424 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1425 // Output:
a61af66fc99e Initial load
duke
parents:
diff changeset
1426 // rax, == 0 - success
a61af66fc99e Initial load
duke
parents:
diff changeset
1427 // rax, == -1^K - failure, where K is partial transfer count
a61af66fc99e Initial load
duke
parents:
diff changeset
1428 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1429 address generate_checkcast_copy(const char *name, address* entry) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1430 __ align(CodeEntryAlignment);
a61af66fc99e Initial load
duke
parents:
diff changeset
1431 StubCodeMark mark(this, "StubRoutines", name);
a61af66fc99e Initial load
duke
parents:
diff changeset
1432 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
1433
a61af66fc99e Initial load
duke
parents:
diff changeset
1434 Label L_load_element, L_store_element, L_do_card_marks, L_done;
a61af66fc99e Initial load
duke
parents:
diff changeset
1435
a61af66fc99e Initial load
duke
parents:
diff changeset
1436 // register use:
a61af66fc99e Initial load
duke
parents:
diff changeset
1437 // rax, rdx, rcx -- loop control (end_from, end_to, count)
a61af66fc99e Initial load
duke
parents:
diff changeset
1438 // rdi, rsi -- element access (oop, klass)
a61af66fc99e Initial load
duke
parents:
diff changeset
1439 // rbx, -- temp
a61af66fc99e Initial load
duke
parents:
diff changeset
1440 const Register from = rax; // source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1441 const Register to = rdx; // destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1442 const Register length = rcx; // elements count
a61af66fc99e Initial load
duke
parents:
diff changeset
1443 const Register elem = rdi; // each oop copied
a61af66fc99e Initial load
duke
parents:
diff changeset
1444 const Register elem_klass = rsi; // each elem._klass (sub_klass)
a61af66fc99e Initial load
duke
parents:
diff changeset
1445 const Register temp = rbx; // lone remaining temp
a61af66fc99e Initial load
duke
parents:
diff changeset
1446
a61af66fc99e Initial load
duke
parents:
diff changeset
1447 __ enter(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
1448
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1449 __ push(rsi);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1450 __ push(rdi);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1451 __ push(rbx);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1452
a61af66fc99e Initial load
duke
parents:
diff changeset
1453 Address from_arg(rsp, 16+ 4); // from
a61af66fc99e Initial load
duke
parents:
diff changeset
1454 Address to_arg(rsp, 16+ 8); // to
a61af66fc99e Initial load
duke
parents:
diff changeset
1455 Address length_arg(rsp, 16+12); // elements count
a61af66fc99e Initial load
duke
parents:
diff changeset
1456 Address ckoff_arg(rsp, 16+16); // super_check_offset
a61af66fc99e Initial load
duke
parents:
diff changeset
1457 Address ckval_arg(rsp, 16+20); // super_klass
a61af66fc99e Initial load
duke
parents:
diff changeset
1458
a61af66fc99e Initial load
duke
parents:
diff changeset
1459 // Load up:
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1460 __ movptr(from, from_arg);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1461 __ movptr(to, to_arg);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1462 __ movl2ptr(length, length_arg);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1463
a61af66fc99e Initial load
duke
parents:
diff changeset
1464 *entry = __ pc(); // Entry point from generic arraycopy stub.
a61af66fc99e Initial load
duke
parents:
diff changeset
1465 BLOCK_COMMENT("Entry:");
a61af66fc99e Initial load
duke
parents:
diff changeset
1466
a61af66fc99e Initial load
duke
parents:
diff changeset
1467 //---------------------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1468 // Assembler stub will be used for this call to arraycopy
a61af66fc99e Initial load
duke
parents:
diff changeset
1469 // if the two arrays are subtypes of Object[] but the
a61af66fc99e Initial load
duke
parents:
diff changeset
1470 // destination array type is not equal to or a supertype
a61af66fc99e Initial load
duke
parents:
diff changeset
1471 // of the source type. Each element must be separately
a61af66fc99e Initial load
duke
parents:
diff changeset
1472 // checked.
a61af66fc99e Initial load
duke
parents:
diff changeset
1473
a61af66fc99e Initial load
duke
parents:
diff changeset
1474 // Loop-invariant addresses. They are exclusive end pointers.
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1475 Address end_from_addr(from, length, Address::times_ptr, 0);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1476 Address end_to_addr(to, length, Address::times_ptr, 0);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1477
a61af66fc99e Initial load
duke
parents:
diff changeset
1478 Register end_from = from; // re-use
a61af66fc99e Initial load
duke
parents:
diff changeset
1479 Register end_to = to; // re-use
a61af66fc99e Initial load
duke
parents:
diff changeset
1480 Register count = length; // re-use
a61af66fc99e Initial load
duke
parents:
diff changeset
1481
a61af66fc99e Initial load
duke
parents:
diff changeset
1482 // Loop-variant addresses. They assume post-incremented count < 0.
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1483 Address from_element_addr(end_from, count, Address::times_ptr, 0);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1484 Address to_element_addr(end_to, count, Address::times_ptr, 0);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1485 Address elem_klass_addr(elem, oopDesc::klass_offset_in_bytes());
a61af66fc99e Initial load
duke
parents:
diff changeset
1486
a61af66fc99e Initial load
duke
parents:
diff changeset
1487 // Copy from low to high addresses, indexed from the end of each array.
342
37f87013dfd8 6711316: Open source the Garbage-First garbage collector
ysr
parents: 19
diff changeset
1488 gen_write_ref_array_pre_barrier(to, count);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1489 __ lea(end_from, end_from_addr);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1490 __ lea(end_to, end_to_addr);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1491 assert(length == count, ""); // else fix next line:
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1492 __ negptr(count); // negate and test the length
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1493 __ jccb(Assembler::notZero, L_load_element);
a61af66fc99e Initial load
duke
parents:
diff changeset
1494
a61af66fc99e Initial load
duke
parents:
diff changeset
1495 // Empty array: Nothing to do.
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1496 __ xorptr(rax, rax); // return 0 on (trivial) success
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1497 __ jmp(L_done);
a61af66fc99e Initial load
duke
parents:
diff changeset
1498
a61af66fc99e Initial load
duke
parents:
diff changeset
1499 // ======== begin loop ========
a61af66fc99e Initial load
duke
parents:
diff changeset
1500 // (Loop is rotated; its entry is L_load_element.)
a61af66fc99e Initial load
duke
parents:
diff changeset
1501 // Loop control:
a61af66fc99e Initial load
duke
parents:
diff changeset
1502 // for (count = -count; count != 0; count++)
a61af66fc99e Initial load
duke
parents:
diff changeset
1503 // Base pointers src, dst are biased by 8*count,to last element.
1365
6476042f815c 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 1299
diff changeset
1504 __ align(OptoLoopAlignment);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1505
a61af66fc99e Initial load
duke
parents:
diff changeset
1506 __ BIND(L_store_element);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1507 __ movptr(to_element_addr, elem); // store the oop
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1508 __ increment(count); // increment the count toward zero
a61af66fc99e Initial load
duke
parents:
diff changeset
1509 __ jccb(Assembler::zero, L_do_card_marks);
a61af66fc99e Initial load
duke
parents:
diff changeset
1510
a61af66fc99e Initial load
duke
parents:
diff changeset
1511 // ======== loop entry is here ========
a61af66fc99e Initial load
duke
parents:
diff changeset
1512 __ BIND(L_load_element);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1513 __ movptr(elem, from_element_addr); // load the oop
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1514 __ testptr(elem, elem);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1515 __ jccb(Assembler::zero, L_store_element);
a61af66fc99e Initial load
duke
parents:
diff changeset
1516
a61af66fc99e Initial load
duke
parents:
diff changeset
1517 // (Could do a trick here: Remember last successful non-null
a61af66fc99e Initial load
duke
parents:
diff changeset
1518 // element stored and make a quick oop equality check on it.)
a61af66fc99e Initial load
duke
parents:
diff changeset
1519
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1520 __ movptr(elem_klass, elem_klass_addr); // query the object klass
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1521 generate_type_check(elem_klass, ckoff_arg, ckval_arg, temp,
a61af66fc99e Initial load
duke
parents:
diff changeset
1522 &L_store_element, NULL);
a61af66fc99e Initial load
duke
parents:
diff changeset
1523 // (On fall-through, we have failed the element type check.)
a61af66fc99e Initial load
duke
parents:
diff changeset
1524 // ======== end loop ========
a61af66fc99e Initial load
duke
parents:
diff changeset
1525
a61af66fc99e Initial load
duke
parents:
diff changeset
1526 // It was a real error; we must depend on the caller to finish the job.
19
a73cc31728fe 6614036: REGRESSION: Java server x86 VM intermittently crash with SIGSEGV (0xb)
rasbold
parents: 16
diff changeset
1527 // Register "count" = -1 * number of *remaining* oops, length_arg = *total* oops.
a73cc31728fe 6614036: REGRESSION: Java server x86 VM intermittently crash with SIGSEGV (0xb)
rasbold
parents: 16
diff changeset
1528 // Emit GC store barriers for the oops we have copied (length_arg + count),
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1529 // and report their number to the caller.
a61af66fc99e Initial load
duke
parents:
diff changeset
1530 __ addl(count, length_arg); // transfers = (length - remaining)
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1531 __ movl2ptr(rax, count); // save the value
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1532 __ notptr(rax); // report (-1^K) to caller
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1533 __ movptr(to, to_arg); // reload
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1534 assert_different_registers(to, count, rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
1535 gen_write_ref_array_post_barrier(to, count);
a61af66fc99e Initial load
duke
parents:
diff changeset
1536 __ jmpb(L_done);
a61af66fc99e Initial load
duke
parents:
diff changeset
1537
a61af66fc99e Initial load
duke
parents:
diff changeset
1538 // Come here on success only.
a61af66fc99e Initial load
duke
parents:
diff changeset
1539 __ BIND(L_do_card_marks);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1540 __ movl2ptr(count, length_arg);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1541 __ movptr(to, to_arg); // reload
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1542 gen_write_ref_array_post_barrier(to, count);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1543 __ xorptr(rax, rax); // return 0 on success
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1544
a61af66fc99e Initial load
duke
parents:
diff changeset
1545 // Common exit point (success or failure).
a61af66fc99e Initial load
duke
parents:
diff changeset
1546 __ BIND(L_done);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1547 __ pop(rbx);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1548 __ pop(rdi);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1549 __ pop(rsi);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1550 inc_counter_np(SharedRuntime::_checkcast_array_copy_ctr);
a61af66fc99e Initial load
duke
parents:
diff changeset
1551 __ leave(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
1552 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1553
a61af66fc99e Initial load
duke
parents:
diff changeset
1554 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
1555 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1556
a61af66fc99e Initial load
duke
parents:
diff changeset
1557 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1558 // Generate 'unsafe' array copy stub
a61af66fc99e Initial load
duke
parents:
diff changeset
1559 // Though just as safe as the other stubs, it takes an unscaled
a61af66fc99e Initial load
duke
parents:
diff changeset
1560 // size_t argument instead of an element count.
a61af66fc99e Initial load
duke
parents:
diff changeset
1561 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1562 // Input:
a61af66fc99e Initial load
duke
parents:
diff changeset
1563 // 4(rsp) - source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1564 // 8(rsp) - destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1565 // 12(rsp) - byte count, can be zero
a61af66fc99e Initial load
duke
parents:
diff changeset
1566 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1567 // Output:
a61af66fc99e Initial load
duke
parents:
diff changeset
1568 // rax, == 0 - success
a61af66fc99e Initial load
duke
parents:
diff changeset
1569 // rax, == -1 - need to call System.arraycopy
a61af66fc99e Initial load
duke
parents:
diff changeset
1570 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1571 // Examines the alignment of the operands and dispatches
a61af66fc99e Initial load
duke
parents:
diff changeset
1572 // to a long, int, short, or byte copy loop.
a61af66fc99e Initial load
duke
parents:
diff changeset
1573 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1574 address generate_unsafe_copy(const char *name,
a61af66fc99e Initial load
duke
parents:
diff changeset
1575 address byte_copy_entry,
a61af66fc99e Initial load
duke
parents:
diff changeset
1576 address short_copy_entry,
a61af66fc99e Initial load
duke
parents:
diff changeset
1577 address int_copy_entry,
a61af66fc99e Initial load
duke
parents:
diff changeset
1578 address long_copy_entry) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1579
a61af66fc99e Initial load
duke
parents:
diff changeset
1580 Label L_long_aligned, L_int_aligned, L_short_aligned;
a61af66fc99e Initial load
duke
parents:
diff changeset
1581
a61af66fc99e Initial load
duke
parents:
diff changeset
1582 __ align(CodeEntryAlignment);
a61af66fc99e Initial load
duke
parents:
diff changeset
1583 StubCodeMark mark(this, "StubRoutines", name);
a61af66fc99e Initial load
duke
parents:
diff changeset
1584 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
1585
a61af66fc99e Initial load
duke
parents:
diff changeset
1586 const Register from = rax; // source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1587 const Register to = rdx; // destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1588 const Register count = rcx; // elements count
a61af66fc99e Initial load
duke
parents:
diff changeset
1589
a61af66fc99e Initial load
duke
parents:
diff changeset
1590 __ enter(); // required for proper stackwalking of RuntimeStub frame
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1591 __ push(rsi);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1592 __ push(rdi);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1593 Address from_arg(rsp, 12+ 4); // from
a61af66fc99e Initial load
duke
parents:
diff changeset
1594 Address to_arg(rsp, 12+ 8); // to
a61af66fc99e Initial load
duke
parents:
diff changeset
1595 Address count_arg(rsp, 12+12); // byte count
a61af66fc99e Initial load
duke
parents:
diff changeset
1596
a61af66fc99e Initial load
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parents:
diff changeset
1597 // Load up:
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1598 __ movptr(from , from_arg);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1599 __ movptr(to , to_arg);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1600 __ movl2ptr(count, count_arg);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1601
a61af66fc99e Initial load
duke
parents:
diff changeset
1602 // bump this on entry, not on exit:
a61af66fc99e Initial load
duke
parents:
diff changeset
1603 inc_counter_np(SharedRuntime::_unsafe_array_copy_ctr);
a61af66fc99e Initial load
duke
parents:
diff changeset
1604
a61af66fc99e Initial load
duke
parents:
diff changeset
1605 const Register bits = rsi;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1606 __ mov(bits, from);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1607 __ orptr(bits, to);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1608 __ orptr(bits, count);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1609
a61af66fc99e Initial load
duke
parents:
diff changeset
1610 __ testl(bits, BytesPerLong-1);
a61af66fc99e Initial load
duke
parents:
diff changeset
1611 __ jccb(Assembler::zero, L_long_aligned);
a61af66fc99e Initial load
duke
parents:
diff changeset
1612
a61af66fc99e Initial load
duke
parents:
diff changeset
1613 __ testl(bits, BytesPerInt-1);
a61af66fc99e Initial load
duke
parents:
diff changeset
1614 __ jccb(Assembler::zero, L_int_aligned);
a61af66fc99e Initial load
duke
parents:
diff changeset
1615
a61af66fc99e Initial load
duke
parents:
diff changeset
1616 __ testl(bits, BytesPerShort-1);
a61af66fc99e Initial load
duke
parents:
diff changeset
1617 __ jump_cc(Assembler::notZero, RuntimeAddress(byte_copy_entry));
a61af66fc99e Initial load
duke
parents:
diff changeset
1618
a61af66fc99e Initial load
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parents:
diff changeset
1619 __ BIND(L_short_aligned);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1620 __ shrptr(count, LogBytesPerShort); // size => short_count
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1621 __ movl(count_arg, count); // update 'count'
a61af66fc99e Initial load
duke
parents:
diff changeset
1622 __ jump(RuntimeAddress(short_copy_entry));
a61af66fc99e Initial load
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parents:
diff changeset
1623
a61af66fc99e Initial load
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parents:
diff changeset
1624 __ BIND(L_int_aligned);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1625 __ shrptr(count, LogBytesPerInt); // size => int_count
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1626 __ movl(count_arg, count); // update 'count'
a61af66fc99e Initial load
duke
parents:
diff changeset
1627 __ jump(RuntimeAddress(int_copy_entry));
a61af66fc99e Initial load
duke
parents:
diff changeset
1628
a61af66fc99e Initial load
duke
parents:
diff changeset
1629 __ BIND(L_long_aligned);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1630 __ shrptr(count, LogBytesPerLong); // size => qword_count
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1631 __ movl(count_arg, count); // update 'count'
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1632 __ pop(rdi); // Do pops here since jlong_arraycopy stub does not do it.
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1633 __ pop(rsi);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1634 __ jump(RuntimeAddress(long_copy_entry));
a61af66fc99e Initial load
duke
parents:
diff changeset
1635
a61af66fc99e Initial load
duke
parents:
diff changeset
1636 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
1637 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1638
a61af66fc99e Initial load
duke
parents:
diff changeset
1639
a61af66fc99e Initial load
duke
parents:
diff changeset
1640 // Perform range checks on the proposed arraycopy.
a61af66fc99e Initial load
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parents:
diff changeset
1641 // Smashes src_pos and dst_pos. (Uses them up for temps.)
a61af66fc99e Initial load
duke
parents:
diff changeset
1642 void arraycopy_range_checks(Register src,
a61af66fc99e Initial load
duke
parents:
diff changeset
1643 Register src_pos,
a61af66fc99e Initial load
duke
parents:
diff changeset
1644 Register dst,
a61af66fc99e Initial load
duke
parents:
diff changeset
1645 Register dst_pos,
a61af66fc99e Initial load
duke
parents:
diff changeset
1646 Address& length,
a61af66fc99e Initial load
duke
parents:
diff changeset
1647 Label& L_failed) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1648 BLOCK_COMMENT("arraycopy_range_checks:");
a61af66fc99e Initial load
duke
parents:
diff changeset
1649 const Register src_end = src_pos; // source array end position
a61af66fc99e Initial load
duke
parents:
diff changeset
1650 const Register dst_end = dst_pos; // destination array end position
a61af66fc99e Initial load
duke
parents:
diff changeset
1651 __ addl(src_end, length); // src_pos + length
a61af66fc99e Initial load
duke
parents:
diff changeset
1652 __ addl(dst_end, length); // dst_pos + length
a61af66fc99e Initial load
duke
parents:
diff changeset
1653
a61af66fc99e Initial load
duke
parents:
diff changeset
1654 // if (src_pos + length > arrayOop(src)->length() ) FAIL;
a61af66fc99e Initial load
duke
parents:
diff changeset
1655 __ cmpl(src_end, Address(src, arrayOopDesc::length_offset_in_bytes()));
a61af66fc99e Initial load
duke
parents:
diff changeset
1656 __ jcc(Assembler::above, L_failed);
a61af66fc99e Initial load
duke
parents:
diff changeset
1657
a61af66fc99e Initial load
duke
parents:
diff changeset
1658 // if (dst_pos + length > arrayOop(dst)->length() ) FAIL;
a61af66fc99e Initial load
duke
parents:
diff changeset
1659 __ cmpl(dst_end, Address(dst, arrayOopDesc::length_offset_in_bytes()));
a61af66fc99e Initial load
duke
parents:
diff changeset
1660 __ jcc(Assembler::above, L_failed);
a61af66fc99e Initial load
duke
parents:
diff changeset
1661
a61af66fc99e Initial load
duke
parents:
diff changeset
1662 BLOCK_COMMENT("arraycopy_range_checks done");
a61af66fc99e Initial load
duke
parents:
diff changeset
1663 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1664
a61af66fc99e Initial load
duke
parents:
diff changeset
1665
a61af66fc99e Initial load
duke
parents:
diff changeset
1666 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1667 // Generate generic array copy stubs
a61af66fc99e Initial load
duke
parents:
diff changeset
1668 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1669 // Input:
a61af66fc99e Initial load
duke
parents:
diff changeset
1670 // 4(rsp) - src oop
a61af66fc99e Initial load
duke
parents:
diff changeset
1671 // 8(rsp) - src_pos
a61af66fc99e Initial load
duke
parents:
diff changeset
1672 // 12(rsp) - dst oop
a61af66fc99e Initial load
duke
parents:
diff changeset
1673 // 16(rsp) - dst_pos
a61af66fc99e Initial load
duke
parents:
diff changeset
1674 // 20(rsp) - element count
a61af66fc99e Initial load
duke
parents:
diff changeset
1675 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1676 // Output:
a61af66fc99e Initial load
duke
parents:
diff changeset
1677 // rax, == 0 - success
a61af66fc99e Initial load
duke
parents:
diff changeset
1678 // rax, == -1^K - failure, where K is partial transfer count
a61af66fc99e Initial load
duke
parents:
diff changeset
1679 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1680 address generate_generic_copy(const char *name,
a61af66fc99e Initial load
duke
parents:
diff changeset
1681 address entry_jbyte_arraycopy,
a61af66fc99e Initial load
duke
parents:
diff changeset
1682 address entry_jshort_arraycopy,
a61af66fc99e Initial load
duke
parents:
diff changeset
1683 address entry_jint_arraycopy,
a61af66fc99e Initial load
duke
parents:
diff changeset
1684 address entry_oop_arraycopy,
a61af66fc99e Initial load
duke
parents:
diff changeset
1685 address entry_jlong_arraycopy,
a61af66fc99e Initial load
duke
parents:
diff changeset
1686 address entry_checkcast_arraycopy) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1687 Label L_failed, L_failed_0, L_objArray;
a61af66fc99e Initial load
duke
parents:
diff changeset
1688
a61af66fc99e Initial load
duke
parents:
diff changeset
1689 { int modulus = CodeEntryAlignment;
a61af66fc99e Initial load
duke
parents:
diff changeset
1690 int target = modulus - 5; // 5 = sizeof jmp(L_failed)
a61af66fc99e Initial load
duke
parents:
diff changeset
1691 int advance = target - (__ offset() % modulus);
a61af66fc99e Initial load
duke
parents:
diff changeset
1692 if (advance < 0) advance += modulus;
a61af66fc99e Initial load
duke
parents:
diff changeset
1693 if (advance > 0) __ nop(advance);
a61af66fc99e Initial load
duke
parents:
diff changeset
1694 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1695 StubCodeMark mark(this, "StubRoutines", name);
a61af66fc99e Initial load
duke
parents:
diff changeset
1696
a61af66fc99e Initial load
duke
parents:
diff changeset
1697 // Short-hop target to L_failed. Makes for denser prologue code.
a61af66fc99e Initial load
duke
parents:
diff changeset
1698 __ BIND(L_failed_0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1699 __ jmp(L_failed);
a61af66fc99e Initial load
duke
parents:
diff changeset
1700 assert(__ offset() % CodeEntryAlignment == 0, "no further alignment needed");
a61af66fc99e Initial load
duke
parents:
diff changeset
1701
a61af66fc99e Initial load
duke
parents:
diff changeset
1702 __ align(CodeEntryAlignment);
a61af66fc99e Initial load
duke
parents:
diff changeset
1703 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
1704
a61af66fc99e Initial load
duke
parents:
diff changeset
1705 __ enter(); // required for proper stackwalking of RuntimeStub frame
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1706 __ push(rsi);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1707 __ push(rdi);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1708
a61af66fc99e Initial load
duke
parents:
diff changeset
1709 // bump this on entry, not on exit:
a61af66fc99e Initial load
duke
parents:
diff changeset
1710 inc_counter_np(SharedRuntime::_generic_array_copy_ctr);
a61af66fc99e Initial load
duke
parents:
diff changeset
1711
a61af66fc99e Initial load
duke
parents:
diff changeset
1712 // Input values
a61af66fc99e Initial load
duke
parents:
diff changeset
1713 Address SRC (rsp, 12+ 4);
a61af66fc99e Initial load
duke
parents:
diff changeset
1714 Address SRC_POS (rsp, 12+ 8);
a61af66fc99e Initial load
duke
parents:
diff changeset
1715 Address DST (rsp, 12+12);
a61af66fc99e Initial load
duke
parents:
diff changeset
1716 Address DST_POS (rsp, 12+16);
a61af66fc99e Initial load
duke
parents:
diff changeset
1717 Address LENGTH (rsp, 12+20);
a61af66fc99e Initial load
duke
parents:
diff changeset
1718
a61af66fc99e Initial load
duke
parents:
diff changeset
1719 //-----------------------------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1720 // Assembler stub will be used for this call to arraycopy
a61af66fc99e Initial load
duke
parents:
diff changeset
1721 // if the following conditions are met:
a61af66fc99e Initial load
duke
parents:
diff changeset
1722 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1723 // (1) src and dst must not be null.
a61af66fc99e Initial load
duke
parents:
diff changeset
1724 // (2) src_pos must not be negative.
a61af66fc99e Initial load
duke
parents:
diff changeset
1725 // (3) dst_pos must not be negative.
a61af66fc99e Initial load
duke
parents:
diff changeset
1726 // (4) length must not be negative.
a61af66fc99e Initial load
duke
parents:
diff changeset
1727 // (5) src klass and dst klass should be the same and not NULL.
a61af66fc99e Initial load
duke
parents:
diff changeset
1728 // (6) src and dst should be arrays.
a61af66fc99e Initial load
duke
parents:
diff changeset
1729 // (7) src_pos + length must not exceed length of src.
a61af66fc99e Initial load
duke
parents:
diff changeset
1730 // (8) dst_pos + length must not exceed length of dst.
a61af66fc99e Initial load
duke
parents:
diff changeset
1731 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1732
a61af66fc99e Initial load
duke
parents:
diff changeset
1733 const Register src = rax; // source array oop
a61af66fc99e Initial load
duke
parents:
diff changeset
1734 const Register src_pos = rsi;
a61af66fc99e Initial load
duke
parents:
diff changeset
1735 const Register dst = rdx; // destination array oop
a61af66fc99e Initial load
duke
parents:
diff changeset
1736 const Register dst_pos = rdi;
a61af66fc99e Initial load
duke
parents:
diff changeset
1737 const Register length = rcx; // transfer count
a61af66fc99e Initial load
duke
parents:
diff changeset
1738
a61af66fc99e Initial load
duke
parents:
diff changeset
1739 // if (src == NULL) return -1;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1740 __ movptr(src, SRC); // src oop
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1741 __ testptr(src, src);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1742 __ jccb(Assembler::zero, L_failed_0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1743
a61af66fc99e Initial load
duke
parents:
diff changeset
1744 // if (src_pos < 0) return -1;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1745 __ movl2ptr(src_pos, SRC_POS); // src_pos
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1746 __ testl(src_pos, src_pos);
a61af66fc99e Initial load
duke
parents:
diff changeset
1747 __ jccb(Assembler::negative, L_failed_0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1748
a61af66fc99e Initial load
duke
parents:
diff changeset
1749 // if (dst == NULL) return -1;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1750 __ movptr(dst, DST); // dst oop
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1751 __ testptr(dst, dst);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1752 __ jccb(Assembler::zero, L_failed_0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1753
a61af66fc99e Initial load
duke
parents:
diff changeset
1754 // if (dst_pos < 0) return -1;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1755 __ movl2ptr(dst_pos, DST_POS); // dst_pos
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1756 __ testl(dst_pos, dst_pos);
a61af66fc99e Initial load
duke
parents:
diff changeset
1757 __ jccb(Assembler::negative, L_failed_0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1758
a61af66fc99e Initial load
duke
parents:
diff changeset
1759 // if (length < 0) return -1;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1760 __ movl2ptr(length, LENGTH); // length
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1761 __ testl(length, length);
a61af66fc99e Initial load
duke
parents:
diff changeset
1762 __ jccb(Assembler::negative, L_failed_0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1763
a61af66fc99e Initial load
duke
parents:
diff changeset
1764 // if (src->klass() == NULL) return -1;
a61af66fc99e Initial load
duke
parents:
diff changeset
1765 Address src_klass_addr(src, oopDesc::klass_offset_in_bytes());
a61af66fc99e Initial load
duke
parents:
diff changeset
1766 Address dst_klass_addr(dst, oopDesc::klass_offset_in_bytes());
a61af66fc99e Initial load
duke
parents:
diff changeset
1767 const Register rcx_src_klass = rcx; // array klass
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1768 __ movptr(rcx_src_klass, Address(src, oopDesc::klass_offset_in_bytes()));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1769
a61af66fc99e Initial load
duke
parents:
diff changeset
1770 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
1771 // assert(src->klass() != NULL);
a61af66fc99e Initial load
duke
parents:
diff changeset
1772 BLOCK_COMMENT("assert klasses not null");
a61af66fc99e Initial load
duke
parents:
diff changeset
1773 { Label L1, L2;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1774 __ testptr(rcx_src_klass, rcx_src_klass);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1775 __ jccb(Assembler::notZero, L2); // it is broken if klass is NULL
a61af66fc99e Initial load
duke
parents:
diff changeset
1776 __ bind(L1);
a61af66fc99e Initial load
duke
parents:
diff changeset
1777 __ stop("broken null klass");
a61af66fc99e Initial load
duke
parents:
diff changeset
1778 __ bind(L2);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1779 __ cmpptr(dst_klass_addr, (int32_t)NULL_WORD);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1780 __ jccb(Assembler::equal, L1); // this would be broken also
a61af66fc99e Initial load
duke
parents:
diff changeset
1781 BLOCK_COMMENT("assert done");
a61af66fc99e Initial load
duke
parents:
diff changeset
1782 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1783 #endif //ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
1784
a61af66fc99e Initial load
duke
parents:
diff changeset
1785 // Load layout helper (32-bits)
a61af66fc99e Initial load
duke
parents:
diff changeset
1786 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1787 // |array_tag| | header_size | element_type | |log2_element_size|
a61af66fc99e Initial load
duke
parents:
diff changeset
1788 // 32 30 24 16 8 2 0
a61af66fc99e Initial load
duke
parents:
diff changeset
1789 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1790 // array_tag: typeArray = 0x3, objArray = 0x2, non-array = 0x0
a61af66fc99e Initial load
duke
parents:
diff changeset
1791 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1792
a61af66fc99e Initial load
duke
parents:
diff changeset
1793 int lh_offset = klassOopDesc::header_size() * HeapWordSize +
a61af66fc99e Initial load
duke
parents:
diff changeset
1794 Klass::layout_helper_offset_in_bytes();
a61af66fc99e Initial load
duke
parents:
diff changeset
1795 Address src_klass_lh_addr(rcx_src_klass, lh_offset);
a61af66fc99e Initial load
duke
parents:
diff changeset
1796
a61af66fc99e Initial load
duke
parents:
diff changeset
1797 // Handle objArrays completely differently...
a61af66fc99e Initial load
duke
parents:
diff changeset
1798 jint objArray_lh = Klass::array_layout_helper(T_OBJECT);
a61af66fc99e Initial load
duke
parents:
diff changeset
1799 __ cmpl(src_klass_lh_addr, objArray_lh);
a61af66fc99e Initial load
duke
parents:
diff changeset
1800 __ jcc(Assembler::equal, L_objArray);
a61af66fc99e Initial load
duke
parents:
diff changeset
1801
a61af66fc99e Initial load
duke
parents:
diff changeset
1802 // if (src->klass() != dst->klass()) return -1;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1803 __ cmpptr(rcx_src_klass, dst_klass_addr);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1804 __ jccb(Assembler::notEqual, L_failed_0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1805
a61af66fc99e Initial load
duke
parents:
diff changeset
1806 const Register rcx_lh = rcx; // layout helper
a61af66fc99e Initial load
duke
parents:
diff changeset
1807 assert(rcx_lh == rcx_src_klass, "known alias");
a61af66fc99e Initial load
duke
parents:
diff changeset
1808 __ movl(rcx_lh, src_klass_lh_addr);
a61af66fc99e Initial load
duke
parents:
diff changeset
1809
a61af66fc99e Initial load
duke
parents:
diff changeset
1810 // if (!src->is_Array()) return -1;
a61af66fc99e Initial load
duke
parents:
diff changeset
1811 __ cmpl(rcx_lh, Klass::_lh_neutral_value);
a61af66fc99e Initial load
duke
parents:
diff changeset
1812 __ jcc(Assembler::greaterEqual, L_failed_0); // signed cmp
a61af66fc99e Initial load
duke
parents:
diff changeset
1813
a61af66fc99e Initial load
duke
parents:
diff changeset
1814 // At this point, it is known to be a typeArray (array_tag 0x3).
a61af66fc99e Initial load
duke
parents:
diff changeset
1815 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
1816 { Label L;
a61af66fc99e Initial load
duke
parents:
diff changeset
1817 __ cmpl(rcx_lh, (Klass::_lh_array_tag_type_value << Klass::_lh_array_tag_shift));
a61af66fc99e Initial load
duke
parents:
diff changeset
1818 __ jcc(Assembler::greaterEqual, L); // signed cmp
a61af66fc99e Initial load
duke
parents:
diff changeset
1819 __ stop("must be a primitive array");
a61af66fc99e Initial load
duke
parents:
diff changeset
1820 __ bind(L);
a61af66fc99e Initial load
duke
parents:
diff changeset
1821 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1822 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1823
a61af66fc99e Initial load
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parents:
diff changeset
1824 assert_different_registers(src, src_pos, dst, dst_pos, rcx_lh);
a61af66fc99e Initial load
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parents:
diff changeset
1825 arraycopy_range_checks(src, src_pos, dst, dst_pos, LENGTH, L_failed);
a61af66fc99e Initial load
duke
parents:
diff changeset
1826
a61af66fc99e Initial load
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parents:
diff changeset
1827 // typeArrayKlass
a61af66fc99e Initial load
duke
parents:
diff changeset
1828 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1829 // src_addr = (src + array_header_in_bytes()) + (src_pos << log2elemsize);
a61af66fc99e Initial load
duke
parents:
diff changeset
1830 // dst_addr = (dst + array_header_in_bytes()) + (dst_pos << log2elemsize);
a61af66fc99e Initial load
duke
parents:
diff changeset
1831 //
a61af66fc99e Initial load
duke
parents:
diff changeset
1832 const Register rsi_offset = rsi; // array offset
a61af66fc99e Initial load
duke
parents:
diff changeset
1833 const Register src_array = src; // src array offset
a61af66fc99e Initial load
duke
parents:
diff changeset
1834 const Register dst_array = dst; // dst array offset
a61af66fc99e Initial load
duke
parents:
diff changeset
1835 const Register rdi_elsize = rdi; // log2 element size
a61af66fc99e Initial load
duke
parents:
diff changeset
1836
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1837 __ mov(rsi_offset, rcx_lh);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1838 __ shrptr(rsi_offset, Klass::_lh_header_size_shift);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1839 __ andptr(rsi_offset, Klass::_lh_header_size_mask); // array_offset
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1840 __ addptr(src_array, rsi_offset); // src array offset
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1841 __ addptr(dst_array, rsi_offset); // dst array offset
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1842 __ andptr(rcx_lh, Klass::_lh_log2_element_size_mask); // log2 elsize
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1843
a61af66fc99e Initial load
duke
parents:
diff changeset
1844 // next registers should be set before the jump to corresponding stub
a61af66fc99e Initial load
duke
parents:
diff changeset
1845 const Register from = src; // source array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1846 const Register to = dst; // destination array address
a61af66fc99e Initial load
duke
parents:
diff changeset
1847 const Register count = rcx; // elements count
a61af66fc99e Initial load
duke
parents:
diff changeset
1848 // some of them should be duplicated on stack
a61af66fc99e Initial load
duke
parents:
diff changeset
1849 #define FROM Address(rsp, 12+ 4)
a61af66fc99e Initial load
duke
parents:
diff changeset
1850 #define TO Address(rsp, 12+ 8) // Not used now
a61af66fc99e Initial load
duke
parents:
diff changeset
1851 #define COUNT Address(rsp, 12+12) // Only for oop arraycopy
a61af66fc99e Initial load
duke
parents:
diff changeset
1852
a61af66fc99e Initial load
duke
parents:
diff changeset
1853 BLOCK_COMMENT("scale indexes to element size");
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1854 __ movl2ptr(rsi, SRC_POS); // src_pos
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1855 __ shlptr(rsi); // src_pos << rcx (log2 elsize)
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1856 assert(src_array == from, "");
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1857 __ addptr(from, rsi); // from = src_array + SRC_POS << log2 elsize
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1858 __ movl2ptr(rdi, DST_POS); // dst_pos
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1859 __ shlptr(rdi); // dst_pos << rcx (log2 elsize)
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1860 assert(dst_array == to, "");
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1861 __ addptr(to, rdi); // to = dst_array + DST_POS << log2 elsize
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1862 __ movptr(FROM, from); // src_addr
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1863 __ mov(rdi_elsize, rcx_lh); // log2 elsize
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1864 __ movl2ptr(count, LENGTH); // elements count
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1865
a61af66fc99e Initial load
duke
parents:
diff changeset
1866 BLOCK_COMMENT("choose copy loop based on element size");
a61af66fc99e Initial load
duke
parents:
diff changeset
1867 __ cmpl(rdi_elsize, 0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1868
a61af66fc99e Initial load
duke
parents:
diff changeset
1869 __ jump_cc(Assembler::equal, RuntimeAddress(entry_jbyte_arraycopy));
a61af66fc99e Initial load
duke
parents:
diff changeset
1870 __ cmpl(rdi_elsize, LogBytesPerShort);
a61af66fc99e Initial load
duke
parents:
diff changeset
1871 __ jump_cc(Assembler::equal, RuntimeAddress(entry_jshort_arraycopy));
a61af66fc99e Initial load
duke
parents:
diff changeset
1872 __ cmpl(rdi_elsize, LogBytesPerInt);
a61af66fc99e Initial load
duke
parents:
diff changeset
1873 __ jump_cc(Assembler::equal, RuntimeAddress(entry_jint_arraycopy));
a61af66fc99e Initial load
duke
parents:
diff changeset
1874 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
1875 __ cmpl(rdi_elsize, LogBytesPerLong);
a61af66fc99e Initial load
duke
parents:
diff changeset
1876 __ jccb(Assembler::notEqual, L_failed);
a61af66fc99e Initial load
duke
parents:
diff changeset
1877 #endif
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1878 __ pop(rdi); // Do pops here since jlong_arraycopy stub does not do it.
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1879 __ pop(rsi);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1880 __ jump(RuntimeAddress(entry_jlong_arraycopy));
a61af66fc99e Initial load
duke
parents:
diff changeset
1881
a61af66fc99e Initial load
duke
parents:
diff changeset
1882 __ BIND(L_failed);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1883 __ xorptr(rax, rax);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1884 __ notptr(rax); // return -1
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1885 __ pop(rdi);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1886 __ pop(rsi);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1887 __ leave(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
1888 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1889
a61af66fc99e Initial load
duke
parents:
diff changeset
1890 // objArrayKlass
a61af66fc99e Initial load
duke
parents:
diff changeset
1891 __ BIND(L_objArray);
a61af66fc99e Initial load
duke
parents:
diff changeset
1892 // live at this point: rcx_src_klass, src[_pos], dst[_pos]
a61af66fc99e Initial load
duke
parents:
diff changeset
1893
a61af66fc99e Initial load
duke
parents:
diff changeset
1894 Label L_plain_copy, L_checkcast_copy;
a61af66fc99e Initial load
duke
parents:
diff changeset
1895 // test array classes for subtyping
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1896 __ cmpptr(rcx_src_klass, dst_klass_addr); // usual case is exact equality
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1897 __ jccb(Assembler::notEqual, L_checkcast_copy);
a61af66fc99e Initial load
duke
parents:
diff changeset
1898
a61af66fc99e Initial load
duke
parents:
diff changeset
1899 // Identically typed arrays can be copied without element-wise checks.
a61af66fc99e Initial load
duke
parents:
diff changeset
1900 assert_different_registers(src, src_pos, dst, dst_pos, rcx_src_klass);
a61af66fc99e Initial load
duke
parents:
diff changeset
1901 arraycopy_range_checks(src, src_pos, dst, dst_pos, LENGTH, L_failed);
a61af66fc99e Initial load
duke
parents:
diff changeset
1902
a61af66fc99e Initial load
duke
parents:
diff changeset
1903 __ BIND(L_plain_copy);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1904 __ movl2ptr(count, LENGTH); // elements count
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1905 __ movl2ptr(src_pos, SRC_POS); // reload src_pos
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1906 __ lea(from, Address(src, src_pos, Address::times_ptr,
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1907 arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // src_addr
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1908 __ movl2ptr(dst_pos, DST_POS); // reload dst_pos
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1909 __ lea(to, Address(dst, dst_pos, Address::times_ptr,
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1910 arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // dst_addr
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1911 __ movptr(FROM, from); // src_addr
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1912 __ movptr(TO, to); // dst_addr
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1913 __ movl(COUNT, count); // count
a61af66fc99e Initial load
duke
parents:
diff changeset
1914 __ jump(RuntimeAddress(entry_oop_arraycopy));
a61af66fc99e Initial load
duke
parents:
diff changeset
1915
a61af66fc99e Initial load
duke
parents:
diff changeset
1916 __ BIND(L_checkcast_copy);
a61af66fc99e Initial load
duke
parents:
diff changeset
1917 // live at this point: rcx_src_klass, dst[_pos], src[_pos]
a61af66fc99e Initial load
duke
parents:
diff changeset
1918 {
a61af66fc99e Initial load
duke
parents:
diff changeset
1919 // Handy offsets:
a61af66fc99e Initial load
duke
parents:
diff changeset
1920 int ek_offset = (klassOopDesc::header_size() * HeapWordSize +
a61af66fc99e Initial load
duke
parents:
diff changeset
1921 objArrayKlass::element_klass_offset_in_bytes());
a61af66fc99e Initial load
duke
parents:
diff changeset
1922 int sco_offset = (klassOopDesc::header_size() * HeapWordSize +
a61af66fc99e Initial load
duke
parents:
diff changeset
1923 Klass::super_check_offset_offset_in_bytes());
a61af66fc99e Initial load
duke
parents:
diff changeset
1924
a61af66fc99e Initial load
duke
parents:
diff changeset
1925 Register rsi_dst_klass = rsi;
a61af66fc99e Initial load
duke
parents:
diff changeset
1926 Register rdi_temp = rdi;
a61af66fc99e Initial load
duke
parents:
diff changeset
1927 assert(rsi_dst_klass == src_pos, "expected alias w/ src_pos");
a61af66fc99e Initial load
duke
parents:
diff changeset
1928 assert(rdi_temp == dst_pos, "expected alias w/ dst_pos");
a61af66fc99e Initial load
duke
parents:
diff changeset
1929 Address dst_klass_lh_addr(rsi_dst_klass, lh_offset);
a61af66fc99e Initial load
duke
parents:
diff changeset
1930
a61af66fc99e Initial load
duke
parents:
diff changeset
1931 // Before looking at dst.length, make sure dst is also an objArray.
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1932 __ movptr(rsi_dst_klass, dst_klass_addr);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1933 __ cmpl(dst_klass_lh_addr, objArray_lh);
a61af66fc99e Initial load
duke
parents:
diff changeset
1934 __ jccb(Assembler::notEqual, L_failed);
a61af66fc99e Initial load
duke
parents:
diff changeset
1935
a61af66fc99e Initial load
duke
parents:
diff changeset
1936 // It is safe to examine both src.length and dst.length.
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1937 __ movl2ptr(src_pos, SRC_POS); // reload rsi
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1938 arraycopy_range_checks(src, src_pos, dst, dst_pos, LENGTH, L_failed);
a61af66fc99e Initial load
duke
parents:
diff changeset
1939 // (Now src_pos and dst_pos are killed, but not src and dst.)
a61af66fc99e Initial load
duke
parents:
diff changeset
1940
a61af66fc99e Initial load
duke
parents:
diff changeset
1941 // We'll need this temp (don't forget to pop it after the type check).
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1942 __ push(rbx);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1943 Register rbx_src_klass = rbx;
a61af66fc99e Initial load
duke
parents:
diff changeset
1944
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1945 __ mov(rbx_src_klass, rcx_src_klass); // spill away from rcx
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1946 __ movptr(rsi_dst_klass, dst_klass_addr);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1947 Address super_check_offset_addr(rsi_dst_klass, sco_offset);
a61af66fc99e Initial load
duke
parents:
diff changeset
1948 Label L_fail_array_check;
a61af66fc99e Initial load
duke
parents:
diff changeset
1949 generate_type_check(rbx_src_klass,
a61af66fc99e Initial load
duke
parents:
diff changeset
1950 super_check_offset_addr, dst_klass_addr,
a61af66fc99e Initial load
duke
parents:
diff changeset
1951 rdi_temp, NULL, &L_fail_array_check);
a61af66fc99e Initial load
duke
parents:
diff changeset
1952 // (On fall-through, we have passed the array type check.)
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1953 __ pop(rbx);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1954 __ jmp(L_plain_copy);
a61af66fc99e Initial load
duke
parents:
diff changeset
1955
a61af66fc99e Initial load
duke
parents:
diff changeset
1956 __ BIND(L_fail_array_check);
a61af66fc99e Initial load
duke
parents:
diff changeset
1957 // Reshuffle arguments so we can call checkcast_arraycopy:
a61af66fc99e Initial load
duke
parents:
diff changeset
1958
a61af66fc99e Initial load
duke
parents:
diff changeset
1959 // match initial saves for checkcast_arraycopy
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1960 // push(rsi); // already done; see above
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1961 // push(rdi); // already done; see above
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1962 // push(rbx); // already done; see above
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1963
a61af66fc99e Initial load
duke
parents:
diff changeset
1964 // Marshal outgoing arguments now, freeing registers.
a61af66fc99e Initial load
duke
parents:
diff changeset
1965 Address from_arg(rsp, 16+ 4); // from
a61af66fc99e Initial load
duke
parents:
diff changeset
1966 Address to_arg(rsp, 16+ 8); // to
a61af66fc99e Initial load
duke
parents:
diff changeset
1967 Address length_arg(rsp, 16+12); // elements count
a61af66fc99e Initial load
duke
parents:
diff changeset
1968 Address ckoff_arg(rsp, 16+16); // super_check_offset
a61af66fc99e Initial load
duke
parents:
diff changeset
1969 Address ckval_arg(rsp, 16+20); // super_klass
a61af66fc99e Initial load
duke
parents:
diff changeset
1970
a61af66fc99e Initial load
duke
parents:
diff changeset
1971 Address SRC_POS_arg(rsp, 16+ 8);
a61af66fc99e Initial load
duke
parents:
diff changeset
1972 Address DST_POS_arg(rsp, 16+16);
a61af66fc99e Initial load
duke
parents:
diff changeset
1973 Address LENGTH_arg(rsp, 16+20);
a61af66fc99e Initial load
duke
parents:
diff changeset
1974 // push rbx, changed the incoming offsets (why not just use rbp,??)
a61af66fc99e Initial load
duke
parents:
diff changeset
1975 // assert(SRC_POS_arg.disp() == SRC_POS.disp() + 4, "");
a61af66fc99e Initial load
duke
parents:
diff changeset
1976
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1977 __ movptr(rbx, Address(rsi_dst_klass, ek_offset));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1978 __ movl2ptr(length, LENGTH_arg); // reload elements count
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1979 __ movl2ptr(src_pos, SRC_POS_arg); // reload src_pos
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1980 __ movl2ptr(dst_pos, DST_POS_arg); // reload dst_pos
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1981
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1982 __ movptr(ckval_arg, rbx); // destination element type
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1983 __ movl(rbx, Address(rbx, sco_offset));
a61af66fc99e Initial load
duke
parents:
diff changeset
1984 __ movl(ckoff_arg, rbx); // corresponding class check offset
a61af66fc99e Initial load
duke
parents:
diff changeset
1985
a61af66fc99e Initial load
duke
parents:
diff changeset
1986 __ movl(length_arg, length); // outgoing length argument
a61af66fc99e Initial load
duke
parents:
diff changeset
1987
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1988 __ lea(from, Address(src, src_pos, Address::times_ptr,
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1989 arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1990 __ movptr(from_arg, from);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1991
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1992 __ lea(to, Address(dst, dst_pos, Address::times_ptr,
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1993 arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
1994 __ movptr(to_arg, to);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1995 __ jump(RuntimeAddress(entry_checkcast_arraycopy));
a61af66fc99e Initial load
duke
parents:
diff changeset
1996 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1997
a61af66fc99e Initial load
duke
parents:
diff changeset
1998 return start;
a61af66fc99e Initial load
duke
parents:
diff changeset
1999 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2000
a61af66fc99e Initial load
duke
parents:
diff changeset
2001 void generate_arraycopy_stubs() {
a61af66fc99e Initial load
duke
parents:
diff changeset
2002 address entry;
a61af66fc99e Initial load
duke
parents:
diff changeset
2003 address entry_jbyte_arraycopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2004 address entry_jshort_arraycopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2005 address entry_jint_arraycopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2006 address entry_oop_arraycopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2007 address entry_jlong_arraycopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2008 address entry_checkcast_arraycopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2009
a61af66fc99e Initial load
duke
parents:
diff changeset
2010 StubRoutines::_arrayof_jbyte_disjoint_arraycopy =
a61af66fc99e Initial load
duke
parents:
diff changeset
2011 generate_disjoint_copy(T_BYTE, true, Address::times_1, &entry,
a61af66fc99e Initial load
duke
parents:
diff changeset
2012 "arrayof_jbyte_disjoint_arraycopy");
a61af66fc99e Initial load
duke
parents:
diff changeset
2013 StubRoutines::_arrayof_jbyte_arraycopy =
a61af66fc99e Initial load
duke
parents:
diff changeset
2014 generate_conjoint_copy(T_BYTE, true, Address::times_1, entry,
a61af66fc99e Initial load
duke
parents:
diff changeset
2015 NULL, "arrayof_jbyte_arraycopy");
a61af66fc99e Initial load
duke
parents:
diff changeset
2016 StubRoutines::_jbyte_disjoint_arraycopy =
a61af66fc99e Initial load
duke
parents:
diff changeset
2017 generate_disjoint_copy(T_BYTE, false, Address::times_1, &entry,
a61af66fc99e Initial load
duke
parents:
diff changeset
2018 "jbyte_disjoint_arraycopy");
a61af66fc99e Initial load
duke
parents:
diff changeset
2019 StubRoutines::_jbyte_arraycopy =
a61af66fc99e Initial load
duke
parents:
diff changeset
2020 generate_conjoint_copy(T_BYTE, false, Address::times_1, entry,
a61af66fc99e Initial load
duke
parents:
diff changeset
2021 &entry_jbyte_arraycopy, "jbyte_arraycopy");
a61af66fc99e Initial load
duke
parents:
diff changeset
2022
a61af66fc99e Initial load
duke
parents:
diff changeset
2023 StubRoutines::_arrayof_jshort_disjoint_arraycopy =
a61af66fc99e Initial load
duke
parents:
diff changeset
2024 generate_disjoint_copy(T_SHORT, true, Address::times_2, &entry,
a61af66fc99e Initial load
duke
parents:
diff changeset
2025 "arrayof_jshort_disjoint_arraycopy");
a61af66fc99e Initial load
duke
parents:
diff changeset
2026 StubRoutines::_arrayof_jshort_arraycopy =
a61af66fc99e Initial load
duke
parents:
diff changeset
2027 generate_conjoint_copy(T_SHORT, true, Address::times_2, entry,
a61af66fc99e Initial load
duke
parents:
diff changeset
2028 NULL, "arrayof_jshort_arraycopy");
a61af66fc99e Initial load
duke
parents:
diff changeset
2029 StubRoutines::_jshort_disjoint_arraycopy =
a61af66fc99e Initial load
duke
parents:
diff changeset
2030 generate_disjoint_copy(T_SHORT, false, Address::times_2, &entry,
a61af66fc99e Initial load
duke
parents:
diff changeset
2031 "jshort_disjoint_arraycopy");
a61af66fc99e Initial load
duke
parents:
diff changeset
2032 StubRoutines::_jshort_arraycopy =
a61af66fc99e Initial load
duke
parents:
diff changeset
2033 generate_conjoint_copy(T_SHORT, false, Address::times_2, entry,
a61af66fc99e Initial load
duke
parents:
diff changeset
2034 &entry_jshort_arraycopy, "jshort_arraycopy");
a61af66fc99e Initial load
duke
parents:
diff changeset
2035
a61af66fc99e Initial load
duke
parents:
diff changeset
2036 // Next arrays are always aligned on 4 bytes at least.
a61af66fc99e Initial load
duke
parents:
diff changeset
2037 StubRoutines::_jint_disjoint_arraycopy =
a61af66fc99e Initial load
duke
parents:
diff changeset
2038 generate_disjoint_copy(T_INT, true, Address::times_4, &entry,
a61af66fc99e Initial load
duke
parents:
diff changeset
2039 "jint_disjoint_arraycopy");
a61af66fc99e Initial load
duke
parents:
diff changeset
2040 StubRoutines::_jint_arraycopy =
a61af66fc99e Initial load
duke
parents:
diff changeset
2041 generate_conjoint_copy(T_INT, true, Address::times_4, entry,
a61af66fc99e Initial load
duke
parents:
diff changeset
2042 &entry_jint_arraycopy, "jint_arraycopy");
a61af66fc99e Initial load
duke
parents:
diff changeset
2043
a61af66fc99e Initial load
duke
parents:
diff changeset
2044 StubRoutines::_oop_disjoint_arraycopy =
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2045 generate_disjoint_copy(T_OBJECT, true, Address::times_ptr, &entry,
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2046 "oop_disjoint_arraycopy");
a61af66fc99e Initial load
duke
parents:
diff changeset
2047 StubRoutines::_oop_arraycopy =
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2048 generate_conjoint_copy(T_OBJECT, true, Address::times_ptr, entry,
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2049 &entry_oop_arraycopy, "oop_arraycopy");
a61af66fc99e Initial load
duke
parents:
diff changeset
2050
a61af66fc99e Initial load
duke
parents:
diff changeset
2051 StubRoutines::_jlong_disjoint_arraycopy =
a61af66fc99e Initial load
duke
parents:
diff changeset
2052 generate_disjoint_long_copy(&entry, "jlong_disjoint_arraycopy");
a61af66fc99e Initial load
duke
parents:
diff changeset
2053 StubRoutines::_jlong_arraycopy =
a61af66fc99e Initial load
duke
parents:
diff changeset
2054 generate_conjoint_long_copy(entry, &entry_jlong_arraycopy,
a61af66fc99e Initial load
duke
parents:
diff changeset
2055 "jlong_arraycopy");
a61af66fc99e Initial load
duke
parents:
diff changeset
2056
1763
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
2057 StubRoutines::_jbyte_fill = generate_fill(T_BYTE, false, "jbyte_fill");
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
2058 StubRoutines::_jshort_fill = generate_fill(T_SHORT, false, "jshort_fill");
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
2059 StubRoutines::_jint_fill = generate_fill(T_INT, false, "jint_fill");
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
2060 StubRoutines::_arrayof_jbyte_fill = generate_fill(T_BYTE, true, "arrayof_jbyte_fill");
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
2061 StubRoutines::_arrayof_jshort_fill = generate_fill(T_SHORT, true, "arrayof_jshort_fill");
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
2062 StubRoutines::_arrayof_jint_fill = generate_fill(T_INT, true, "arrayof_jint_fill");
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1552
diff changeset
2063
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2064 StubRoutines::_arrayof_jint_disjoint_arraycopy =
a61af66fc99e Initial load
duke
parents:
diff changeset
2065 StubRoutines::_jint_disjoint_arraycopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2066 StubRoutines::_arrayof_oop_disjoint_arraycopy =
a61af66fc99e Initial load
duke
parents:
diff changeset
2067 StubRoutines::_oop_disjoint_arraycopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2068 StubRoutines::_arrayof_jlong_disjoint_arraycopy =
a61af66fc99e Initial load
duke
parents:
diff changeset
2069 StubRoutines::_jlong_disjoint_arraycopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2070
a61af66fc99e Initial load
duke
parents:
diff changeset
2071 StubRoutines::_arrayof_jint_arraycopy = StubRoutines::_jint_arraycopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2072 StubRoutines::_arrayof_oop_arraycopy = StubRoutines::_oop_arraycopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2073 StubRoutines::_arrayof_jlong_arraycopy = StubRoutines::_jlong_arraycopy;
a61af66fc99e Initial load
duke
parents:
diff changeset
2074
a61af66fc99e Initial load
duke
parents:
diff changeset
2075 StubRoutines::_checkcast_arraycopy =
a61af66fc99e Initial load
duke
parents:
diff changeset
2076 generate_checkcast_copy("checkcast_arraycopy",
a61af66fc99e Initial load
duke
parents:
diff changeset
2077 &entry_checkcast_arraycopy);
a61af66fc99e Initial load
duke
parents:
diff changeset
2078
a61af66fc99e Initial load
duke
parents:
diff changeset
2079 StubRoutines::_unsafe_arraycopy =
a61af66fc99e Initial load
duke
parents:
diff changeset
2080 generate_unsafe_copy("unsafe_arraycopy",
a61af66fc99e Initial load
duke
parents:
diff changeset
2081 entry_jbyte_arraycopy,
a61af66fc99e Initial load
duke
parents:
diff changeset
2082 entry_jshort_arraycopy,
a61af66fc99e Initial load
duke
parents:
diff changeset
2083 entry_jint_arraycopy,
a61af66fc99e Initial load
duke
parents:
diff changeset
2084 entry_jlong_arraycopy);
a61af66fc99e Initial load
duke
parents:
diff changeset
2085
a61af66fc99e Initial load
duke
parents:
diff changeset
2086 StubRoutines::_generic_arraycopy =
a61af66fc99e Initial load
duke
parents:
diff changeset
2087 generate_generic_copy("generic_arraycopy",
a61af66fc99e Initial load
duke
parents:
diff changeset
2088 entry_jbyte_arraycopy,
a61af66fc99e Initial load
duke
parents:
diff changeset
2089 entry_jshort_arraycopy,
a61af66fc99e Initial load
duke
parents:
diff changeset
2090 entry_jint_arraycopy,
a61af66fc99e Initial load
duke
parents:
diff changeset
2091 entry_oop_arraycopy,
a61af66fc99e Initial load
duke
parents:
diff changeset
2092 entry_jlong_arraycopy,
a61af66fc99e Initial load
duke
parents:
diff changeset
2093 entry_checkcast_arraycopy);
a61af66fc99e Initial load
duke
parents:
diff changeset
2094 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2095
1174
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2096 void generate_math_stubs() {
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2097 {
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2098 StubCodeMark mark(this, "StubRoutines", "log");
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2099 StubRoutines::_intrinsic_log = (double (*)(double)) __ pc();
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2100
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2101 __ fld_d(Address(rsp, 4));
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2102 __ flog();
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2103 __ ret(0);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2104 }
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2105 {
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2106 StubCodeMark mark(this, "StubRoutines", "log10");
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2107 StubRoutines::_intrinsic_log10 = (double (*)(double)) __ pc();
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2108
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2109 __ fld_d(Address(rsp, 4));
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2110 __ flog10();
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2111 __ ret(0);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2112 }
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2113 {
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2114 StubCodeMark mark(this, "StubRoutines", "sin");
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2115 StubRoutines::_intrinsic_sin = (double (*)(double)) __ pc();
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2116
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2117 __ fld_d(Address(rsp, 4));
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2118 __ trigfunc('s');
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2119 __ ret(0);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2120 }
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2121 {
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2122 StubCodeMark mark(this, "StubRoutines", "cos");
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2123 StubRoutines::_intrinsic_cos = (double (*)(double)) __ pc();
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2124
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2125 __ fld_d(Address(rsp, 4));
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2126 __ trigfunc('c');
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2127 __ ret(0);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2128 }
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2129 {
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2130 StubCodeMark mark(this, "StubRoutines", "tan");
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2131 StubRoutines::_intrinsic_tan = (double (*)(double)) __ pc();
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2132
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2133 __ fld_d(Address(rsp, 4));
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2134 __ trigfunc('t');
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2135 __ ret(0);
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2136 }
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2137
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2138 // The intrinsic version of these seem to return the same value as
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2139 // the strict version.
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2140 StubRoutines::_intrinsic_exp = SharedRuntime::dexp;
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2141 StubRoutines::_intrinsic_pow = SharedRuntime::dpow;
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2142 }
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2143
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2144 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
2145 // Information about frame layout at time of blocking runtime call.
a61af66fc99e Initial load
duke
parents:
diff changeset
2146 // Note that we only have to preserve callee-saved registers since
a61af66fc99e Initial load
duke
parents:
diff changeset
2147 // the compilers are responsible for supplying a continuation point
a61af66fc99e Initial load
duke
parents:
diff changeset
2148 // if they expect all registers to be preserved.
a61af66fc99e Initial load
duke
parents:
diff changeset
2149 enum layout {
a61af66fc99e Initial load
duke
parents:
diff changeset
2150 thread_off, // last_java_sp
a61af66fc99e Initial load
duke
parents:
diff changeset
2151 rbp_off, // callee saved register
a61af66fc99e Initial load
duke
parents:
diff changeset
2152 ret_pc,
a61af66fc99e Initial load
duke
parents:
diff changeset
2153 framesize
a61af66fc99e Initial load
duke
parents:
diff changeset
2154 };
a61af66fc99e Initial load
duke
parents:
diff changeset
2155
a61af66fc99e Initial load
duke
parents:
diff changeset
2156 private:
a61af66fc99e Initial load
duke
parents:
diff changeset
2157
a61af66fc99e Initial load
duke
parents:
diff changeset
2158 #undef __
a61af66fc99e Initial load
duke
parents:
diff changeset
2159 #define __ masm->
a61af66fc99e Initial load
duke
parents:
diff changeset
2160
a61af66fc99e Initial load
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parents:
diff changeset
2161 //------------------------------------------------------------------------------------------------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
2162 // Continuation point for throwing of implicit exceptions that are not handled in
a61af66fc99e Initial load
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parents:
diff changeset
2163 // the current activation. Fabricates an exception oop and initiates normal
a61af66fc99e Initial load
duke
parents:
diff changeset
2164 // exception dispatching in this frame.
a61af66fc99e Initial load
duke
parents:
diff changeset
2165 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2166 // Previously the compiler (c2) allowed for callee save registers on Java calls.
a61af66fc99e Initial load
duke
parents:
diff changeset
2167 // This is no longer true after adapter frames were removed but could possibly
a61af66fc99e Initial load
duke
parents:
diff changeset
2168 // be brought back in the future if the interpreter code was reworked and it
a61af66fc99e Initial load
duke
parents:
diff changeset
2169 // was deemed worthwhile. The comment below was left to describe what must
a61af66fc99e Initial load
duke
parents:
diff changeset
2170 // happen here if callee saves were resurrected. As it stands now this stub
a61af66fc99e Initial load
duke
parents:
diff changeset
2171 // could actually be a vanilla BufferBlob and have now oopMap at all.
a61af66fc99e Initial load
duke
parents:
diff changeset
2172 // Since it doesn't make much difference we've chosen to leave it the
a61af66fc99e Initial load
duke
parents:
diff changeset
2173 // way it was in the callee save days and keep the comment.
a61af66fc99e Initial load
duke
parents:
diff changeset
2174
a61af66fc99e Initial load
duke
parents:
diff changeset
2175 // If we need to preserve callee-saved values we need a callee-saved oop map and
a61af66fc99e Initial load
duke
parents:
diff changeset
2176 // therefore have to make these stubs into RuntimeStubs rather than BufferBlobs.
a61af66fc99e Initial load
duke
parents:
diff changeset
2177 // If the compiler needs all registers to be preserved between the fault
a61af66fc99e Initial load
duke
parents:
diff changeset
2178 // point and the exception handler then it must assume responsibility for that in
a61af66fc99e Initial load
duke
parents:
diff changeset
2179 // AbstractCompiler::continuation_for_implicit_null_exception or
a61af66fc99e Initial load
duke
parents:
diff changeset
2180 // continuation_for_implicit_division_by_zero_exception. All other implicit
a61af66fc99e Initial load
duke
parents:
diff changeset
2181 // exceptions (e.g., NullPointerException or AbstractMethodError on entry) are
a61af66fc99e Initial load
duke
parents:
diff changeset
2182 // either at call sites or otherwise assume that stack unwinding will be initiated,
a61af66fc99e Initial load
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parents:
diff changeset
2183 // so caller saved registers were assumed volatile in the compiler.
a61af66fc99e Initial load
duke
parents:
diff changeset
2184 address generate_throw_exception(const char* name, address runtime_entry,
a61af66fc99e Initial load
duke
parents:
diff changeset
2185 bool restore_saved_exception_pc) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2186
a61af66fc99e Initial load
duke
parents:
diff changeset
2187 int insts_size = 256;
a61af66fc99e Initial load
duke
parents:
diff changeset
2188 int locs_size = 32;
a61af66fc99e Initial load
duke
parents:
diff changeset
2189
a61af66fc99e Initial load
duke
parents:
diff changeset
2190 CodeBuffer code(name, insts_size, locs_size);
a61af66fc99e Initial load
duke
parents:
diff changeset
2191 OopMapSet* oop_maps = new OopMapSet();
a61af66fc99e Initial load
duke
parents:
diff changeset
2192 MacroAssembler* masm = new MacroAssembler(&code);
a61af66fc99e Initial load
duke
parents:
diff changeset
2193
a61af66fc99e Initial load
duke
parents:
diff changeset
2194 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
2195
a61af66fc99e Initial load
duke
parents:
diff changeset
2196 // This is an inlined and slightly modified version of call_VM
a61af66fc99e Initial load
duke
parents:
diff changeset
2197 // which has the ability to fetch the return PC out of
a61af66fc99e Initial load
duke
parents:
diff changeset
2198 // thread-local storage and also sets up last_Java_sp slightly
a61af66fc99e Initial load
duke
parents:
diff changeset
2199 // differently than the real call_VM
a61af66fc99e Initial load
duke
parents:
diff changeset
2200 Register java_thread = rbx;
a61af66fc99e Initial load
duke
parents:
diff changeset
2201 __ get_thread(java_thread);
a61af66fc99e Initial load
duke
parents:
diff changeset
2202 if (restore_saved_exception_pc) {
304
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never
parents: 249
diff changeset
2203 __ movptr(rax, Address(java_thread, in_bytes(JavaThread::saved_exception_pc_offset())));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2204 __ push(rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2205 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2206
a61af66fc99e Initial load
duke
parents:
diff changeset
2207 __ enter(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
2208
a61af66fc99e Initial load
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parents:
diff changeset
2209 // pc and rbp, already pushed
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2210 __ subptr(rsp, (framesize-2) * wordSize); // prolog
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2211
a61af66fc99e Initial load
duke
parents:
diff changeset
2212 // Frame is now completed as far as size and linkage.
a61af66fc99e Initial load
duke
parents:
diff changeset
2213
a61af66fc99e Initial load
duke
parents:
diff changeset
2214 int frame_complete = __ pc() - start;
a61af66fc99e Initial load
duke
parents:
diff changeset
2215
a61af66fc99e Initial load
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parents:
diff changeset
2216 // push java thread (becomes first argument of C function)
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2217 __ movptr(Address(rsp, thread_off * wordSize), java_thread);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2218
a61af66fc99e Initial load
duke
parents:
diff changeset
2219 // Set up last_Java_sp and last_Java_fp
a61af66fc99e Initial load
duke
parents:
diff changeset
2220 __ set_last_Java_frame(java_thread, rsp, rbp, NULL);
a61af66fc99e Initial load
duke
parents:
diff changeset
2221
a61af66fc99e Initial load
duke
parents:
diff changeset
2222 // Call runtime
a61af66fc99e Initial load
duke
parents:
diff changeset
2223 BLOCK_COMMENT("call runtime_entry");
a61af66fc99e Initial load
duke
parents:
diff changeset
2224 __ call(RuntimeAddress(runtime_entry));
a61af66fc99e Initial load
duke
parents:
diff changeset
2225 // Generate oop map
a61af66fc99e Initial load
duke
parents:
diff changeset
2226 OopMap* map = new OopMap(framesize, 0);
a61af66fc99e Initial load
duke
parents:
diff changeset
2227 oop_maps->add_gc_map(__ pc() - start, map);
a61af66fc99e Initial load
duke
parents:
diff changeset
2228
a61af66fc99e Initial load
duke
parents:
diff changeset
2229 // restore the thread (cannot use the pushed argument since arguments
a61af66fc99e Initial load
duke
parents:
diff changeset
2230 // may be overwritten by C code generated by an optimizing compiler);
a61af66fc99e Initial load
duke
parents:
diff changeset
2231 // however can use the register value directly if it is callee saved.
a61af66fc99e Initial load
duke
parents:
diff changeset
2232 __ get_thread(java_thread);
a61af66fc99e Initial load
duke
parents:
diff changeset
2233
a61af66fc99e Initial load
duke
parents:
diff changeset
2234 __ reset_last_Java_frame(java_thread, true, false);
a61af66fc99e Initial load
duke
parents:
diff changeset
2235
a61af66fc99e Initial load
duke
parents:
diff changeset
2236 __ leave(); // required for proper stackwalking of RuntimeStub frame
a61af66fc99e Initial load
duke
parents:
diff changeset
2237
a61af66fc99e Initial load
duke
parents:
diff changeset
2238 // check for pending exceptions
a61af66fc99e Initial load
duke
parents:
diff changeset
2239 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
2240 Label L;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2241 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2242 __ jcc(Assembler::notEqual, L);
a61af66fc99e Initial load
duke
parents:
diff changeset
2243 __ should_not_reach_here();
a61af66fc99e Initial load
duke
parents:
diff changeset
2244 __ bind(L);
a61af66fc99e Initial load
duke
parents:
diff changeset
2245 #endif /* ASSERT */
a61af66fc99e Initial load
duke
parents:
diff changeset
2246 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
a61af66fc99e Initial load
duke
parents:
diff changeset
2247
a61af66fc99e Initial load
duke
parents:
diff changeset
2248
a61af66fc99e Initial load
duke
parents:
diff changeset
2249 RuntimeStub* stub = RuntimeStub::new_runtime_stub(name, &code, frame_complete, framesize, oop_maps, false);
a61af66fc99e Initial load
duke
parents:
diff changeset
2250 return stub->entry_point();
a61af66fc99e Initial load
duke
parents:
diff changeset
2251 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2252
a61af66fc99e Initial load
duke
parents:
diff changeset
2253
a61af66fc99e Initial load
duke
parents:
diff changeset
2254 void create_control_words() {
a61af66fc99e Initial load
duke
parents:
diff changeset
2255 // Round to nearest, 53-bit mode, exceptions masked
a61af66fc99e Initial load
duke
parents:
diff changeset
2256 StubRoutines::_fpu_cntrl_wrd_std = 0x027F;
a61af66fc99e Initial load
duke
parents:
diff changeset
2257 // Round to zero, 53-bit mode, exception mased
a61af66fc99e Initial load
duke
parents:
diff changeset
2258 StubRoutines::_fpu_cntrl_wrd_trunc = 0x0D7F;
a61af66fc99e Initial load
duke
parents:
diff changeset
2259 // Round to nearest, 24-bit mode, exceptions masked
a61af66fc99e Initial load
duke
parents:
diff changeset
2260 StubRoutines::_fpu_cntrl_wrd_24 = 0x007F;
a61af66fc99e Initial load
duke
parents:
diff changeset
2261 // Round to nearest, 64-bit mode, exceptions masked
a61af66fc99e Initial load
duke
parents:
diff changeset
2262 StubRoutines::_fpu_cntrl_wrd_64 = 0x037F;
a61af66fc99e Initial load
duke
parents:
diff changeset
2263 // Round to nearest, 64-bit mode, exceptions masked
a61af66fc99e Initial load
duke
parents:
diff changeset
2264 StubRoutines::_mxcsr_std = 0x1F80;
a61af66fc99e Initial load
duke
parents:
diff changeset
2265 // Note: the following two constants are 80-bit values
a61af66fc99e Initial load
duke
parents:
diff changeset
2266 // layout is critical for correct loading by FPU.
a61af66fc99e Initial load
duke
parents:
diff changeset
2267 // Bias for strict fp multiply/divide
a61af66fc99e Initial load
duke
parents:
diff changeset
2268 StubRoutines::_fpu_subnormal_bias1[0]= 0x00000000; // 2^(-15360) == 0x03ff 8000 0000 0000 0000
a61af66fc99e Initial load
duke
parents:
diff changeset
2269 StubRoutines::_fpu_subnormal_bias1[1]= 0x80000000;
a61af66fc99e Initial load
duke
parents:
diff changeset
2270 StubRoutines::_fpu_subnormal_bias1[2]= 0x03ff;
a61af66fc99e Initial load
duke
parents:
diff changeset
2271 // Un-Bias for strict fp multiply/divide
a61af66fc99e Initial load
duke
parents:
diff changeset
2272 StubRoutines::_fpu_subnormal_bias2[0]= 0x00000000; // 2^(+15360) == 0x7bff 8000 0000 0000 0000
a61af66fc99e Initial load
duke
parents:
diff changeset
2273 StubRoutines::_fpu_subnormal_bias2[1]= 0x80000000;
a61af66fc99e Initial load
duke
parents:
diff changeset
2274 StubRoutines::_fpu_subnormal_bias2[2]= 0x7bff;
a61af66fc99e Initial load
duke
parents:
diff changeset
2275 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2276
a61af66fc99e Initial load
duke
parents:
diff changeset
2277 //---------------------------------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
2278 // Initialization
a61af66fc99e Initial load
duke
parents:
diff changeset
2279
a61af66fc99e Initial load
duke
parents:
diff changeset
2280 void generate_initial() {
a61af66fc99e Initial load
duke
parents:
diff changeset
2281 // Generates all stubs and initializes the entry points
a61af66fc99e Initial load
duke
parents:
diff changeset
2282
a61af66fc99e Initial load
duke
parents:
diff changeset
2283 //------------------------------------------------------------------------------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
2284 // entry points that exist in all platforms
a61af66fc99e Initial load
duke
parents:
diff changeset
2285 // Note: This is code that could be shared among different platforms - however the benefit seems to be smaller than
a61af66fc99e Initial load
duke
parents:
diff changeset
2286 // the disadvantage of having a much more complicated generator structure. See also comment in stubRoutines.hpp.
a61af66fc99e Initial load
duke
parents:
diff changeset
2287 StubRoutines::_forward_exception_entry = generate_forward_exception();
a61af66fc99e Initial load
duke
parents:
diff changeset
2288
a61af66fc99e Initial load
duke
parents:
diff changeset
2289 StubRoutines::_call_stub_entry =
a61af66fc99e Initial load
duke
parents:
diff changeset
2290 generate_call_stub(StubRoutines::_call_stub_return_address);
a61af66fc99e Initial load
duke
parents:
diff changeset
2291 // is referenced by megamorphic call
a61af66fc99e Initial load
duke
parents:
diff changeset
2292 StubRoutines::_catch_exception_entry = generate_catch_exception();
a61af66fc99e Initial load
duke
parents:
diff changeset
2293
a61af66fc99e Initial load
duke
parents:
diff changeset
2294 // These are currently used by Solaris/Intel
a61af66fc99e Initial load
duke
parents:
diff changeset
2295 StubRoutines::_atomic_xchg_entry = generate_atomic_xchg();
a61af66fc99e Initial load
duke
parents:
diff changeset
2296
a61af66fc99e Initial load
duke
parents:
diff changeset
2297 StubRoutines::_handler_for_unsafe_access_entry =
a61af66fc99e Initial load
duke
parents:
diff changeset
2298 generate_handler_for_unsafe_access();
a61af66fc99e Initial load
duke
parents:
diff changeset
2299
a61af66fc99e Initial load
duke
parents:
diff changeset
2300 // platform dependent
a61af66fc99e Initial load
duke
parents:
diff changeset
2301 create_control_words();
a61af66fc99e Initial load
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parents:
diff changeset
2302
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2303 StubRoutines::x86::_verify_mxcsr_entry = generate_verify_mxcsr();
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 249
diff changeset
2304 StubRoutines::x86::_verify_fpu_cntrl_wrd_entry = generate_verify_fpu_cntrl_wrd();
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2305 StubRoutines::_d2i_wrapper = generate_d2i_wrapper(T_INT,
a61af66fc99e Initial load
duke
parents:
diff changeset
2306 CAST_FROM_FN_PTR(address, SharedRuntime::d2i));
a61af66fc99e Initial load
duke
parents:
diff changeset
2307 StubRoutines::_d2l_wrapper = generate_d2i_wrapper(T_LONG,
a61af66fc99e Initial load
duke
parents:
diff changeset
2308 CAST_FROM_FN_PTR(address, SharedRuntime::d2l));
a61af66fc99e Initial load
duke
parents:
diff changeset
2309 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2310
a61af66fc99e Initial load
duke
parents:
diff changeset
2311
a61af66fc99e Initial load
duke
parents:
diff changeset
2312 void generate_all() {
a61af66fc99e Initial load
duke
parents:
diff changeset
2313 // Generates all stubs and initializes the entry points
a61af66fc99e Initial load
duke
parents:
diff changeset
2314
a61af66fc99e Initial load
duke
parents:
diff changeset
2315 // These entry points require SharedInfo::stack0 to be set up in non-core builds
a61af66fc99e Initial load
duke
parents:
diff changeset
2316 // and need to be relocatable, so they each fabricate a RuntimeStub internally.
a61af66fc99e Initial load
duke
parents:
diff changeset
2317 StubRoutines::_throw_AbstractMethodError_entry = generate_throw_exception("AbstractMethodError throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_AbstractMethodError), false);
16
f8236e79048a 6664627: Merge changes made only in hotspot 11 forward to jdk 7
dcubed
parents: 0
diff changeset
2318 StubRoutines::_throw_IncompatibleClassChangeError_entry= generate_throw_exception("IncompatibleClassChangeError throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_IncompatibleClassChangeError), false);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2319 StubRoutines::_throw_ArithmeticException_entry = generate_throw_exception("ArithmeticException throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_ArithmeticException), true);
a61af66fc99e Initial load
duke
parents:
diff changeset
2320 StubRoutines::_throw_NullPointerException_entry = generate_throw_exception("NullPointerException throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_NullPointerException), true);
a61af66fc99e Initial load
duke
parents:
diff changeset
2321 StubRoutines::_throw_NullPointerException_at_call_entry= generate_throw_exception("NullPointerException at call throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_NullPointerException_at_call), false);
a61af66fc99e Initial load
duke
parents:
diff changeset
2322 StubRoutines::_throw_StackOverflowError_entry = generate_throw_exception("StackOverflowError throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_StackOverflowError), false);
a61af66fc99e Initial load
duke
parents:
diff changeset
2323
a61af66fc99e Initial load
duke
parents:
diff changeset
2324 //------------------------------------------------------------------------------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
2325 // entry points that are platform specific
a61af66fc99e Initial load
duke
parents:
diff changeset
2326
a61af66fc99e Initial load
duke
parents:
diff changeset
2327 // support for verify_oop (must happen after universe_init)
a61af66fc99e Initial load
duke
parents:
diff changeset
2328 StubRoutines::_verify_oop_subroutine_entry = generate_verify_oop();
a61af66fc99e Initial load
duke
parents:
diff changeset
2329
a61af66fc99e Initial load
duke
parents:
diff changeset
2330 // arraycopy stubs used by compilers
a61af66fc99e Initial load
duke
parents:
diff changeset
2331 generate_arraycopy_stubs();
710
e5b0439ef4ae 6655638: dynamic languages need method handles
jrose
parents: 647
diff changeset
2332
1174
ddb7834449d0 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 845
diff changeset
2333 generate_math_stubs();
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2334 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2335
a61af66fc99e Initial load
duke
parents:
diff changeset
2336
a61af66fc99e Initial load
duke
parents:
diff changeset
2337 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
2338 StubGenerator(CodeBuffer* code, bool all) : StubCodeGenerator(code) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2339 if (all) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2340 generate_all();
a61af66fc99e Initial load
duke
parents:
diff changeset
2341 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
2342 generate_initial();
a61af66fc99e Initial load
duke
parents:
diff changeset
2343 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2344 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2345 }; // end class declaration
a61af66fc99e Initial load
duke
parents:
diff changeset
2346
a61af66fc99e Initial load
duke
parents:
diff changeset
2347
a61af66fc99e Initial load
duke
parents:
diff changeset
2348 void StubGenerator_generate(CodeBuffer* code, bool all) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2349 StubGenerator g(code, all);
a61af66fc99e Initial load
duke
parents:
diff changeset
2350 }