Mercurial > hg > truffle
annotate src/os_cpu/solaris_x86/vm/solaris_x86_64.il @ 7468:608b2e8a0063
8004051: assert(_oprs_len[mode] < maxNumberOfOperands) failed: array overflow
Summary: assert is triggered when number of register based arguments passed to a java method exceeds 16.
Reviewed-by: roland, vladidan
author | bpittore |
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date | Thu, 03 Jan 2013 15:08:43 -0500 |
parents | b9a9ed0f8eeb |
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rev | line source |
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0 | 1 // |
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2 // Copyright (c) 2004, 2012, Oracle and/or its affiliates. All rights reserved. |
0 | 3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 // | |
5 // This code is free software; you can redistribute it and/or modify it | |
6 // under the terms of the GNU General Public License version 2 only, as | |
7 // published by the Free Software Foundation. | |
8 // | |
9 // This code is distributed in the hope that it will be useful, but WITHOUT | |
10 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 // version 2 for more details (a copy is included in the LICENSE file that | |
13 // accompanied this code). | |
14 // | |
15 // You should have received a copy of the GNU General Public License version | |
16 // 2 along with this work; if not, write to the Free Software Foundation, | |
17 // Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 // | |
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19 // Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 // or visit www.oracle.com if you need additional information or have any |
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21 // questions. |
0 | 22 // |
23 // | |
24 | |
25 // The argument size of each inline directive is ignored by the compiler | |
26 // and is set to the number of arguments as documentation. | |
27 | |
28 // Get the raw thread ID from %gs:0 | |
29 .inline _raw_thread_id,0 | |
30 movq %fs:0, %rax | |
31 .end | |
32 | |
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33 // Get current sp |
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34 .inline _get_current_sp,0 |
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35 .volatile |
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36 movq %rsp, %rax |
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37 .end |
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38 |
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39 // Get current fp |
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40 .inline _get_current_fp,0 |
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41 .volatile |
0 | 42 movq %rbp, %rax |
43 .end | |
44 | |
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45 // Support for os::rdtsc() |
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46 .inline _raw_rdtsc,0 |
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47 rdtsc |
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48 salq $32, %rdx |
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49 orq %rdx, %rax |
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50 .end |
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51 |
0 | 52 // Support for jint Atomic::add(jint add_value, volatile jint* dest) |
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53 .inline _Atomic_add,2 |
0 | 54 movl %edi, %eax // save add_value for return |
55 lock | |
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56 xaddl %edi, (%rsi) |
0 | 57 addl %edi, %eax |
58 .end | |
59 | |
60 // Support for jlong Atomic::add(jlong add_value, volatile jlong* dest) | |
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61 .inline _Atomic_add_long,2 |
0 | 62 movq %rdi, %rax // save add_value for return |
63 lock | |
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64 xaddq %rdi, (%rsi) |
0 | 65 addq %rdi, %rax |
66 .end | |
67 | |
68 // Support for jint Atomic::xchg(jint exchange_value, volatile jint* dest). | |
69 .inline _Atomic_xchg,2 | |
70 xchgl (%rsi), %edi | |
71 movl %edi, %eax | |
72 .end | |
73 | |
74 // Support for jlong Atomic::xchg(jlong exchange_value, volatile jlong* dest). | |
75 .inline _Atomic_xchg_long,2 | |
76 xchgq (%rsi), %rdi | |
77 movq %rdi, %rax | |
78 .end | |
79 | |
80 // Support for jint Atomic::cmpxchg(jint exchange_value, | |
81 // volatile jint *dest, | |
82 // jint compare_value) | |
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83 .inline _Atomic_cmpxchg,3 |
0 | 84 movl %edx, %eax // compare_value |
85 lock | |
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86 cmpxchgl %edi, (%rsi) |
0 | 87 .end |
88 | |
89 // Support for jlong Atomic::cmpxchg(jlong exchange_value, | |
90 // volatile jlong* dest, | |
91 // jlong compare_value) | |
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92 .inline _Atomic_cmpxchg_long,3 |
0 | 93 movq %rdx, %rax // compare_value |
94 lock | |
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95 cmpxchgq %rdi, (%rsi) |
0 | 96 .end |
97 | |
98 // Support for OrderAccess::acquire() | |
99 .inline _OrderAccess_acquire,0 | |
100 movl 0(%rsp), %eax | |
101 .end | |
102 | |
103 // Support for OrderAccess::fence() | |
104 .inline _OrderAccess_fence,0 | |
105 lock | |
106 addl $0, (%rsp) | |
107 .end | |
108 | |
109 // Support for u2 Bytes::swap_u2(u2 x) | |
110 .inline _raw_swap_u2,1 | |
111 movw %di, %ax | |
112 rorw $8, %ax | |
113 .end | |
114 | |
115 // Support for u4 Bytes::swap_u4(u4 x) | |
116 .inline _raw_swap_u4,1 | |
117 movl %edi, %eax | |
118 bswapl %eax | |
119 .end | |
120 | |
121 // Support for u8 Bytes::swap_u8(u8 x) | |
122 .inline _raw_swap_u8,1 | |
123 movq %rdi, %rax | |
124 bswapq %rax | |
125 .end | |
126 | |
127 // Support for void Prefetch::read | |
128 .inline _Prefetch_read,2 | |
129 prefetcht0 (%rdi, %rsi, 1) | |
130 .end | |
131 | |
132 // Support for void Prefetch::write | |
133 // We use prefetcht0 because em64t doesn't support prefetchw. | |
134 // prefetchw is a 3dnow instruction. | |
135 .inline _Prefetch_write,2 | |
136 prefetcht0 (%rdi, %rsi, 1) | |
137 .end |