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annotate graal/com.oracle.graal.asm.amd64/src/com/oracle/max/asm/amd64/AMD64.java @ 6497:64b7dd2075c0

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renamed projects com.oracle.max.asm* to com.oracle.graal.asm*
author Doug Simon <doug.simon@oracle.com>
date Wed, 03 Oct 2012 17:42:12 +0200
parents graal/com.oracle.max.asm.amd64/src/com/oracle/max/asm/amd64/AMD64.java@85c1b84f8fd9
children 6bc8aa568cb9
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1 /*
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2 * Copyright (c) 2009, 2011, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 */
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23 package com.oracle.max.asm.amd64;
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25 import static com.oracle.graal.api.code.Register.RegisterFlag.*;
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26 import static com.oracle.graal.api.meta.Kind.*;
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27 import static com.oracle.max.criutils.MemoryBarriers.*;
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28
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29 import com.oracle.graal.api.code.*;
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30 import com.oracle.graal.api.code.Register.*;
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31
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32 /**
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33 * Represents the AMD64 architecture.
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34 */
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35 public class AMD64 extends Architecture {
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36
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37 // General purpose CPU registers
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38 public static final Register rax = new Register(0, 0, 8, "rax", CPU, RegisterFlag.Byte);
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39 public static final Register rcx = new Register(1, 1, 8, "rcx", CPU, RegisterFlag.Byte);
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40 public static final Register rdx = new Register(2, 2, 8, "rdx", CPU, RegisterFlag.Byte);
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41 public static final Register rbx = new Register(3, 3, 8, "rbx", CPU, RegisterFlag.Byte);
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42 public static final Register rsp = new Register(4, 4, 8, "rsp", CPU, RegisterFlag.Byte);
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43 public static final Register rbp = new Register(5, 5, 8, "rbp", CPU, RegisterFlag.Byte);
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44 public static final Register rsi = new Register(6, 6, 8, "rsi", CPU, RegisterFlag.Byte);
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45 public static final Register rdi = new Register(7, 7, 8, "rdi", CPU, RegisterFlag.Byte);
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46
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47 public static final Register r8 = new Register(8, 8, 8, "r8", CPU, RegisterFlag.Byte);
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48 public static final Register r9 = new Register(9, 9, 8, "r9", CPU, RegisterFlag.Byte);
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49 public static final Register r10 = new Register(10, 10, 8, "r10", CPU, RegisterFlag.Byte);
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50 public static final Register r11 = new Register(11, 11, 8, "r11", CPU, RegisterFlag.Byte);
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51 public static final Register r12 = new Register(12, 12, 8, "r12", CPU, RegisterFlag.Byte);
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52 public static final Register r13 = new Register(13, 13, 8, "r13", CPU, RegisterFlag.Byte);
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53 public static final Register r14 = new Register(14, 14, 8, "r14", CPU, RegisterFlag.Byte);
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54 public static final Register r15 = new Register(15, 15, 8, "r15", CPU, RegisterFlag.Byte);
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55
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56 public static final Register[] cpuRegisters = {
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57 rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi,
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58 r8, r9, r10, r11, r12, r13, r14, r15
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59 };
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60
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61 // XMM registers
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62 public static final Register xmm0 = new Register(16, 0, 8, "xmm0", FPU);
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63 public static final Register xmm1 = new Register(17, 1, 8, "xmm1", FPU);
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64 public static final Register xmm2 = new Register(18, 2, 8, "xmm2", FPU);
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65 public static final Register xmm3 = new Register(19, 3, 8, "xmm3", FPU);
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66 public static final Register xmm4 = new Register(20, 4, 8, "xmm4", FPU);
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67 public static final Register xmm5 = new Register(21, 5, 8, "xmm5", FPU);
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68 public static final Register xmm6 = new Register(22, 6, 8, "xmm6", FPU);
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69 public static final Register xmm7 = new Register(23, 7, 8, "xmm7", FPU);
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70
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71 public static final Register xmm8 = new Register(24, 8, 8, "xmm8", FPU);
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72 public static final Register xmm9 = new Register(25, 9, 8, "xmm9", FPU);
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73 public static final Register xmm10 = new Register(26, 10, 8, "xmm10", FPU);
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74 public static final Register xmm11 = new Register(27, 11, 8, "xmm11", FPU);
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75 public static final Register xmm12 = new Register(28, 12, 8, "xmm12", FPU);
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76 public static final Register xmm13 = new Register(29, 13, 8, "xmm13", FPU);
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77 public static final Register xmm14 = new Register(30, 14, 8, "xmm14", FPU);
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78 public static final Register xmm15 = new Register(31, 15, 8, "xmm15", FPU);
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79
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80 public static final Register[] xmmRegisters = {
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81 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
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82 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15
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83 };
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84
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85 public static final Register[] cpuxmmRegisters = {
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86 rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi,
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87 r8, r9, r10, r11, r12, r13, r14, r15,
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88 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
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89 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15
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90 };
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91
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92 /**
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93 * Register used to construct an instruction-relative address.
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94 */
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95 public static final Register rip = new Register(32, -1, 0, "rip");
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96
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97 public static final Register[] allRegisters = {
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98 rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi,
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99 r8, r9, r10, r11, r12, r13, r14, r15,
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100 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
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101 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15,
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102 rip
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103 };
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104
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105 public static final RegisterValue RSP = rsp.asValue(Long);
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106
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107 public AMD64() {
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108 super("AMD64",
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109 8,
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110 ByteOrder.LittleEndian,
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111 allRegisters,
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112 LOAD_STORE | STORE_STORE,
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113 1,
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114 r15.encoding + 1,
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115 8);
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116 }
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117
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118 @Override
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119 public boolean isX86() {
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120 return true;
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121 }
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122
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123 @Override
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124 public boolean twoOperandMode() {
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125 return true;
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126 }
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127
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128 }