Mercurial > hg > truffle
annotate agent/src/share/classes/sun/jvm/hotspot/debugger/ia64/IA64ThreadContext.java @ 10343:6bd680e9ea35
8003421: NPG: Move oops out of InstanceKlass into mirror
Summary: Inject protection_domain, signers, init_lock into java_lang_Class
Reviewed-by: stefank, dholmes, sla
author | coleenp |
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date | Wed, 22 May 2013 14:37:49 -0400 |
parents | fac3dd92ebaf |
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rev | line source |
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0 | 1 /* |
6763 | 2 * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
25 package sun.jvm.hotspot.debugger.ia64; | |
26 | |
27 import sun.jvm.hotspot.debugger.*; | |
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28 import sun.jvm.hotspot.debugger.cdbg.*; |
0 | 29 |
30 /** Specifies the thread context on ia64 platform; only a sub-portion | |
31 of the context is guaranteed to be present on all operating | |
32 systems. */ | |
33 | |
34 public abstract class IA64ThreadContext implements ThreadContext { | |
35 // Refer to winnt.h CONTEXT structure - Nov 2001 edition Platform SDK | |
36 // only a relevant subset of CONTEXT structure is used here. | |
37 // For eg. floating point registers are ignored. | |
38 | |
39 // NOTE: the indices for the various registers must be maintained as | |
40 // listed across various operating systems. However, only a | |
41 // subset of the registers' values are guaranteed to be present | |
42 | |
43 // global registers r0-r31 | |
44 public static final int GR0 = 0; | |
45 public static final int GR1 = 1; | |
46 public static final int GR2 = 2; | |
47 public static final int GR3 = 3; | |
48 public static final int GR4 = 4; | |
49 public static final int GR5 = 5; | |
50 public static final int GR6 = 6; | |
51 public static final int GR7 = 7; | |
52 public static final int GR8 = 8; | |
53 public static final int GR9 = 9; | |
54 public static final int GR10 = 10; | |
55 public static final int GR11 = 11; | |
56 public static final int GR12 = 12; | |
57 public static final int SP = GR12; | |
58 public static final int GR13 = 13; | |
59 public static final int GR14 = 14; | |
60 public static final int GR15 = 15; | |
61 public static final int GR16 = 16; | |
62 public static final int GR17 = 17; | |
63 public static final int GR18 = 18; | |
64 public static final int GR19 = 19; | |
65 public static final int GR20 = 20; | |
66 public static final int GR21 = 21; | |
67 public static final int GR22 = 22; | |
68 public static final int GR23 = 23; | |
69 public static final int GR24 = 24; | |
70 public static final int GR25 = 25; | |
71 public static final int GR26 = 26; | |
72 public static final int GR27 = 27; | |
73 public static final int GR28 = 28; | |
74 public static final int GR29 = 29; | |
75 public static final int GR30 = 30; | |
76 public static final int GR31 = 31; | |
77 | |
78 // Nat bits for r1-r31 | |
79 public static final int INT_NATS = 32; | |
80 | |
81 // predicates | |
82 public static final int PREDS = 33; | |
83 | |
84 // branch registers | |
85 public static final int BR0 = 34; | |
86 public static final int BR_RP = BR0; | |
87 public static final int BR1 = 35; | |
88 public static final int BR2 = 36; | |
89 public static final int BR3 = 37; | |
90 public static final int BR4 = 38; | |
91 public static final int BR5 = 39; | |
92 public static final int BR6 = 40; | |
93 public static final int BR7 = 41; | |
94 | |
95 // application registers | |
96 public static final int AP_UNAT = 42; // User Nat Collection register | |
97 public static final int AP_LC = 43; // Loop counter register | |
98 public static final int AP_EC = 43; // Epilog counter register | |
99 public static final int AP_CCV = 45; // CMPXCHG value register | |
100 public static final int AP_DCR = 46; // Default control register | |
101 | |
102 // register stack info | |
103 public static final int RS_PFS = 47; // Previous function state | |
104 public static final int AP_PFS = RS_PFS; | |
105 public static final int RS_BSP = 48; // Backing store pointer | |
106 public static final int AR_BSP = RS_BSP; | |
107 public static final int RS_BSPSTORE = 49; | |
108 public static final int AP_BSPSTORE = RS_BSPSTORE; | |
109 public static final int RS_RSC = 50; // RSE configuration | |
110 public static final int AP_RSC = RS_RSC; | |
111 public static final int RS_RNAT = 51; // RSE Nat collection register | |
112 public static final int AP_RNAT = RS_RNAT; | |
113 | |
114 // trap status register | |
115 public static final int ST_IPSR = 52; // Interuption Processor Status | |
116 public static final int ST_IIP = 53; // Interruption IP | |
117 public static final int ST_IFS = 54; // Interruption Function State | |
118 | |
119 // debug registers | |
120 public static final int DB_I0 = 55; | |
121 public static final int DB_I1 = 56; | |
122 public static final int DB_I2 = 57; | |
123 public static final int DB_I3 = 58; | |
124 public static final int DB_I4 = 59; | |
125 public static final int DB_I5 = 60; | |
126 public static final int DB_I6 = 61; | |
127 public static final int DB_I7 = 62; | |
128 | |
129 public static final int DB_D0 = 63; | |
130 public static final int DB_D1 = 64; | |
131 public static final int DB_D2 = 65; | |
132 public static final int DB_D3 = 66; | |
133 public static final int DB_D4 = 67; | |
134 public static final int DB_D5 = 68; | |
135 public static final int DB_D6 = 69; | |
136 public static final int DB_D7 = 70; | |
137 | |
138 public static final int NPRGREG = 71; | |
139 | |
140 private static final String[] regNames = { | |
141 "GR0", "GR1", "GR2", "GR3", "GR4", "GR5", "GR6", "GR7", "GR8", | |
142 "GR9", "GR10", "GR11", "GR12", "GR13", "GR14", "GR15", "GR16", | |
143 "GR17","GR18", "GR19", "GR20", "GR21", "GR22", "GR23", "GR24", | |
144 "GR25","GR26", "GR27", "GR28", "GR29", "GR30", "GR31", | |
145 "INT_NATS", "PREDS", | |
146 "BR0", "BR1", "BR2", "BR3", "BR4", "BR5", "BR6", "BR7", | |
147 "AP_UNAT", "AP_LC", "AP_EC", "AP_CCV", "AP_DCR", | |
148 "RS_FPS", "RS_BSP", "RS_BSPSTORE", "RS_RSC", "RS_RNAT", | |
149 "ST_IPSR", "ST_IIP", "ST_IFS", | |
150 "DB_I0", "DB_I1", "DB_I2", "DB_I3", "DB_I4", "DB_I5", "DB_I6", "DB_I7", | |
151 "DB_D0", "DB_D1", "DB_D2", "DB_D3", "DB_D4", "DB_D5", "DB_D6", "DB_D7" | |
152 }; | |
153 | |
154 private long[] data; | |
155 | |
156 public IA64ThreadContext() { | |
157 data = new long[NPRGREG]; | |
158 } | |
159 | |
160 public int getNumRegisters() { | |
161 return NPRGREG; | |
162 } | |
163 | |
164 public String getRegisterName(int index) { | |
165 return regNames[index]; | |
166 } | |
167 | |
168 public void setRegister(int index, long value) { | |
169 data[index] = value; | |
170 } | |
171 | |
172 public long getRegister(int index) { | |
173 return data[index]; | |
174 } | |
175 | |
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176 public CFrame getTopFrame(Debugger dbg) { |
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177 return null; |
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178 } |
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179 |
0 | 180 /** This can't be implemented in this class since we would have to |
181 tie the implementation to, for example, the debugging system */ | |
182 public abstract void setRegisterAsAddress(int index, Address value); | |
183 | |
184 /** This can't be implemented in this class since we would have to | |
185 tie the implementation to, for example, the debugging system */ | |
186 public abstract Address getRegisterAsAddress(int index); | |
187 } |