annotate src/share/vm/opto/buildOopMap.cpp @ 1994:6cd6d394f280

7001033: assert(gch->gc_cause() == GCCause::_scavenge_alot || !gch->incremental_collection_failed()) 7002546: regression on SpecJbb2005 on 7b118 comparing to 7b117 on small heaps Summary: Relaxed assertion checking related to incremental_collection_failed flag to allow for ExplicitGCInvokesConcurrent behaviour where we do not want a failing scavenge to bail to a stop-world collection. Parameterized incremental_collection_will_fail() so we can selectively use, or not use, as appropriate, the statistical prediction at specific use sites. This essentially reverts the scavenge bail-out logic to what it was prior to some recent changes that had inadvertently started using the statistical prediction which can be noisy in the presence of bursty loads. Added some associated verbose non-product debugging messages. Reviewed-by: johnc, tonyp
author ysr
date Tue, 07 Dec 2010 21:55:53 -0800
parents f95d63e2154a
children b92c45f2bc75
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1 /*
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2 * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #include "precompiled.hpp"
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26 #include "compiler/oopMap.hpp"
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27 #include "opto/addnode.hpp"
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28 #include "opto/callnode.hpp"
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29 #include "opto/compile.hpp"
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30 #include "opto/machnode.hpp"
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31 #include "opto/matcher.hpp"
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32 #include "opto/phase.hpp"
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33 #include "opto/regalloc.hpp"
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34 #include "opto/rootnode.hpp"
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35 #ifdef TARGET_ARCH_x86
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36 # include "vmreg_x86.inline.hpp"
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37 #endif
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38 #ifdef TARGET_ARCH_sparc
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39 # include "vmreg_sparc.inline.hpp"
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40 #endif
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41 #ifdef TARGET_ARCH_zero
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42 # include "vmreg_zero.inline.hpp"
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43 #endif
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45 // The functions in this file builds OopMaps after all scheduling is done.
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46 //
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47 // OopMaps contain a list of all registers and stack-slots containing oops (so
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48 // they can be updated by GC). OopMaps also contain a list of derived-pointer
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49 // base-pointer pairs. When the base is moved, the derived pointer moves to
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50 // follow it. Finally, any registers holding callee-save values are also
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51 // recorded. These might contain oops, but only the caller knows.
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52 //
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53 // BuildOopMaps implements a simple forward reaching-defs solution. At each
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54 // GC point we'll have the reaching-def Nodes. If the reaching Nodes are
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55 // typed as pointers (no offset), then they are oops. Pointers+offsets are
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56 // derived pointers, and bases can be found from them. Finally, we'll also
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57 // track reaching callee-save values. Note that a copy of a callee-save value
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58 // "kills" it's source, so that only 1 copy of a callee-save value is alive at
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59 // a time.
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60 //
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61 // We run a simple bitvector liveness pass to help trim out dead oops. Due to
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62 // irreducible loops, we can have a reaching def of an oop that only reaches
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63 // along one path and no way to know if it's valid or not on the other path.
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64 // The bitvectors are quite dense and the liveness pass is fast.
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65 //
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66 // At GC points, we consult this information to build OopMaps. All reaching
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67 // defs typed as oops are added to the OopMap. Only 1 instance of a
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68 // callee-save register can be recorded. For derived pointers, we'll have to
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69 // find and record the register holding the base.
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70 //
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71 // The reaching def's is a simple 1-pass worklist approach. I tried a clever
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72 // breadth-first approach but it was worse (showed O(n^2) in the
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73 // pick-next-block code).
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74 //
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75 // The relevant data is kept in a struct of arrays (it could just as well be
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76 // an array of structs, but the struct-of-arrays is generally a little more
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77 // efficient). The arrays are indexed by register number (including
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78 // stack-slots as registers) and so is bounded by 200 to 300 elements in
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79 // practice. One array will map to a reaching def Node (or NULL for
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80 // conflict/dead). The other array will map to a callee-saved register or
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81 // OptoReg::Bad for not-callee-saved.
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82
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83
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84 //------------------------------OopFlow----------------------------------------
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85 // Structure to pass around
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86 struct OopFlow : public ResourceObj {
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87 short *_callees; // Array mapping register to callee-saved
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88 Node **_defs; // array mapping register to reaching def
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89 // or NULL if dead/conflict
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90 // OopFlow structs, when not being actively modified, describe the _end_ of
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91 // this block.
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92 Block *_b; // Block for this struct
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93 OopFlow *_next; // Next free OopFlow
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94 // or NULL if dead/conflict
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95 Compile* C;
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96
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97 OopFlow( short *callees, Node **defs, Compile* c ) : _callees(callees), _defs(defs),
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98 _b(NULL), _next(NULL), C(c) { }
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99
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100 // Given reaching-defs for this block start, compute it for this block end
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101 void compute_reach( PhaseRegAlloc *regalloc, int max_reg, Dict *safehash );
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102
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103 // Merge these two OopFlows into the 'this' pointer.
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104 void merge( OopFlow *flow, int max_reg );
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105
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106 // Copy a 'flow' over an existing flow
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107 void clone( OopFlow *flow, int max_size);
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108
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109 // Make a new OopFlow from scratch
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110 static OopFlow *make( Arena *A, int max_size, Compile* C );
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111
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112 // Build an oopmap from the current flow info
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113 OopMap *build_oop_map( Node *n, int max_reg, PhaseRegAlloc *regalloc, int* live );
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114 };
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115
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116 //------------------------------compute_reach----------------------------------
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117 // Given reaching-defs for this block start, compute it for this block end
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118 void OopFlow::compute_reach( PhaseRegAlloc *regalloc, int max_reg, Dict *safehash ) {
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119
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120 for( uint i=0; i<_b->_nodes.size(); i++ ) {
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121 Node *n = _b->_nodes[i];
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122
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123 if( n->jvms() ) { // Build an OopMap here?
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124 JVMState *jvms = n->jvms();
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125 // no map needed for leaf calls
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126 if( n->is_MachSafePoint() && !n->is_MachCallLeaf() ) {
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127 int *live = (int*) (*safehash)[n];
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128 assert( live, "must find live" );
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129 n->as_MachSafePoint()->set_oop_map( build_oop_map(n,max_reg,regalloc, live) );
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130 }
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131 }
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132
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133 // Assign new reaching def's.
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134 // Note that I padded the _defs and _callees arrays so it's legal
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135 // to index at _defs[OptoReg::Bad].
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136 OptoReg::Name first = regalloc->get_reg_first(n);
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137 OptoReg::Name second = regalloc->get_reg_second(n);
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138 _defs[first] = n;
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139 _defs[second] = n;
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140
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141 // Pass callee-save info around copies
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142 int idx = n->is_Copy();
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143 if( idx ) { // Copies move callee-save info
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144 OptoReg::Name old_first = regalloc->get_reg_first(n->in(idx));
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145 OptoReg::Name old_second = regalloc->get_reg_second(n->in(idx));
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146 int tmp_first = _callees[old_first];
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147 int tmp_second = _callees[old_second];
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148 _callees[old_first] = OptoReg::Bad; // callee-save is moved, dead in old location
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149 _callees[old_second] = OptoReg::Bad;
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150 _callees[first] = tmp_first;
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151 _callees[second] = tmp_second;
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152 } else if( n->is_Phi() ) { // Phis do not mod callee-saves
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153 assert( _callees[first] == _callees[regalloc->get_reg_first(n->in(1))], "" );
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154 assert( _callees[second] == _callees[regalloc->get_reg_second(n->in(1))], "" );
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155 assert( _callees[first] == _callees[regalloc->get_reg_first(n->in(n->req()-1))], "" );
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156 assert( _callees[second] == _callees[regalloc->get_reg_second(n->in(n->req()-1))], "" );
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157 } else {
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158 _callees[first] = OptoReg::Bad; // No longer holding a callee-save value
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159 _callees[second] = OptoReg::Bad;
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160
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161 // Find base case for callee saves
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162 if( n->is_Proj() && n->in(0)->is_Start() ) {
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163 if( OptoReg::is_reg(first) &&
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164 regalloc->_matcher.is_save_on_entry(first) )
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165 _callees[first] = first;
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166 if( OptoReg::is_reg(second) &&
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167 regalloc->_matcher.is_save_on_entry(second) )
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168 _callees[second] = second;
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169 }
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170 }
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171 }
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172 }
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173
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174 //------------------------------merge------------------------------------------
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175 // Merge the given flow into the 'this' flow
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176 void OopFlow::merge( OopFlow *flow, int max_reg ) {
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177 assert( _b == NULL, "merging into a happy flow" );
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178 assert( flow->_b, "this flow is still alive" );
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179 assert( flow != this, "no self flow" );
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180
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181 // Do the merge. If there are any differences, drop to 'bottom' which
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182 // is OptoReg::Bad or NULL depending.
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183 for( int i=0; i<max_reg; i++ ) {
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184 // Merge the callee-save's
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185 if( _callees[i] != flow->_callees[i] )
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186 _callees[i] = OptoReg::Bad;
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187 // Merge the reaching defs
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188 if( _defs[i] != flow->_defs[i] )
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189 _defs[i] = NULL;
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190 }
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191
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192 }
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193
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194 //------------------------------clone------------------------------------------
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195 void OopFlow::clone( OopFlow *flow, int max_size ) {
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196 _b = flow->_b;
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197 memcpy( _callees, flow->_callees, sizeof(short)*max_size);
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198 memcpy( _defs , flow->_defs , sizeof(Node*)*max_size);
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199 }
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200
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201 //------------------------------make-------------------------------------------
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acba6af809c8 6840775: Multiple JVM crashes seen with 1.6.0_10 through 1.6.0_14
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diff changeset
202 OopFlow *OopFlow::make( Arena *A, int max_size, Compile* C ) {
0
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203 short *callees = NEW_ARENA_ARRAY(A,short,max_size+1);
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204 Node **defs = NEW_ARENA_ARRAY(A,Node*,max_size+1);
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205 debug_only( memset(defs,0,(max_size+1)*sizeof(Node*)) );
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acba6af809c8 6840775: Multiple JVM crashes seen with 1.6.0_10 through 1.6.0_14
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diff changeset
206 OopFlow *flow = new (A) OopFlow(callees+1, defs+1, C);
0
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207 assert( &flow->_callees[OptoReg::Bad] == callees, "Ok to index at OptoReg::Bad" );
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208 assert( &flow->_defs [OptoReg::Bad] == defs , "Ok to index at OptoReg::Bad" );
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209 return flow;
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210 }
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211
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212 //------------------------------bit twiddlers----------------------------------
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213 static int get_live_bit( int *live, int reg ) {
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214 return live[reg>>LogBitsPerInt] & (1<<(reg&(BitsPerInt-1))); }
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215 static void set_live_bit( int *live, int reg ) {
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216 live[reg>>LogBitsPerInt] |= (1<<(reg&(BitsPerInt-1))); }
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217 static void clr_live_bit( int *live, int reg ) {
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218 live[reg>>LogBitsPerInt] &= ~(1<<(reg&(BitsPerInt-1))); }
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219
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220 //------------------------------build_oop_map----------------------------------
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221 // Build an oopmap from the current flow info
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222 OopMap *OopFlow::build_oop_map( Node *n, int max_reg, PhaseRegAlloc *regalloc, int* live ) {
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223 int framesize = regalloc->_framesize;
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224 int max_inarg_slot = OptoReg::reg2stack(regalloc->_matcher._new_SP);
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225 debug_only( char *dup_check = NEW_RESOURCE_ARRAY(char,OptoReg::stack0());
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226 memset(dup_check,0,OptoReg::stack0()) );
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227
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228 OopMap *omap = new OopMap( framesize, max_inarg_slot );
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229 MachCallNode *mcall = n->is_MachCall() ? n->as_MachCall() : NULL;
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230 JVMState* jvms = n->jvms();
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231
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232 // For all registers do...
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233 for( int reg=0; reg<max_reg; reg++ ) {
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234 if( get_live_bit(live,reg) == 0 )
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235 continue; // Ignore if not live
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236
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237 // %%% C2 can use 2 OptoRegs when the physical register is only one 64bit
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238 // register in that case we'll get an non-concrete register for the second
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239 // half. We only need to tell the map the register once!
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240 //
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241 // However for the moment we disable this change and leave things as they
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242 // were.
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243
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244 VMReg r = OptoReg::as_VMReg(OptoReg::Name(reg), framesize, max_inarg_slot);
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245
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246 if (false && r->is_reg() && !r->is_concrete()) {
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247 continue;
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248 }
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249
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250 // See if dead (no reaching def).
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251 Node *def = _defs[reg]; // Get reaching def
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252 assert( def, "since live better have reaching def" );
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253
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254 // Classify the reaching def as oop, derived, callee-save, dead, or other
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255 const Type *t = def->bottom_type();
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256 if( t->isa_oop_ptr() ) { // Oop or derived?
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257 assert( !OptoReg::is_valid(_callees[reg]), "oop can't be callee save" );
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258 #ifdef _LP64
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259 // 64-bit pointers record oop-ishness on 2 aligned adjacent registers.
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260 // Make sure both are record from the same reaching def, but do not
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261 // put both into the oopmap.
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262 if( (reg&1) == 1 ) { // High half of oop-pair?
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263 assert( _defs[reg-1] == _defs[reg], "both halves from same reaching def" );
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264 continue; // Do not record high parts in oopmap
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265 }
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266 #endif
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267
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268 // Check for a legal reg name in the oopMap and bailout if it is not.
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269 if (!omap->legal_vm_reg_name(r)) {
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270 regalloc->C->record_method_not_compilable("illegal oopMap register name");
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271 continue;
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272 }
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273 if( t->is_ptr()->_offset == 0 ) { // Not derived?
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274 if( mcall ) {
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275 // Outgoing argument GC mask responsibility belongs to the callee,
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276 // not the caller. Inspect the inputs to the call, to see if
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277 // this live-range is one of them.
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278 uint cnt = mcall->tf()->domain()->cnt();
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279 uint j;
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280 for( j = TypeFunc::Parms; j < cnt; j++)
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281 if( mcall->in(j) == def )
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282 break; // reaching def is an argument oop
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283 if( j < cnt ) // arg oops dont go in GC map
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284 continue; // Continue on to the next register
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285 }
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286 omap->set_oop(r);
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287 } else { // Else it's derived.
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288 // Find the base of the derived value.
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289 uint i;
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290 // Fast, common case, scan
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291 for( i = jvms->oopoff(); i < n->req(); i+=2 )
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292 if( n->in(i) == def ) break; // Common case
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293 if( i == n->req() ) { // Missed, try a more generous scan
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294 // Scan again, but this time peek through copies
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295 for( i = jvms->oopoff(); i < n->req(); i+=2 ) {
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296 Node *m = n->in(i); // Get initial derived value
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297 while( 1 ) {
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298 Node *d = def; // Get initial reaching def
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299 while( 1 ) { // Follow copies of reaching def to end
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300 if( m == d ) goto found; // breaks 3 loops
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diff changeset
301 int idx = d->is_Copy();
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302 if( !idx ) break;
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303 d = d->in(idx); // Link through copy
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304 }
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diff changeset
305 int idx = m->is_Copy();
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306 if( !idx ) break;
a61af66fc99e Initial load
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307 m = m->in(idx);
a61af66fc99e Initial load
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308 }
a61af66fc99e Initial load
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diff changeset
309 }
833
acba6af809c8 6840775: Multiple JVM crashes seen with 1.6.0_10 through 1.6.0_14
kvn
parents: 729
diff changeset
310 guarantee( 0, "must find derived/base pair" );
0
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311 }
a61af66fc99e Initial load
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312 found: ;
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313 Node *base = n->in(i+1); // Base is other half of pair
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314 int breg = regalloc->get_reg_first(base);
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315 VMReg b = OptoReg::as_VMReg(OptoReg::Name(breg), framesize, max_inarg_slot);
a61af66fc99e Initial load
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316
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317 // I record liveness at safepoints BEFORE I make the inputs
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318 // live. This is because argument oops are NOT live at a
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319 // safepoint (or at least they cannot appear in the oopmap).
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320 // Thus bases of base/derived pairs might not be in the
a61af66fc99e Initial load
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diff changeset
321 // liveness data but they need to appear in the oopmap.
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diff changeset
322 if( get_live_bit(live,breg) == 0 ) {// Not live?
a61af66fc99e Initial load
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parents:
diff changeset
323 // Flag it, so next derived pointer won't re-insert into oopmap
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324 set_live_bit(live,breg);
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325 // Already missed our turn?
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parents:
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326 if( breg < reg ) {
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diff changeset
327 if (b->is_stack() || b->is_concrete() || true ) {
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328 omap->set_oop( b);
a61af66fc99e Initial load
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parents:
diff changeset
329 }
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diff changeset
330 }
a61af66fc99e Initial load
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diff changeset
331 }
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parents:
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332 if (b->is_stack() || b->is_concrete() || true ) {
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parents:
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333 omap->set_derived_oop( r, b);
a61af66fc99e Initial load
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parents:
diff changeset
334 }
a61af66fc99e Initial load
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diff changeset
335 }
a61af66fc99e Initial load
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parents:
diff changeset
336
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
337 } else if( t->isa_narrowoop() ) {
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
338 assert( !OptoReg::is_valid(_callees[reg]), "oop can't be callee save" );
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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diff changeset
339 // Check for a legal reg name in the oopMap and bailout if it is not.
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
340 if (!omap->legal_vm_reg_name(r)) {
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
341 regalloc->C->record_method_not_compilable("illegal oopMap register name");
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
342 continue;
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
343 }
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
344 if( mcall ) {
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
345 // Outgoing argument GC mask responsibility belongs to the callee,
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
346 // not the caller. Inspect the inputs to the call, to see if
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
347 // this live-range is one of them.
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
348 uint cnt = mcall->tf()->domain()->cnt();
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
349 uint j;
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
350 for( j = TypeFunc::Parms; j < cnt; j++)
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
351 if( mcall->in(j) == def )
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
352 break; // reaching def is an argument oop
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
353 if( j < cnt ) // arg oops dont go in GC map
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
354 continue; // Continue on to the next register
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
355 }
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
356 omap->set_narrowoop(r);
0
a61af66fc99e Initial load
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parents:
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357 } else if( OptoReg::is_valid(_callees[reg])) { // callee-save?
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parents:
diff changeset
358 // It's a callee-save value
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parents:
diff changeset
359 assert( dup_check[_callees[reg]]==0, "trying to callee save same reg twice" );
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parents:
diff changeset
360 debug_only( dup_check[_callees[reg]]=1; )
a61af66fc99e Initial load
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parents:
diff changeset
361 VMReg callee = OptoReg::as_VMReg(OptoReg::Name(_callees[reg]));
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parents:
diff changeset
362 if ( callee->is_concrete() || true ) {
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parents:
diff changeset
363 omap->set_callee_saved( r, callee);
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parents:
diff changeset
364 }
a61af66fc99e Initial load
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parents:
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365
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366 } else {
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parents:
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367 // Other - some reaching non-oop value
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368 omap->set_value( r);
833
acba6af809c8 6840775: Multiple JVM crashes seen with 1.6.0_10 through 1.6.0_14
kvn
parents: 729
diff changeset
369 #ifdef ASSERT
acba6af809c8 6840775: Multiple JVM crashes seen with 1.6.0_10 through 1.6.0_14
kvn
parents: 729
diff changeset
370 if( t->isa_rawptr() && C->cfg()->_raw_oops.member(def) ) {
acba6af809c8 6840775: Multiple JVM crashes seen with 1.6.0_10 through 1.6.0_14
kvn
parents: 729
diff changeset
371 def->dump();
acba6af809c8 6840775: Multiple JVM crashes seen with 1.6.0_10 through 1.6.0_14
kvn
parents: 729
diff changeset
372 n->dump();
acba6af809c8 6840775: Multiple JVM crashes seen with 1.6.0_10 through 1.6.0_14
kvn
parents: 729
diff changeset
373 assert(false, "there should be a oop in OopMap instead of a live raw oop at safepoint");
acba6af809c8 6840775: Multiple JVM crashes seen with 1.6.0_10 through 1.6.0_14
kvn
parents: 729
diff changeset
374 }
acba6af809c8 6840775: Multiple JVM crashes seen with 1.6.0_10 through 1.6.0_14
kvn
parents: 729
diff changeset
375 #endif
0
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parents:
diff changeset
376 }
a61af66fc99e Initial load
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parents:
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377
a61af66fc99e Initial load
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378 }
a61af66fc99e Initial load
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379
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380 #ifdef ASSERT
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parents:
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381 /* Nice, Intel-only assert
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parents:
diff changeset
382 int cnt_callee_saves=0;
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parents:
diff changeset
383 int reg2 = 0;
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parents:
diff changeset
384 while (OptoReg::is_reg(reg2)) {
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parents:
diff changeset
385 if( dup_check[reg2] != 0) cnt_callee_saves++;
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parents:
diff changeset
386 assert( cnt_callee_saves==3 || cnt_callee_saves==5, "missed some callee-save" );
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diff changeset
387 reg2++;
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parents:
diff changeset
388 }
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parents:
diff changeset
389 */
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parents:
diff changeset
390 #endif
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parents:
diff changeset
391
729
04fa5affa478 6709742: find_base_for_derived's use of Ideal NULL is unsafe causing crashes during register allocation
kvn
parents: 605
diff changeset
392 #ifdef ASSERT
04fa5affa478 6709742: find_base_for_derived's use of Ideal NULL is unsafe causing crashes during register allocation
kvn
parents: 605
diff changeset
393 for( OopMapStream oms1(omap, OopMapValue::derived_oop_value); !oms1.is_done(); oms1.next()) {
04fa5affa478 6709742: find_base_for_derived's use of Ideal NULL is unsafe causing crashes during register allocation
kvn
parents: 605
diff changeset
394 OopMapValue omv1 = oms1.current();
04fa5affa478 6709742: find_base_for_derived's use of Ideal NULL is unsafe causing crashes during register allocation
kvn
parents: 605
diff changeset
395 bool found = false;
04fa5affa478 6709742: find_base_for_derived's use of Ideal NULL is unsafe causing crashes during register allocation
kvn
parents: 605
diff changeset
396 for( OopMapStream oms2(omap,OopMapValue::oop_value); !oms2.is_done(); oms2.next()) {
04fa5affa478 6709742: find_base_for_derived's use of Ideal NULL is unsafe causing crashes during register allocation
kvn
parents: 605
diff changeset
397 if( omv1.content_reg() == oms2.current().reg() ) {
04fa5affa478 6709742: find_base_for_derived's use of Ideal NULL is unsafe causing crashes during register allocation
kvn
parents: 605
diff changeset
398 found = true;
04fa5affa478 6709742: find_base_for_derived's use of Ideal NULL is unsafe causing crashes during register allocation
kvn
parents: 605
diff changeset
399 break;
04fa5affa478 6709742: find_base_for_derived's use of Ideal NULL is unsafe causing crashes during register allocation
kvn
parents: 605
diff changeset
400 }
04fa5affa478 6709742: find_base_for_derived's use of Ideal NULL is unsafe causing crashes during register allocation
kvn
parents: 605
diff changeset
401 }
04fa5affa478 6709742: find_base_for_derived's use of Ideal NULL is unsafe causing crashes during register allocation
kvn
parents: 605
diff changeset
402 assert( found, "derived with no base in oopmap" );
04fa5affa478 6709742: find_base_for_derived's use of Ideal NULL is unsafe causing crashes during register allocation
kvn
parents: 605
diff changeset
403 }
04fa5affa478 6709742: find_base_for_derived's use of Ideal NULL is unsafe causing crashes during register allocation
kvn
parents: 605
diff changeset
404 #endif
04fa5affa478 6709742: find_base_for_derived's use of Ideal NULL is unsafe causing crashes during register allocation
kvn
parents: 605
diff changeset
405
0
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parents:
diff changeset
406 return omap;
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parents:
diff changeset
407 }
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parents:
diff changeset
408
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parents:
diff changeset
409 //------------------------------do_liveness------------------------------------
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parents:
diff changeset
410 // Compute backwards liveness on registers
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parents:
diff changeset
411 static void do_liveness( PhaseRegAlloc *regalloc, PhaseCFG *cfg, Block_List *worklist, int max_reg_ints, Arena *A, Dict *safehash ) {
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parents:
diff changeset
412 int *live = NEW_ARENA_ARRAY(A, int, (cfg->_num_blocks+1) * max_reg_ints);
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parents:
diff changeset
413 int *tmp_live = &live[cfg->_num_blocks * max_reg_ints];
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parents:
diff changeset
414 Node *root = cfg->C->root();
a61af66fc99e Initial load
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parents:
diff changeset
415 // On CISC platforms, get the node representing the stack pointer that regalloc
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parents:
diff changeset
416 // used for spills
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parents:
diff changeset
417 Node *fp = NodeSentinel;
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parents:
diff changeset
418 if (UseCISCSpill && root->req() > 1) {
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parents:
diff changeset
419 fp = root->in(1)->in(TypeFunc::FramePtr);
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parents:
diff changeset
420 }
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parents:
diff changeset
421 memset( live, 0, cfg->_num_blocks * (max_reg_ints<<LogBytesPerInt) );
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parents:
diff changeset
422 // Push preds onto worklist
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parents:
diff changeset
423 for( uint i=1; i<root->req(); i++ )
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parents:
diff changeset
424 worklist->push(cfg->_bbs[root->in(i)->_idx]);
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parents:
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425
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parents:
diff changeset
426 // ZKM.jar includes tiny infinite loops which are unreached from below.
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parents:
diff changeset
427 // If we missed any blocks, we'll retry here after pushing all missed
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parents:
diff changeset
428 // blocks on the worklist. Normally this outer loop never trips more
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parents:
diff changeset
429 // than once.
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parents:
diff changeset
430 while( 1 ) {
a61af66fc99e Initial load
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parents:
diff changeset
431
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parents:
diff changeset
432 while( worklist->size() ) { // Standard worklist algorithm
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parents:
diff changeset
433 Block *b = worklist->rpop();
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parents:
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434
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parents:
diff changeset
435 // Copy first successor into my tmp_live space
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parents:
diff changeset
436 int s0num = b->_succs[0]->_pre_order;
a61af66fc99e Initial load
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parents:
diff changeset
437 int *t = &live[s0num*max_reg_ints];
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parents:
diff changeset
438 for( int i=0; i<max_reg_ints; i++ )
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parents:
diff changeset
439 tmp_live[i] = t[i];
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parents:
diff changeset
440
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parents:
diff changeset
441 // OR in the remaining live registers
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parents:
diff changeset
442 for( uint j=1; j<b->_num_succs; j++ ) {
a61af66fc99e Initial load
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parents:
diff changeset
443 uint sjnum = b->_succs[j]->_pre_order;
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parents:
diff changeset
444 int *t = &live[sjnum*max_reg_ints];
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parents:
diff changeset
445 for( int i=0; i<max_reg_ints; i++ )
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parents:
diff changeset
446 tmp_live[i] |= t[i];
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parents:
diff changeset
447 }
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parents:
diff changeset
448
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parents:
diff changeset
449 // Now walk tmp_live up the block backwards, computing live
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parents:
diff changeset
450 for( int k=b->_nodes.size()-1; k>=0; k-- ) {
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parents:
diff changeset
451 Node *n = b->_nodes[k];
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parents:
diff changeset
452 // KILL def'd bits
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parents:
diff changeset
453 int first = regalloc->get_reg_first(n);
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parents:
diff changeset
454 int second = regalloc->get_reg_second(n);
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parents:
diff changeset
455 if( OptoReg::is_valid(first) ) clr_live_bit(tmp_live,first);
a61af66fc99e Initial load
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parents:
diff changeset
456 if( OptoReg::is_valid(second) ) clr_live_bit(tmp_live,second);
a61af66fc99e Initial load
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parents:
diff changeset
457
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parents:
diff changeset
458 MachNode *m = n->is_Mach() ? n->as_Mach() : NULL;
a61af66fc99e Initial load
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parents:
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459
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parents:
diff changeset
460 // Check if m is potentially a CISC alternate instruction (i.e, possibly
a61af66fc99e Initial load
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parents:
diff changeset
461 // synthesized by RegAlloc from a conventional instruction and a
a61af66fc99e Initial load
duke
parents:
diff changeset
462 // spilled input)
a61af66fc99e Initial load
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parents:
diff changeset
463 bool is_cisc_alternate = false;
a61af66fc99e Initial load
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parents:
diff changeset
464 if (UseCISCSpill && m) {
a61af66fc99e Initial load
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parents:
diff changeset
465 is_cisc_alternate = m->is_cisc_alternate();
a61af66fc99e Initial load
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parents:
diff changeset
466 }
a61af66fc99e Initial load
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parents:
diff changeset
467
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parents:
diff changeset
468 // GEN use'd bits
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parents:
diff changeset
469 for( uint l=1; l<n->req(); l++ ) {
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parents:
diff changeset
470 Node *def = n->in(l);
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parents:
diff changeset
471 assert(def != 0, "input edge required");
a61af66fc99e Initial load
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parents:
diff changeset
472 int first = regalloc->get_reg_first(def);
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parents:
diff changeset
473 int second = regalloc->get_reg_second(def);
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parents:
diff changeset
474 if( OptoReg::is_valid(first) ) set_live_bit(tmp_live,first);
a61af66fc99e Initial load
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parents:
diff changeset
475 if( OptoReg::is_valid(second) ) set_live_bit(tmp_live,second);
a61af66fc99e Initial load
duke
parents:
diff changeset
476 // If we use the stack pointer in a cisc-alternative instruction,
a61af66fc99e Initial load
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parents:
diff changeset
477 // check for use as a memory operand. Then reconstruct the RegName
a61af66fc99e Initial load
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parents:
diff changeset
478 // for this stack location, and set the appropriate bit in the
a61af66fc99e Initial load
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parents:
diff changeset
479 // live vector 4987749.
a61af66fc99e Initial load
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parents:
diff changeset
480 if (is_cisc_alternate && def == fp) {
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parents:
diff changeset
481 const TypePtr *adr_type = NULL;
a61af66fc99e Initial load
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parents:
diff changeset
482 intptr_t offset;
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parents:
diff changeset
483 const Node* base = m->get_base_and_disp(offset, adr_type);
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parents:
diff changeset
484 if (base == NodeSentinel) {
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parents:
diff changeset
485 // Machnode has multiple memory inputs. We are unable to reason
a61af66fc99e Initial load
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parents:
diff changeset
486 // with these, but are presuming (with trepidation) that not any of
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parents:
diff changeset
487 // them are oops. This can be fixed by making get_base_and_disp()
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parents:
diff changeset
488 // look at a specific input instead of all inputs.
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parents:
diff changeset
489 assert(!def->bottom_type()->isa_oop_ptr(), "expecting non-oop mem input");
a61af66fc99e Initial load
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parents:
diff changeset
490 } else if (base != fp || offset == Type::OffsetBot) {
a61af66fc99e Initial load
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parents:
diff changeset
491 // Do nothing: the fp operand is either not from a memory use
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parents:
diff changeset
492 // (base == NULL) OR the fp is used in a non-memory context
a61af66fc99e Initial load
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parents:
diff changeset
493 // (base is some other register) OR the offset is not constant,
a61af66fc99e Initial load
duke
parents:
diff changeset
494 // so it is not a stack slot.
a61af66fc99e Initial load
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parents:
diff changeset
495 } else {
a61af66fc99e Initial load
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parents:
diff changeset
496 assert(offset >= 0, "unexpected negative offset");
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parents:
diff changeset
497 offset -= (offset % jintSize); // count the whole word
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parents:
diff changeset
498 int stack_reg = regalloc->offset2reg(offset);
a61af66fc99e Initial load
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parents:
diff changeset
499 if (OptoReg::is_stack(stack_reg)) {
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parents:
diff changeset
500 set_live_bit(tmp_live, stack_reg);
a61af66fc99e Initial load
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parents:
diff changeset
501 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
502 assert(false, "stack_reg not on stack?");
a61af66fc99e Initial load
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parents:
diff changeset
503 }
a61af66fc99e Initial load
duke
parents:
diff changeset
504 }
a61af66fc99e Initial load
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parents:
diff changeset
505 }
a61af66fc99e Initial load
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parents:
diff changeset
506 }
a61af66fc99e Initial load
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parents:
diff changeset
507
a61af66fc99e Initial load
duke
parents:
diff changeset
508 if( n->jvms() ) { // Record liveness at safepoint
a61af66fc99e Initial load
duke
parents:
diff changeset
509
a61af66fc99e Initial load
duke
parents:
diff changeset
510 // This placement of this stanza means inputs to calls are
a61af66fc99e Initial load
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parents:
diff changeset
511 // considered live at the callsite's OopMap. Argument oops are
a61af66fc99e Initial load
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parents:
diff changeset
512 // hence live, but NOT included in the oopmap. See cutout in
a61af66fc99e Initial load
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parents:
diff changeset
513 // build_oop_map. Debug oops are live (and in OopMap).
a61af66fc99e Initial load
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parents:
diff changeset
514 int *n_live = NEW_ARENA_ARRAY(A, int, max_reg_ints);
a61af66fc99e Initial load
duke
parents:
diff changeset
515 for( int l=0; l<max_reg_ints; l++ )
a61af66fc99e Initial load
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parents:
diff changeset
516 n_live[l] = tmp_live[l];
a61af66fc99e Initial load
duke
parents:
diff changeset
517 safehash->Insert(n,n_live);
a61af66fc99e Initial load
duke
parents:
diff changeset
518 }
a61af66fc99e Initial load
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parents:
diff changeset
519
a61af66fc99e Initial load
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parents:
diff changeset
520 }
a61af66fc99e Initial load
duke
parents:
diff changeset
521
a61af66fc99e Initial load
duke
parents:
diff changeset
522 // Now at block top, see if we have any changes. If so, propagate
a61af66fc99e Initial load
duke
parents:
diff changeset
523 // to prior blocks.
a61af66fc99e Initial load
duke
parents:
diff changeset
524 int *old_live = &live[b->_pre_order*max_reg_ints];
a61af66fc99e Initial load
duke
parents:
diff changeset
525 int l;
a61af66fc99e Initial load
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parents:
diff changeset
526 for( l=0; l<max_reg_ints; l++ )
a61af66fc99e Initial load
duke
parents:
diff changeset
527 if( tmp_live[l] != old_live[l] )
a61af66fc99e Initial load
duke
parents:
diff changeset
528 break;
a61af66fc99e Initial load
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parents:
diff changeset
529 if( l<max_reg_ints ) { // Change!
a61af66fc99e Initial load
duke
parents:
diff changeset
530 // Copy in new value
a61af66fc99e Initial load
duke
parents:
diff changeset
531 for( l=0; l<max_reg_ints; l++ )
a61af66fc99e Initial load
duke
parents:
diff changeset
532 old_live[l] = tmp_live[l];
a61af66fc99e Initial load
duke
parents:
diff changeset
533 // Push preds onto worklist
a61af66fc99e Initial load
duke
parents:
diff changeset
534 for( l=1; l<(int)b->num_preds(); l++ )
a61af66fc99e Initial load
duke
parents:
diff changeset
535 worklist->push(cfg->_bbs[b->pred(l)->_idx]);
a61af66fc99e Initial load
duke
parents:
diff changeset
536 }
a61af66fc99e Initial load
duke
parents:
diff changeset
537 }
a61af66fc99e Initial load
duke
parents:
diff changeset
538
a61af66fc99e Initial load
duke
parents:
diff changeset
539 // Scan for any missing safepoints. Happens to infinite loops
a61af66fc99e Initial load
duke
parents:
diff changeset
540 // ala ZKM.jar
a61af66fc99e Initial load
duke
parents:
diff changeset
541 uint i;
a61af66fc99e Initial load
duke
parents:
diff changeset
542 for( i=1; i<cfg->_num_blocks; i++ ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
543 Block *b = cfg->_blocks[i];
a61af66fc99e Initial load
duke
parents:
diff changeset
544 uint j;
a61af66fc99e Initial load
duke
parents:
diff changeset
545 for( j=1; j<b->_nodes.size(); j++ )
a61af66fc99e Initial load
duke
parents:
diff changeset
546 if( b->_nodes[j]->jvms() &&
a61af66fc99e Initial load
duke
parents:
diff changeset
547 (*safehash)[b->_nodes[j]] == NULL )
a61af66fc99e Initial load
duke
parents:
diff changeset
548 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
549 if( j<b->_nodes.size() ) break;
a61af66fc99e Initial load
duke
parents:
diff changeset
550 }
a61af66fc99e Initial load
duke
parents:
diff changeset
551 if( i == cfg->_num_blocks )
a61af66fc99e Initial load
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parents:
diff changeset
552 break; // Got 'em all
a61af66fc99e Initial load
duke
parents:
diff changeset
553 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
554 if( PrintOpto && Verbose )
a61af66fc99e Initial load
duke
parents:
diff changeset
555 tty->print_cr("retripping live calc");
a61af66fc99e Initial load
duke
parents:
diff changeset
556 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
557 // Force the issue (expensively): recheck everybody
a61af66fc99e Initial load
duke
parents:
diff changeset
558 for( i=1; i<cfg->_num_blocks; i++ )
a61af66fc99e Initial load
duke
parents:
diff changeset
559 worklist->push(cfg->_blocks[i]);
a61af66fc99e Initial load
duke
parents:
diff changeset
560 }
a61af66fc99e Initial load
duke
parents:
diff changeset
561
a61af66fc99e Initial load
duke
parents:
diff changeset
562 }
a61af66fc99e Initial load
duke
parents:
diff changeset
563
a61af66fc99e Initial load
duke
parents:
diff changeset
564 //------------------------------BuildOopMaps-----------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
565 // Collect GC mask info - where are all the OOPs?
a61af66fc99e Initial load
duke
parents:
diff changeset
566 void Compile::BuildOopMaps() {
a61af66fc99e Initial load
duke
parents:
diff changeset
567 NOT_PRODUCT( TracePhase t3("bldOopMaps", &_t_buildOopMaps, TimeCompiler); )
a61af66fc99e Initial load
duke
parents:
diff changeset
568 // Can't resource-mark because I need to leave all those OopMaps around,
a61af66fc99e Initial load
duke
parents:
diff changeset
569 // or else I need to resource-mark some arena other than the default.
a61af66fc99e Initial load
duke
parents:
diff changeset
570 // ResourceMark rm; // Reclaim all OopFlows when done
a61af66fc99e Initial load
duke
parents:
diff changeset
571 int max_reg = _regalloc->_max_reg; // Current array extent
a61af66fc99e Initial load
duke
parents:
diff changeset
572
a61af66fc99e Initial load
duke
parents:
diff changeset
573 Arena *A = Thread::current()->resource_area();
a61af66fc99e Initial load
duke
parents:
diff changeset
574 Block_List worklist; // Worklist of pending blocks
a61af66fc99e Initial load
duke
parents:
diff changeset
575
a61af66fc99e Initial load
duke
parents:
diff changeset
576 int max_reg_ints = round_to(max_reg, BitsPerInt)>>LogBitsPerInt;
a61af66fc99e Initial load
duke
parents:
diff changeset
577 Dict *safehash = NULL; // Used for assert only
a61af66fc99e Initial load
duke
parents:
diff changeset
578 // Compute a backwards liveness per register. Needs a bitarray of
a61af66fc99e Initial load
duke
parents:
diff changeset
579 // #blocks x (#registers, rounded up to ints)
a61af66fc99e Initial load
duke
parents:
diff changeset
580 safehash = new Dict(cmpkey,hashkey,A);
a61af66fc99e Initial load
duke
parents:
diff changeset
581 do_liveness( _regalloc, _cfg, &worklist, max_reg_ints, A, safehash );
a61af66fc99e Initial load
duke
parents:
diff changeset
582 OopFlow *free_list = NULL; // Free, unused
a61af66fc99e Initial load
duke
parents:
diff changeset
583
a61af66fc99e Initial load
duke
parents:
diff changeset
584 // Array mapping blocks to completed oopflows
a61af66fc99e Initial load
duke
parents:
diff changeset
585 OopFlow **flows = NEW_ARENA_ARRAY(A, OopFlow*, _cfg->_num_blocks);
a61af66fc99e Initial load
duke
parents:
diff changeset
586 memset( flows, 0, _cfg->_num_blocks*sizeof(OopFlow*) );
a61af66fc99e Initial load
duke
parents:
diff changeset
587
a61af66fc99e Initial load
duke
parents:
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588
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589 // Do the first block 'by hand' to prime the worklist
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590 Block *entry = _cfg->_blocks[1];
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591 OopFlow *rootflow = OopFlow::make(A,max_reg,this);
0
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592 // Initialize to 'bottom' (not 'top')
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593 memset( rootflow->_callees, OptoReg::Bad, max_reg*sizeof(short) );
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594 memset( rootflow->_defs , 0, max_reg*sizeof(Node*) );
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595 flows[entry->_pre_order] = rootflow;
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596
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597 // Do the first block 'by hand' to prime the worklist
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598 rootflow->_b = entry;
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599 rootflow->compute_reach( _regalloc, max_reg, safehash );
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600 for( uint i=0; i<entry->_num_succs; i++ )
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601 worklist.push(entry->_succs[i]);
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602
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603 // Now worklist contains blocks which have some, but perhaps not all,
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604 // predecessors visited.
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605 while( worklist.size() ) {
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606 // Scan for a block with all predecessors visited, or any randoms slob
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607 // otherwise. All-preds-visited order allows me to recycle OopFlow
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608 // structures rapidly and cut down on the memory footprint.
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609 // Note: not all predecessors might be visited yet (must happen for
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610 // irreducible loops). This is OK, since every live value must have the
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611 // SAME reaching def for the block, so any reaching def is OK.
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612 uint i;
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613
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614 Block *b = worklist.pop();
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615 // Ignore root block
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616 if( b == _cfg->_broot ) continue;
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617 // Block is already done? Happens if block has several predecessors,
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618 // he can get on the worklist more than once.
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619 if( flows[b->_pre_order] ) continue;
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620
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621 // If this block has a visited predecessor AND that predecessor has this
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622 // last block as his only undone child, we can move the OopFlow from the
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623 // pred to this block. Otherwise we have to grab a new OopFlow.
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624 OopFlow *flow = NULL; // Flag for finding optimized flow
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625 Block *pred = (Block*)0xdeadbeef;
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626 uint j;
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627 // Scan this block's preds to find a done predecessor
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628 for( j=1; j<b->num_preds(); j++ ) {
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629 Block *p = _cfg->_bbs[b->pred(j)->_idx];
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630 OopFlow *p_flow = flows[p->_pre_order];
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631 if( p_flow ) { // Predecessor is done
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632 assert( p_flow->_b == p, "cross check" );
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633 pred = p; // Record some predecessor
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634 // If all successors of p are done except for 'b', then we can carry
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635 // p_flow forward to 'b' without copying, otherwise we have to draw
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636 // from the free_list and clone data.
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637 uint k;
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638 for( k=0; k<p->_num_succs; k++ )
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639 if( !flows[p->_succs[k]->_pre_order] &&
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640 p->_succs[k] != b )
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641 break;
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642
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643 // Either carry-forward the now-unused OopFlow for b's use
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644 // or draw a new one from the free list
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645 if( k==p->_num_succs ) {
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646 flow = p_flow;
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647 break; // Found an ideal pred, use him
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648 }
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649 }
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650 }
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651
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652 if( flow ) {
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653 // We have an OopFlow that's the last-use of a predecessor.
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654 // Carry it forward.
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655 } else { // Draw a new OopFlow from the freelist
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656 if( !free_list )
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657 free_list = OopFlow::make(A,max_reg,C);
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658 flow = free_list;
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659 assert( flow->_b == NULL, "oopFlow is not free" );
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660 free_list = flow->_next;
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661 flow->_next = NULL;
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662
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663 // Copy/clone over the data
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664 flow->clone(flows[pred->_pre_order], max_reg);
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665 }
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666
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667 // Mark flow for block. Blocks can only be flowed over once,
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668 // because after the first time they are guarded from entering
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669 // this code again.
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670 assert( flow->_b == pred, "have some prior flow" );
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671 flow->_b = NULL;
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672
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673 // Now push flow forward
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674 flows[b->_pre_order] = flow;// Mark flow for this block
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675 flow->_b = b;
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676 flow->compute_reach( _regalloc, max_reg, safehash );
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677
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678 // Now push children onto worklist
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679 for( i=0; i<b->_num_succs; i++ )
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680 worklist.push(b->_succs[i]);
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681
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682 }
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683 }