Mercurial > hg > truffle
annotate src/share/vm/opto/postaloc.cpp @ 1994:6cd6d394f280
7001033: assert(gch->gc_cause() == GCCause::_scavenge_alot || !gch->incremental_collection_failed())
7002546: regression on SpecJbb2005 on 7b118 comparing to 7b117 on small heaps
Summary: Relaxed assertion checking related to incremental_collection_failed flag to allow for ExplicitGCInvokesConcurrent behaviour where we do not want a failing scavenge to bail to a stop-world collection. Parameterized incremental_collection_will_fail() so we can selectively use, or not use, as appropriate, the statistical prediction at specific use sites. This essentially reverts the scavenge bail-out logic to what it was prior to some recent changes that had inadvertently started using the statistical prediction which can be noisy in the presence of bursty loads. Added some associated verbose non-product debugging messages.
Reviewed-by: johnc, tonyp
| author | ysr |
|---|---|
| date | Tue, 07 Dec 2010 21:55:53 -0800 |
| parents | f95d63e2154a |
| children | 2f644f85485d |
| rev | line source |
|---|---|
| 0 | 1 /* |
| 1972 | 2 * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #include "precompiled.hpp" |
| 26 #include "memory/allocation.inline.hpp" | |
| 27 #include "opto/chaitin.hpp" | |
| 28 #include "opto/machnode.hpp" | |
| 0 | 29 |
| 30 // see if this register kind does not requires two registers | |
| 31 static bool is_single_register(uint x) { | |
| 32 #ifdef _LP64 | |
| 33 return (x != Op_RegD && x != Op_RegL && x != Op_RegP); | |
| 34 #else | |
| 35 return (x != Op_RegD && x != Op_RegL); | |
| 36 #endif | |
| 37 } | |
| 38 | |
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39 //---------------------------may_be_copy_of_callee----------------------------- |
| 0 | 40 // Check to see if we can possibly be a copy of a callee-save value. |
| 41 bool PhaseChaitin::may_be_copy_of_callee( Node *def ) const { | |
| 42 // Short circuit if there are no callee save registers | |
| 43 if (_matcher.number_of_saved_registers() == 0) return false; | |
| 44 | |
| 45 // Expect only a spill-down and reload on exit for callee-save spills. | |
| 46 // Chains of copies cannot be deep. | |
| 47 // 5008997 - This is wishful thinking. Register allocator seems to | |
| 48 // be splitting live ranges for callee save registers to such | |
| 49 // an extent that in large methods the chains can be very long | |
| 50 // (50+). The conservative answer is to return true if we don't | |
| 605 | 51 // know as this prevents optimizations from occurring. |
| 0 | 52 |
| 53 const int limit = 60; | |
| 54 int i; | |
| 55 for( i=0; i < limit; i++ ) { | |
| 56 if( def->is_Proj() && def->in(0)->is_Start() && | |
| 57 _matcher.is_save_on_entry(lrgs(n2lidx(def)).reg()) ) | |
| 58 return true; // Direct use of callee-save proj | |
| 59 if( def->is_Copy() ) // Copies carry value through | |
| 60 def = def->in(def->is_Copy()); | |
| 61 else if( def->is_Phi() ) // Phis can merge it from any direction | |
| 62 def = def->in(1); | |
| 63 else | |
| 64 break; | |
| 65 guarantee(def != NULL, "must not resurrect dead copy"); | |
| 66 } | |
| 67 // If we reached the end and didn't find a callee save proj | |
| 68 // then this may be a callee save proj so we return true | |
| 69 // as the conservative answer. If we didn't reach then end | |
| 70 // we must have discovered that it was not a callee save | |
| 71 // else we would have returned. | |
| 72 return i == limit; | |
| 73 } | |
| 74 | |
| 75 | |
| 76 | |
| 77 //------------------------------yank_if_dead----------------------------------- | |
| 78 // Removed an edge from 'old'. Yank if dead. Return adjustment counts to | |
| 79 // iterators in the current block. | |
| 80 int PhaseChaitin::yank_if_dead( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) { | |
| 81 int blk_adjust=0; | |
| 82 while (old->outcnt() == 0 && old != C->top()) { | |
| 83 Block *oldb = _cfg._bbs[old->_idx]; | |
| 84 oldb->find_remove(old); | |
| 85 // Count 1 if deleting an instruction from the current block | |
| 86 if( oldb == current_block ) blk_adjust++; | |
| 87 _cfg._bbs.map(old->_idx,NULL); | |
| 88 OptoReg::Name old_reg = lrgs(n2lidx(old)).reg(); | |
| 89 if( regnd && (*regnd)[old_reg]==old ) { // Instruction is currently available? | |
| 90 value->map(old_reg,NULL); // Yank from value/regnd maps | |
| 91 regnd->map(old_reg,NULL); // This register's value is now unknown | |
| 92 } | |
| 923 | 93 assert(old->req() <= 2, "can't handle more inputs"); |
| 0 | 94 Node *tmp = old->req() > 1 ? old->in(1) : NULL; |
| 95 old->disconnect_inputs(NULL); | |
| 96 if( !tmp ) break; | |
| 97 old = tmp; | |
| 98 } | |
| 99 return blk_adjust; | |
| 100 } | |
| 101 | |
| 102 //------------------------------use_prior_register----------------------------- | |
| 103 // Use the prior value instead of the current value, in an effort to make | |
| 104 // the current value go dead. Return block iterator adjustment, in case | |
| 105 // we yank some instructions from this block. | |
| 106 int PhaseChaitin::use_prior_register( Node *n, uint idx, Node *def, Block *current_block, Node_List &value, Node_List ®nd ) { | |
| 107 // No effect? | |
| 108 if( def == n->in(idx) ) return 0; | |
| 109 // Def is currently dead and can be removed? Do not resurrect | |
| 110 if( def->outcnt() == 0 ) return 0; | |
| 111 | |
| 112 // Not every pair of physical registers are assignment compatible, | |
| 113 // e.g. on sparc floating point registers are not assignable to integer | |
| 114 // registers. | |
| 115 const LRG &def_lrg = lrgs(n2lidx(def)); | |
| 116 OptoReg::Name def_reg = def_lrg.reg(); | |
| 117 const RegMask &use_mask = n->in_RegMask(idx); | |
| 118 bool can_use = ( RegMask::can_represent(def_reg) ? (use_mask.Member(def_reg) != 0) | |
| 119 : (use_mask.is_AllStack() != 0)); | |
| 120 // Check for a copy to or from a misaligned pair. | |
| 121 can_use = can_use && !use_mask.is_misaligned_Pair() && !def_lrg.mask().is_misaligned_Pair(); | |
| 122 | |
| 123 if (!can_use) | |
| 124 return 0; | |
| 125 | |
| 126 // Capture the old def in case it goes dead... | |
| 127 Node *old = n->in(idx); | |
| 128 | |
| 129 // Save-on-call copies can only be elided if the entire copy chain can go | |
| 130 // away, lest we get the same callee-save value alive in 2 locations at | |
| 131 // once. We check for the obvious trivial case here. Although it can | |
| 132 // sometimes be elided with cooperation outside our scope, here we will just | |
| 133 // miss the opportunity. :-( | |
| 134 if( may_be_copy_of_callee(def) ) { | |
| 135 if( old->outcnt() > 1 ) return 0; // We're the not last user | |
| 136 int idx = old->is_Copy(); | |
| 137 assert( idx, "chain of copies being removed" ); | |
| 138 Node *old2 = old->in(idx); // Chain of copies | |
| 139 if( old2->outcnt() > 1 ) return 0; // old is not the last user | |
| 140 int idx2 = old2->is_Copy(); | |
| 141 if( !idx2 ) return 0; // Not a chain of 2 copies | |
| 142 if( def != old2->in(idx2) ) return 0; // Chain of exactly 2 copies | |
| 143 } | |
| 144 | |
| 145 // Use the new def | |
| 146 n->set_req(idx,def); | |
| 147 _post_alloc++; | |
| 148 | |
| 149 // Is old def now dead? We successfully yanked a copy? | |
| 150 return yank_if_dead(old,current_block,&value,®nd); | |
| 151 } | |
| 152 | |
| 153 | |
| 154 //------------------------------skip_copies------------------------------------ | |
| 155 // Skip through any number of copies (that don't mod oop-i-ness) | |
| 156 Node *PhaseChaitin::skip_copies( Node *c ) { | |
| 157 int idx = c->is_Copy(); | |
| 158 uint is_oop = lrgs(n2lidx(c))._is_oop; | |
| 159 while (idx != 0) { | |
| 160 guarantee(c->in(idx) != NULL, "must not resurrect dead copy"); | |
| 161 if (lrgs(n2lidx(c->in(idx)))._is_oop != is_oop) | |
| 162 break; // casting copy, not the same value | |
| 163 c = c->in(idx); | |
| 164 idx = c->is_Copy(); | |
| 165 } | |
| 166 return c; | |
| 167 } | |
| 168 | |
| 169 //------------------------------elide_copy------------------------------------- | |
| 170 // Remove (bypass) copies along Node n, edge k. | |
| 171 int PhaseChaitin::elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List ®nd, bool can_change_regs ) { | |
| 172 int blk_adjust = 0; | |
| 173 | |
| 174 uint nk_idx = n2lidx(n->in(k)); | |
| 175 OptoReg::Name nk_reg = lrgs(nk_idx ).reg(); | |
| 176 | |
| 177 // Remove obvious same-register copies | |
| 178 Node *x = n->in(k); | |
| 179 int idx; | |
| 180 while( (idx=x->is_Copy()) != 0 ) { | |
| 181 Node *copy = x->in(idx); | |
| 182 guarantee(copy != NULL, "must not resurrect dead copy"); | |
| 183 if( lrgs(n2lidx(copy)).reg() != nk_reg ) break; | |
| 184 blk_adjust += use_prior_register(n,k,copy,current_block,value,regnd); | |
| 185 if( n->in(k) != copy ) break; // Failed for some cutout? | |
| 186 x = copy; // Progress, try again | |
| 187 } | |
| 188 | |
| 189 // Phis and 2-address instructions cannot change registers so easily - their | |
| 190 // outputs must match their input. | |
| 191 if( !can_change_regs ) | |
| 192 return blk_adjust; // Only check stupid copies! | |
| 193 | |
| 194 // Loop backedges won't have a value-mapping yet | |
| 195 if( &value == NULL ) return blk_adjust; | |
| 196 | |
| 197 // Skip through all copies to the _value_ being used. Do not change from | |
| 198 // int to pointer. This attempts to jump through a chain of copies, where | |
| 199 // intermediate copies might be illegal, i.e., value is stored down to stack | |
| 200 // then reloaded BUT survives in a register the whole way. | |
| 201 Node *val = skip_copies(n->in(k)); | |
| 202 | |
| 203 if( val == x ) return blk_adjust; // No progress? | |
| 204 | |
| 205 bool single = is_single_register(val->ideal_reg()); | |
| 206 uint val_idx = n2lidx(val); | |
| 207 OptoReg::Name val_reg = lrgs(val_idx).reg(); | |
| 208 | |
| 209 // See if it happens to already be in the correct register! | |
| 210 // (either Phi's direct register, or the common case of the name | |
| 211 // never-clobbered original-def register) | |
| 212 if( value[val_reg] == val && | |
| 213 // Doubles check both halves | |
| 214 ( single || value[val_reg-1] == val ) ) { | |
| 215 blk_adjust += use_prior_register(n,k,regnd[val_reg],current_block,value,regnd); | |
| 216 if( n->in(k) == regnd[val_reg] ) // Success! Quit trying | |
| 217 return blk_adjust; | |
| 218 } | |
| 219 | |
| 220 // See if we can skip the copy by changing registers. Don't change from | |
| 221 // using a register to using the stack unless we know we can remove a | |
| 222 // copy-load. Otherwise we might end up making a pile of Intel cisc-spill | |
| 223 // ops reading from memory instead of just loading once and using the | |
| 224 // register. | |
| 225 | |
| 226 // Also handle duplicate copies here. | |
| 227 const Type *t = val->is_Con() ? val->bottom_type() : NULL; | |
| 228 | |
| 229 // Scan all registers to see if this value is around already | |
| 230 for( uint reg = 0; reg < (uint)_max_reg; reg++ ) { | |
|
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231 if (reg == (uint)nk_reg) { |
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232 // Found ourselves so check if there is only one user of this |
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233 // copy and keep on searching for a better copy if so. |
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234 bool ignore_self = true; |
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235 x = n->in(k); |
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236 DUIterator_Fast imax, i = x->fast_outs(imax); |
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237 Node* first = x->fast_out(i); i++; |
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238 while (i < imax && ignore_self) { |
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239 Node* use = x->fast_out(i); i++; |
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240 if (use != first) ignore_self = false; |
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241 } |
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242 if (ignore_self) continue; |
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243 } |
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244 |
| 0 | 245 Node *vv = value[reg]; |
| 246 if( !single ) { // Doubles check for aligned-adjacent pair | |
| 247 if( (reg&1)==0 ) continue; // Wrong half of a pair | |
| 248 if( vv != value[reg-1] ) continue; // Not a complete pair | |
| 249 } | |
| 250 if( vv == val || // Got a direct hit? | |
| 251 (t && vv && vv->bottom_type() == t && vv->is_Mach() && | |
| 252 vv->as_Mach()->rule() == val->as_Mach()->rule()) ) { // Or same constant? | |
| 253 assert( !n->is_Phi(), "cannot change registers at a Phi so easily" ); | |
| 254 if( OptoReg::is_stack(nk_reg) || // CISC-loading from stack OR | |
| 255 OptoReg::is_reg(reg) || // turning into a register use OR | |
| 256 regnd[reg]->outcnt()==1 ) { // last use of a spill-load turns into a CISC use | |
| 257 blk_adjust += use_prior_register(n,k,regnd[reg],current_block,value,regnd); | |
| 258 if( n->in(k) == regnd[reg] ) // Success! Quit trying | |
| 259 return blk_adjust; | |
| 260 } // End of if not degrading to a stack | |
| 261 } // End of if found value in another register | |
| 262 } // End of scan all machine registers | |
| 263 return blk_adjust; | |
| 264 } | |
| 265 | |
| 266 | |
| 267 // | |
| 268 // Check if nreg already contains the constant value val. Normal copy | |
| 269 // elimination doesn't doesn't work on constants because multiple | |
| 270 // nodes can represent the same constant so the type and rule of the | |
| 271 // MachNode must be checked to ensure equivalence. | |
| 272 // | |
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273 bool PhaseChaitin::eliminate_copy_of_constant(Node* val, Node* n, |
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274 Block *current_block, |
| 0 | 275 Node_List& value, Node_List& regnd, |
| 276 OptoReg::Name nreg, OptoReg::Name nreg2) { | |
| 277 if (value[nreg] != val && val->is_Con() && | |
| 278 value[nreg] != NULL && value[nreg]->is_Con() && | |
| 279 (nreg2 == OptoReg::Bad || value[nreg] == value[nreg2]) && | |
| 280 value[nreg]->bottom_type() == val->bottom_type() && | |
| 281 value[nreg]->as_Mach()->rule() == val->as_Mach()->rule()) { | |
| 282 // This code assumes that two MachNodes representing constants | |
| 283 // which have the same rule and the same bottom type will produce | |
| 284 // identical effects into a register. This seems like it must be | |
| 285 // objectively true unless there are hidden inputs to the nodes | |
| 286 // but if that were to change this code would need to updated. | |
| 287 // Since they are equivalent the second one if redundant and can | |
| 288 // be removed. | |
| 289 // | |
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290 // n will be replaced with the old value but n might have |
| 0 | 291 // kills projections associated with it so remove them now so that |
| 605 | 292 // yank_if_dead will be able to eliminate the copy once the uses |
| 0 | 293 // have been transferred to the old[value]. |
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294 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) { |
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295 Node* use = n->fast_out(i); |
| 0 | 296 if (use->is_Proj() && use->outcnt() == 0) { |
| 297 // Kill projections have no users and one input | |
| 298 use->set_req(0, C->top()); | |
| 299 yank_if_dead(use, current_block, &value, ®nd); | |
| 300 --i; --imax; | |
| 301 } | |
| 302 } | |
| 303 _post_alloc++; | |
| 304 return true; | |
| 305 } | |
| 306 return false; | |
| 307 } | |
| 308 | |
| 309 | |
| 310 //------------------------------post_allocate_copy_removal--------------------- | |
| 311 // Post-Allocation peephole copy removal. We do this in 1 pass over the | |
| 312 // basic blocks. We maintain a mapping of registers to Nodes (an array of | |
| 313 // Nodes indexed by machine register or stack slot number). NULL means that a | |
| 314 // register is not mapped to any Node. We can (want to have!) have several | |
| 315 // registers map to the same Node. We walk forward over the instructions | |
| 316 // updating the mapping as we go. At merge points we force a NULL if we have | |
| 317 // to merge 2 different Nodes into the same register. Phi functions will give | |
| 318 // us a new Node if there is a proper value merging. Since the blocks are | |
| 319 // arranged in some RPO, we will visit all parent blocks before visiting any | |
| 320 // successor blocks (except at loops). | |
| 321 // | |
| 322 // If we find a Copy we look to see if the Copy's source register is a stack | |
| 323 // slot and that value has already been loaded into some machine register; if | |
| 324 // so we use machine register directly. This turns a Load into a reg-reg | |
| 325 // Move. We also look for reloads of identical constants. | |
| 326 // | |
| 327 // When we see a use from a reg-reg Copy, we will attempt to use the copy's | |
| 328 // source directly and make the copy go dead. | |
| 329 void PhaseChaitin::post_allocate_copy_removal() { | |
| 330 NOT_PRODUCT( Compile::TracePhase t3("postAllocCopyRemoval", &_t_postAllocCopyRemoval, TimeCompiler); ) | |
| 331 ResourceMark rm; | |
| 332 | |
| 333 // Need a mapping from basic block Node_Lists. We need a Node_List to | |
| 334 // map from register number to value-producing Node. | |
| 335 Node_List **blk2value = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1); | |
| 336 memset( blk2value, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) ); | |
| 337 // Need a mapping from basic block Node_Lists. We need a Node_List to | |
| 338 // map from register number to register-defining Node. | |
| 339 Node_List **blk2regnd = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1); | |
| 340 memset( blk2regnd, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) ); | |
| 341 | |
| 342 // We keep unused Node_Lists on a free_list to avoid wasting | |
| 343 // memory. | |
| 344 GrowableArray<Node_List*> free_list = GrowableArray<Node_List*>(16); | |
| 345 | |
| 346 // For all blocks | |
| 347 for( uint i = 0; i < _cfg._num_blocks; i++ ) { | |
| 348 uint j; | |
| 349 Block *b = _cfg._blocks[i]; | |
| 350 | |
| 351 // Count of Phis in block | |
| 352 uint phi_dex; | |
| 353 for( phi_dex = 1; phi_dex < b->_nodes.size(); phi_dex++ ) { | |
| 354 Node *phi = b->_nodes[phi_dex]; | |
| 355 if( !phi->is_Phi() ) | |
| 356 break; | |
| 357 } | |
| 358 | |
| 359 // If any predecessor has not been visited, we do not know the state | |
| 360 // of registers at the start. Check for this, while updating copies | |
| 361 // along Phi input edges | |
| 362 bool missing_some_inputs = false; | |
| 363 Block *freed = NULL; | |
| 364 for( j = 1; j < b->num_preds(); j++ ) { | |
| 365 Block *pb = _cfg._bbs[b->pred(j)->_idx]; | |
| 366 // Remove copies along phi edges | |
| 367 for( uint k=1; k<phi_dex; k++ ) | |
| 368 elide_copy( b->_nodes[k], j, b, *blk2value[pb->_pre_order], *blk2regnd[pb->_pre_order], false ); | |
| 369 if( blk2value[pb->_pre_order] ) { // Have a mapping on this edge? | |
| 370 // See if this predecessor's mappings have been used by everybody | |
| 371 // who wants them. If so, free 'em. | |
| 372 uint k; | |
| 373 for( k=0; k<pb->_num_succs; k++ ) { | |
| 374 Block *pbsucc = pb->_succs[k]; | |
| 375 if( !blk2value[pbsucc->_pre_order] && pbsucc != b ) | |
| 376 break; // Found a future user | |
| 377 } | |
| 378 if( k >= pb->_num_succs ) { // No more uses, free! | |
| 379 freed = pb; // Record last block freed | |
| 380 free_list.push(blk2value[pb->_pre_order]); | |
| 381 free_list.push(blk2regnd[pb->_pre_order]); | |
| 382 } | |
| 383 } else { // This block has unvisited (loopback) inputs | |
| 384 missing_some_inputs = true; | |
| 385 } | |
| 386 } | |
| 387 | |
| 388 | |
| 389 // Extract Node_List mappings. If 'freed' is non-zero, we just popped | |
| 390 // 'freed's blocks off the list | |
| 391 Node_List ®nd = *(free_list.is_empty() ? new Node_List() : free_list.pop()); | |
| 392 Node_List &value = *(free_list.is_empty() ? new Node_List() : free_list.pop()); | |
| 393 assert( !freed || blk2value[freed->_pre_order] == &value, "" ); | |
| 394 value.map(_max_reg,NULL); | |
| 395 regnd.map(_max_reg,NULL); | |
| 396 // Set mappings as OUR mappings | |
| 397 blk2value[b->_pre_order] = &value; | |
| 398 blk2regnd[b->_pre_order] = ®nd; | |
| 399 | |
| 400 // Initialize value & regnd for this block | |
| 401 if( missing_some_inputs ) { | |
| 402 // Some predecessor has not yet been visited; zap map to empty | |
| 403 for( uint k = 0; k < (uint)_max_reg; k++ ) { | |
| 404 value.map(k,NULL); | |
| 405 regnd.map(k,NULL); | |
| 406 } | |
| 407 } else { | |
| 408 if( !freed ) { // Didn't get a freebie prior block | |
| 409 // Must clone some data | |
| 410 freed = _cfg._bbs[b->pred(1)->_idx]; | |
| 411 Node_List &f_value = *blk2value[freed->_pre_order]; | |
| 412 Node_List &f_regnd = *blk2regnd[freed->_pre_order]; | |
| 413 for( uint k = 0; k < (uint)_max_reg; k++ ) { | |
| 414 value.map(k,f_value[k]); | |
| 415 regnd.map(k,f_regnd[k]); | |
| 416 } | |
| 417 } | |
| 418 // Merge all inputs together, setting to NULL any conflicts. | |
| 419 for( j = 1; j < b->num_preds(); j++ ) { | |
| 420 Block *pb = _cfg._bbs[b->pred(j)->_idx]; | |
| 421 if( pb == freed ) continue; // Did self already via freelist | |
| 422 Node_List &p_regnd = *blk2regnd[pb->_pre_order]; | |
| 423 for( uint k = 0; k < (uint)_max_reg; k++ ) { | |
| 424 if( regnd[k] != p_regnd[k] ) { // Conflict on reaching defs? | |
| 425 value.map(k,NULL); // Then no value handy | |
| 426 regnd.map(k,NULL); | |
| 427 } | |
| 428 } | |
| 429 } | |
| 430 } | |
| 431 | |
| 432 // For all Phi's | |
| 433 for( j = 1; j < phi_dex; j++ ) { | |
| 434 uint k; | |
| 435 Node *phi = b->_nodes[j]; | |
| 436 uint pidx = n2lidx(phi); | |
| 437 OptoReg::Name preg = lrgs(n2lidx(phi)).reg(); | |
| 438 | |
| 439 // Remove copies remaining on edges. Check for junk phi. | |
| 440 Node *u = NULL; | |
| 441 for( k=1; k<phi->req(); k++ ) { | |
| 442 Node *x = phi->in(k); | |
| 443 if( phi != x && u != x ) // Found a different input | |
| 444 u = u ? NodeSentinel : x; // Capture unique input, or NodeSentinel for 2nd input | |
| 445 } | |
| 446 if( u != NodeSentinel ) { // Junk Phi. Remove | |
| 447 b->_nodes.remove(j--); phi_dex--; | |
| 448 _cfg._bbs.map(phi->_idx,NULL); | |
| 449 phi->replace_by(u); | |
| 450 phi->disconnect_inputs(NULL); | |
| 451 continue; | |
| 452 } | |
| 453 // Note that if value[pidx] exists, then we merged no new values here | |
| 454 // and the phi is useless. This can happen even with the above phi | |
| 455 // removal for complex flows. I cannot keep the better known value here | |
| 456 // because locally the phi appears to define a new merged value. If I | |
| 457 // keep the better value then a copy of the phi, being unable to use the | |
| 458 // global flow analysis, can't "peek through" the phi to the original | |
| 459 // reaching value and so will act like it's defining a new value. This | |
| 460 // can lead to situations where some uses are from the old and some from | |
| 461 // the new values. Not illegal by itself but throws the over-strong | |
| 462 // assert in scheduling. | |
| 463 if( pidx ) { | |
| 464 value.map(preg,phi); | |
| 465 regnd.map(preg,phi); | |
| 466 OptoReg::Name preg_lo = OptoReg::add(preg,-1); | |
| 467 if( !is_single_register(phi->ideal_reg()) ) { | |
| 468 value.map(preg_lo,phi); | |
| 469 regnd.map(preg_lo,phi); | |
| 470 } | |
| 471 } | |
| 472 } | |
| 473 | |
| 474 // For all remaining instructions | |
| 475 for( j = phi_dex; j < b->_nodes.size(); j++ ) { | |
| 476 Node *n = b->_nodes[j]; | |
| 477 | |
| 478 if( n->outcnt() == 0 && // Dead? | |
| 479 n != C->top() && // (ignore TOP, it has no du info) | |
| 480 !n->is_Proj() ) { // fat-proj kills | |
| 481 j -= yank_if_dead(n,b,&value,®nd); | |
| 482 continue; | |
| 483 } | |
| 484 | |
| 485 // Improve reaching-def info. Occasionally post-alloc's liveness gives | |
| 486 // up (at loop backedges, because we aren't doing a full flow pass). | |
| 487 // The presence of a live use essentially asserts that the use's def is | |
| 488 // alive and well at the use (or else the allocator fubar'd). Take | |
| 489 // advantage of this info to set a reaching def for the use-reg. | |
| 490 uint k; | |
| 491 for( k = 1; k < n->req(); k++ ) { | |
| 492 Node *def = n->in(k); // n->in(k) is a USE; def is the DEF for this USE | |
| 493 guarantee(def != NULL, "no disconnected nodes at this point"); | |
| 494 uint useidx = n2lidx(def); // useidx is the live range index for this USE | |
| 495 | |
| 496 if( useidx ) { | |
| 497 OptoReg::Name ureg = lrgs(useidx).reg(); | |
| 498 if( !value[ureg] ) { | |
| 499 int idx; // Skip occasional useless copy | |
| 500 while( (idx=def->is_Copy()) != 0 && | |
| 501 def->in(idx) != NULL && // NULL should not happen | |
| 502 ureg == lrgs(n2lidx(def->in(idx))).reg() ) | |
| 503 def = def->in(idx); | |
| 504 Node *valdef = skip_copies(def); // tighten up val through non-useless copies | |
| 505 value.map(ureg,valdef); // record improved reaching-def info | |
| 506 regnd.map(ureg, def); | |
| 507 // Record other half of doubles | |
| 508 OptoReg::Name ureg_lo = OptoReg::add(ureg,-1); | |
| 509 if( !is_single_register(def->ideal_reg()) && | |
| 510 ( !RegMask::can_represent(ureg_lo) || | |
| 511 lrgs(useidx).mask().Member(ureg_lo) ) && // Nearly always adjacent | |
| 512 !value[ureg_lo] ) { | |
| 513 value.map(ureg_lo,valdef); // record improved reaching-def info | |
| 514 regnd.map(ureg_lo, def); | |
| 515 } | |
| 516 } | |
| 517 } | |
| 518 } | |
| 519 | |
| 520 const uint two_adr = n->is_Mach() ? n->as_Mach()->two_adr() : 0; | |
| 521 | |
| 522 // Remove copies along input edges | |
| 523 for( k = 1; k < n->req(); k++ ) | |
| 524 j -= elide_copy( n, k, b, value, regnd, two_adr!=k ); | |
| 525 | |
| 526 // Unallocated Nodes define no registers | |
| 527 uint lidx = n2lidx(n); | |
| 528 if( !lidx ) continue; | |
| 529 | |
| 530 // Update the register defined by this instruction | |
| 531 OptoReg::Name nreg = lrgs(lidx).reg(); | |
| 532 // Skip through all copies to the _value_ being defined. | |
| 533 // Do not change from int to pointer | |
| 534 Node *val = skip_copies(n); | |
| 535 | |
| 923 | 536 // Clear out a dead definition before starting so that the |
| 537 // elimination code doesn't have to guard against it. The | |
| 538 // definition could in fact be a kill projection with a count of | |
| 539 // 0 which is safe but since those are uninteresting for copy | |
| 540 // elimination just delete them as well. | |
| 541 if (regnd[nreg] != NULL && regnd[nreg]->outcnt() == 0) { | |
| 542 regnd.map(nreg, NULL); | |
| 543 value.map(nreg, NULL); | |
| 544 } | |
| 545 | |
| 0 | 546 uint n_ideal_reg = n->ideal_reg(); |
| 547 if( is_single_register(n_ideal_reg) ) { | |
| 548 // If Node 'n' does not change the value mapped by the register, | |
| 549 // then 'n' is a useless copy. Do not update the register->node | |
| 550 // mapping so 'n' will go dead. | |
| 551 if( value[nreg] != val ) { | |
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552 if (eliminate_copy_of_constant(val, n, b, value, regnd, nreg, OptoReg::Bad)) { |
| 923 | 553 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd); |
| 0 | 554 } else { |
| 555 // Update the mapping: record new Node defined by the register | |
| 556 regnd.map(nreg,n); | |
| 557 // Update mapping for defined *value*, which is the defined | |
| 558 // Node after skipping all copies. | |
| 559 value.map(nreg,val); | |
| 560 } | |
| 923 | 561 } else if( !may_be_copy_of_callee(n) ) { |
| 0 | 562 assert( n->is_Copy(), "" ); |
| 923 | 563 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd); |
| 0 | 564 } |
| 565 } else { | |
| 566 // If the value occupies a register pair, record same info | |
| 567 // in both registers. | |
| 568 OptoReg::Name nreg_lo = OptoReg::add(nreg,-1); | |
| 569 if( RegMask::can_represent(nreg_lo) && // Either a spill slot, or | |
| 570 !lrgs(lidx).mask().Member(nreg_lo) ) { // Nearly always adjacent | |
| 571 // Sparc occasionally has non-adjacent pairs. | |
| 572 // Find the actual other value | |
| 573 RegMask tmp = lrgs(lidx).mask(); | |
| 574 tmp.Remove(nreg); | |
| 575 nreg_lo = tmp.find_first_elem(); | |
| 576 } | |
| 577 if( value[nreg] != val || value[nreg_lo] != val ) { | |
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578 if (eliminate_copy_of_constant(val, n, b, value, regnd, nreg, nreg_lo)) { |
| 923 | 579 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd); |
| 0 | 580 } else { |
| 581 regnd.map(nreg , n ); | |
| 582 regnd.map(nreg_lo, n ); | |
| 583 value.map(nreg ,val); | |
| 584 value.map(nreg_lo,val); | |
| 585 } | |
| 923 | 586 } else if( !may_be_copy_of_callee(n) ) { |
| 0 | 587 assert( n->is_Copy(), "" ); |
| 923 | 588 j -= replace_and_yank_if_dead(n, nreg, b, value, regnd); |
| 0 | 589 } |
| 590 } | |
| 591 | |
| 592 // Fat projections kill many registers | |
| 593 if( n_ideal_reg == MachProjNode::fat_proj ) { | |
| 594 RegMask rm = n->out_RegMask(); | |
| 595 // wow, what an expensive iterator... | |
| 596 nreg = rm.find_first_elem(); | |
| 597 while( OptoReg::is_valid(nreg)) { | |
| 598 rm.Remove(nreg); | |
| 599 value.map(nreg,n); | |
| 600 regnd.map(nreg,n); | |
| 601 nreg = rm.find_first_elem(); | |
| 602 } | |
| 603 } | |
| 604 | |
| 605 } // End of for all instructions in the block | |
| 606 | |
| 607 } // End for all blocks | |
| 608 } |