Mercurial > hg > truffle
annotate src/share/vm/opto/regmask.hpp @ 1994:6cd6d394f280
7001033: assert(gch->gc_cause() == GCCause::_scavenge_alot || !gch->incremental_collection_failed())
7002546: regression on SpecJbb2005 on 7b118 comparing to 7b117 on small heaps
Summary: Relaxed assertion checking related to incremental_collection_failed flag to allow for ExplicitGCInvokesConcurrent behaviour where we do not want a failing scavenge to bail to a stop-world collection. Parameterized incremental_collection_will_fail() so we can selectively use, or not use, as appropriate, the statistical prediction at specific use sites. This essentially reverts the scavenge bail-out logic to what it was prior to some recent changes that had inadvertently started using the statistical prediction which can be noisy in the presence of bursty loads. Added some associated verbose non-product debugging messages.
Reviewed-by: johnc, tonyp
| author | ysr |
|---|---|
| date | Tue, 07 Dec 2010 21:55:53 -0800 |
| parents | f95d63e2154a |
| children | b92c45f2bc75 |
| rev | line source |
|---|---|
| 0 | 1 /* |
| 1972 | 2 * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #ifndef SHARE_VM_OPTO_REGMASK_HPP |
| 26 #define SHARE_VM_OPTO_REGMASK_HPP | |
| 27 | |
| 28 #include "code/vmreg.hpp" | |
| 29 #include "libadt/port.hpp" | |
| 30 #include "opto/optoreg.hpp" | |
| 31 #ifdef TARGET_ARCH_MODEL_x86_32 | |
| 32 # include "adfiles/adGlobals_x86_32.hpp" | |
| 33 #endif | |
| 34 #ifdef TARGET_ARCH_MODEL_x86_64 | |
| 35 # include "adfiles/adGlobals_x86_64.hpp" | |
| 36 #endif | |
| 37 #ifdef TARGET_ARCH_MODEL_sparc | |
| 38 # include "adfiles/adGlobals_sparc.hpp" | |
| 39 #endif | |
| 40 #ifdef TARGET_ARCH_MODEL_zero | |
| 41 # include "adfiles/adGlobals_zero.hpp" | |
| 42 #endif | |
| 43 | |
| 0 | 44 // Some fun naming (textual) substitutions: |
| 45 // | |
| 46 // RegMask::get_low_elem() ==> RegMask::find_first_elem() | |
| 47 // RegMask::Special ==> RegMask::Empty | |
| 48 // RegMask::_flags ==> RegMask::is_AllStack() | |
| 49 // RegMask::operator<<=() ==> RegMask::Insert() | |
| 50 // RegMask::operator>>=() ==> RegMask::Remove() | |
| 51 // RegMask::Union() ==> RegMask::OR | |
| 52 // RegMask::Inter() ==> RegMask::AND | |
| 53 // | |
| 54 // OptoRegister::RegName ==> OptoReg::Name | |
| 55 // | |
| 56 // OptoReg::stack0() ==> _last_Mach_Reg or ZERO in core version | |
| 57 // | |
| 58 // numregs in chaitin ==> proper degree in chaitin | |
| 59 | |
| 60 //-------------Non-zero bit search methods used by RegMask--------------------- | |
| 61 // Find lowest 1, or return 32 if empty | |
| 62 int find_lowest_bit( uint32 mask ); | |
| 63 // Find highest 1, or return 32 if empty | |
| 64 int find_hihghest_bit( uint32 mask ); | |
| 65 | |
| 66 //------------------------------RegMask---------------------------------------- | |
| 67 // The ADL file describes how to print the machine-specific registers, as well | |
| 68 // as any notion of register classes. We provide a register mask, which is | |
| 69 // just a collection of Register numbers. | |
| 70 | |
| 71 // The ADLC defines 2 macros, RM_SIZE and FORALL_BODY. | |
| 72 // RM_SIZE is the size of a register mask in words. | |
| 73 // FORALL_BODY replicates a BODY macro once per word in the register mask. | |
| 74 // The usage is somewhat clumsy and limited to the regmask.[h,c]pp files. | |
| 75 // However, it means the ADLC can redefine the unroll macro and all loops | |
| 76 // over register masks will be unrolled by the correct amount. | |
| 77 | |
| 78 class RegMask VALUE_OBJ_CLASS_SPEC { | |
| 79 union { | |
| 80 double _dummy_force_double_alignment[RM_SIZE>>1]; | |
| 81 // Array of Register Mask bits. This array is large enough to cover | |
| 82 // all the machine registers and all parameters that need to be passed | |
| 83 // on the stack (stack registers) up to some interesting limit. Methods | |
| 84 // that need more parameters will NOT be compiled. On Intel, the limit | |
| 85 // is something like 90+ parameters. | |
| 86 int _A[RM_SIZE]; | |
| 87 }; | |
| 88 | |
| 89 enum { | |
| 90 _WordBits = BitsPerInt, | |
| 91 _LogWordBits = LogBitsPerInt, | |
| 92 _RM_SIZE = RM_SIZE // local constant, imported, then hidden by #undef | |
| 93 }; | |
| 94 | |
| 95 public: | |
| 96 enum { CHUNK_SIZE = RM_SIZE*_WordBits }; | |
| 97 | |
| 98 // SlotsPerLong is 2, since slots are 32 bits and longs are 64 bits. | |
| 99 // Also, consider the maximum alignment size for a normally allocated | |
| 100 // value. Since we allocate register pairs but not register quads (at | |
| 101 // present), this alignment is SlotsPerLong (== 2). A normally | |
| 102 // aligned allocated register is either a single register, or a pair | |
| 103 // of adjacent registers, the lower-numbered being even. | |
| 104 // See also is_aligned_Pairs() below, and the padding added before | |
| 105 // Matcher::_new_SP to keep allocated pairs aligned properly. | |
| 106 // If we ever go to quad-word allocations, SlotsPerQuad will become | |
| 107 // the controlling alignment constraint. Note that this alignment | |
| 108 // requirement is internal to the allocator, and independent of any | |
| 109 // particular platform. | |
| 110 enum { SlotsPerLong = 2 }; | |
| 111 | |
| 112 // A constructor only used by the ADLC output. All mask fields are filled | |
| 113 // in directly. Calls to this look something like RM(1,2,3,4); | |
| 114 RegMask( | |
| 115 # define BODY(I) int a##I, | |
| 116 FORALL_BODY | |
| 117 # undef BODY | |
| 118 int dummy = 0 ) { | |
| 119 # define BODY(I) _A[I] = a##I; | |
| 120 FORALL_BODY | |
| 121 # undef BODY | |
| 122 } | |
| 123 | |
| 124 // Handy copying constructor | |
| 125 RegMask( RegMask *rm ) { | |
| 126 # define BODY(I) _A[I] = rm->_A[I]; | |
| 127 FORALL_BODY | |
| 128 # undef BODY | |
| 129 } | |
| 130 | |
| 131 // Construct an empty mask | |
| 132 RegMask( ) { Clear(); } | |
| 133 | |
| 134 // Construct a mask with a single bit | |
| 135 RegMask( OptoReg::Name reg ) { Clear(); Insert(reg); } | |
| 136 | |
| 137 // Check for register being in mask | |
| 138 int Member( OptoReg::Name reg ) const { | |
| 139 assert( reg < CHUNK_SIZE, "" ); | |
| 140 return _A[reg>>_LogWordBits] & (1<<(reg&(_WordBits-1))); | |
| 141 } | |
| 142 | |
| 143 // The last bit in the register mask indicates that the mask should repeat | |
| 144 // indefinitely with ONE bits. Returns TRUE if mask is infinite or | |
| 145 // unbounded in size. Returns FALSE if mask is finite size. | |
| 146 int is_AllStack() const { return _A[RM_SIZE-1] >> (_WordBits-1); } | |
| 147 | |
| 148 // Work around an -xO3 optimization problme in WS6U1. The old way: | |
| 149 // void set_AllStack() { _A[RM_SIZE-1] |= (1<<(_WordBits-1)); } | |
| 150 // will cause _A[RM_SIZE-1] to be clobbered, not updated when set_AllStack() | |
| 151 // follows an Insert() loop, like the one found in init_spill_mask(). Using | |
| 152 // Insert() instead works because the index into _A in computed instead of | |
| 153 // constant. See bug 4665841. | |
| 154 void set_AllStack() { Insert(OptoReg::Name(CHUNK_SIZE-1)); } | |
| 155 | |
| 156 // Test for being a not-empty mask. | |
| 157 int is_NotEmpty( ) const { | |
| 158 int tmp = 0; | |
| 159 # define BODY(I) tmp |= _A[I]; | |
| 160 FORALL_BODY | |
| 161 # undef BODY | |
| 162 return tmp; | |
| 163 } | |
| 164 | |
| 165 // Find lowest-numbered register from mask, or BAD if mask is empty. | |
| 166 OptoReg::Name find_first_elem() const { | |
| 167 int base, bits; | |
| 168 # define BODY(I) if( (bits = _A[I]) != 0 ) base = I<<_LogWordBits; else | |
| 169 FORALL_BODY | |
| 170 # undef BODY | |
| 171 { base = OptoReg::Bad; bits = 1<<0; } | |
| 172 return OptoReg::Name(base + find_lowest_bit(bits)); | |
| 173 } | |
| 174 // Get highest-numbered register from mask, or BAD if mask is empty. | |
| 175 OptoReg::Name find_last_elem() const { | |
| 176 int base, bits; | |
| 177 # define BODY(I) if( (bits = _A[RM_SIZE-1-I]) != 0 ) base = (RM_SIZE-1-I)<<_LogWordBits; else | |
| 178 FORALL_BODY | |
| 179 # undef BODY | |
| 180 { base = OptoReg::Bad; bits = 1<<0; } | |
| 181 return OptoReg::Name(base + find_hihghest_bit(bits)); | |
| 182 } | |
| 183 | |
| 184 // Find the lowest-numbered register pair in the mask. Return the | |
| 185 // HIGHEST register number in the pair, or BAD if no pairs. | |
| 186 // Assert that the mask contains only bit pairs. | |
| 187 OptoReg::Name find_first_pair() const; | |
| 188 | |
| 189 // Clear out partial bits; leave only aligned adjacent bit pairs. | |
| 190 void ClearToPairs(); | |
| 191 // Smear out partial bits; leave only aligned adjacent bit pairs. | |
| 192 void SmearToPairs(); | |
| 193 // Verify that the mask contains only aligned adjacent bit pairs | |
| 194 void VerifyPairs() const { assert( is_aligned_Pairs(), "mask is not aligned, adjacent pairs" ); } | |
| 195 // Test that the mask contains only aligned adjacent bit pairs | |
| 196 bool is_aligned_Pairs() const; | |
| 197 | |
| 198 // mask is a pair of misaligned registers | |
| 199 bool is_misaligned_Pair() const { return Size()==2 && !is_aligned_Pairs();} | |
| 200 // Test for single register | |
| 201 int is_bound1() const; | |
| 202 // Test for a single adjacent pair | |
| 203 int is_bound2() const; | |
| 204 | |
| 205 // Fast overlap test. Non-zero if any registers in common. | |
| 206 int overlap( const RegMask &rm ) const { | |
| 207 return | |
| 208 # define BODY(I) (_A[I] & rm._A[I]) | | |
| 209 FORALL_BODY | |
| 210 # undef BODY | |
| 211 0 ; | |
| 212 } | |
| 213 | |
| 214 // Special test for register pressure based splitting | |
| 215 // UP means register only, Register plus stack, or stack only is DOWN | |
| 216 bool is_UP() const; | |
| 217 | |
| 218 // Clear a register mask | |
| 219 void Clear( ) { | |
| 220 # define BODY(I) _A[I] = 0; | |
| 221 FORALL_BODY | |
| 222 # undef BODY | |
| 223 } | |
| 224 | |
| 225 // Fill a register mask with 1's | |
| 226 void Set_All( ) { | |
| 227 # define BODY(I) _A[I] = -1; | |
| 228 FORALL_BODY | |
| 229 # undef BODY | |
| 230 } | |
| 231 | |
| 232 // Insert register into mask | |
| 233 void Insert( OptoReg::Name reg ) { | |
| 234 assert( reg < CHUNK_SIZE, "" ); | |
| 235 _A[reg>>_LogWordBits] |= (1<<(reg&(_WordBits-1))); | |
| 236 } | |
| 237 | |
| 238 // Remove register from mask | |
| 239 void Remove( OptoReg::Name reg ) { | |
| 240 assert( reg < CHUNK_SIZE, "" ); | |
| 241 _A[reg>>_LogWordBits] &= ~(1<<(reg&(_WordBits-1))); | |
| 242 } | |
| 243 | |
| 244 // OR 'rm' into 'this' | |
| 245 void OR( const RegMask &rm ) { | |
| 246 # define BODY(I) this->_A[I] |= rm._A[I]; | |
| 247 FORALL_BODY | |
| 248 # undef BODY | |
| 249 } | |
| 250 | |
| 251 // AND 'rm' into 'this' | |
| 252 void AND( const RegMask &rm ) { | |
| 253 # define BODY(I) this->_A[I] &= rm._A[I]; | |
| 254 FORALL_BODY | |
| 255 # undef BODY | |
| 256 } | |
| 257 | |
| 258 // Subtract 'rm' from 'this' | |
| 259 void SUBTRACT( const RegMask &rm ) { | |
| 260 # define BODY(I) _A[I] &= ~rm._A[I]; | |
| 261 FORALL_BODY | |
| 262 # undef BODY | |
| 263 } | |
| 264 | |
| 265 // Compute size of register mask: number of bits | |
| 266 uint Size() const; | |
| 267 | |
| 268 #ifndef PRODUCT | |
| 269 void print() const { dump(); } | |
| 270 void dump() const; // Print a mask | |
| 271 #endif | |
| 272 | |
| 273 static const RegMask Empty; // Common empty mask | |
| 274 | |
| 275 static bool can_represent(OptoReg::Name reg) { | |
| 276 // NOTE: -1 in computation reflects the usage of the last | |
| 277 // bit of the regmask as an infinite stack flag. | |
| 278 return (int)reg < (int)(CHUNK_SIZE-1); | |
| 279 } | |
| 280 }; | |
| 281 | |
| 282 // Do not use this constant directly in client code! | |
| 283 #undef RM_SIZE | |
| 1972 | 284 |
| 285 #endif // SHARE_VM_OPTO_REGMASK_HPP |