truffle: src/cpu/x86/vm/relocInfo

annotate src/cpu/x86/vm/relocInfo_x86.cpp @ 15388:769fc3629f59

Add phase FlowSensitiveReductionPhase. It is possible to remove GuardingPiNodes, CheckCastNodes, and FixedGuards during HighTier under certain conditions (control-flow sensitive conditions). The phase added in this commit (FlowSensitiveReductionPhase) does that, and in addition replaces usages with "downcasting" PiNodes when possible thus resulting in more precise object stamps (e.g., non-null). Finally, usages of floating, side-effects free, expressions are also simplified (as per control-flow sensitive conditions). The newly added phase runs only during HighTier and can be deactivated using Graal option FlowSensitiveReduction (it is active by default).

author	Miguel Garcia <miguel.m.garcia@oracle.com>
date	Fri, 25 Apr 2014 16:50:52 +0200
parents	1302b727b5cd
children	be896a1983c0

rev	line source
0 a61af66fc99e Initial load duke parents: diff changeset	1 /*
12056 740e263c80c6 8003424: Enable Class Data Sharing for CompressedOops hseigel parents: 11041 diff changeset	2 * Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved.
0 a61af66fc99e Initial load duke parents: diff changeset	3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
a61af66fc99e Initial load duke parents: diff changeset	4 *
a61af66fc99e Initial load duke parents: diff changeset	5 * This code is free software; you can redistribute it and/or modify it
a61af66fc99e Initial load duke parents: diff changeset	6 * under the terms of the GNU General Public License version 2 only, as
a61af66fc99e Initial load duke parents: diff changeset	7 * published by the Free Software Foundation.
a61af66fc99e Initial load duke parents: diff changeset	8 *
a61af66fc99e Initial load duke parents: diff changeset	9 * This code is distributed in the hope that it will be useful, but WITHOUT
a61af66fc99e Initial load duke parents: diff changeset	10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
a61af66fc99e Initial load duke parents: diff changeset	11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
a61af66fc99e Initial load duke parents: diff changeset	12 * version 2 for more details (a copy is included in the LICENSE file that
a61af66fc99e Initial load duke parents: diff changeset	13 * accompanied this code).
a61af66fc99e Initial load duke parents: diff changeset	14 *
a61af66fc99e Initial load duke parents: diff changeset	15 * You should have received a copy of the GNU General Public License version
a61af66fc99e Initial load duke parents: diff changeset	16 * 2 along with this work; if not, write to the Free Software Foundation,
a61af66fc99e Initial load duke parents: diff changeset	17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
a61af66fc99e Initial load duke parents: diff changeset	18 *
1552 c18cbe5936b8 6941466: Oracle rebranding changes for Hotspot repositories trims parents: 304 diff changeset	19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
c18cbe5936b8 6941466: Oracle rebranding changes for Hotspot repositories trims parents: 304 diff changeset	20 * or visit www.oracle.com if you need additional information or have any
c18cbe5936b8 6941466: Oracle rebranding changes for Hotspot repositories trims parents: 304 diff changeset	21 * questions.
0 a61af66fc99e Initial load duke parents: diff changeset	22 *
a61af66fc99e Initial load duke parents: diff changeset	23 */
a61af66fc99e Initial load duke parents: diff changeset	24
1972 f95d63e2154a 6989984: Use standard include model for Hospot stefank parents: 1552 diff changeset	25 #include "precompiled.hpp"
7199 cd3d6a6b95d9 8003240: x86: move MacroAssembler into separate file twisti parents: 6725 diff changeset	26 #include "asm/macroAssembler.hpp"
1972 f95d63e2154a 6989984: Use standard include model for Hospot stefank parents: 1552 diff changeset	27 #include "code/relocInfo.hpp"
f95d63e2154a 6989984: Use standard include model for Hospot stefank parents: 1552 diff changeset	28 #include "nativeInst_x86.hpp"
f95d63e2154a 6989984: Use standard include model for Hospot stefank parents: 1552 diff changeset	29 #include "oops/oop.inline.hpp"
f95d63e2154a 6989984: Use standard include model for Hospot stefank parents: 1552 diff changeset	30 #include "runtime/safepoint.hpp"
0 a61af66fc99e Initial load duke parents: diff changeset	31
a61af66fc99e Initial load duke parents: diff changeset	32
2375 d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	33 void Relocation::pd_set_data_value(address x, intptr_t o, bool verify_only) {
0 a61af66fc99e Initial load duke parents: diff changeset	34 #ifdef AMD64
a61af66fc99e Initial load duke parents: diff changeset	35 x += o;
a61af66fc99e Initial load duke parents: diff changeset	36 typedef Assembler::WhichOperand WhichOperand;
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	37 WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm, call32, narrow oop
0 a61af66fc99e Initial load duke parents: diff changeset	38 assert(which == Assembler::disp32_operand \|\|
164 c436414a719e 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions kvn parents: 0 diff changeset	39 which == Assembler::narrow_oop_operand \|\|
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	40 which == Assembler::imm_operand, "format unpacks ok");
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	41 if (which == Assembler::imm_operand) {
2375 d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	42 if (verify_only) {
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	43 assert(*pd_address_in_code() == x, "instructions must match");
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	44 } else {
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	45 *pd_address_in_code() = x;
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	46 }
164 c436414a719e 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions kvn parents: 0 diff changeset	47 } else if (which == Assembler::narrow_oop_operand) {
c436414a719e 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions kvn parents: 0 diff changeset	48 address disp = Assembler::locate_operand(addr(), which);
6725 da91efe96a93 6964458: Reimplement class meta-data storage to use native memory coleenp parents: 2404 diff changeset	49 // both compressed oops and compressed classes look the same
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory coleenp parents: 2404 diff changeset	50 if (Universe::heap()->is_in_reserved((oop)x)) {
2375 d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	51 if (verify_only) {
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	52 assert((uint32_t) disp == oopDesc::encode_heap_oop((oop)x), "instructions must match");
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	53 } else {
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	54 (int32_t) disp = oopDesc::encode_heap_oop((oop)x);
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	55 }
0 a61af66fc99e Initial load duke parents: diff changeset	56 } else {
6725 da91efe96a93 6964458: Reimplement class meta-data storage to use native memory coleenp parents: 2404 diff changeset	57 if (verify_only) {
12056 740e263c80c6 8003424: Enable Class Data Sharing for CompressedOops hseigel parents: 11041 diff changeset	58 assert((uint32_t) disp == Klass::encode_klass((Klass*)x), "instructions must match");
6725 da91efe96a93 6964458: Reimplement class meta-data storage to use native memory coleenp parents: 2404 diff changeset	59 } else {
12056 740e263c80c6 8003424: Enable Class Data Sharing for CompressedOops hseigel parents: 11041 diff changeset	60 (int32_t) disp = Klass::encode_klass((Klass*)x);
6725 da91efe96a93 6964458: Reimplement class meta-data storage to use native memory coleenp parents: 2404 diff changeset	61 }
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory coleenp parents: 2404 diff changeset	62 }
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory coleenp parents: 2404 diff changeset	63 } else {
0 a61af66fc99e Initial load duke parents: diff changeset	64 // Note: Use runtime_call_type relocations for call32_operand.
a61af66fc99e Initial load duke parents: diff changeset	65 address ip = addr();
a61af66fc99e Initial load duke parents: diff changeset	66 address disp = Assembler::locate_operand(ip, which);
a61af66fc99e Initial load duke parents: diff changeset	67 address next_ip = Assembler::locate_next_instruction(ip);
2375 d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	68 if (verify_only) {
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	69 assert((int32_t) disp == (x - next_ip), "instructions must match");
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	70 } else {
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	71 (int32_t) disp = x - next_ip;
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	72 }
0 a61af66fc99e Initial load duke parents: diff changeset	73 }
a61af66fc99e Initial load duke parents: diff changeset	74 #else
2375 d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	75 if (verify_only) {
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	76 assert(*pd_address_in_code() == (x + o), "instructions must match");
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	77 } else {
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	78 *pd_address_in_code() = x + o;
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	79 }
0 a61af66fc99e Initial load duke parents: diff changeset	80 #endif // AMD64
a61af66fc99e Initial load duke parents: diff changeset	81 }
a61af66fc99e Initial load duke parents: diff changeset	82
a61af66fc99e Initial load duke parents: diff changeset	83
a61af66fc99e Initial load duke parents: diff changeset	84 address Relocation::pd_call_destination(address orig_addr) {
a61af66fc99e Initial load duke parents: diff changeset	85 intptr_t adj = 0;
a61af66fc99e Initial load duke parents: diff changeset	86 if (orig_addr != NULL) {
a61af66fc99e Initial load duke parents: diff changeset	87 // We just moved this call instruction from orig_addr to addr().
a61af66fc99e Initial load duke parents: diff changeset	88 // This means its target will appear to have grown by addr() - orig_addr.
a61af66fc99e Initial load duke parents: diff changeset	89 adj = -( addr() - orig_addr );
a61af66fc99e Initial load duke parents: diff changeset	90 }
a61af66fc99e Initial load duke parents: diff changeset	91 NativeInstruction* ni = nativeInstruction_at(addr());
a61af66fc99e Initial load duke parents: diff changeset	92 if (ni->is_call()) {
a61af66fc99e Initial load duke parents: diff changeset	93 return nativeCall_at(addr())->destination() + adj;
a61af66fc99e Initial load duke parents: diff changeset	94 } else if (ni->is_jump()) {
a61af66fc99e Initial load duke parents: diff changeset	95 return nativeJump_at(addr())->jump_destination() + adj;
a61af66fc99e Initial load duke parents: diff changeset	96 } else if (ni->is_cond_jump()) {
a61af66fc99e Initial load duke parents: diff changeset	97 return nativeGeneralJump_at(addr())->jump_destination() + adj;
a61af66fc99e Initial load duke parents: diff changeset	98 } else if (ni->is_mov_literal64()) {
a61af66fc99e Initial load duke parents: diff changeset	99 return (address) ((NativeMovConstReg*)ni)->data();
a61af66fc99e Initial load duke parents: diff changeset	100 } else {
a61af66fc99e Initial load duke parents: diff changeset	101 ShouldNotReachHere();
a61af66fc99e Initial load duke parents: diff changeset	102 return NULL;
a61af66fc99e Initial load duke parents: diff changeset	103 }
a61af66fc99e Initial load duke parents: diff changeset	104 }
a61af66fc99e Initial load duke parents: diff changeset	105
a61af66fc99e Initial load duke parents: diff changeset	106
a61af66fc99e Initial load duke parents: diff changeset	107 void Relocation::pd_set_call_destination(address x) {
a61af66fc99e Initial load duke parents: diff changeset	108 NativeInstruction* ni = nativeInstruction_at(addr());
a61af66fc99e Initial load duke parents: diff changeset	109 if (ni->is_call()) {
a61af66fc99e Initial load duke parents: diff changeset	110 nativeCall_at(addr())->set_destination(x);
a61af66fc99e Initial load duke parents: diff changeset	111 } else if (ni->is_jump()) {
a61af66fc99e Initial load duke parents: diff changeset	112 NativeJump* nj = nativeJump_at(addr());
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	113
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	114 // Unresolved jumps are recognized by a destination of -1
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	115 // However 64bit can't actually produce such an address
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	116 // and encodes a jump to self but jump_destination will
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	117 // return a -1 as the signal. We must not relocate this
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	118 // jmp or the ic code will not see it as unresolved.
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	119
0 a61af66fc99e Initial load duke parents: diff changeset	120 if (nj->jump_destination() == (address) -1) {
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	121 x = addr(); // jump to self
0 a61af66fc99e Initial load duke parents: diff changeset	122 }
a61af66fc99e Initial load duke parents: diff changeset	123 nj->set_jump_destination(x);
a61af66fc99e Initial load duke parents: diff changeset	124 } else if (ni->is_cond_jump()) {
a61af66fc99e Initial load duke parents: diff changeset	125 // %%%% kludge this, for now, until we get a jump_destination method
a61af66fc99e Initial load duke parents: diff changeset	126 address old_dest = nativeGeneralJump_at(addr())->jump_destination();
a61af66fc99e Initial load duke parents: diff changeset	127 address disp = Assembler::locate_operand(addr(), Assembler::call32_operand);
a61af66fc99e Initial load duke parents: diff changeset	128 (jint)disp += (x - old_dest);
a61af66fc99e Initial load duke parents: diff changeset	129 } else if (ni->is_mov_literal64()) {
a61af66fc99e Initial load duke parents: diff changeset	130 ((NativeMovConstReg*)ni)->set_data((intptr_t)x);
a61af66fc99e Initial load duke parents: diff changeset	131 } else {
a61af66fc99e Initial load duke parents: diff changeset	132 ShouldNotReachHere();
a61af66fc99e Initial load duke parents: diff changeset	133 }
a61af66fc99e Initial load duke parents: diff changeset	134 }
a61af66fc99e Initial load duke parents: diff changeset	135
a61af66fc99e Initial load duke parents: diff changeset	136
a61af66fc99e Initial load duke parents: diff changeset	137 address* Relocation::pd_address_in_code() {
a61af66fc99e Initial load duke parents: diff changeset	138 // All embedded Intel addresses are stored in 32-bit words.
a61af66fc99e Initial load duke parents: diff changeset	139 // Since the addr points at the start of the instruction,
a61af66fc99e Initial load duke parents: diff changeset	140 // we must parse the instruction a bit to find the embedded word.
a61af66fc99e Initial load duke parents: diff changeset	141 assert(is_data(), "must be a DataRelocation");
a61af66fc99e Initial load duke parents: diff changeset	142 typedef Assembler::WhichOperand WhichOperand;
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	143 WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm/imm32
0 a61af66fc99e Initial load duke parents: diff changeset	144 #ifdef AMD64
a61af66fc99e Initial load duke parents: diff changeset	145 assert(which == Assembler::disp32_operand \|\|
a61af66fc99e Initial load duke parents: diff changeset	146 which == Assembler::call32_operand \|\|
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	147 which == Assembler::imm_operand, "format unpacks ok");
8781 589aa23334ea 8009584: [parfait] Null pointer deference in hotspot/src/cpu/x86/vm/relocInfo_x86.cpp morris parents: 7199 diff changeset	148 // The "address" in the code is a displacement can't return it as
589aa23334ea 8009584: [parfait] Null pointer deference in hotspot/src/cpu/x86/vm/relocInfo_x86.cpp morris parents: 7199 diff changeset	149 // and address* since it is really a jint*
589aa23334ea 8009584: [parfait] Null pointer deference in hotspot/src/cpu/x86/vm/relocInfo_x86.cpp morris parents: 7199 diff changeset	150 guarantee(which == Assembler::imm_operand, "must be immediate operand");
0 a61af66fc99e Initial load duke parents: diff changeset	151 #else
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	152 assert(which == Assembler::disp32_operand \|\| which == Assembler::imm_operand, "format unpacks ok");
0 a61af66fc99e Initial load duke parents: diff changeset	153 #endif // AMD64
a61af66fc99e Initial load duke parents: diff changeset	154 return (address*) Assembler::locate_operand(addr(), which);
a61af66fc99e Initial load duke parents: diff changeset	155 }
a61af66fc99e Initial load duke parents: diff changeset	156
a61af66fc99e Initial load duke parents: diff changeset	157
a61af66fc99e Initial load duke parents: diff changeset	158 address Relocation::pd_get_address_from_code() {
a61af66fc99e Initial load duke parents: diff changeset	159 #ifdef AMD64
a61af66fc99e Initial load duke parents: diff changeset	160 // All embedded Intel addresses are stored in 32-bit words.
a61af66fc99e Initial load duke parents: diff changeset	161 // Since the addr points at the start of the instruction,
a61af66fc99e Initial load duke parents: diff changeset	162 // we must parse the instruction a bit to find the embedded word.
a61af66fc99e Initial load duke parents: diff changeset	163 assert(is_data(), "must be a DataRelocation");
a61af66fc99e Initial load duke parents: diff changeset	164 typedef Assembler::WhichOperand WhichOperand;
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	165 WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm/imm32
0 a61af66fc99e Initial load duke parents: diff changeset	166 assert(which == Assembler::disp32_operand \|\|
a61af66fc99e Initial load duke parents: diff changeset	167 which == Assembler::call32_operand \|\|
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	168 which == Assembler::imm_operand, "format unpacks ok");
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	169 if (which != Assembler::imm_operand) {
0 a61af66fc99e Initial load duke parents: diff changeset	170 address ip = addr();
a61af66fc99e Initial load duke parents: diff changeset	171 address disp = Assembler::locate_operand(ip, which);
a61af66fc99e Initial load duke parents: diff changeset	172 address next_ip = Assembler::locate_next_instruction(ip);
a61af66fc99e Initial load duke parents: diff changeset	173 address a = next_ip + (int32_t) disp;
a61af66fc99e Initial load duke parents: diff changeset	174 return a;
a61af66fc99e Initial load duke parents: diff changeset	175 }
a61af66fc99e Initial load duke parents: diff changeset	176 #endif // AMD64
a61af66fc99e Initial load duke parents: diff changeset	177 return *pd_address_in_code();
a61af66fc99e Initial load duke parents: diff changeset	178 }
a61af66fc99e Initial load duke parents: diff changeset	179
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	180 void poll_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) {
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	181 #ifdef _LP64
13553 d49f00604347 removed poll_Relocation::pollingForm type and associated data field and rely solely on format field of safepoint relocation entries when deciding whether or not to relocate the operand of a safepoint poll instruction Doug Simon <doug.simon@oracle.com> parents: 13515 diff changeset	182 typedef Assembler::WhichOperand WhichOperand;
d49f00604347 removed poll_Relocation::pollingForm type and associated data field and rely solely on format field of safepoint relocation entries when deciding whether or not to relocate the operand of a safepoint poll instruction Doug Simon <doug.simon@oracle.com> parents: 13515 diff changeset	183 WhichOperand which = (WhichOperand) format();
13573 1302b727b5cd added assertion for correct format argument in a safepoint poll reloc info Doug Simon <doug.simon@oracle.com> parents: 13553 diff changeset	184 #ifndef GRAAL
1302b727b5cd added assertion for correct format argument in a safepoint poll reloc info Doug Simon <doug.simon@oracle.com> parents: 13553 diff changeset	185 assert((which == Assembler::disp32_operand) == !Assembler::is_polling_page_far(), "format not set correctly");
1302b727b5cd added assertion for correct format argument in a safepoint poll reloc info Doug Simon <doug.simon@oracle.com> parents: 13553 diff changeset	186 #endif
13553 d49f00604347 removed poll_Relocation::pollingForm type and associated data field and rely solely on format field of safepoint relocation entries when deciding whether or not to relocate the operand of a safepoint poll instruction Doug Simon <doug.simon@oracle.com> parents: 13515 diff changeset	187 if (which == Assembler::disp32_operand) {
2404 b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	188 address orig_addr = old_addr_for(addr(), src, dest);
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	189 NativeInstruction* oni = nativeInstruction_at(orig_addr);
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	190 int32_t* orig_disp = (int32_t*) Assembler::locate_operand(orig_addr, which);
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	191 // This poll_addr is incorrect by the size of the instruction it is irrelevant
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	192 intptr_t poll_addr = (intptr_t)oni + *orig_disp;
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	193 NativeInstruction* ni = nativeInstruction_at(addr());
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	194 intptr_t new_disp = poll_addr - (intptr_t) ni;
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	195
2404 b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	196 int32_t* disp = (int32_t*) Assembler::locate_operand(addr(), which);
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	197 * disp = (int32_t)new_disp;
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	198 }
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	199 #endif // _LP64
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	200 }
6725 da91efe96a93 6964458: Reimplement class meta-data storage to use native memory coleenp parents: 2404 diff changeset	201
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory coleenp parents: 2404 diff changeset	202 void metadata_Relocation::pd_fix_value(address x) {
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory coleenp parents: 2404 diff changeset	203 }

Mercurial > hg > truffle

annotate src/cpu/x86/vm/relocInfo_x86.cpp @ 15388:769fc3629f59