truffle: src/cpu/x86/vm/relocInfo

annotate src/cpu/x86/vm/relocInfo_x86.cpp @ 3096:8073f5ad1d87

IdealGraphVisualizer: Rename predecessors to "Nodes Above" and successors to "Nodes Below" and actions "Expand Predecessors" and "Expand Successors" to "Expand Above" and "Expand Below" to avoid ambiguity with the Graal concept of successors and predecessors

author	Peter Hofer <peter.hofer@jku.at>
date	Wed, 29 Jun 2011 18:27:14 +0200
parents	b40d4fa697bf
children	da91efe96a93

rev	line source
0 a61af66fc99e Initial load duke parents: diff changeset	1 /*
2404 b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	2 * Copyright (c) 1998, 2011, Oracle and/or its affiliates. All rights reserved.
0 a61af66fc99e Initial load duke parents: diff changeset	3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
a61af66fc99e Initial load duke parents: diff changeset	4 *
a61af66fc99e Initial load duke parents: diff changeset	5 * This code is free software; you can redistribute it and/or modify it
a61af66fc99e Initial load duke parents: diff changeset	6 * under the terms of the GNU General Public License version 2 only, as
a61af66fc99e Initial load duke parents: diff changeset	7 * published by the Free Software Foundation.
a61af66fc99e Initial load duke parents: diff changeset	8 *
a61af66fc99e Initial load duke parents: diff changeset	9 * This code is distributed in the hope that it will be useful, but WITHOUT
a61af66fc99e Initial load duke parents: diff changeset	10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
a61af66fc99e Initial load duke parents: diff changeset	11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
a61af66fc99e Initial load duke parents: diff changeset	12 * version 2 for more details (a copy is included in the LICENSE file that
a61af66fc99e Initial load duke parents: diff changeset	13 * accompanied this code).
a61af66fc99e Initial load duke parents: diff changeset	14 *
a61af66fc99e Initial load duke parents: diff changeset	15 * You should have received a copy of the GNU General Public License version
a61af66fc99e Initial load duke parents: diff changeset	16 * 2 along with this work; if not, write to the Free Software Foundation,
a61af66fc99e Initial load duke parents: diff changeset	17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
a61af66fc99e Initial load duke parents: diff changeset	18 *
1552 c18cbe5936b8 6941466: Oracle rebranding changes for Hotspot repositories trims parents: 304 diff changeset	19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
c18cbe5936b8 6941466: Oracle rebranding changes for Hotspot repositories trims parents: 304 diff changeset	20 * or visit www.oracle.com if you need additional information or have any
c18cbe5936b8 6941466: Oracle rebranding changes for Hotspot repositories trims parents: 304 diff changeset	21 * questions.
0 a61af66fc99e Initial load duke parents: diff changeset	22 *
a61af66fc99e Initial load duke parents: diff changeset	23 */
a61af66fc99e Initial load duke parents: diff changeset	24
1972 f95d63e2154a 6989984: Use standard include model for Hospot stefank parents: 1552 diff changeset	25 #include "precompiled.hpp"
f95d63e2154a 6989984: Use standard include model for Hospot stefank parents: 1552 diff changeset	26 #include "asm/assembler.inline.hpp"
f95d63e2154a 6989984: Use standard include model for Hospot stefank parents: 1552 diff changeset	27 #include "assembler_x86.inline.hpp"
f95d63e2154a 6989984: Use standard include model for Hospot stefank parents: 1552 diff changeset	28 #include "code/relocInfo.hpp"
f95d63e2154a 6989984: Use standard include model for Hospot stefank parents: 1552 diff changeset	29 #include "nativeInst_x86.hpp"
f95d63e2154a 6989984: Use standard include model for Hospot stefank parents: 1552 diff changeset	30 #include "oops/oop.inline.hpp"
f95d63e2154a 6989984: Use standard include model for Hospot stefank parents: 1552 diff changeset	31 #include "runtime/safepoint.hpp"
0 a61af66fc99e Initial load duke parents: diff changeset	32
a61af66fc99e Initial load duke parents: diff changeset	33
2375 d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	34 void Relocation::pd_set_data_value(address x, intptr_t o, bool verify_only) {
0 a61af66fc99e Initial load duke parents: diff changeset	35 #ifdef AMD64
a61af66fc99e Initial load duke parents: diff changeset	36 x += o;
a61af66fc99e Initial load duke parents: diff changeset	37 typedef Assembler::WhichOperand WhichOperand;
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	38 WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm, call32, narrow oop
0 a61af66fc99e Initial load duke parents: diff changeset	39 assert(which == Assembler::disp32_operand \|\|
164 c436414a719e 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions kvn parents: 0 diff changeset	40 which == Assembler::narrow_oop_operand \|\|
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	41 which == Assembler::imm_operand, "format unpacks ok");
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	42 if (which == Assembler::imm_operand) {
2375 d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	43 if (verify_only) {
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	44 assert(*pd_address_in_code() == x, "instructions must match");
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	45 } else {
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	46 *pd_address_in_code() = x;
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	47 }
164 c436414a719e 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions kvn parents: 0 diff changeset	48 } else if (which == Assembler::narrow_oop_operand) {
c436414a719e 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions kvn parents: 0 diff changeset	49 address disp = Assembler::locate_operand(addr(), which);
2375 d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	50 if (verify_only) {
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	51 assert((uint32_t) disp == oopDesc::encode_heap_oop((oop)x), "instructions must match");
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	52 } else {
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	53 (int32_t) disp = oopDesc::encode_heap_oop((oop)x);
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	54 }
0 a61af66fc99e Initial load duke parents: diff changeset	55 } else {
a61af66fc99e Initial load duke parents: diff changeset	56 // Note: Use runtime_call_type relocations for call32_operand.
a61af66fc99e Initial load duke parents: diff changeset	57 address ip = addr();
a61af66fc99e Initial load duke parents: diff changeset	58 address disp = Assembler::locate_operand(ip, which);
a61af66fc99e Initial load duke parents: diff changeset	59 address next_ip = Assembler::locate_next_instruction(ip);
2375 d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	60 if (verify_only) {
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	61 assert((int32_t) disp == (x - next_ip), "instructions must match");
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	62 } else {
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	63 (int32_t) disp = x - next_ip;
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	64 }
0 a61af66fc99e Initial load duke parents: diff changeset	65 }
a61af66fc99e Initial load duke parents: diff changeset	66 #else
2375 d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	67 if (verify_only) {
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	68 assert(*pd_address_in_code() == (x + o), "instructions must match");
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	69 } else {
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	70 *pd_address_in_code() = x + o;
d673ef06fe96 7028374: race in fix_oop_relocations for scavengeable nmethods never parents: 1972 diff changeset	71 }
0 a61af66fc99e Initial load duke parents: diff changeset	72 #endif // AMD64
a61af66fc99e Initial load duke parents: diff changeset	73 }
a61af66fc99e Initial load duke parents: diff changeset	74
a61af66fc99e Initial load duke parents: diff changeset	75
a61af66fc99e Initial load duke parents: diff changeset	76 address Relocation::pd_call_destination(address orig_addr) {
a61af66fc99e Initial load duke parents: diff changeset	77 intptr_t adj = 0;
a61af66fc99e Initial load duke parents: diff changeset	78 if (orig_addr != NULL) {
a61af66fc99e Initial load duke parents: diff changeset	79 // We just moved this call instruction from orig_addr to addr().
a61af66fc99e Initial load duke parents: diff changeset	80 // This means its target will appear to have grown by addr() - orig_addr.
a61af66fc99e Initial load duke parents: diff changeset	81 adj = -( addr() - orig_addr );
a61af66fc99e Initial load duke parents: diff changeset	82 }
a61af66fc99e Initial load duke parents: diff changeset	83 NativeInstruction* ni = nativeInstruction_at(addr());
a61af66fc99e Initial load duke parents: diff changeset	84 if (ni->is_call()) {
a61af66fc99e Initial load duke parents: diff changeset	85 return nativeCall_at(addr())->destination() + adj;
a61af66fc99e Initial load duke parents: diff changeset	86 } else if (ni->is_jump()) {
a61af66fc99e Initial load duke parents: diff changeset	87 return nativeJump_at(addr())->jump_destination() + adj;
a61af66fc99e Initial load duke parents: diff changeset	88 } else if (ni->is_cond_jump()) {
a61af66fc99e Initial load duke parents: diff changeset	89 return nativeGeneralJump_at(addr())->jump_destination() + adj;
a61af66fc99e Initial load duke parents: diff changeset	90 } else if (ni->is_mov_literal64()) {
a61af66fc99e Initial load duke parents: diff changeset	91 return (address) ((NativeMovConstReg*)ni)->data();
a61af66fc99e Initial load duke parents: diff changeset	92 } else {
a61af66fc99e Initial load duke parents: diff changeset	93 ShouldNotReachHere();
a61af66fc99e Initial load duke parents: diff changeset	94 return NULL;
a61af66fc99e Initial load duke parents: diff changeset	95 }
a61af66fc99e Initial load duke parents: diff changeset	96 }
a61af66fc99e Initial load duke parents: diff changeset	97
a61af66fc99e Initial load duke parents: diff changeset	98
a61af66fc99e Initial load duke parents: diff changeset	99 void Relocation::pd_set_call_destination(address x) {
a61af66fc99e Initial load duke parents: diff changeset	100 NativeInstruction* ni = nativeInstruction_at(addr());
a61af66fc99e Initial load duke parents: diff changeset	101 if (ni->is_call()) {
a61af66fc99e Initial load duke parents: diff changeset	102 nativeCall_at(addr())->set_destination(x);
a61af66fc99e Initial load duke parents: diff changeset	103 } else if (ni->is_jump()) {
a61af66fc99e Initial load duke parents: diff changeset	104 NativeJump* nj = nativeJump_at(addr());
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	105
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	106 // Unresolved jumps are recognized by a destination of -1
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	107 // However 64bit can't actually produce such an address
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	108 // and encodes a jump to self but jump_destination will
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	109 // return a -1 as the signal. We must not relocate this
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	110 // jmp or the ic code will not see it as unresolved.
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	111
0 a61af66fc99e Initial load duke parents: diff changeset	112 if (nj->jump_destination() == (address) -1) {
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	113 x = addr(); // jump to self
0 a61af66fc99e Initial load duke parents: diff changeset	114 }
a61af66fc99e Initial load duke parents: diff changeset	115 nj->set_jump_destination(x);
a61af66fc99e Initial load duke parents: diff changeset	116 } else if (ni->is_cond_jump()) {
a61af66fc99e Initial load duke parents: diff changeset	117 // %%%% kludge this, for now, until we get a jump_destination method
a61af66fc99e Initial load duke parents: diff changeset	118 address old_dest = nativeGeneralJump_at(addr())->jump_destination();
a61af66fc99e Initial load duke parents: diff changeset	119 address disp = Assembler::locate_operand(addr(), Assembler::call32_operand);
a61af66fc99e Initial load duke parents: diff changeset	120 (jint)disp += (x - old_dest);
a61af66fc99e Initial load duke parents: diff changeset	121 } else if (ni->is_mov_literal64()) {
a61af66fc99e Initial load duke parents: diff changeset	122 ((NativeMovConstReg*)ni)->set_data((intptr_t)x);
a61af66fc99e Initial load duke parents: diff changeset	123 } else {
a61af66fc99e Initial load duke parents: diff changeset	124 ShouldNotReachHere();
a61af66fc99e Initial load duke parents: diff changeset	125 }
a61af66fc99e Initial load duke parents: diff changeset	126 }
a61af66fc99e Initial load duke parents: diff changeset	127
a61af66fc99e Initial load duke parents: diff changeset	128
a61af66fc99e Initial load duke parents: diff changeset	129 address* Relocation::pd_address_in_code() {
a61af66fc99e Initial load duke parents: diff changeset	130 // All embedded Intel addresses are stored in 32-bit words.
a61af66fc99e Initial load duke parents: diff changeset	131 // Since the addr points at the start of the instruction,
a61af66fc99e Initial load duke parents: diff changeset	132 // we must parse the instruction a bit to find the embedded word.
a61af66fc99e Initial load duke parents: diff changeset	133 assert(is_data(), "must be a DataRelocation");
a61af66fc99e Initial load duke parents: diff changeset	134 typedef Assembler::WhichOperand WhichOperand;
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	135 WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm/imm32
0 a61af66fc99e Initial load duke parents: diff changeset	136 #ifdef AMD64
a61af66fc99e Initial load duke parents: diff changeset	137 assert(which == Assembler::disp32_operand \|\|
a61af66fc99e Initial load duke parents: diff changeset	138 which == Assembler::call32_operand \|\|
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	139 which == Assembler::imm_operand, "format unpacks ok");
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	140 if (which != Assembler::imm_operand) {
0 a61af66fc99e Initial load duke parents: diff changeset	141 // The "address" in the code is a displacement can't return it as
a61af66fc99e Initial load duke parents: diff changeset	142 // and address* since it is really a jint*
a61af66fc99e Initial load duke parents: diff changeset	143 ShouldNotReachHere();
a61af66fc99e Initial load duke parents: diff changeset	144 return NULL;
a61af66fc99e Initial load duke parents: diff changeset	145 }
a61af66fc99e Initial load duke parents: diff changeset	146 #else
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	147 assert(which == Assembler::disp32_operand \|\| which == Assembler::imm_operand, "format unpacks ok");
0 a61af66fc99e Initial load duke parents: diff changeset	148 #endif // AMD64
a61af66fc99e Initial load duke parents: diff changeset	149 return (address*) Assembler::locate_operand(addr(), which);
a61af66fc99e Initial load duke parents: diff changeset	150 }
a61af66fc99e Initial load duke parents: diff changeset	151
a61af66fc99e Initial load duke parents: diff changeset	152
a61af66fc99e Initial load duke parents: diff changeset	153 address Relocation::pd_get_address_from_code() {
a61af66fc99e Initial load duke parents: diff changeset	154 #ifdef AMD64
a61af66fc99e Initial load duke parents: diff changeset	155 // All embedded Intel addresses are stored in 32-bit words.
a61af66fc99e Initial load duke parents: diff changeset	156 // Since the addr points at the start of the instruction,
a61af66fc99e Initial load duke parents: diff changeset	157 // we must parse the instruction a bit to find the embedded word.
a61af66fc99e Initial load duke parents: diff changeset	158 assert(is_data(), "must be a DataRelocation");
a61af66fc99e Initial load duke parents: diff changeset	159 typedef Assembler::WhichOperand WhichOperand;
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	160 WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm/imm32
0 a61af66fc99e Initial load duke parents: diff changeset	161 assert(which == Assembler::disp32_operand \|\|
a61af66fc99e Initial load duke parents: diff changeset	162 which == Assembler::call32_operand \|\|
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	163 which == Assembler::imm_operand, "format unpacks ok");
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	164 if (which != Assembler::imm_operand) {
0 a61af66fc99e Initial load duke parents: diff changeset	165 address ip = addr();
a61af66fc99e Initial load duke parents: diff changeset	166 address disp = Assembler::locate_operand(ip, which);
a61af66fc99e Initial load duke parents: diff changeset	167 address next_ip = Assembler::locate_next_instruction(ip);
a61af66fc99e Initial load duke parents: diff changeset	168 address a = next_ip + (int32_t) disp;
a61af66fc99e Initial load duke parents: diff changeset	169 return a;
a61af66fc99e Initial load duke parents: diff changeset	170 }
a61af66fc99e Initial load duke parents: diff changeset	171 #endif // AMD64
a61af66fc99e Initial load duke parents: diff changeset	172 return *pd_address_in_code();
a61af66fc99e Initial load duke parents: diff changeset	173 }
a61af66fc99e Initial load duke parents: diff changeset	174
a61af66fc99e Initial load duke parents: diff changeset	175 int Relocation::pd_breakpoint_size() {
a61af66fc99e Initial load duke parents: diff changeset	176 // minimum breakpoint size, in short words
a61af66fc99e Initial load duke parents: diff changeset	177 return NativeIllegalInstruction::instruction_size / sizeof(short);
a61af66fc99e Initial load duke parents: diff changeset	178 }
a61af66fc99e Initial load duke parents: diff changeset	179
a61af66fc99e Initial load duke parents: diff changeset	180 void Relocation::pd_swap_in_breakpoint(address x, short* instrs, int instrlen) {
a61af66fc99e Initial load duke parents: diff changeset	181 Untested("pd_swap_in_breakpoint");
a61af66fc99e Initial load duke parents: diff changeset	182 if (instrs != NULL) {
a61af66fc99e Initial load duke parents: diff changeset	183 assert(instrlen * sizeof(short) == NativeIllegalInstruction::instruction_size, "enough instrlen in reloc. data");
a61af66fc99e Initial load duke parents: diff changeset	184 for (int i = 0; i < instrlen; i++) {
a61af66fc99e Initial load duke parents: diff changeset	185 instrs[i] = ((short*)x)[i];
a61af66fc99e Initial load duke parents: diff changeset	186 }
a61af66fc99e Initial load duke parents: diff changeset	187 }
a61af66fc99e Initial load duke parents: diff changeset	188 NativeIllegalInstruction::insert(x);
a61af66fc99e Initial load duke parents: diff changeset	189 }
a61af66fc99e Initial load duke parents: diff changeset	190
a61af66fc99e Initial load duke parents: diff changeset	191
a61af66fc99e Initial load duke parents: diff changeset	192 void Relocation::pd_swap_out_breakpoint(address x, short* instrs, int instrlen) {
a61af66fc99e Initial load duke parents: diff changeset	193 Untested("pd_swap_out_breakpoint");
a61af66fc99e Initial load duke parents: diff changeset	194 assert(NativeIllegalInstruction::instruction_size == sizeof(short), "right address unit for update");
a61af66fc99e Initial load duke parents: diff changeset	195 NativeInstruction* ni = nativeInstruction_at(x);
a61af66fc99e Initial load duke parents: diff changeset	196 (short)ni->addr_at(0) = instrs[0];
a61af66fc99e Initial load duke parents: diff changeset	197 }
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	198
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	199 void poll_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) {
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	200 #ifdef _LP64
2404 b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	201 if (!Assembler::is_polling_page_far()) {
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	202 typedef Assembler::WhichOperand WhichOperand;
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	203 WhichOperand which = (WhichOperand) format();
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	204 // This format is imm but it is really disp32
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	205 which = Assembler::disp32_operand;
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	206 address orig_addr = old_addr_for(addr(), src, dest);
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	207 NativeInstruction* oni = nativeInstruction_at(orig_addr);
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	208 int32_t* orig_disp = (int32_t*) Assembler::locate_operand(orig_addr, which);
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	209 // This poll_addr is incorrect by the size of the instruction it is irrelevant
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	210 intptr_t poll_addr = (intptr_t)oni + *orig_disp;
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	211
2404 b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	212 NativeInstruction* ni = nativeInstruction_at(addr());
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	213 intptr_t new_disp = poll_addr - (intptr_t) ni;
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	214
2404 b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	215 int32_t* disp = (int32_t*) Assembler::locate_operand(addr(), which);
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	216 * disp = (int32_t)new_disp;
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	217 }
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	218 #endif // _LP64
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	219 }
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	220
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	221 void poll_return_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) {
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	222 #ifdef _LP64
2404 b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	223 if (!Assembler::is_polling_page_far()) {
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	224 typedef Assembler::WhichOperand WhichOperand;
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	225 WhichOperand which = (WhichOperand) format();
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	226 // This format is imm but it is really disp32
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	227 which = Assembler::disp32_operand;
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	228 address orig_addr = old_addr_for(addr(), src, dest);
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	229 NativeInstruction* oni = nativeInstruction_at(orig_addr);
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	230 int32_t* orig_disp = (int32_t*) Assembler::locate_operand(orig_addr, which);
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	231 // This poll_addr is incorrect by the size of the instruction it is irrelevant
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	232 intptr_t poll_addr = (intptr_t)oni + *orig_disp;
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	233
2404 b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	234 NativeInstruction* ni = nativeInstruction_at(addr());
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	235 intptr_t new_disp = poll_addr - (intptr_t) ni;
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	236
2404 b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	237 int32_t* disp = (int32_t*) Assembler::locate_operand(addr(), which);
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	238 * disp = (int32_t)new_disp;
b40d4fa697bf 6964776: c2 should ensure the polling page is reachable on 64 bit iveresov parents: 2375 diff changeset	239 }
304 dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	240 #endif // _LP64
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories never parents: 196 diff changeset	241 }

Mercurial > hg > truffle

annotate src/cpu/x86/vm/relocInfo_x86.cpp @ 3096:8073f5ad1d87