annotate src/share/vm/code/vmreg.hpp @ 10408:836a62f43af9

Merge with http://hg.openjdk.java.net/hsx/hsx25/hotspot/
author Doug Simon <doug.simon@oracle.com>
date Wed, 19 Jun 2013 10:45:56 +0200
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children d2907f74462e
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1 /*
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2 * Copyright (c) 1998, 2012, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #ifndef SHARE_VM_CODE_VMREG_HPP
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26 #define SHARE_VM_CODE_VMREG_HPP
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27
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28 #include "memory/allocation.hpp"
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29 #include "utilities/globalDefinitions.hpp"
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30 #include "asm/register.hpp"
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31
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32 #ifdef COMPILER2
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33 #include "opto/adlcVMDeps.hpp"
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34 #include "utilities/ostream.hpp"
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35 #ifdef TARGET_ARCH_MODEL_x86_32
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36 # include "adfiles/adGlobals_x86_32.hpp"
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37 #endif
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38 #ifdef TARGET_ARCH_MODEL_x86_64
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39 # include "adfiles/adGlobals_x86_64.hpp"
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40 #endif
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41 #ifdef TARGET_ARCH_MODEL_sparc
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42 # include "adfiles/adGlobals_sparc.hpp"
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43 #endif
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44 #ifdef TARGET_ARCH_MODEL_zero
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45 # include "adfiles/adGlobals_zero.hpp"
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46 #endif
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47 #ifdef TARGET_ARCH_MODEL_arm
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48 # include "adfiles/adGlobals_arm.hpp"
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49 #endif
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50 #ifdef TARGET_ARCH_MODEL_ppc
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51 # include "adfiles/adGlobals_ppc.hpp"
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52 #endif
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53 #endif
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54
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55 //------------------------------VMReg------------------------------------------
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56 // The VM uses 'unwarped' stack slots; the compiler uses 'warped' stack slots.
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57 // Register numbers below VMRegImpl::stack0 are the same for both. Register
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58 // numbers above stack0 are either warped (in the compiler) or unwarped
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59 // (in the VM). Unwarped numbers represent stack indices, offsets from
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60 // the current stack pointer. Warped numbers are required during compilation
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61 // when we do not yet know how big the frame will be.
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62
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63 class VMRegImpl;
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64 typedef VMRegImpl* VMReg;
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65
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66 class VMRegImpl {
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67 // friend class OopMap;
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68 friend class VMStructs;
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69 friend class OptoReg;
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70 // friend class Location;
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71 private:
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72 enum {
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73 BAD = -1
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74 };
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75
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76
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77
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78 static VMReg stack0;
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79 // Names for registers
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80 static const char *regName[];
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81 static const int register_count;
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82
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83
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84 public:
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85
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86 static VMReg as_VMReg(int val, bool bad_ok = false) { assert(val > BAD || bad_ok, "invalid"); return (VMReg) (intptr_t) val; }
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87
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88 const char* name() {
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89 if (is_reg()) {
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90 return regName[value()];
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91 } else if (!is_valid()) {
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92 return "BAD";
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93 } else {
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94 // shouldn't really be called with stack
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95 return "STACKED REG";
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96 }
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97 }
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98 static VMReg Bad() { return (VMReg) (intptr_t) BAD; }
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99 bool is_valid() const { return ((intptr_t) this) != BAD; }
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100 bool is_stack() const { return (intptr_t) this >= (intptr_t) stack0; }
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101 bool is_reg() const { return is_valid() && !is_stack(); }
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102
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103 // A concrete register is a value that returns true for is_reg() and is
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104 // also a register you could use in the assembler. On machines with
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105 // 64bit registers only one half of the VMReg (and OptoReg) is considered
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106 // concrete.
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107 bool is_concrete();
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108
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109 // VMRegs are 4 bytes wide on all platforms
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110 static const int stack_slot_size;
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111 static const int slots_per_word;
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112
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113
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114 // This really ought to check that the register is "real" in the sense that
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115 // we don't try and get the VMReg number of a physical register that doesn't
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116 // have an expressible part. That would be pd specific code
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117 VMReg next() {
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118 assert((is_reg() && value() < stack0->value() - 1) || is_stack(), "must be");
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119 return (VMReg)(intptr_t)(value() + 1);
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120 }
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121 VMReg next(int i) {
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122 assert((is_reg() && value() < stack0->value() - i) || is_stack(), "must be");
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123 return (VMReg)(intptr_t)(value() + i);
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124 }
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125 VMReg prev() {
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126 assert((is_stack() && value() > stack0->value()) || (is_reg() && value() != 0), "must be");
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127 return (VMReg)(intptr_t)(value() - 1);
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128 }
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129
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130
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131 intptr_t value() const {return (intptr_t) this; }
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132
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133 void print_on(outputStream* st) const;
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134 void print() const { print_on(tty); }
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136 // bias a stack slot.
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137 // Typically used to adjust a virtual frame slots by amounts that are offset by
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138 // amounts that are part of the native abi. The VMReg must be a stack slot
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139 // and the result must be also.
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140
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141 VMReg bias(int offset) {
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142 assert(is_stack(), "must be");
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143 // VMReg res = VMRegImpl::as_VMReg(value() + offset);
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144 VMReg res = stack2reg(reg2stack() + offset);
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145 assert(res->is_stack(), "must be");
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146 return res;
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147 }
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148
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149 // Convert register numbers to stack slots and vice versa
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150 static VMReg stack2reg( int idx ) {
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151 return (VMReg) (intptr_t) (stack0->value() + idx);
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152 }
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153
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154 uintptr_t reg2stack() {
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155 assert( is_stack(), "Not a stack-based register" );
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156 return value() - stack0->value();
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157 }
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158
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159 static void set_regName();
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160
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161 #ifdef TARGET_ARCH_x86
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162 # include "vmreg_x86.hpp"
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163 #endif
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164 #ifdef TARGET_ARCH_sparc
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165 # include "vmreg_sparc.hpp"
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166 #endif
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167 #ifdef TARGET_ARCH_zero
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168 # include "vmreg_zero.hpp"
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169 #endif
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170 #ifdef TARGET_ARCH_arm
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171 # include "vmreg_arm.hpp"
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172 #endif
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173 #ifdef TARGET_ARCH_ppc
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174 # include "vmreg_ppc.hpp"
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175 #endif
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176
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178 };
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179
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180 //---------------------------VMRegPair-------------------------------------------
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181 // Pairs of 32-bit registers for arguments.
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182 // SharedRuntime::java_calling_convention will overwrite the structs with
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183 // the calling convention's registers. VMRegImpl::Bad is returned for any
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184 // unused 32-bit register. This happens for the unused high half of Int
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185 // arguments, or for 32-bit pointers or for longs in the 32-bit sparc build
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186 // (which are passed to natives in low 32-bits of e.g. O0/O1 and the high
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187 // 32-bits of O0/O1 are set to VMRegImpl::Bad). Longs in one register & doubles
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188 // always return a high and a low register, as do 64-bit pointers.
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189 //
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190 class VMRegPair {
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191 private:
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192 VMReg _second;
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193 VMReg _first;
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194 public:
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195 void set_bad ( ) { _second=VMRegImpl::Bad(); _first=VMRegImpl::Bad(); }
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196 void set1 ( VMReg v ) { _second=VMRegImpl::Bad(); _first=v; }
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197 void set2 ( VMReg v ) { _second=v->next(); _first=v; }
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198 void set_pair( VMReg second, VMReg first ) { _second= second; _first= first; }
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199 void set_ptr ( VMReg ptr ) {
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200 #ifdef _LP64
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201 _second = ptr->next();
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202 #else
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203 _second = VMRegImpl::Bad();
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204 #endif
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205 _first = ptr;
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206 }
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207 // Return true if single register, even if the pair is really just adjacent stack slots
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208 bool is_single_reg() const {
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209 return (_first->is_valid()) && (_first->value() + 1 == _second->value());
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210 }
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211
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212 // Return true if single stack based "register" where the slot alignment matches input alignment
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213 bool is_adjacent_on_stack(int alignment) const {
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214 return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0));
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215 }
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216
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217 // Return true if single stack based "register" where the slot alignment matches input alignment
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218 bool is_adjacent_aligned_on_stack(int alignment) const {
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219 return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0));
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220 }
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221
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222 // Return true if single register but adjacent stack slots do not count
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223 bool is_single_phys_reg() const {
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224 return (_first->is_reg() && (_first->value() + 1 == _second->value()));
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225 }
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226
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227 VMReg second() const { return _second; }
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228 VMReg first() const { return _first; }
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229 VMRegPair(VMReg s, VMReg f) { _second = s; _first = f; }
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230 VMRegPair(VMReg f) { _second = VMRegImpl::Bad(); _first = f; }
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231 VMRegPair() { _second = VMRegImpl::Bad(); _first = VMRegImpl::Bad(); }
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232 };
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233
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234 #endif // SHARE_VM_CODE_VMREG_HPP