Mercurial > hg > truffle
annotate src/cpu/x86/vm/c1_Runtime1_x86.cpp @ 5124:837a304d0ca8
C1 bugfix, fixed C1 compilation errors
| author | Christian Haeubl <christian.haeubl@oracle.com> |
|---|---|
| date | Tue, 20 Mar 2012 11:45:21 -0700 |
| parents | 422c979ff392 |
| children | ec177db4a412 |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 1999, 2011, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #include "precompiled.hpp" |
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26 #include "asm/assembler.hpp" |
| 1972 | 27 #include "c1/c1_Defs.hpp" |
| 28 #include "c1/c1_MacroAssembler.hpp" | |
| 29 #include "c1/c1_Runtime1.hpp" | |
| 30 #include "interpreter/interpreter.hpp" | |
| 31 #include "nativeInst_x86.hpp" | |
| 32 #include "oops/compiledICHolderOop.hpp" | |
| 33 #include "oops/oop.inline.hpp" | |
| 34 #include "prims/jvmtiExport.hpp" | |
| 35 #include "register_x86.hpp" | |
| 36 #include "runtime/sharedRuntime.hpp" | |
| 37 #include "runtime/signature.hpp" | |
| 38 #include "runtime/vframeArray.hpp" | |
| 39 #include "vmreg_x86.inline.hpp" | |
| 0 | 40 |
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41 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true); |
| 0 | 42 |
| 43 // Implementation of StubAssembler | |
| 44 | |
| 45 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, int args_size) { | |
| 46 // setup registers | |
| 304 | 47 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions) |
| 0 | 48 assert(!(oop_result1->is_valid() || oop_result2->is_valid()) || oop_result1 != oop_result2, "registers must be different"); |
| 49 assert(oop_result1 != thread && oop_result2 != thread, "registers must be different"); | |
| 50 assert(args_size >= 0, "illegal args_size"); | |
| 51 | |
| 304 | 52 #ifdef _LP64 |
| 53 mov(c_rarg0, thread); | |
| 54 set_num_rt_args(0); // Nothing on stack | |
| 55 #else | |
| 0 | 56 set_num_rt_args(1 + args_size); |
| 57 | |
| 58 // push java thread (becomes first argument of C function) | |
| 59 get_thread(thread); | |
| 304 | 60 push(thread); |
| 61 #endif // _LP64 | |
| 0 | 62 |
| 63 set_last_Java_frame(thread, noreg, rbp, NULL); | |
| 304 | 64 |
| 0 | 65 // do the call |
| 66 call(RuntimeAddress(entry)); | |
| 67 int call_offset = offset(); | |
| 68 // verify callee-saved register | |
| 69 #ifdef ASSERT | |
| 70 guarantee(thread != rax, "change this code"); | |
| 304 | 71 push(rax); |
| 0 | 72 { Label L; |
| 73 get_thread(rax); | |
| 304 | 74 cmpptr(thread, rax); |
| 0 | 75 jcc(Assembler::equal, L); |
| 76 int3(); | |
| 77 stop("StubAssembler::call_RT: rdi not callee saved?"); | |
| 78 bind(L); | |
| 79 } | |
| 304 | 80 pop(rax); |
| 0 | 81 #endif |
| 82 reset_last_Java_frame(thread, true, false); | |
| 83 | |
| 84 // discard thread and arguments | |
| 304 | 85 NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord)); |
| 0 | 86 |
| 87 // check for pending exceptions | |
| 88 { Label L; | |
| 304 | 89 cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
| 0 | 90 jcc(Assembler::equal, L); |
| 91 // exception pending => remove activation and forward to exception handler | |
| 304 | 92 movptr(rax, Address(thread, Thread::pending_exception_offset())); |
| 0 | 93 // make sure that the vm_results are cleared |
| 94 if (oop_result1->is_valid()) { | |
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95 movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
| 0 | 96 } |
| 97 if (oop_result2->is_valid()) { | |
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98 movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); |
| 0 | 99 } |
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100 #ifdef GRAAL |
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101 // (thomaswue) Deoptimize in case of an exception. |
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102 restore_live_registers(this, false); |
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103 movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); |
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104 leave(); |
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105 movl(rscratch1, Deoptimization::make_trap_request(Deoptimization::Reason_constraint, Deoptimization::Action_reinterpret)); |
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106 jump(RuntimeAddress(SharedRuntime::deopt_blob()->uncommon_trap())); |
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107 #else |
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108 if (frame_size() == no_frame_size) { |
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109 leave(); |
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110 jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
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111 } else if (_stub_id == Runtime1::forward_exception_id) { |
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112 should_not_reach_here(); |
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113 } else { |
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114 jump(RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id))); |
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115 } |
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116 #endif |
| 0 | 117 bind(L); |
| 118 } | |
| 119 // get oop results if there are any and reset the values in the thread | |
| 120 if (oop_result1->is_valid()) { | |
| 304 | 121 movptr(oop_result1, Address(thread, JavaThread::vm_result_offset())); |
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122 movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
| 0 | 123 verify_oop(oop_result1); |
| 124 } | |
| 125 if (oop_result2->is_valid()) { | |
| 304 | 126 movptr(oop_result2, Address(thread, JavaThread::vm_result_2_offset())); |
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127 movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); |
| 0 | 128 verify_oop(oop_result2); |
| 129 } | |
| 130 return call_offset; | |
| 131 } | |
| 132 | |
| 133 | |
| 134 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1) { | |
| 304 | 135 #ifdef _LP64 |
| 136 mov(c_rarg1, arg1); | |
| 137 #else | |
| 138 push(arg1); | |
| 139 #endif // _LP64 | |
| 0 | 140 return call_RT(oop_result1, oop_result2, entry, 1); |
| 141 } | |
| 142 | |
| 143 | |
| 144 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2) { | |
| 304 | 145 #ifdef _LP64 |
| 146 if (c_rarg1 == arg2) { | |
| 147 if (c_rarg2 == arg1) { | |
| 148 xchgq(arg1, arg2); | |
| 149 } else { | |
| 150 mov(c_rarg2, arg2); | |
| 151 mov(c_rarg1, arg1); | |
| 152 } | |
| 153 } else { | |
| 154 mov(c_rarg1, arg1); | |
| 155 mov(c_rarg2, arg2); | |
| 156 } | |
| 157 #else | |
| 158 push(arg2); | |
| 159 push(arg1); | |
| 160 #endif // _LP64 | |
| 0 | 161 return call_RT(oop_result1, oop_result2, entry, 2); |
| 162 } | |
| 163 | |
| 164 | |
| 165 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2, Register arg3) { | |
| 304 | 166 #ifdef _LP64 |
| 167 // if there is any conflict use the stack | |
| 168 if (arg1 == c_rarg2 || arg1 == c_rarg3 || | |
| 169 arg2 == c_rarg1 || arg1 == c_rarg3 || | |
| 170 arg3 == c_rarg1 || arg1 == c_rarg2) { | |
| 171 push(arg3); | |
| 172 push(arg2); | |
| 173 push(arg1); | |
| 174 pop(c_rarg1); | |
| 175 pop(c_rarg2); | |
| 176 pop(c_rarg3); | |
| 177 } else { | |
| 178 mov(c_rarg1, arg1); | |
| 179 mov(c_rarg2, arg2); | |
| 180 mov(c_rarg3, arg3); | |
| 181 } | |
| 182 #else | |
| 183 push(arg3); | |
| 184 push(arg2); | |
| 185 push(arg1); | |
| 186 #endif // _LP64 | |
| 0 | 187 return call_RT(oop_result1, oop_result2, entry, 3); |
| 188 } | |
| 189 | |
| 190 | |
| 191 // Implementation of StubFrame | |
| 192 | |
| 193 class StubFrame: public StackObj { | |
| 194 private: | |
| 195 StubAssembler* _sasm; | |
| 196 | |
| 197 public: | |
| 198 StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments); | |
| 199 void load_argument(int offset_in_words, Register reg); | |
| 200 | |
| 201 ~StubFrame(); | |
| 202 }; | |
| 203 | |
| 204 | |
| 205 #define __ _sasm-> | |
| 206 | |
| 207 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) { | |
| 208 _sasm = sasm; | |
| 209 __ set_info(name, must_gc_arguments); | |
| 210 __ enter(); | |
| 211 } | |
| 212 | |
| 213 // load parameters that were stored with LIR_Assembler::store_parameter | |
| 214 // Note: offsets for store_parameter and load_argument must match | |
| 215 void StubFrame::load_argument(int offset_in_words, Register reg) { | |
| 216 // rbp, + 0: link | |
| 217 // + 1: return address | |
| 218 // + 2: argument with offset 0 | |
| 219 // + 3: argument with offset 1 | |
| 220 // + 4: ... | |
| 221 | |
| 304 | 222 __ movptr(reg, Address(rbp, (offset_in_words + 2) * BytesPerWord)); |
| 0 | 223 } |
| 224 | |
| 225 | |
| 226 StubFrame::~StubFrame() { | |
| 227 __ leave(); | |
| 228 __ ret(0); | |
| 229 } | |
| 230 | |
| 231 #undef __ | |
| 232 | |
| 233 | |
| 234 // Implementation of Runtime1 | |
| 235 | |
| 236 #define __ sasm-> | |
| 237 | |
| 304 | 238 const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2; |
| 239 const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2; | |
| 0 | 240 |
| 241 // Stack layout for saving/restoring all the registers needed during a runtime | |
| 242 // call (this includes deoptimization) | |
| 243 // Note: note that users of this frame may well have arguments to some runtime | |
| 244 // while these values are on the stack. These positions neglect those arguments | |
| 245 // but the code in save_live_registers will take the argument count into | |
| 246 // account. | |
| 247 // | |
| 304 | 248 #ifdef _LP64 |
| 249 #define SLOT2(x) x, | |
| 250 #define SLOT_PER_WORD 2 | |
| 251 #else | |
| 252 #define SLOT2(x) | |
| 253 #define SLOT_PER_WORD 1 | |
| 254 #endif // _LP64 | |
| 255 | |
| 0 | 256 enum reg_save_layout { |
| 304 | 257 // 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that |
| 258 // happen and will assert if the stack size we create is misaligned | |
| 259 #ifdef _LP64 | |
| 260 align_dummy_0, align_dummy_1, | |
| 261 #endif // _LP64 | |
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262 #ifdef _WIN64 |
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263 // Windows always allocates space for it's argument registers (see |
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264 // frame::arg_reg_save_area_bytes). |
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265 arg_reg_save_1, arg_reg_save_1H, // 0, 4 |
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266 arg_reg_save_2, arg_reg_save_2H, // 8, 12 |
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267 arg_reg_save_3, arg_reg_save_3H, // 16, 20 |
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268 arg_reg_save_4, arg_reg_save_4H, // 24, 28 |
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269 #endif // _WIN64 |
| 304 | 270 xmm_regs_as_doubles_off, // 32 |
| 271 float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots, // 160 | |
| 272 fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots, // 224 | |
| 273 // fpu_state_end_off is exclusive | |
| 274 fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD), // 352 | |
| 275 marker = fpu_state_end_off, SLOT2(markerH) // 352, 356 | |
| 276 extra_space_offset, // 360 | |
| 277 #ifdef _LP64 | |
| 278 r15_off = extra_space_offset, r15H_off, // 360, 364 | |
| 279 r14_off, r14H_off, // 368, 372 | |
| 280 r13_off, r13H_off, // 376, 380 | |
| 281 r12_off, r12H_off, // 384, 388 | |
| 282 r11_off, r11H_off, // 392, 396 | |
| 283 r10_off, r10H_off, // 400, 404 | |
| 284 r9_off, r9H_off, // 408, 412 | |
| 285 r8_off, r8H_off, // 416, 420 | |
| 286 rdi_off, rdiH_off, // 424, 428 | |
| 287 #else | |
| 0 | 288 rdi_off = extra_space_offset, |
| 304 | 289 #endif // _LP64 |
| 290 rsi_off, SLOT2(rsiH_off) // 432, 436 | |
| 291 rbp_off, SLOT2(rbpH_off) // 440, 444 | |
| 292 rsp_off, SLOT2(rspH_off) // 448, 452 | |
| 293 rbx_off, SLOT2(rbxH_off) // 456, 460 | |
| 294 rdx_off, SLOT2(rdxH_off) // 464, 468 | |
| 295 rcx_off, SLOT2(rcxH_off) // 472, 476 | |
| 296 rax_off, SLOT2(raxH_off) // 480, 484 | |
| 297 saved_rbp_off, SLOT2(saved_rbpH_off) // 488, 492 | |
| 298 return_off, SLOT2(returnH_off) // 496, 500 | |
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299 reg_save_frame_size // As noted: neglects any parameters to runtime // 504 |
| 0 | 300 }; |
| 301 | |
| 302 | |
| 303 | |
| 304 // Save off registers which might be killed by calls into the runtime. | |
| 305 // Tries to smart of about FP registers. In particular we separate | |
| 306 // saving and describing the FPU registers for deoptimization since we | |
| 307 // have to save the FPU registers twice if we describe them and on P4 | |
| 308 // saving FPU registers which don't contain anything appears | |
| 309 // expensive. The deopt blob is the only thing which needs to | |
| 310 // describe FPU registers. In all other cases it should be sufficient | |
| 311 // to simply save their current value. | |
| 312 | |
| 313 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args, | |
| 314 bool save_fpu_registers = true) { | |
| 304 | 315 |
| 316 // In 64bit all the args are in regs so there are no additional stack slots | |
| 317 LP64_ONLY(num_rt_args = 0); | |
| 318 LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");) | |
| 319 int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread | |
| 320 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word ); | |
| 0 | 321 |
| 322 // record saved value locations in an OopMap | |
| 323 // locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread | |
| 304 | 324 OopMap* map = new OopMap(frame_size_in_slots, 0); |
| 0 | 325 map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg()); |
| 326 map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg()); | |
| 327 map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg()); | |
| 328 map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg()); | |
| 329 map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg()); | |
| 330 map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg()); | |
| 304 | 331 #ifdef _LP64 |
| 332 map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args), r8->as_VMReg()); | |
| 333 map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args), r9->as_VMReg()); | |
| 334 map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg()); | |
| 335 map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg()); | |
| 336 map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg()); | |
| 337 map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg()); | |
| 338 map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg()); | |
| 339 map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg()); | |
| 340 | |
| 341 // This is stupid but needed. | |
| 342 map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next()); | |
| 343 map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next()); | |
| 344 map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next()); | |
| 345 map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next()); | |
| 346 map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next()); | |
| 347 map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next()); | |
| 348 | |
| 349 map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args), r8->as_VMReg()->next()); | |
| 350 map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args), r9->as_VMReg()->next()); | |
| 351 map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next()); | |
| 352 map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next()); | |
| 353 map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next()); | |
| 354 map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next()); | |
| 355 map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next()); | |
| 356 map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next()); | |
| 357 #endif // _LP64 | |
| 0 | 358 |
| 359 if (save_fpu_registers) { | |
| 360 if (UseSSE < 2) { | |
| 361 int fpu_off = float_regs_as_doubles_off; | |
| 362 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) { | |
| 363 VMReg fpu_name_0 = FrameMap::fpu_regname(n); | |
| 364 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + num_rt_args), fpu_name_0); | |
| 365 // %%% This is really a waste but we'll keep things as they were for now | |
| 366 if (true) { | |
| 367 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next()); | |
| 368 } | |
| 369 fpu_off += 2; | |
| 370 } | |
| 371 assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots"); | |
| 372 } | |
| 373 | |
| 374 if (UseSSE >= 2) { | |
| 375 int xmm_off = xmm_regs_as_doubles_off; | |
| 376 for (int n = 0; n < FrameMap::nof_xmm_regs; n++) { | |
| 377 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg(); | |
| 378 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0); | |
| 379 // %%% This is really a waste but we'll keep things as they were for now | |
| 380 if (true) { | |
| 381 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next()); | |
| 382 } | |
| 383 xmm_off += 2; | |
| 384 } | |
| 385 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers"); | |
| 386 | |
| 387 } else if (UseSSE == 1) { | |
| 388 int xmm_off = xmm_regs_as_doubles_off; | |
| 389 for (int n = 0; n < FrameMap::nof_xmm_regs; n++) { | |
| 390 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg(); | |
| 391 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0); | |
| 392 xmm_off += 2; | |
| 393 } | |
| 394 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers"); | |
| 395 } | |
| 396 } | |
| 397 | |
| 398 return map; | |
| 399 } | |
| 400 | |
| 401 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args, | |
| 402 bool save_fpu_registers = true) { | |
| 403 __ block_comment("save_live_registers"); | |
| 404 | |
| 304 | 405 __ pusha(); // integer registers |
| 0 | 406 |
| 407 // assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset"); | |
| 408 // assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset"); | |
| 409 | |
| 304 | 410 __ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size); |
| 0 | 411 |
| 412 #ifdef ASSERT | |
| 304 | 413 __ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef); |
| 0 | 414 #endif |
| 415 | |
| 416 if (save_fpu_registers) { | |
| 417 if (UseSSE < 2) { | |
| 418 // save FPU stack | |
| 304 | 419 __ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); |
| 0 | 420 __ fwait(); |
| 421 | |
| 422 #ifdef ASSERT | |
| 423 Label ok; | |
| 304 | 424 __ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std()); |
| 0 | 425 __ jccb(Assembler::equal, ok); |
| 426 __ stop("corrupted control word detected"); | |
| 427 __ bind(ok); | |
| 428 #endif | |
| 429 | |
| 430 // Reset the control word to guard against exceptions being unmasked | |
| 431 // since fstp_d can cause FPU stack underflow exceptions. Write it | |
| 432 // into the on stack copy and then reload that to make sure that the | |
| 433 // current and future values are correct. | |
| 304 | 434 __ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std()); |
| 435 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); | |
| 0 | 436 |
| 437 // Save the FPU registers in de-opt-able form | |
| 304 | 438 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); |
| 439 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); | |
| 440 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); | |
| 441 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); | |
| 442 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); | |
| 443 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); | |
| 444 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); | |
| 445 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); | |
| 0 | 446 } |
| 447 | |
| 448 if (UseSSE >= 2) { | |
| 449 // save XMM registers | |
| 450 // XMM registers can contain float or double values, but this is not known here, | |
| 451 // so always save them as doubles. | |
| 452 // note that float values are _not_ converted automatically, so for float values | |
| 453 // the second word contains only garbage data. | |
| 304 | 454 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0); |
| 455 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1); | |
| 456 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2); | |
| 457 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3); | |
| 458 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4); | |
| 459 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5); | |
| 460 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6); | |
| 461 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7); | |
| 462 #ifdef _LP64 | |
| 463 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64), xmm8); | |
| 464 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72), xmm9); | |
| 465 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80), xmm10); | |
| 466 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88), xmm11); | |
| 467 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96), xmm12); | |
| 468 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104), xmm13); | |
| 469 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112), xmm14); | |
| 470 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120), xmm15); | |
| 471 #endif // _LP64 | |
| 0 | 472 } else if (UseSSE == 1) { |
| 473 // save XMM registers as float because double not supported without SSE2 | |
| 304 | 474 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0); |
| 475 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1); | |
| 476 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2); | |
| 477 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3); | |
| 478 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4); | |
| 479 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5); | |
| 480 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6); | |
| 481 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7); | |
| 0 | 482 } |
| 483 } | |
| 484 | |
| 485 // FPU stack must be empty now | |
| 486 __ verify_FPU(0, "save_live_registers"); | |
| 487 | |
| 488 return generate_oop_map(sasm, num_rt_args, save_fpu_registers); | |
| 489 } | |
| 490 | |
| 491 | |
| 492 static void restore_fpu(StubAssembler* sasm, bool restore_fpu_registers = true) { | |
| 493 if (restore_fpu_registers) { | |
| 494 if (UseSSE >= 2) { | |
| 495 // restore XMM registers | |
| 304 | 496 __ movdbl(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); |
| 497 __ movdbl(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); | |
| 498 __ movdbl(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); | |
| 499 __ movdbl(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); | |
| 500 __ movdbl(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); | |
| 501 __ movdbl(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); | |
| 502 __ movdbl(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); | |
| 503 __ movdbl(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); | |
| 504 #ifdef _LP64 | |
| 505 __ movdbl(xmm8, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64)); | |
| 506 __ movdbl(xmm9, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72)); | |
| 507 __ movdbl(xmm10, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80)); | |
| 508 __ movdbl(xmm11, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88)); | |
| 509 __ movdbl(xmm12, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96)); | |
| 510 __ movdbl(xmm13, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104)); | |
| 511 __ movdbl(xmm14, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112)); | |
| 512 __ movdbl(xmm15, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120)); | |
| 513 #endif // _LP64 | |
| 0 | 514 } else if (UseSSE == 1) { |
| 515 // restore XMM registers | |
| 304 | 516 __ movflt(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); |
| 517 __ movflt(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); | |
| 518 __ movflt(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); | |
| 519 __ movflt(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); | |
| 520 __ movflt(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); | |
| 521 __ movflt(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); | |
| 522 __ movflt(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); | |
| 523 __ movflt(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); | |
| 0 | 524 } |
| 525 | |
| 526 if (UseSSE < 2) { | |
| 304 | 527 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); |
| 0 | 528 } else { |
| 529 // check that FPU stack is really empty | |
| 530 __ verify_FPU(0, "restore_live_registers"); | |
| 531 } | |
| 532 | |
| 533 } else { | |
| 534 // check that FPU stack is really empty | |
| 535 __ verify_FPU(0, "restore_live_registers"); | |
| 536 } | |
| 537 | |
| 538 #ifdef ASSERT | |
| 539 { | |
| 540 Label ok; | |
| 304 | 541 __ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef); |
| 0 | 542 __ jcc(Assembler::equal, ok); |
| 543 __ stop("bad offsets in frame"); | |
| 544 __ bind(ok); | |
| 545 } | |
| 304 | 546 #endif // ASSERT |
| 0 | 547 |
| 304 | 548 __ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size); |
| 0 | 549 } |
| 550 | |
| 551 | |
|
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552 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers/* = true*/) { |
| 0 | 553 __ block_comment("restore_live_registers"); |
| 554 | |
| 555 restore_fpu(sasm, restore_fpu_registers); | |
| 304 | 556 __ popa(); |
| 0 | 557 } |
| 558 | |
| 559 | |
| 560 static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) { | |
| 561 __ block_comment("restore_live_registers_except_rax"); | |
| 562 | |
| 563 restore_fpu(sasm, restore_fpu_registers); | |
| 564 | |
| 304 | 565 #ifdef _LP64 |
| 566 __ movptr(r15, Address(rsp, 0)); | |
| 567 __ movptr(r14, Address(rsp, wordSize)); | |
| 568 __ movptr(r13, Address(rsp, 2 * wordSize)); | |
| 569 __ movptr(r12, Address(rsp, 3 * wordSize)); | |
| 570 __ movptr(r11, Address(rsp, 4 * wordSize)); | |
| 571 __ movptr(r10, Address(rsp, 5 * wordSize)); | |
| 572 __ movptr(r9, Address(rsp, 6 * wordSize)); | |
| 573 __ movptr(r8, Address(rsp, 7 * wordSize)); | |
| 574 __ movptr(rdi, Address(rsp, 8 * wordSize)); | |
| 575 __ movptr(rsi, Address(rsp, 9 * wordSize)); | |
| 576 __ movptr(rbp, Address(rsp, 10 * wordSize)); | |
| 577 // skip rsp | |
| 578 __ movptr(rbx, Address(rsp, 12 * wordSize)); | |
| 579 __ movptr(rdx, Address(rsp, 13 * wordSize)); | |
| 580 __ movptr(rcx, Address(rsp, 14 * wordSize)); | |
| 581 | |
| 582 __ addptr(rsp, 16 * wordSize); | |
| 583 #else | |
| 584 | |
| 585 __ pop(rdi); | |
| 586 __ pop(rsi); | |
| 587 __ pop(rbp); | |
| 588 __ pop(rbx); // skip this value | |
| 589 __ pop(rbx); | |
| 590 __ pop(rdx); | |
| 591 __ pop(rcx); | |
| 592 __ addptr(rsp, BytesPerWord); | |
| 593 #endif // _LP64 | |
| 0 | 594 } |
| 595 | |
| 596 | |
| 597 void Runtime1::initialize_pd() { | |
| 598 // nothing to do | |
| 599 } | |
| 600 | |
| 601 | |
| 602 // target: the entry point of the method that creates and posts the exception oop | |
| 603 // has_argument: true if the exception needs an argument (passed on stack because registers must be preserved) | |
| 604 | |
| 605 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) { | |
|
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606 OopMapSet* oop_maps = new OopMapSet(); |
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607 #ifdef GRAAL |
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608 OopMap* oop_map = save_live_registers(sasm, 1); |
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609 |
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610 // now all registers are saved and can be used freely |
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611 // verify that no old value is used accidentally |
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612 __ invalidate_registers(true, true, true, true, true, true); |
| 0 | 613 |
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614 // registers used by this stub |
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615 const Register temp_reg = rbx; |
| 0 | 616 |
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617 // load argument for exception that is passed as an argument into the stub |
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618 if (has_argument) { |
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619 __ movptr(c_rarg1, r10); |
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620 } |
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621 int call_offset = __ call_RT(noreg, noreg, target, has_argument ? 1 : 0); |
| 0 | 622 |
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623 oop_maps->add_gc_map(call_offset, oop_map); |
| 304 | 624 #else |
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625 // preserve all registers |
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626 int num_rt_args = has_argument ? 2 : 1; |
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627 OopMap* oop_map = save_live_registers(sasm, num_rt_args); |
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628 |
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629 // now all registers are saved and can be used freely |
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630 // verify that no old value is used accidentally |
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631 __ invalidate_registers(true, true, true, true, true, true); |
|
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632 |
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633 // registers used by this stub |
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634 const Register temp_reg = rbx; |
| 0 | 635 |
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636 // load argument for exception that is passed as an argument into the stub |
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637 if (has_argument) { |
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638 #ifdef _LP64 |
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639 __ movptr(c_rarg1, Address(rbp, 2*BytesPerWord)); |
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640 #else |
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641 __ movptr(temp_reg, Address(rbp, 2*BytesPerWord)); |
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642 __ push(temp_reg); |
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643 #endif // _LP64 |
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644 } |
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645 int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1); |
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646 |
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647 oop_maps->add_gc_map(call_offset, oop_map); |
|
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648 #endif |
| 0 | 649 |
| 650 __ stop("should not reach here"); | |
| 651 | |
| 652 return oop_maps; | |
| 653 } | |
| 654 | |
| 655 | |
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656 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) { |
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657 __ block_comment("generate_handle_exception"); |
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658 |
| 0 | 659 // incoming parameters |
| 660 const Register exception_oop = rax; | |
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661 const Register exception_pc = rdx; |
| 0 | 662 // other registers used in this stub |
| 304 | 663 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); |
| 0 | 664 |
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665 // Save registers, if required. |
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666 OopMapSet* oop_maps = new OopMapSet(); |
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667 OopMap* oop_map = NULL; |
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668 switch (id) { |
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669 case forward_exception_id: |
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670 // We're handling an exception in the context of a compiled frame. |
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671 // The registers have been saved in the standard places. Perform |
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672 // an exception lookup in the caller and dispatch to the handler |
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673 // if found. Otherwise unwind and dispatch to the callers |
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674 // exception handler. |
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675 oop_map = generate_oop_map(sasm, 1 /*thread*/); |
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676 |
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677 // load and clear pending exception oop into RAX |
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678 __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset())); |
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679 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); |
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680 |
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681 // load issuing PC (the return address for this stub) into rdx |
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682 __ movptr(exception_pc, Address(rbp, 1*BytesPerWord)); |
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683 |
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684 // make sure that the vm_results are cleared (may be unnecessary) |
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685 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
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686 __ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); |
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687 break; |
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688 case handle_exception_nofpu_id: |
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689 case handle_exception_id: |
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690 // At this point all registers MAY be live. |
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691 oop_map = save_live_registers(sasm, 1 /*thread*/, id == handle_exception_nofpu_id); |
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692 break; |
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693 case handle_exception_from_callee_id: { |
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694 // At this point all registers except exception oop (RAX) and |
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695 // exception pc (RDX) are dead. |
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696 const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/) WIN64_ONLY(+ frame::arg_reg_save_area_bytes / BytesPerWord); |
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697 oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0); |
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698 sasm->set_frame_size(frame_size); |
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699 WIN64_ONLY(__ subq(rsp, frame::arg_reg_save_area_bytes)); |
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700 break; |
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701 } |
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702 default: ShouldNotReachHere(); |
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703 } |
| 0 | 704 |
| 705 #ifdef TIERED | |
| 706 // C2 can leave the fpu stack dirty | |
|
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707 if (UseSSE < 2) { |
| 0 | 708 __ empty_FPU_stack(); |
| 709 } | |
| 710 #endif // TIERED | |
| 711 | |
| 712 // verify that only rax, and rdx is valid at this time | |
| 713 __ invalidate_registers(false, true, true, false, true, true); | |
| 714 // verify that rax, contains a valid exception | |
| 715 __ verify_not_null_oop(exception_oop); | |
| 716 | |
| 717 // load address of JavaThread object for thread-local data | |
| 304 | 718 NOT_LP64(__ get_thread(thread);) |
| 0 | 719 |
| 720 #ifdef ASSERT | |
| 721 // check that fields in JavaThread for exception oop and issuing pc are | |
| 722 // empty before writing to them | |
| 723 Label oop_empty; | |
| 304 | 724 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD); |
| 0 | 725 __ jcc(Assembler::equal, oop_empty); |
| 726 __ stop("exception oop already set"); | |
| 727 __ bind(oop_empty); | |
| 728 | |
| 729 Label pc_empty; | |
| 304 | 730 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); |
| 0 | 731 __ jcc(Assembler::equal, pc_empty); |
| 732 __ stop("exception pc already set"); | |
| 733 __ bind(pc_empty); | |
| 734 #endif | |
| 735 | |
| 736 // save exception oop and issuing pc into JavaThread | |
| 737 // (exception handler will load it from here) | |
| 304 | 738 __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop); |
|
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739 __ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc); |
| 0 | 740 |
| 741 // patch throwing pc into return address (has bci & oop map) | |
| 304 | 742 __ movptr(Address(rbp, 1*BytesPerWord), exception_pc); |
| 0 | 743 |
| 744 // compute the exception handler. | |
| 745 // the exception oop and the throwing pc are read from the fields in JavaThread | |
| 746 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc)); | |
| 747 oop_maps->add_gc_map(call_offset, oop_map); | |
| 748 | |
|
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749 // rax: handler address |
| 0 | 750 // will be the deopt blob if nmethod was deoptimized while we looked up |
| 751 // handler regardless of whether handler existed in the nmethod. | |
| 752 | |
| 753 // only rax, is valid at this time, all other registers have been destroyed by the runtime call | |
| 754 __ invalidate_registers(false, true, true, true, true, true); | |
| 755 | |
|
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756 // patch the return address, this stub will directly return to the exception handler |
| 304 | 757 __ movptr(Address(rbp, 1*BytesPerWord), rax); |
| 0 | 758 |
|
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759 switch (id) { |
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760 case forward_exception_id: |
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761 case handle_exception_nofpu_id: |
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762 case handle_exception_id: |
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763 // Restore the registers that were saved at the beginning. |
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764 restore_live_registers(sasm, id == handle_exception_nofpu_id); |
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765 break; |
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766 case handle_exception_from_callee_id: |
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767 // WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP |
|
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768 // since we do a leave anyway. |
| 0 | 769 |
|
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770 // Pop the return address since we are possibly changing SP (restoring from BP). |
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771 __ leave(); |
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772 __ pop(rcx); |
| 0 | 773 |
|
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774 // Restore SP from BP if the exception PC is a method handle call site. |
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775 NOT_LP64(__ get_thread(thread);) |
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776 __ cmpl(Address(thread, JavaThread::is_method_handle_return_offset()), 0); |
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777 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
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778 __ jmp(rcx); // jump to exception handler |
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779 break; |
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780 default: ShouldNotReachHere(); |
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781 } |
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782 |
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783 return oop_maps; |
| 0 | 784 } |
| 785 | |
| 786 | |
| 787 void Runtime1::generate_unwind_exception(StubAssembler *sasm) { | |
| 788 // incoming parameters | |
| 789 const Register exception_oop = rax; | |
| 1295 | 790 // callee-saved copy of exception_oop during runtime call |
| 791 const Register exception_oop_callee_saved = NOT_LP64(rsi) LP64_ONLY(r14); | |
| 0 | 792 // other registers used in this stub |
| 793 const Register exception_pc = rdx; | |
| 794 const Register handler_addr = rbx; | |
| 304 | 795 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); |
| 0 | 796 |
| 797 // verify that only rax, is valid at this time | |
| 798 __ invalidate_registers(false, true, true, true, true, true); | |
| 799 | |
| 800 #ifdef ASSERT | |
| 801 // check that fields in JavaThread for exception oop and issuing pc are empty | |
| 304 | 802 NOT_LP64(__ get_thread(thread);) |
| 0 | 803 Label oop_empty; |
| 304 | 804 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0); |
| 0 | 805 __ jcc(Assembler::equal, oop_empty); |
| 806 __ stop("exception oop must be empty"); | |
| 807 __ bind(oop_empty); | |
| 808 | |
| 809 Label pc_empty; | |
| 304 | 810 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); |
| 0 | 811 __ jcc(Assembler::equal, pc_empty); |
| 812 __ stop("exception pc must be empty"); | |
| 813 __ bind(pc_empty); | |
| 814 #endif | |
| 815 | |
| 816 // clear the FPU stack in case any FPU results are left behind | |
| 817 __ empty_FPU_stack(); | |
| 818 | |
| 1295 | 819 // save exception_oop in callee-saved register to preserve it during runtime calls |
| 820 __ verify_not_null_oop(exception_oop); | |
| 821 __ movptr(exception_oop_callee_saved, exception_oop); | |
| 822 | |
| 823 NOT_LP64(__ get_thread(thread);) | |
| 824 // Get return address (is on top of stack after leave). | |
| 304 | 825 __ movptr(exception_pc, Address(rsp, 0)); |
| 0 | 826 |
| 1295 | 827 // search the exception handler address of the caller (using the return address) |
| 828 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc); | |
| 829 // rax: exception handler address of the caller | |
| 0 | 830 |
| 1295 | 831 // Only RAX and RSI are valid at this time, all other registers have been destroyed by the call. |
| 832 __ invalidate_registers(false, true, true, true, false, true); | |
| 0 | 833 |
| 834 // move result of call into correct register | |
| 304 | 835 __ movptr(handler_addr, rax); |
| 0 | 836 |
| 1295 | 837 // Restore exception oop to RAX (required convention of exception handler). |
| 838 __ movptr(exception_oop, exception_oop_callee_saved); | |
| 0 | 839 |
| 1295 | 840 // verify that there is really a valid exception in rax |
| 841 __ verify_not_null_oop(exception_oop); | |
| 0 | 842 |
| 843 // get throwing pc (= return address). | |
| 844 // rdx has been destroyed by the call, so it must be set again | |
| 845 // the pop is also necessary to simulate the effect of a ret(0) | |
| 304 | 846 __ pop(exception_pc); |
| 0 | 847 |
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848 // Restore SP from BP if the exception PC is a method handle call site. |
| 1295 | 849 NOT_LP64(__ get_thread(thread);) |
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850 __ cmpl(Address(thread, JavaThread::is_method_handle_return_offset()), 0); |
| 1564 | 851 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
| 0 | 852 |
| 853 // continue at exception handler (return address removed) | |
| 854 // note: do *not* remove arguments when unwinding the | |
| 855 // activation since the caller assumes having | |
| 856 // all arguments on the stack when entering the | |
| 857 // runtime to determine the exception handler | |
| 858 // (GC happens at call site with arguments!) | |
| 1295 | 859 // rax: exception oop |
| 0 | 860 // rdx: throwing pc |
| 1295 | 861 // rbx: exception handler |
| 0 | 862 __ jmp(handler_addr); |
| 863 } | |
| 864 | |
| 865 | |
| 866 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) { | |
| 867 // use the maximum number of runtime-arguments here because it is difficult to | |
| 868 // distinguish each RT-Call. | |
| 869 // Note: This number affects also the RT-Call in generate_handle_exception because | |
| 870 // the oop-map is shared for all calls. | |
| 871 const int num_rt_args = 2; // thread + dummy | |
| 872 | |
| 873 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob(); | |
| 874 assert(deopt_blob != NULL, "deoptimization blob must have been created"); | |
| 875 | |
| 876 OopMap* oop_map = save_live_registers(sasm, num_rt_args); | |
| 877 | |
| 304 | 878 #ifdef _LP64 |
| 879 const Register thread = r15_thread; | |
| 880 // No need to worry about dummy | |
| 881 __ mov(c_rarg0, thread); | |
| 882 #else | |
| 883 __ push(rax); // push dummy | |
| 0 | 884 |
| 885 const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions) | |
| 886 // push java thread (becomes first argument of C function) | |
| 887 __ get_thread(thread); | |
| 304 | 888 __ push(thread); |
| 889 #endif // _LP64 | |
| 0 | 890 __ set_last_Java_frame(thread, noreg, rbp, NULL); |
| 891 // do the call | |
| 892 __ call(RuntimeAddress(target)); | |
| 893 OopMapSet* oop_maps = new OopMapSet(); | |
| 894 oop_maps->add_gc_map(__ offset(), oop_map); | |
| 895 // verify callee-saved register | |
| 896 #ifdef ASSERT | |
| 897 guarantee(thread != rax, "change this code"); | |
| 304 | 898 __ push(rax); |
| 0 | 899 { Label L; |
| 900 __ get_thread(rax); | |
| 304 | 901 __ cmpptr(thread, rax); |
| 0 | 902 __ jcc(Assembler::equal, L); |
| 304 | 903 __ stop("StubAssembler::call_RT: rdi/r15 not callee saved?"); |
| 0 | 904 __ bind(L); |
| 905 } | |
| 304 | 906 __ pop(rax); |
| 0 | 907 #endif |
| 908 __ reset_last_Java_frame(thread, true, false); | |
| 304 | 909 #ifndef _LP64 |
| 910 __ pop(rcx); // discard thread arg | |
| 911 __ pop(rcx); // discard dummy | |
| 912 #endif // _LP64 | |
| 0 | 913 |
| 914 // check for pending exceptions | |
| 915 { Label L; | |
| 304 | 916 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
| 0 | 917 __ jcc(Assembler::equal, L); |
| 918 // exception pending => remove activation and forward to exception handler | |
| 919 | |
| 304 | 920 __ testptr(rax, rax); // have we deoptimized? |
| 0 | 921 __ jump_cc(Assembler::equal, |
| 922 RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id))); | |
| 923 | |
| 924 // the deopt blob expects exceptions in the special fields of | |
| 925 // JavaThread, so copy and clear pending exception. | |
| 926 | |
| 927 // load and clear pending exception | |
| 304 | 928 __ movptr(rax, Address(thread, Thread::pending_exception_offset())); |
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929 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); |
| 0 | 930 |
| 931 // check that there is really a valid exception | |
| 932 __ verify_not_null_oop(rax); | |
| 933 | |
| 934 // load throwing pc: this is the return address of the stub | |
| 304 | 935 __ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size)); |
| 0 | 936 |
| 937 #ifdef ASSERT | |
| 938 // check that fields in JavaThread for exception oop and issuing pc are empty | |
| 939 Label oop_empty; | |
| 304 | 940 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); |
| 0 | 941 __ jcc(Assembler::equal, oop_empty); |
| 942 __ stop("exception oop must be empty"); | |
| 943 __ bind(oop_empty); | |
| 944 | |
| 945 Label pc_empty; | |
| 304 | 946 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); |
| 0 | 947 __ jcc(Assembler::equal, pc_empty); |
| 948 __ stop("exception pc must be empty"); | |
| 949 __ bind(pc_empty); | |
| 950 #endif | |
| 951 | |
| 952 // store exception oop and throwing pc to JavaThread | |
| 304 | 953 __ movptr(Address(thread, JavaThread::exception_oop_offset()), rax); |
| 954 __ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx); | |
| 0 | 955 |
| 956 restore_live_registers(sasm); | |
| 957 | |
| 958 __ leave(); | |
| 304 | 959 __ addptr(rsp, BytesPerWord); // remove return address from stack |
| 0 | 960 |
| 961 // Forward the exception directly to deopt blob. We can blow no | |
| 962 // registers and must leave throwing pc on the stack. A patch may | |
| 963 // have values live in registers so the entry point with the | |
| 964 // exception in tls. | |
| 965 __ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls())); | |
| 966 | |
| 967 __ bind(L); | |
| 968 } | |
| 969 | |
| 970 | |
| 971 // Runtime will return true if the nmethod has been deoptimized during | |
| 972 // the patching process. In that case we must do a deopt reexecute instead. | |
| 973 | |
| 974 Label reexecuteEntry, cont; | |
| 975 | |
| 304 | 976 __ testptr(rax, rax); // have we deoptimized? |
| 0 | 977 __ jcc(Assembler::equal, cont); // no |
| 978 | |
| 979 // Will reexecute. Proper return address is already on the stack we just restore | |
| 980 // registers, pop all of our frame but the return address and jump to the deopt blob | |
| 981 restore_live_registers(sasm); | |
| 982 __ leave(); | |
| 983 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution())); | |
| 984 | |
| 985 __ bind(cont); | |
| 986 restore_live_registers(sasm); | |
| 987 __ leave(); | |
| 988 __ ret(0); | |
| 989 | |
| 990 return oop_maps; | |
| 991 } | |
| 992 | |
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993 #ifdef GRAAL |
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994 JRT_ENTRY(void, graal_create_null_exception(JavaThread* thread)) |
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995 thread->set_vm_result(Exceptions::new_exception(thread, vmSymbols::java_lang_NullPointerException(), NULL)()); |
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996 JRT_END |
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997 |
|
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998 JRT_ENTRY(void, graal_create_out_of_bounds_exception(JavaThread* thread, jint index)) |
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999 char message[jintAsStringSize]; |
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1000 sprintf(message, "%d", index); |
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1001 thread->set_vm_result(Exceptions::new_exception(thread, vmSymbols::java_lang_ArrayIndexOutOfBoundsException(), message)()); |
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1002 JRT_END |
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1003 |
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1004 JRT_ENTRY(void, graal_generic_callback(JavaThread* thread, oop _callback, oop _argument)) |
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1005 HandleMark hm; |
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1006 Handle callback(_callback); |
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1007 Handle argument(_argument); |
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1008 |
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1009 KlassHandle klass = SystemDictionary::resolve_or_null(vmSymbols::com_oracle_max_cri_ci_CiGenericCallback(), SystemDictionary::java_system_loader(), NULL, thread); |
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1010 if (klass.is_null()) { |
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1011 tty->print_cr("couldn't resolve com_oracle_max_cri_ci_CiGenericCallback"); |
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1012 } |
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1013 |
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1014 JavaValue result(T_OBJECT); |
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1015 JavaCallArguments args; |
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1016 args.push_oop(Handle(callback)); |
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1017 args.push_oop(Handle(argument)); |
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1018 JavaCalls::call_virtual(&result, klass, vmSymbols::callbackInternal_name(), vmSymbols::callback_signature(), &args, thread); |
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1019 |
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1020 thread->set_vm_result((oop) result.get_jobject()); |
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1021 JRT_END |
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1022 #endif |
| 0 | 1023 |
| 1024 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) { | |
| 1025 | |
| 1026 // for better readability | |
| 1027 const bool must_gc_arguments = true; | |
| 1028 const bool dont_gc_arguments = false; | |
| 1029 | |
| 1030 // default value; overwritten for some optimized stubs that are called from methods that do not use the fpu | |
| 1031 bool save_fpu_registers = true; | |
| 1032 | |
| 1033 // stub code & info for the different stubs | |
| 1034 OopMapSet* oop_maps = NULL; | |
| 1035 switch (id) { | |
| 1036 case forward_exception_id: | |
| 1037 { | |
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1038 oop_maps = generate_handle_exception(id, sasm); |
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1039 __ leave(); |
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1040 __ ret(0); |
| 0 | 1041 } |
| 1042 break; | |
| 1043 | |
| 1044 case new_instance_id: | |
| 1045 case fast_new_instance_id: | |
| 1046 case fast_new_instance_init_check_id: | |
| 1047 { | |
| 1048 Register klass = rdx; // Incoming | |
| 1049 Register obj = rax; // Result | |
| 1050 | |
| 1051 if (id == new_instance_id) { | |
| 1052 __ set_info("new_instance", dont_gc_arguments); | |
| 1053 } else if (id == fast_new_instance_id) { | |
| 1054 __ set_info("fast new_instance", dont_gc_arguments); | |
| 1055 } else { | |
| 1056 assert(id == fast_new_instance_init_check_id, "bad StubID"); | |
| 1057 __ set_info("fast new_instance init check", dont_gc_arguments); | |
| 1058 } | |
| 1059 | |
| 1060 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) && | |
| 1061 UseTLAB && FastTLABRefill) { | |
| 1062 Label slow_path; | |
| 1063 Register obj_size = rcx; | |
| 1064 Register t1 = rbx; | |
| 1065 Register t2 = rsi; | |
| 1066 assert_different_registers(klass, obj, obj_size, t1, t2); | |
| 1067 | |
| 304 | 1068 __ push(rdi); |
| 1069 __ push(rbx); | |
| 0 | 1070 |
| 1071 if (id == fast_new_instance_init_check_id) { | |
| 1072 // make sure the klass is initialized | |
| 4771 | 1073 __ cmpb(Address(klass, instanceKlass::init_state_offset()), instanceKlass::fully_initialized); |
| 0 | 1074 __ jcc(Assembler::notEqual, slow_path); |
| 1075 } | |
| 1076 | |
| 1077 #ifdef ASSERT | |
| 1078 // assert object can be fast path allocated | |
| 1079 { | |
| 1080 Label ok, not_ok; | |
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1081 __ movl(obj_size, Address(klass, Klass::layout_helper_offset())); |
| 0 | 1082 __ cmpl(obj_size, 0); // make sure it's an instance (LH > 0) |
| 1083 __ jcc(Assembler::lessEqual, not_ok); | |
| 1084 __ testl(obj_size, Klass::_lh_instance_slow_path_bit); | |
| 1085 __ jcc(Assembler::zero, ok); | |
| 1086 __ bind(not_ok); | |
| 1087 __ stop("assert(can be fast path allocated)"); | |
| 1088 __ should_not_reach_here(); | |
| 1089 __ bind(ok); | |
| 1090 } | |
| 1091 #endif // ASSERT | |
| 1092 | |
| 1093 // if we got here then the TLAB allocation failed, so try | |
| 1094 // refilling the TLAB or allocating directly from eden. | |
| 1095 Label retry_tlab, try_eden; | |
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1096 const Register thread = |
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1097 __ tlab_refill(retry_tlab, try_eden, slow_path); // does not destroy rdx (klass), returns rdi |
| 0 | 1098 |
| 1099 __ bind(retry_tlab); | |
| 1100 | |
| 304 | 1101 // get the instance size (size is postive so movl is fine for 64bit) |
|
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1102 __ movl(obj_size, Address(klass, Klass::layout_helper_offset())); |
|
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1103 |
| 0 | 1104 __ tlab_allocate(obj, obj_size, 0, t1, t2, slow_path); |
|
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1105 |
| 0 | 1106 __ initialize_object(obj, klass, obj_size, 0, t1, t2); |
| 1107 __ verify_oop(obj); | |
| 304 | 1108 __ pop(rbx); |
| 1109 __ pop(rdi); | |
| 0 | 1110 __ ret(0); |
| 1111 | |
| 1112 __ bind(try_eden); | |
| 304 | 1113 // get the instance size (size is postive so movl is fine for 64bit) |
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1114 __ movl(obj_size, Address(klass, Klass::layout_helper_offset())); |
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1115 |
| 0 | 1116 __ eden_allocate(obj, obj_size, 0, t1, slow_path); |
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1117 __ incr_allocated_bytes(thread, obj_size, 0); |
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1118 |
| 0 | 1119 __ initialize_object(obj, klass, obj_size, 0, t1, t2); |
| 1120 __ verify_oop(obj); | |
| 304 | 1121 __ pop(rbx); |
| 1122 __ pop(rdi); | |
| 0 | 1123 __ ret(0); |
| 1124 | |
| 1125 __ bind(slow_path); | |
| 304 | 1126 __ pop(rbx); |
| 1127 __ pop(rdi); | |
| 0 | 1128 } |
| 1129 | |
| 1130 __ enter(); | |
| 1131 OopMap* map = save_live_registers(sasm, 2); | |
| 1132 int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass); | |
| 1133 oop_maps = new OopMapSet(); | |
| 1134 oop_maps->add_gc_map(call_offset, map); | |
| 1135 restore_live_registers_except_rax(sasm); | |
| 1136 __ verify_oop(obj); | |
| 1137 __ leave(); | |
| 1138 __ ret(0); | |
| 1139 | |
| 1140 // rax,: new instance | |
| 1141 } | |
| 1142 | |
| 1143 break; | |
| 1144 | |
| 1145 case counter_overflow_id: | |
| 1146 { | |
| 1783 | 1147 Register bci = rax, method = rbx; |
| 0 | 1148 __ enter(); |
| 1783 | 1149 OopMap* map = save_live_registers(sasm, 3); |
| 0 | 1150 // Retrieve bci |
| 1151 __ movl(bci, Address(rbp, 2*BytesPerWord)); | |
| 1783 | 1152 // And a pointer to the methodOop |
| 1153 __ movptr(method, Address(rbp, 3*BytesPerWord)); | |
| 1154 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method); | |
| 0 | 1155 oop_maps = new OopMapSet(); |
| 1156 oop_maps->add_gc_map(call_offset, map); | |
| 1157 restore_live_registers(sasm); | |
| 1158 __ leave(); | |
| 1159 __ ret(0); | |
| 1160 } | |
| 1161 break; | |
| 1162 | |
| 1163 case new_type_array_id: | |
| 1164 case new_object_array_id: | |
| 1165 { | |
| 1166 Register length = rbx; // Incoming | |
| 1167 Register klass = rdx; // Incoming | |
| 1168 Register obj = rax; // Result | |
| 1169 | |
| 1170 if (id == new_type_array_id) { | |
| 1171 __ set_info("new_type_array", dont_gc_arguments); | |
| 1172 } else { | |
| 1173 __ set_info("new_object_array", dont_gc_arguments); | |
| 1174 } | |
| 1175 | |
| 1176 #ifdef ASSERT | |
| 1177 // assert object type is really an array of the proper kind | |
| 1178 { | |
| 1179 Label ok; | |
| 1180 Register t0 = obj; | |
|
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1181 __ movl(t0, Address(klass, Klass::layout_helper_offset())); |
| 0 | 1182 __ sarl(t0, Klass::_lh_array_tag_shift); |
| 1183 int tag = ((id == new_type_array_id) | |
| 1184 ? Klass::_lh_array_tag_type_value | |
| 1185 : Klass::_lh_array_tag_obj_value); | |
| 1186 __ cmpl(t0, tag); | |
| 1187 __ jcc(Assembler::equal, ok); | |
| 1188 __ stop("assert(is an array klass)"); | |
| 1189 __ should_not_reach_here(); | |
| 1190 __ bind(ok); | |
| 1191 } | |
| 1192 #endif // ASSERT | |
| 1193 | |
| 1194 if (UseTLAB && FastTLABRefill) { | |
| 1195 Register arr_size = rsi; | |
| 1196 Register t1 = rcx; // must be rcx for use as shift count | |
| 1197 Register t2 = rdi; | |
| 1198 Label slow_path; | |
| 1199 assert_different_registers(length, klass, obj, arr_size, t1, t2); | |
| 1200 | |
| 1201 // check that array length is small enough for fast path. | |
| 1202 __ cmpl(length, C1_MacroAssembler::max_array_allocation_length); | |
| 1203 __ jcc(Assembler::above, slow_path); | |
| 1204 | |
| 1205 // if we got here then the TLAB allocation failed, so try | |
| 1206 // refilling the TLAB or allocating directly from eden. | |
| 1207 Label retry_tlab, try_eden; | |
|
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1208 const Register thread = |
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1209 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves rbx & rdx, returns rdi |
| 0 | 1210 |
| 1211 __ bind(retry_tlab); | |
| 1212 | |
| 1213 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) | |
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1214 // since size is positive movl does right thing on 64bit |
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1215 __ movl(t1, Address(klass, Klass::layout_helper_offset())); |
| 304 | 1216 // since size is postive movl does right thing on 64bit |
| 0 | 1217 __ movl(arr_size, length); |
| 1218 assert(t1 == rcx, "fixed register usage"); | |
| 304 | 1219 __ shlptr(arr_size /* by t1=rcx, mod 32 */); |
| 1220 __ shrptr(t1, Klass::_lh_header_size_shift); | |
| 1221 __ andptr(t1, Klass::_lh_header_size_mask); | |
| 1222 __ addptr(arr_size, t1); | |
| 1223 __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up | |
| 1224 __ andptr(arr_size, ~MinObjAlignmentInBytesMask); | |
| 0 | 1225 |
| 1226 __ tlab_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size | |
| 1227 | |
| 1228 __ initialize_header(obj, klass, length, t1, t2); | |
|
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1229 __ movb(t1, Address(klass, in_bytes(Klass::layout_helper_offset()) + (Klass::_lh_header_size_shift / BitsPerByte))); |
| 0 | 1230 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); |
| 1231 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); | |
| 304 | 1232 __ andptr(t1, Klass::_lh_header_size_mask); |
| 1233 __ subptr(arr_size, t1); // body length | |
| 1234 __ addptr(t1, obj); // body start | |
| 0 | 1235 __ initialize_body(t1, arr_size, 0, t2); |
| 1236 __ verify_oop(obj); | |
| 1237 __ ret(0); | |
| 1238 | |
| 1239 __ bind(try_eden); | |
| 1240 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) | |
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1241 // since size is positive movl does right thing on 64bit |
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1242 __ movl(t1, Address(klass, Klass::layout_helper_offset())); |
| 304 | 1243 // since size is postive movl does right thing on 64bit |
| 0 | 1244 __ movl(arr_size, length); |
| 1245 assert(t1 == rcx, "fixed register usage"); | |
| 304 | 1246 __ shlptr(arr_size /* by t1=rcx, mod 32 */); |
| 1247 __ shrptr(t1, Klass::_lh_header_size_shift); | |
| 1248 __ andptr(t1, Klass::_lh_header_size_mask); | |
| 1249 __ addptr(arr_size, t1); | |
| 1250 __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up | |
| 1251 __ andptr(arr_size, ~MinObjAlignmentInBytesMask); | |
| 0 | 1252 |
| 1253 __ eden_allocate(obj, arr_size, 0, t1, slow_path); // preserves arr_size | |
|
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1254 __ incr_allocated_bytes(thread, arr_size, 0); |
| 0 | 1255 |
| 1256 __ initialize_header(obj, klass, length, t1, t2); | |
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1257 __ movb(t1, Address(klass, in_bytes(Klass::layout_helper_offset()) + (Klass::_lh_header_size_shift / BitsPerByte))); |
| 0 | 1258 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); |
| 1259 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); | |
| 304 | 1260 __ andptr(t1, Klass::_lh_header_size_mask); |
| 1261 __ subptr(arr_size, t1); // body length | |
| 1262 __ addptr(t1, obj); // body start | |
| 0 | 1263 __ initialize_body(t1, arr_size, 0, t2); |
| 1264 __ verify_oop(obj); | |
| 1265 __ ret(0); | |
| 1266 | |
| 1267 __ bind(slow_path); | |
| 1268 } | |
| 1269 | |
| 1270 __ enter(); | |
| 1271 OopMap* map = save_live_registers(sasm, 3); | |
| 1272 int call_offset; | |
| 1273 if (id == new_type_array_id) { | |
| 1274 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length); | |
| 1275 } else { | |
| 1276 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length); | |
| 1277 } | |
| 1278 | |
| 1279 oop_maps = new OopMapSet(); | |
| 1280 oop_maps->add_gc_map(call_offset, map); | |
| 1281 restore_live_registers_except_rax(sasm); | |
| 1282 | |
| 1283 __ verify_oop(obj); | |
| 1284 __ leave(); | |
| 1285 __ ret(0); | |
| 1286 | |
| 1287 // rax,: new array | |
| 1288 } | |
| 1289 break; | |
| 1290 | |
| 1291 case new_multi_array_id: | |
| 1292 { StubFrame f(sasm, "new_multi_array", dont_gc_arguments); | |
| 1293 // rax,: klass | |
| 1294 // rbx,: rank | |
| 1295 // rcx: address of 1st dimension | |
| 1296 OopMap* map = save_live_registers(sasm, 4); | |
| 1297 int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx); | |
| 1298 | |
| 1299 oop_maps = new OopMapSet(); | |
| 1300 oop_maps->add_gc_map(call_offset, map); | |
| 1301 restore_live_registers_except_rax(sasm); | |
| 1302 | |
| 1303 // rax,: new multi array | |
| 1304 __ verify_oop(rax); | |
| 1305 } | |
| 1306 break; | |
| 1307 | |
| 1308 case register_finalizer_id: | |
| 1309 { | |
| 1310 __ set_info("register_finalizer", dont_gc_arguments); | |
| 1311 | |
| 304 | 1312 // This is called via call_runtime so the arguments |
| 1313 // will be place in C abi locations | |
| 1314 | |
| 1315 #ifdef _LP64 | |
|
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1316 #ifdef GRAAL |
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1317 __ verify_oop(j_rarg0); |
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1318 __ mov(rax, j_rarg0); |
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1319 #else |
| 304 | 1320 __ verify_oop(c_rarg0); |
| 1321 __ mov(rax, c_rarg0); | |
|
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1322 #endif |
| 304 | 1323 #else |
| 0 | 1324 // The object is passed on the stack and we haven't pushed a |
| 1325 // frame yet so it's one work away from top of stack. | |
| 304 | 1326 __ movptr(rax, Address(rsp, 1 * BytesPerWord)); |
| 0 | 1327 __ verify_oop(rax); |
| 304 | 1328 #endif // _LP64 |
| 0 | 1329 |
| 1330 // load the klass and check the has finalizer flag | |
| 1331 Label register_finalizer; | |
| 1332 Register t = rsi; | |
| 2002 | 1333 __ load_klass(t, rax); |
|
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1334 __ movl(t, Address(t, Klass::access_flags_offset())); |
| 0 | 1335 __ testl(t, JVM_ACC_HAS_FINALIZER); |
| 1336 __ jcc(Assembler::notZero, register_finalizer); | |
| 1337 __ ret(0); | |
| 1338 | |
| 1339 __ bind(register_finalizer); | |
| 1340 __ enter(); | |
| 1341 OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */); | |
| 1342 int call_offset = __ call_RT(noreg, noreg, | |
| 1343 CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax); | |
| 1344 oop_maps = new OopMapSet(); | |
| 1345 oop_maps->add_gc_map(call_offset, oop_map); | |
| 1346 | |
| 1347 // Now restore all the live registers | |
| 1348 restore_live_registers(sasm); | |
| 1349 | |
| 1350 __ leave(); | |
| 1351 __ ret(0); | |
| 1352 } | |
| 1353 break; | |
| 1354 | |
| 1355 case throw_range_check_failed_id: | |
| 1356 { StubFrame f(sasm, "range_check_failed", dont_gc_arguments); | |
| 1357 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true); | |
| 1358 } | |
| 1359 break; | |
| 1360 | |
| 1361 case throw_index_exception_id: | |
| 1362 { StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments); | |
| 1363 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true); | |
| 1364 } | |
| 1365 break; | |
| 1366 | |
| 1367 case throw_div0_exception_id: | |
| 1368 { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments); | |
| 1369 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false); | |
| 1370 } | |
| 1371 break; | |
| 1372 | |
| 1373 case throw_null_pointer_exception_id: | |
| 1374 { StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments); | |
| 1375 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false); | |
| 1376 } | |
| 1377 break; | |
| 1378 | |
| 1379 case handle_exception_nofpu_id: | |
| 1380 case handle_exception_id: | |
| 1381 { StubFrame f(sasm, "handle_exception", dont_gc_arguments); | |
|
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1382 oop_maps = generate_handle_exception(id, sasm); |
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1383 } |
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1384 break; |
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1385 |
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1386 case handle_exception_from_callee_id: |
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1387 { StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments); |
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1388 oop_maps = generate_handle_exception(id, sasm); |
| 0 | 1389 } |
| 1390 break; | |
| 1391 | |
| 1392 case unwind_exception_id: | |
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1393 { __ set_info("unwind_exception", dont_gc_arguments); |
| 0 | 1394 // note: no stubframe since we are about to leave the current |
| 1395 // activation and we are calling a leaf VM function only. | |
| 1396 generate_unwind_exception(sasm); | |
| 1397 } | |
| 1398 break; | |
| 1399 | |
| 1400 case throw_array_store_exception_id: | |
| 1401 { StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments); | |
| 1402 // tos + 0: link | |
| 1403 // + 1: return address | |
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1404 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true); |
| 0 | 1405 } |
| 1406 break; | |
| 1407 | |
| 1408 case throw_class_cast_exception_id: | |
| 1409 { StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments); | |
| 1410 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true); | |
| 1411 } | |
| 1412 break; | |
| 1413 | |
| 1414 case throw_incompatible_class_change_error_id: | |
| 1415 { StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments); | |
| 1416 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false); | |
| 1417 } | |
| 1418 break; | |
| 1419 | |
| 1420 case slow_subtype_check_id: | |
| 1421 { | |
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1422 // Typical calling sequence: |
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1423 // __ push(klass_RInfo); // object klass or other subclass |
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1424 // __ push(sup_k_RInfo); // array element klass or other superclass |
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1425 // __ call(slow_subtype_check); |
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1426 // Note that the subclass is pushed first, and is therefore deepest. |
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1427 // Previous versions of this code reversed the names 'sub' and 'super'. |
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1428 // This was operationally harmless but made the code unreadable. |
| 0 | 1429 enum layout { |
| 304 | 1430 rax_off, SLOT2(raxH_off) |
| 1431 rcx_off, SLOT2(rcxH_off) | |
| 1432 rsi_off, SLOT2(rsiH_off) | |
| 1433 rdi_off, SLOT2(rdiH_off) | |
| 1434 // saved_rbp_off, SLOT2(saved_rbpH_off) | |
| 1435 return_off, SLOT2(returnH_off) | |
|
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1436 sup_k_off, SLOT2(sup_kH_off) |
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1437 klass_off, SLOT2(superH_off) |
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1438 framesize, |
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1439 result_off = klass_off // deepest argument is also the return value |
| 0 | 1440 }; |
| 1441 | |
| 1442 __ set_info("slow_subtype_check", dont_gc_arguments); | |
| 304 | 1443 __ push(rdi); |
| 1444 __ push(rsi); | |
| 1445 __ push(rcx); | |
| 1446 __ push(rax); | |
| 0 | 1447 |
| 304 | 1448 // This is called by pushing args and not with C abi |
|
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1449 __ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass |
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1450 __ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass |
| 0 | 1451 |
| 1452 Label miss; | |
|
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1453 #ifdef GRAAL |
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1454 Label success; |
|
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1455 __ check_klass_subtype_fast_path(rsi, rax, rcx, &success, &miss, NULL); |
|
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1456 #endif |
|
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1457 |
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1458 __ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, NULL, &miss); |
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1459 |
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1460 // fallthrough on success: |
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1461 #ifdef GRAAL |
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1462 __ bind(success); |
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1463 #endif |
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1464 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result |
| 304 | 1465 __ pop(rax); |
| 1466 __ pop(rcx); | |
| 1467 __ pop(rsi); | |
| 1468 __ pop(rdi); | |
| 0 | 1469 __ ret(0); |
| 1470 | |
| 1471 __ bind(miss); | |
|
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1472 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result |
| 304 | 1473 __ pop(rax); |
| 1474 __ pop(rcx); | |
| 1475 __ pop(rsi); | |
| 1476 __ pop(rdi); | |
| 0 | 1477 __ ret(0); |
| 1478 } | |
| 1479 break; | |
| 1480 | |
| 1481 case monitorenter_nofpu_id: | |
| 1482 save_fpu_registers = false; | |
| 1483 // fall through | |
| 1484 case monitorenter_id: | |
| 1485 { | |
| 1486 StubFrame f(sasm, "monitorenter", dont_gc_arguments); | |
| 1487 OopMap* map = save_live_registers(sasm, 3, save_fpu_registers); | |
| 1488 | |
| 304 | 1489 // Called with store_parameter and not C abi |
| 1490 | |
| 0 | 1491 f.load_argument(1, rax); // rax,: object |
| 1492 f.load_argument(0, rbx); // rbx,: lock address | |
| 1493 | |
| 1494 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx); | |
| 1495 | |
| 1496 oop_maps = new OopMapSet(); | |
| 1497 oop_maps->add_gc_map(call_offset, map); | |
| 1498 restore_live_registers(sasm, save_fpu_registers); | |
| 1499 } | |
| 1500 break; | |
| 1501 | |
| 1502 case monitorexit_nofpu_id: | |
| 1503 save_fpu_registers = false; | |
| 1504 // fall through | |
| 1505 case monitorexit_id: | |
| 1506 { | |
| 1507 StubFrame f(sasm, "monitorexit", dont_gc_arguments); | |
| 1508 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers); | |
| 1509 | |
| 304 | 1510 // Called with store_parameter and not C abi |
| 1511 | |
| 0 | 1512 f.load_argument(0, rax); // rax,: lock address |
| 1513 | |
| 1514 // note: really a leaf routine but must setup last java sp | |
| 1515 // => use call_RT for now (speed can be improved by | |
| 1516 // doing last java sp setup manually) | |
| 1517 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax); | |
| 1518 | |
| 1519 oop_maps = new OopMapSet(); | |
| 1520 oop_maps->add_gc_map(call_offset, map); | |
| 1521 restore_live_registers(sasm, save_fpu_registers); | |
|
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1522 } |
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1523 break; |
| 0 | 1524 |
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1525 case deoptimize_id: |
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1526 { |
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1527 StubFrame f(sasm, "deoptimize", dont_gc_arguments); |
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1528 const int num_rt_args = 1; // thread |
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1529 OopMap* oop_map = save_live_registers(sasm, num_rt_args); |
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1530 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize)); |
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1531 oop_maps = new OopMapSet(); |
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1532 oop_maps->add_gc_map(call_offset, oop_map); |
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1533 restore_live_registers(sasm); |
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1534 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob(); |
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1535 assert(deopt_blob != NULL, "deoptimization blob must have been created"); |
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1536 __ leave(); |
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1537 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution())); |
| 0 | 1538 } |
| 1539 break; | |
| 1540 | |
| 1541 case access_field_patching_id: | |
| 1542 { StubFrame f(sasm, "access_field_patching", dont_gc_arguments); | |
| 1543 // we should set up register map | |
| 1544 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching)); | |
| 1545 } | |
| 1546 break; | |
| 1547 | |
| 1548 case load_klass_patching_id: | |
| 1549 { StubFrame f(sasm, "load_klass_patching", dont_gc_arguments); | |
| 1550 // we should set up register map | |
| 1551 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching)); | |
| 1552 } | |
| 1553 break; | |
| 1554 | |
| 1555 case dtrace_object_alloc_id: | |
| 1556 { // rax,: object | |
| 1557 StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments); | |
| 1558 // we can't gc here so skip the oopmap but make sure that all | |
| 1559 // the live registers get saved. | |
| 1560 save_live_registers(sasm, 1); | |
| 1561 | |
| 304 | 1562 __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax)); |
| 0 | 1563 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc))); |
| 304 | 1564 NOT_LP64(__ pop(rax)); |
| 0 | 1565 |
| 1566 restore_live_registers(sasm); | |
| 1567 } | |
| 1568 break; | |
| 1569 | |
| 1570 case fpu2long_stub_id: | |
| 1571 { | |
| 1572 // rax, and rdx are destroyed, but should be free since the result is returned there | |
| 1573 // preserve rsi,ecx | |
| 304 | 1574 __ push(rsi); |
| 1575 __ push(rcx); | |
| 1576 LP64_ONLY(__ push(rdx);) | |
| 0 | 1577 |
| 1578 // check for NaN | |
| 1579 Label return0, do_return, return_min_jlong, do_convert; | |
| 1580 | |
| 304 | 1581 Address value_high_word(rsp, wordSize + 4); |
| 1582 Address value_low_word(rsp, wordSize); | |
| 1583 Address result_high_word(rsp, 3*wordSize + 4); | |
| 1584 Address result_low_word(rsp, 3*wordSize); | |
| 0 | 1585 |
| 304 | 1586 __ subptr(rsp, 32); // more than enough on 32bit |
| 0 | 1587 __ fst_d(value_low_word); |
| 1588 __ movl(rax, value_high_word); | |
| 1589 __ andl(rax, 0x7ff00000); | |
| 1590 __ cmpl(rax, 0x7ff00000); | |
| 1591 __ jcc(Assembler::notEqual, do_convert); | |
| 1592 __ movl(rax, value_high_word); | |
| 1593 __ andl(rax, 0xfffff); | |
| 1594 __ orl(rax, value_low_word); | |
| 1595 __ jcc(Assembler::notZero, return0); | |
| 1596 | |
| 1597 __ bind(do_convert); | |
| 1598 __ fnstcw(Address(rsp, 0)); | |
| 304 | 1599 __ movzwl(rax, Address(rsp, 0)); |
| 0 | 1600 __ orl(rax, 0xc00); |
| 1601 __ movw(Address(rsp, 2), rax); | |
| 1602 __ fldcw(Address(rsp, 2)); | |
| 1603 __ fwait(); | |
| 1604 __ fistp_d(result_low_word); | |
| 1605 __ fldcw(Address(rsp, 0)); | |
| 1606 __ fwait(); | |
| 304 | 1607 // This gets the entire long in rax on 64bit |
| 1608 __ movptr(rax, result_low_word); | |
| 1609 // testing of high bits | |
| 0 | 1610 __ movl(rdx, result_high_word); |
| 304 | 1611 __ mov(rcx, rax); |
| 0 | 1612 // What the heck is the point of the next instruction??? |
| 1613 __ xorl(rcx, 0x0); | |
| 1614 __ movl(rsi, 0x80000000); | |
| 1615 __ xorl(rsi, rdx); | |
| 1616 __ orl(rcx, rsi); | |
| 1617 __ jcc(Assembler::notEqual, do_return); | |
| 1618 __ fldz(); | |
| 1619 __ fcomp_d(value_low_word); | |
| 1620 __ fnstsw_ax(); | |
| 304 | 1621 #ifdef _LP64 |
| 1622 __ testl(rax, 0x4100); // ZF & CF == 0 | |
| 1623 __ jcc(Assembler::equal, return_min_jlong); | |
| 1624 #else | |
| 0 | 1625 __ sahf(); |
| 1626 __ jcc(Assembler::above, return_min_jlong); | |
| 304 | 1627 #endif // _LP64 |
| 0 | 1628 // return max_jlong |
| 304 | 1629 #ifndef _LP64 |
| 0 | 1630 __ movl(rdx, 0x7fffffff); |
| 1631 __ movl(rax, 0xffffffff); | |
| 304 | 1632 #else |
| 1633 __ mov64(rax, CONST64(0x7fffffffffffffff)); | |
| 1634 #endif // _LP64 | |
| 0 | 1635 __ jmp(do_return); |
| 1636 | |
| 1637 __ bind(return_min_jlong); | |
| 304 | 1638 #ifndef _LP64 |
| 0 | 1639 __ movl(rdx, 0x80000000); |
| 1640 __ xorl(rax, rax); | |
| 304 | 1641 #else |
| 1642 __ mov64(rax, CONST64(0x8000000000000000)); | |
| 1643 #endif // _LP64 | |
| 0 | 1644 __ jmp(do_return); |
| 1645 | |
| 1646 __ bind(return0); | |
| 1647 __ fpop(); | |
| 304 | 1648 #ifndef _LP64 |
| 1649 __ xorptr(rdx,rdx); | |
| 1650 __ xorptr(rax,rax); | |
| 1651 #else | |
| 1652 __ xorptr(rax, rax); | |
| 1653 #endif // _LP64 | |
| 0 | 1654 |
| 1655 __ bind(do_return); | |
| 304 | 1656 __ addptr(rsp, 32); |
| 1657 LP64_ONLY(__ pop(rdx);) | |
| 1658 __ pop(rcx); | |
| 1659 __ pop(rsi); | |
| 0 | 1660 __ ret(0); |
| 1661 } | |
| 1662 break; | |
| 1663 | |
| 342 | 1664 #ifndef SERIALGC |
| 1665 case g1_pre_barrier_slow_id: | |
| 1666 { | |
| 1667 StubFrame f(sasm, "g1_pre_barrier", dont_gc_arguments); | |
| 1668 // arg0 : previous value of memory | |
| 1669 | |
| 1670 BarrierSet* bs = Universe::heap()->barrier_set(); | |
| 1671 if (bs->kind() != BarrierSet::G1SATBCTLogging) { | |
| 362 | 1672 __ movptr(rax, (int)id); |
| 342 | 1673 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax); |
| 1674 __ should_not_reach_here(); | |
| 1675 break; | |
| 1676 } | |
| 362 | 1677 __ push(rax); |
| 1678 __ push(rdx); | |
| 342 | 1679 |
| 1680 const Register pre_val = rax; | |
| 362 | 1681 const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread); |
| 342 | 1682 const Register tmp = rdx; |
| 1683 | |
| 362 | 1684 NOT_LP64(__ get_thread(thread);) |
| 342 | 1685 |
| 1686 Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() + | |
| 1687 PtrQueue::byte_offset_of_active())); | |
| 1688 | |
| 1689 Address queue_index(thread, in_bytes(JavaThread::satb_mark_queue_offset() + | |
| 1690 PtrQueue::byte_offset_of_index())); | |
| 1691 Address buffer(thread, in_bytes(JavaThread::satb_mark_queue_offset() + | |
| 1692 PtrQueue::byte_offset_of_buf())); | |
| 1693 | |
| 1694 | |
| 1695 Label done; | |
| 1696 Label runtime; | |
| 1697 | |
| 1698 // Can we store original value in the thread's buffer? | |
| 1699 | |
| 362 | 1700 #ifdef _LP64 |
| 1572 | 1701 __ movslq(tmp, queue_index); |
| 362 | 1702 __ cmpq(tmp, 0); |
| 1703 #else | |
| 342 | 1704 __ cmpl(queue_index, 0); |
| 362 | 1705 #endif |
| 342 | 1706 __ jcc(Assembler::equal, runtime); |
| 362 | 1707 #ifdef _LP64 |
| 1708 __ subq(tmp, wordSize); | |
| 1709 __ movl(queue_index, tmp); | |
| 1710 __ addq(tmp, buffer); | |
| 1711 #else | |
| 342 | 1712 __ subl(queue_index, wordSize); |
| 1713 __ movl(tmp, buffer); | |
| 1714 __ addl(tmp, queue_index); | |
| 362 | 1715 #endif |
| 1716 | |
| 342 | 1717 // prev_val (rax) |
| 1718 f.load_argument(0, pre_val); | |
| 362 | 1719 __ movptr(Address(tmp, 0), pre_val); |
| 342 | 1720 __ jmp(done); |
| 1721 | |
| 1722 __ bind(runtime); | |
| 1572 | 1723 __ push(rcx); |
| 1724 #ifdef _LP64 | |
| 1725 __ push(r8); | |
| 1726 __ push(r9); | |
| 1727 __ push(r10); | |
| 1728 __ push(r11); | |
| 1729 # ifndef _WIN64 | |
| 1730 __ push(rdi); | |
| 1731 __ push(rsi); | |
| 1732 # endif | |
| 1733 #endif | |
| 342 | 1734 // load the pre-value |
| 1735 f.load_argument(0, rcx); | |
| 1736 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), rcx, thread); | |
| 1572 | 1737 #ifdef _LP64 |
| 1738 # ifndef _WIN64 | |
| 1739 __ pop(rsi); | |
| 1740 __ pop(rdi); | |
| 1741 # endif | |
| 1742 __ pop(r11); | |
| 1743 __ pop(r10); | |
| 1744 __ pop(r9); | |
| 1745 __ pop(r8); | |
| 1746 #endif | |
| 362 | 1747 __ pop(rcx); |
| 1572 | 1748 __ bind(done); |
| 342 | 1749 |
| 362 | 1750 __ pop(rdx); |
| 1751 __ pop(rax); | |
| 342 | 1752 } |
| 1753 break; | |
| 1754 | |
| 1755 case g1_post_barrier_slow_id: | |
| 1756 { | |
| 1757 StubFrame f(sasm, "g1_post_barrier", dont_gc_arguments); | |
| 1758 | |
| 1759 | |
| 1760 // arg0: store_address | |
| 1761 Address store_addr(rbp, 2*BytesPerWord); | |
| 1762 | |
| 1763 BarrierSet* bs = Universe::heap()->barrier_set(); | |
| 1764 CardTableModRefBS* ct = (CardTableModRefBS*)bs; | |
| 1765 Label done; | |
| 1766 Label runtime; | |
| 1767 | |
| 1768 // At this point we know new_value is non-NULL and the new_value crosses regsion. | |
| 1769 // Must check to see if card is already dirty | |
| 1770 | |
| 362 | 1771 const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread); |
| 342 | 1772 |
| 1773 Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() + | |
| 1774 PtrQueue::byte_offset_of_index())); | |
| 1775 Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() + | |
| 1776 PtrQueue::byte_offset_of_buf())); | |
| 1777 | |
| 362 | 1778 __ push(rax); |
| 1572 | 1779 __ push(rcx); |
| 342 | 1780 |
| 362 | 1781 NOT_LP64(__ get_thread(thread);) |
| 1782 ExternalAddress cardtable((address)ct->byte_map_base); | |
| 342 | 1783 assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); |
| 1784 | |
| 1572 | 1785 const Register card_addr = rcx; |
| 362 | 1786 #ifdef _LP64 |
| 1787 const Register tmp = rscratch1; | |
| 1788 f.load_argument(0, card_addr); | |
| 1789 __ shrq(card_addr, CardTableModRefBS::card_shift); | |
| 1790 __ lea(tmp, cardtable); | |
| 1791 // get the address of the card | |
| 1792 __ addq(card_addr, tmp); | |
| 1793 #else | |
| 1572 | 1794 const Register card_index = rcx; |
| 362 | 1795 f.load_argument(0, card_index); |
| 1796 __ shrl(card_index, CardTableModRefBS::card_shift); | |
| 1797 | |
| 342 | 1798 Address index(noreg, card_index, Address::times_1); |
| 1799 __ leal(card_addr, __ as_Address(ArrayAddress(cardtable, index))); | |
| 362 | 1800 #endif |
| 1801 | |
| 342 | 1802 __ cmpb(Address(card_addr, 0), 0); |
| 1803 __ jcc(Assembler::equal, done); | |
| 1804 | |
| 1805 // storing region crossing non-NULL, card is clean. | |
| 1806 // dirty card and log. | |
| 1807 | |
| 1808 __ movb(Address(card_addr, 0), 0); | |
| 1809 | |
| 1810 __ cmpl(queue_index, 0); | |
| 1811 __ jcc(Assembler::equal, runtime); | |
| 1812 __ subl(queue_index, wordSize); | |
| 1813 | |
| 1814 const Register buffer_addr = rbx; | |
| 362 | 1815 __ push(rbx); |
| 1816 | |
| 1817 __ movptr(buffer_addr, buffer); | |
| 342 | 1818 |
| 362 | 1819 #ifdef _LP64 |
| 1820 __ movslq(rscratch1, queue_index); | |
| 1821 __ addptr(buffer_addr, rscratch1); | |
| 1822 #else | |
| 1823 __ addptr(buffer_addr, queue_index); | |
| 1824 #endif | |
| 1825 __ movptr(Address(buffer_addr, 0), card_addr); | |
| 1826 | |
| 1827 __ pop(rbx); | |
| 342 | 1828 __ jmp(done); |
| 1829 | |
| 1830 __ bind(runtime); | |
| 1572 | 1831 __ push(rdx); |
| 1832 #ifdef _LP64 | |
| 1833 __ push(r8); | |
| 1834 __ push(r9); | |
| 1835 __ push(r10); | |
| 1836 __ push(r11); | |
| 1837 # ifndef _WIN64 | |
| 1838 __ push(rdi); | |
| 1839 __ push(rsi); | |
| 1840 # endif | |
| 1841 #endif | |
| 342 | 1842 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread); |
| 1572 | 1843 #ifdef _LP64 |
| 1844 # ifndef _WIN64 | |
| 1845 __ pop(rsi); | |
| 1846 __ pop(rdi); | |
| 1847 # endif | |
| 1848 __ pop(r11); | |
| 1849 __ pop(r10); | |
| 1850 __ pop(r9); | |
| 1851 __ pop(r8); | |
| 1852 #endif | |
| 1853 __ pop(rdx); | |
| 1854 __ bind(done); | |
| 342 | 1855 |
| 1572 | 1856 __ pop(rcx); |
| 362 | 1857 __ pop(rax); |
| 342 | 1858 |
| 1859 } | |
| 1860 break; | |
| 1861 #endif // !SERIALGC | |
|
4976
8f01f899bccd
More GRAAL #ifdef; ignore graal directory on windows for client/server configuration.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
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|
1862 #ifdef GRAAL |
|
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Rebranded C++ part from C1X to Graal.
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|
1863 case graal_unwind_exception_call_id: { |
|
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72cfb36c6bb2
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diff
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|
1864 // remove the frame from the stack |
|
72cfb36c6bb2
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|
1865 __ movptr(rsp, rbp); |
|
72cfb36c6bb2
* enabled all jtt tests
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|
1866 __ pop(rbp); |
|
72cfb36c6bb2
* enabled all jtt tests
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|
1867 // exception_oop is passed using ordinary java calling conventions |
|
72cfb36c6bb2
* enabled all jtt tests
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|
1868 __ movptr(rax, j_rarg0); |
|
72cfb36c6bb2
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diff
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|
1869 |
|
72cfb36c6bb2
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|
1870 Label nonNullExceptionOop; |
|
72cfb36c6bb2
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|
1871 __ testptr(rax, rax); |
|
72cfb36c6bb2
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|
1872 __ jcc(Assembler::notZero, nonNullExceptionOop); |
|
1429
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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diff
changeset
|
1873 { |
|
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72cfb36c6bb2
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|
1874 __ enter(); |
|
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diff
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|
1875 oop_maps = new OopMapSet(); |
|
72cfb36c6bb2
* enabled all jtt tests
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|
1876 OopMap* oop_map = save_live_registers(sasm, 0); |
|
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
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diff
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|
1877 int call_offset = __ call_RT(rax, noreg, (address)graal_create_null_exception, 0); |
|
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72cfb36c6bb2
* enabled all jtt tests
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|
1878 oop_maps->add_gc_map(call_offset, oop_map); |
|
72cfb36c6bb2
* enabled all jtt tests
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diff
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|
1879 __ leave(); |
|
72cfb36c6bb2
* enabled all jtt tests
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|
1880 } |
|
72cfb36c6bb2
* enabled all jtt tests
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|
1881 __ bind(nonNullExceptionOop); |
|
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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diff
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|
1882 |
|
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|
1883 __ set_info("unwind_exception", dont_gc_arguments); |
|
72cfb36c6bb2
* enabled all jtt tests
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|
1884 // note: no stubframe since we are about to leave the current |
|
72cfb36c6bb2
* enabled all jtt tests
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|
1885 // activation and we are calling a leaf VM function only. |
|
72cfb36c6bb2
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diff
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|
1886 generate_unwind_exception(sasm); |
|
72cfb36c6bb2
* enabled all jtt tests
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|
1887 __ should_not_reach_here(); |
|
72cfb36c6bb2
* enabled all jtt tests
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diff
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|
1888 break; |
|
72cfb36c6bb2
* enabled all jtt tests
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|
1889 } |
|
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
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diff
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|
1890 |
|
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bc95d122df79
added runtime call to supply info upon deoptimization
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diff
changeset
|
1891 case graal_set_deopt_info_id: { |
|
bc95d122df79
added runtime call to supply info upon deoptimization
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3538
diff
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|
1892 __ movptr(Address(r15_thread, JavaThread::graal_deopt_info_offset()), rscratch1); |
|
bc95d122df79
added runtime call to supply info upon deoptimization
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|
1893 __ ret(0); |
|
bc95d122df79
added runtime call to supply info upon deoptimization
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|
1894 break; |
|
bc95d122df79
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|
1895 } |
|
bc95d122df79
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|
1896 |
|
3538
e4616e3d207b
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diff
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|
1897 case graal_create_null_pointer_exception_id: { |
|
e4616e3d207b
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|
1898 __ enter(); |
|
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|
1899 oop_maps = new OopMapSet(); |
|
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|
1900 OopMap* oop_map = save_live_registers(sasm, 0); |
|
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3509
diff
changeset
|
1901 int call_offset = __ call_RT(rax, noreg, (address)graal_create_null_exception, 0); |
|
e4616e3d207b
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|
1902 oop_maps->add_gc_map(call_offset, oop_map); |
|
e4616e3d207b
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|
1903 __ leave(); |
|
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|
1904 __ ret(0); |
|
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|
1905 break; |
|
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|
1906 } |
|
e4616e3d207b
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|
1907 |
|
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|
1908 case graal_create_out_of_bounds_exception_id: { |
|
e4616e3d207b
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|
1909 __ enter(); |
|
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support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
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changeset
|
1910 oop_maps = new OopMapSet(); |
|
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
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changeset
|
1911 OopMap* oop_map = save_live_registers(sasm, 0); |
|
e4616e3d207b
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diff
changeset
|
1912 int call_offset = __ call_RT(rax, noreg, (address)graal_create_out_of_bounds_exception, c_rarg0); |
|
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
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|
1913 oop_maps->add_gc_map(call_offset, oop_map); |
|
e4616e3d207b
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1914 __ leave(); |
|
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changeset
|
1915 __ ret(0); |
|
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
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|
1916 break; |
|
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|
1917 } |
|
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1918 |
|
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|
1919 case graal_generic_callback_id: { |
|
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1920 __ enter(); |
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|
1921 oop_maps = new OopMapSet(); |
|
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
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|
1922 OopMap* oop_map = save_live_registers(sasm, 0); |
|
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
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|
1923 int call_offset = __ call_RT(rax, noreg, (address)graal_generic_callback, j_rarg0, j_rarg1); |
|
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
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changeset
|
1924 oop_maps->add_gc_map(call_offset, oop_map); |
|
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
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|
1925 __ leave(); |
|
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implement generic callback mechanism (CiGenericCallback)
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changeset
|
1926 __ ret(0); |
|
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
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|
1927 break; |
|
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
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|
1928 } |
|
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implement generic callback mechanism (CiGenericCallback)
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|
1929 |
|
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Rebranded C++ part from C1X to Graal.
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|
1930 case graal_slow_subtype_check_id: { |
|
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1931 Label success; |
|
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1932 Label miss; |
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|
1933 |
|
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|
1934 // TODO this should really be within the XirSnippets |
|
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|
1935 __ check_klass_subtype_fast_path(j_rarg0, j_rarg1, j_rarg2, &success, &miss, NULL); |
|
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|
1936 __ check_klass_subtype_slow_path(j_rarg0, j_rarg1, j_rarg2, j_rarg3, NULL, &miss); |
|
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|
1937 |
|
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|
1938 // fallthrough on success: |
|
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1939 __ bind(success); |
|
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|
1940 __ movptr(rax, 1); |
|
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|
1941 __ ret(0); |
|
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|
1942 |
|
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|
1943 __ bind(miss); |
|
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|
1944 __ movptr(rax, NULL_WORD); |
|
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|
1945 __ ret(0); |
|
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|
1946 break; |
|
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|
1947 } |
|
1429
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* -XX:TraceC1X=0...5 controls the native c1x tracing
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changeset
|
1948 |
|
2891
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Rebranded C++ part from C1X to Graal.
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changeset
|
1949 case graal_verify_pointer_id: { |
|
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Rebranded C++ part from C1X to Graal.
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diff
changeset
|
1950 __ verify_oop(r13, "graal verify pointer"); |
|
1449
8cfe3537a0d3
Pointer verification stub. Two loose oop fixes in C1X C++ part. Logging which methods have been compiled.
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1434
diff
changeset
|
1951 __ ret(0); |
|
8cfe3537a0d3
Pointer verification stub. Two loose oop fixes in C1X C++ part. Logging which methods have been compiled.
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changeset
|
1952 break; |
|
8cfe3537a0d3
Pointer verification stub. Two loose oop fixes in C1X C++ part. Logging which methods have been compiled.
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1953 } |
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8cfe3537a0d3
Pointer verification stub. Two loose oop fixes in C1X C++ part. Logging which methods have been compiled.
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|
1954 |
|
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Rebranded C++ part from C1X to Graal.
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1955 case graal_arithmetic_frem_id: { |
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1956 __ subptr(rsp, 8); |
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1957 __ movflt(Address(rsp, 0), xmm1); |
|
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1958 __ fld_s(Address(rsp, 0)); |
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1959 __ movflt(Address(rsp, 0), xmm0); |
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1960 __ fld_s(Address(rsp, 0)); |
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1961 Label L; |
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1962 __ bind(L); |
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1963 __ fprem(); |
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1964 __ fwait(); |
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1965 __ fnstsw_ax(); |
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1966 __ testl(rax, 0x400); |
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1967 __ jcc(Assembler::notZero, L); |
|
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1968 __ fxch(1); |
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1969 __ fpop(); |
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1970 __ fstp_s(Address(rsp, 0)); |
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1971 __ movflt(xmm0, Address(rsp, 0)); |
|
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1972 __ addptr(rsp, 8); |
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1973 __ ret(0); |
|
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1974 break; |
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1975 } |
|
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Rebranded C++ part from C1X to Graal.
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parents:
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|
1976 case graal_arithmetic_drem_id: { |
|
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1977 __ subptr(rsp, 8); |
|
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1978 __ movdbl(Address(rsp, 0), xmm1); |
|
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1979 __ fld_d(Address(rsp, 0)); |
|
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1980 __ movdbl(Address(rsp, 0), xmm0); |
|
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1981 __ fld_d(Address(rsp, 0)); |
|
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1982 Label L; |
|
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1983 __ bind(L); |
|
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|
1984 __ fprem(); |
|
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|
1985 __ fwait(); |
|
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|
1986 __ fnstsw_ax(); |
|
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1987 __ testl(rax, 0x400); |
|
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|
1988 __ jcc(Assembler::notZero, L); |
|
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|
1989 __ fxch(1); |
|
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|
1990 __ fpop(); |
|
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|
1991 __ fstp_d(Address(rsp, 0)); |
|
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|
1992 __ movdbl(xmm0, Address(rsp, 0)); |
|
72cfb36c6bb2
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|
1993 __ addptr(rsp, 8); |
|
72cfb36c6bb2
* enabled all jtt tests
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|
1994 __ ret(0); |
|
72cfb36c6bb2
* enabled all jtt tests
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|
1995 break; |
|
72cfb36c6bb2
* enabled all jtt tests
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|
1996 } |
|
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
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diff
changeset
|
1997 case graal_monitorenter_id: { |
|
1434
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* enabled all jtt tests
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|
1998 Label slow_case; |
|
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* enabled all jtt tests
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|
1999 |
|
72cfb36c6bb2
* enabled all jtt tests
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changeset
|
2000 Register obj = j_rarg0; |
|
72cfb36c6bb2
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|
2001 Register lock = j_rarg1; |
|
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|
2002 |
|
72cfb36c6bb2
* enabled all jtt tests
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|
2003 Register scratch1 = rax; |
|
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* enabled all jtt tests
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|
2004 Register scratch2 = rbx; |
|
1942
00bc9eaf0e24
Support for -XX:+UseFastLocking flag. Fixed monitor enter XIR template for correct debug info at the runtime call.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1930
diff
changeset
|
2005 assert_different_registers(obj, lock, scratch1, scratch2); |
|
1434
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diff
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|
2006 |
|
72cfb36c6bb2
* enabled all jtt tests
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diff
changeset
|
2007 // copied from LIR_Assembler::emit_lock |
|
72cfb36c6bb2
* enabled all jtt tests
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changeset
|
2008 if (UseFastLocking) { |
|
72cfb36c6bb2
* enabled all jtt tests
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diff
changeset
|
2009 assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header"); |
|
3714
b648304ba4ff
Change Graal monitor enter and exit from BasicObjectLock to BasicLock
Christian Wimmer <christian.wimmer@oracle.com>
parents:
3705
diff
changeset
|
2010 __ lock_object(scratch1, obj, lock, scratch2, slow_case, false); |
|
1434
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
2011 __ ret(0); |
|
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
2012 } |
|
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
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parents:
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diff
changeset
|
2013 |
|
1434
72cfb36c6bb2
* enabled all jtt tests
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diff
changeset
|
2014 __ bind(slow_case); |
|
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
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diff
changeset
|
2015 { |
|
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
2016 StubFrame f(sasm, "graal_monitorenter", dont_gc_arguments); |
|
3714
b648304ba4ff
Change Graal monitor enter and exit from BasicObjectLock to BasicLock
Christian Wimmer <christian.wimmer@oracle.com>
parents:
3705
diff
changeset
|
2017 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers); |
|
1434
72cfb36c6bb2
* enabled all jtt tests
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parents:
1429
diff
changeset
|
2018 |
|
72cfb36c6bb2
* enabled all jtt tests
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parents:
1429
diff
changeset
|
2019 // Called with store_parameter and not C abi |
|
3714
b648304ba4ff
Change Graal monitor enter and exit from BasicObjectLock to BasicLock
Christian Wimmer <christian.wimmer@oracle.com>
parents:
3705
diff
changeset
|
2020 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, graal_monitorenter), obj, lock); |
|
1434
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
2021 |
|
72cfb36c6bb2
* enabled all jtt tests
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diff
changeset
|
2022 oop_maps = new OopMapSet(); |
|
72cfb36c6bb2
* enabled all jtt tests
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diff
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|
2023 oop_maps->add_gc_map(call_offset, map); |
|
72cfb36c6bb2
* enabled all jtt tests
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diff
changeset
|
2024 restore_live_registers(sasm, save_fpu_registers); |
|
72cfb36c6bb2
* enabled all jtt tests
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changeset
|
2025 } |
|
72cfb36c6bb2
* enabled all jtt tests
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changeset
|
2026 __ ret(0); |
|
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
2027 break; |
|
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
2028 } |
|
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
2029 case graal_monitorexit_id: { |
|
1434
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
2030 Label slow_case; |
|
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
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diff
changeset
|
2031 |
|
1434
72cfb36c6bb2
* enabled all jtt tests
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changeset
|
2032 Register obj = j_rarg0; |
|
72cfb36c6bb2
* enabled all jtt tests
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|
2033 Register lock = j_rarg1; |
|
72cfb36c6bb2
* enabled all jtt tests
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changeset
|
2034 |
|
72cfb36c6bb2
* enabled all jtt tests
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changeset
|
2035 // needed in rax later on... |
|
72cfb36c6bb2
* enabled all jtt tests
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changeset
|
2036 Register lock2 = rax; |
|
72cfb36c6bb2
* enabled all jtt tests
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changeset
|
2037 __ mov(lock2, lock); |
|
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
2038 Register scratch1 = rbx; |
|
1942
00bc9eaf0e24
Support for -XX:+UseFastLocking flag. Fixed monitor enter XIR template for correct debug info at the runtime call.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1930
diff
changeset
|
2039 assert_different_registers(obj, lock, scratch1, lock2); |
|
1434
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
2040 |
|
72cfb36c6bb2
* enabled all jtt tests
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diff
changeset
|
2041 // copied from LIR_Assembler::emit_lock |
|
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
2042 if (UseFastLocking) { |
|
72cfb36c6bb2
* enabled all jtt tests
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diff
changeset
|
2043 assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header"); |
|
3714
b648304ba4ff
Change Graal monitor enter and exit from BasicObjectLock to BasicLock
Christian Wimmer <christian.wimmer@oracle.com>
parents:
3705
diff
changeset
|
2044 __ unlock_object(scratch1, obj, lock2, slow_case, false); |
|
1434
72cfb36c6bb2
* enabled all jtt tests
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parents:
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changeset
|
2045 __ ret(0); |
|
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
2046 } |
|
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
2047 |
|
1434
72cfb36c6bb2
* enabled all jtt tests
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diff
changeset
|
2048 __ bind(slow_case); |
|
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
2049 { |
|
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
2050 StubFrame f(sasm, "graal_monitorexit", dont_gc_arguments); |
|
1434
72cfb36c6bb2
* enabled all jtt tests
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parents:
1429
diff
changeset
|
2051 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers); |
|
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
2052 |
|
1434
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
2053 // note: really a leaf routine but must setup last java sp |
|
72cfb36c6bb2
* enabled all jtt tests
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parents:
1429
diff
changeset
|
2054 // => use call_RT for now (speed can be improved by |
|
72cfb36c6bb2
* enabled all jtt tests
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parents:
1429
diff
changeset
|
2055 // doing last java sp setup manually) |
|
3714
b648304ba4ff
Change Graal monitor enter and exit from BasicObjectLock to BasicLock
Christian Wimmer <christian.wimmer@oracle.com>
parents:
3705
diff
changeset
|
2056 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, graal_monitorexit), obj, lock); |
|
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
2057 |
|
1434
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
2058 oop_maps = new OopMapSet(); |
|
72cfb36c6bb2
* enabled all jtt tests
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parents:
1429
diff
changeset
|
2059 oop_maps->add_gc_map(call_offset, map); |
|
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
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1429
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2060 restore_live_registers(sasm, save_fpu_registers); |
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2061 } |
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2062 __ ret(0); |
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2063 break; |
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2064 } |
|
4976
8f01f899bccd
More GRAAL #ifdef; ignore graal directory on windows for client/server configuration.
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2065 #endif |
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2066 |
| 0 | 2067 default: |
| 2068 { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments); | |
| 304 | 2069 __ movptr(rax, (int)id); |
| 0 | 2070 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax); |
| 2071 __ should_not_reach_here(); | |
| 2072 } | |
| 2073 break; | |
| 2074 } | |
| 2075 return oop_maps; | |
| 2076 } | |
| 2077 | |
| 2078 #undef __ | |
|
1681
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6953477: Increase portability and flexibility of building Hotspot
bobv
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2079 |
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2080 const char *Runtime1::pd_name_for_address(address entry) { |
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126ea7725993
6953477: Increase portability and flexibility of building Hotspot
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2081 return "<unknown function>"; |
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2082 } |