Mercurial > hg > truffle
annotate src/cpu/x86/vm/sharedRuntime_x86_64.cpp @ 4681:84e7d6690293
added bytecode name to deoptimization details
author | Christian Haeubl <christian.haeubl@oracle.com> |
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date | Thu, 23 Feb 2012 16:57:05 -0800 |
parents | 74c0b866fe8d |
children | 33df1aeaebbf |
rev | line source |
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0 | 1 /* |
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7009309: JSR 292: compiler/6991596/Test6991596.java crashes on fastdebug JDK7/b122
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2 * Copyright (c) 2003, 2011, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
26 #include "asm/assembler.hpp" | |
27 #include "assembler_x86.inline.hpp" | |
28 #include "code/debugInfoRec.hpp" | |
29 #include "code/icBuffer.hpp" | |
30 #include "code/vtableStubs.hpp" | |
31 #include "interpreter/interpreter.hpp" | |
32 #include "oops/compiledICHolderOop.hpp" | |
33 #include "prims/jvmtiRedefineClassesTrace.hpp" | |
34 #include "runtime/sharedRuntime.hpp" | |
35 #include "runtime/vframeArray.hpp" | |
36 #include "vmreg_x86.inline.hpp" | |
37 #ifdef COMPILER1 | |
38 #include "c1/c1_Runtime1.hpp" | |
39 #endif | |
40 #ifdef COMPILER2 | |
41 #include "opto/runtime.hpp" | |
42 #endif | |
0 | 43 |
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44 #define __ masm-> |
0 | 45 |
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46 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; |
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47 |
0 | 48 class SimpleRuntimeFrame { |
49 | |
50 public: | |
51 | |
52 // Most of the runtime stubs have this simple frame layout. | |
53 // This class exists to make the layout shared in one place. | |
54 // Offsets are for compiler stack slots, which are jints. | |
55 enum layout { | |
56 // The frame sender code expects that rbp will be in the "natural" place and | |
57 // will override any oopMap setting for it. We must therefore force the layout | |
58 // so that it agrees with the frame sender code. | |
59 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt, | |
60 rbp_off2, | |
61 return_off, return_off2, | |
62 framesize | |
63 }; | |
64 }; | |
65 | |
66 class RegisterSaver { | |
67 // Capture info about frame layout. Layout offsets are in jint | |
68 // units because compiler frame slots are jints. | |
69 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off | |
70 enum layout { | |
71 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area | |
72 xmm_off = fpu_state_off + 160/BytesPerInt, // offset in fxsave save area | |
73 DEF_XMM_OFFS(0), | |
74 DEF_XMM_OFFS(1), | |
75 DEF_XMM_OFFS(2), | |
76 DEF_XMM_OFFS(3), | |
77 DEF_XMM_OFFS(4), | |
78 DEF_XMM_OFFS(5), | |
79 DEF_XMM_OFFS(6), | |
80 DEF_XMM_OFFS(7), | |
81 DEF_XMM_OFFS(8), | |
82 DEF_XMM_OFFS(9), | |
83 DEF_XMM_OFFS(10), | |
84 DEF_XMM_OFFS(11), | |
85 DEF_XMM_OFFS(12), | |
86 DEF_XMM_OFFS(13), | |
87 DEF_XMM_OFFS(14), | |
88 DEF_XMM_OFFS(15), | |
89 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt), | |
90 fpu_stateH_end, | |
91 r15_off, r15H_off, | |
92 r14_off, r14H_off, | |
93 r13_off, r13H_off, | |
94 r12_off, r12H_off, | |
95 r11_off, r11H_off, | |
96 r10_off, r10H_off, | |
97 r9_off, r9H_off, | |
98 r8_off, r8H_off, | |
99 rdi_off, rdiH_off, | |
100 rsi_off, rsiH_off, | |
101 ignore_off, ignoreH_off, // extra copy of rbp | |
102 rsp_off, rspH_off, | |
103 rbx_off, rbxH_off, | |
104 rdx_off, rdxH_off, | |
105 rcx_off, rcxH_off, | |
106 rax_off, raxH_off, | |
107 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state | |
108 align_off, alignH_off, | |
109 flags_off, flagsH_off, | |
110 // The frame sender code expects that rbp will be in the "natural" place and | |
111 // will override any oopMap setting for it. We must therefore force the layout | |
112 // so that it agrees with the frame sender code. | |
113 rbp_off, rbpH_off, // copy of rbp we will restore | |
114 return_off, returnH_off, // slot for return address | |
115 reg_save_size // size in compiler stack slots | |
116 }; | |
117 | |
118 public: | |
119 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words); | |
120 static void restore_live_registers(MacroAssembler* masm); | |
121 | |
122 // Offsets into the register save area | |
123 // Used by deoptimization when it is managing result register | |
124 // values on its own | |
125 | |
126 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; } | |
304 | 127 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; } |
0 | 128 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; } |
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129 static int r10_offset_in_bytes(void) { return BytesPerInt * r10_off; } |
0 | 130 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; } |
131 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; } | |
132 | |
133 // During deoptimization only the result registers need to be restored, | |
134 // all the other values have already been extracted. | |
135 static void restore_result_registers(MacroAssembler* masm); | |
136 }; | |
137 | |
138 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) { | |
139 | |
140 // Always make the frame size 16-byte aligned | |
141 int frame_size_in_bytes = round_to(additional_frame_words*wordSize + | |
142 reg_save_size*BytesPerInt, 16); | |
143 // OopMap frame size is in compiler stack slots (jint's) not bytes or words | |
144 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt; | |
145 // The caller will allocate additional_frame_words | |
146 int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt; | |
147 // CodeBlob frame size is in words. | |
148 int frame_size_in_words = frame_size_in_bytes / wordSize; | |
149 *total_frame_words = frame_size_in_words; | |
150 | |
151 // Save registers, fpu state, and flags. | |
152 // We assume caller has already pushed the return address onto the | |
153 // stack, so rsp is 8-byte aligned here. | |
154 // We push rpb twice in this sequence because we want the real rbp | |
155 // to be under the return like a normal enter. | |
156 | |
157 __ enter(); // rsp becomes 16-byte aligned here | |
158 __ push_CPU_state(); // Push a multiple of 16 bytes | |
159 if (frame::arg_reg_save_area_bytes != 0) { | |
160 // Allocate argument register save area | |
304 | 161 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 162 } |
163 | |
164 // Set an oopmap for the call site. This oopmap will map all | |
165 // oop-registers and debug-info registers as callee-saved. This | |
166 // will allow deoptimization at this safepoint to find all possible | |
167 // debug-info recordings, as well as let GC find all oops. | |
168 | |
169 OopMapSet *oop_maps = new OopMapSet(); | |
170 OopMap* map = new OopMap(frame_size_in_slots, 0); | |
171 map->set_callee_saved(VMRegImpl::stack2reg( rax_off + additional_frame_slots), rax->as_VMReg()); | |
172 map->set_callee_saved(VMRegImpl::stack2reg( rcx_off + additional_frame_slots), rcx->as_VMReg()); | |
173 map->set_callee_saved(VMRegImpl::stack2reg( rdx_off + additional_frame_slots), rdx->as_VMReg()); | |
174 map->set_callee_saved(VMRegImpl::stack2reg( rbx_off + additional_frame_slots), rbx->as_VMReg()); | |
175 // rbp location is known implicitly by the frame sender code, needs no oopmap | |
176 // and the location where rbp was saved by is ignored | |
177 map->set_callee_saved(VMRegImpl::stack2reg( rsi_off + additional_frame_slots), rsi->as_VMReg()); | |
178 map->set_callee_saved(VMRegImpl::stack2reg( rdi_off + additional_frame_slots), rdi->as_VMReg()); | |
179 map->set_callee_saved(VMRegImpl::stack2reg( r8_off + additional_frame_slots), r8->as_VMReg()); | |
180 map->set_callee_saved(VMRegImpl::stack2reg( r9_off + additional_frame_slots), r9->as_VMReg()); | |
181 map->set_callee_saved(VMRegImpl::stack2reg( r10_off + additional_frame_slots), r10->as_VMReg()); | |
182 map->set_callee_saved(VMRegImpl::stack2reg( r11_off + additional_frame_slots), r11->as_VMReg()); | |
183 map->set_callee_saved(VMRegImpl::stack2reg( r12_off + additional_frame_slots), r12->as_VMReg()); | |
184 map->set_callee_saved(VMRegImpl::stack2reg( r13_off + additional_frame_slots), r13->as_VMReg()); | |
185 map->set_callee_saved(VMRegImpl::stack2reg( r14_off + additional_frame_slots), r14->as_VMReg()); | |
186 map->set_callee_saved(VMRegImpl::stack2reg( r15_off + additional_frame_slots), r15->as_VMReg()); | |
187 map->set_callee_saved(VMRegImpl::stack2reg(xmm0_off + additional_frame_slots), xmm0->as_VMReg()); | |
188 map->set_callee_saved(VMRegImpl::stack2reg(xmm1_off + additional_frame_slots), xmm1->as_VMReg()); | |
189 map->set_callee_saved(VMRegImpl::stack2reg(xmm2_off + additional_frame_slots), xmm2->as_VMReg()); | |
190 map->set_callee_saved(VMRegImpl::stack2reg(xmm3_off + additional_frame_slots), xmm3->as_VMReg()); | |
191 map->set_callee_saved(VMRegImpl::stack2reg(xmm4_off + additional_frame_slots), xmm4->as_VMReg()); | |
192 map->set_callee_saved(VMRegImpl::stack2reg(xmm5_off + additional_frame_slots), xmm5->as_VMReg()); | |
193 map->set_callee_saved(VMRegImpl::stack2reg(xmm6_off + additional_frame_slots), xmm6->as_VMReg()); | |
194 map->set_callee_saved(VMRegImpl::stack2reg(xmm7_off + additional_frame_slots), xmm7->as_VMReg()); | |
195 map->set_callee_saved(VMRegImpl::stack2reg(xmm8_off + additional_frame_slots), xmm8->as_VMReg()); | |
196 map->set_callee_saved(VMRegImpl::stack2reg(xmm9_off + additional_frame_slots), xmm9->as_VMReg()); | |
197 map->set_callee_saved(VMRegImpl::stack2reg(xmm10_off + additional_frame_slots), xmm10->as_VMReg()); | |
198 map->set_callee_saved(VMRegImpl::stack2reg(xmm11_off + additional_frame_slots), xmm11->as_VMReg()); | |
199 map->set_callee_saved(VMRegImpl::stack2reg(xmm12_off + additional_frame_slots), xmm12->as_VMReg()); | |
200 map->set_callee_saved(VMRegImpl::stack2reg(xmm13_off + additional_frame_slots), xmm13->as_VMReg()); | |
201 map->set_callee_saved(VMRegImpl::stack2reg(xmm14_off + additional_frame_slots), xmm14->as_VMReg()); | |
202 map->set_callee_saved(VMRegImpl::stack2reg(xmm15_off + additional_frame_slots), xmm15->as_VMReg()); | |
203 | |
204 // %%% These should all be a waste but we'll keep things as they were for now | |
205 if (true) { | |
206 map->set_callee_saved(VMRegImpl::stack2reg( raxH_off + additional_frame_slots), | |
207 rax->as_VMReg()->next()); | |
208 map->set_callee_saved(VMRegImpl::stack2reg( rcxH_off + additional_frame_slots), | |
209 rcx->as_VMReg()->next()); | |
210 map->set_callee_saved(VMRegImpl::stack2reg( rdxH_off + additional_frame_slots), | |
211 rdx->as_VMReg()->next()); | |
212 map->set_callee_saved(VMRegImpl::stack2reg( rbxH_off + additional_frame_slots), | |
213 rbx->as_VMReg()->next()); | |
214 // rbp location is known implicitly by the frame sender code, needs no oopmap | |
215 map->set_callee_saved(VMRegImpl::stack2reg( rsiH_off + additional_frame_slots), | |
216 rsi->as_VMReg()->next()); | |
217 map->set_callee_saved(VMRegImpl::stack2reg( rdiH_off + additional_frame_slots), | |
218 rdi->as_VMReg()->next()); | |
219 map->set_callee_saved(VMRegImpl::stack2reg( r8H_off + additional_frame_slots), | |
220 r8->as_VMReg()->next()); | |
221 map->set_callee_saved(VMRegImpl::stack2reg( r9H_off + additional_frame_slots), | |
222 r9->as_VMReg()->next()); | |
223 map->set_callee_saved(VMRegImpl::stack2reg( r10H_off + additional_frame_slots), | |
224 r10->as_VMReg()->next()); | |
225 map->set_callee_saved(VMRegImpl::stack2reg( r11H_off + additional_frame_slots), | |
226 r11->as_VMReg()->next()); | |
227 map->set_callee_saved(VMRegImpl::stack2reg( r12H_off + additional_frame_slots), | |
228 r12->as_VMReg()->next()); | |
229 map->set_callee_saved(VMRegImpl::stack2reg( r13H_off + additional_frame_slots), | |
230 r13->as_VMReg()->next()); | |
231 map->set_callee_saved(VMRegImpl::stack2reg( r14H_off + additional_frame_slots), | |
232 r14->as_VMReg()->next()); | |
233 map->set_callee_saved(VMRegImpl::stack2reg( r15H_off + additional_frame_slots), | |
234 r15->as_VMReg()->next()); | |
235 map->set_callee_saved(VMRegImpl::stack2reg(xmm0H_off + additional_frame_slots), | |
236 xmm0->as_VMReg()->next()); | |
237 map->set_callee_saved(VMRegImpl::stack2reg(xmm1H_off + additional_frame_slots), | |
238 xmm1->as_VMReg()->next()); | |
239 map->set_callee_saved(VMRegImpl::stack2reg(xmm2H_off + additional_frame_slots), | |
240 xmm2->as_VMReg()->next()); | |
241 map->set_callee_saved(VMRegImpl::stack2reg(xmm3H_off + additional_frame_slots), | |
242 xmm3->as_VMReg()->next()); | |
243 map->set_callee_saved(VMRegImpl::stack2reg(xmm4H_off + additional_frame_slots), | |
244 xmm4->as_VMReg()->next()); | |
245 map->set_callee_saved(VMRegImpl::stack2reg(xmm5H_off + additional_frame_slots), | |
246 xmm5->as_VMReg()->next()); | |
247 map->set_callee_saved(VMRegImpl::stack2reg(xmm6H_off + additional_frame_slots), | |
248 xmm6->as_VMReg()->next()); | |
249 map->set_callee_saved(VMRegImpl::stack2reg(xmm7H_off + additional_frame_slots), | |
250 xmm7->as_VMReg()->next()); | |
251 map->set_callee_saved(VMRegImpl::stack2reg(xmm8H_off + additional_frame_slots), | |
252 xmm8->as_VMReg()->next()); | |
253 map->set_callee_saved(VMRegImpl::stack2reg(xmm9H_off + additional_frame_slots), | |
254 xmm9->as_VMReg()->next()); | |
255 map->set_callee_saved(VMRegImpl::stack2reg(xmm10H_off + additional_frame_slots), | |
256 xmm10->as_VMReg()->next()); | |
257 map->set_callee_saved(VMRegImpl::stack2reg(xmm11H_off + additional_frame_slots), | |
258 xmm11->as_VMReg()->next()); | |
259 map->set_callee_saved(VMRegImpl::stack2reg(xmm12H_off + additional_frame_slots), | |
260 xmm12->as_VMReg()->next()); | |
261 map->set_callee_saved(VMRegImpl::stack2reg(xmm13H_off + additional_frame_slots), | |
262 xmm13->as_VMReg()->next()); | |
263 map->set_callee_saved(VMRegImpl::stack2reg(xmm14H_off + additional_frame_slots), | |
264 xmm14->as_VMReg()->next()); | |
265 map->set_callee_saved(VMRegImpl::stack2reg(xmm15H_off + additional_frame_slots), | |
266 xmm15->as_VMReg()->next()); | |
267 } | |
268 | |
269 return map; | |
270 } | |
271 | |
272 void RegisterSaver::restore_live_registers(MacroAssembler* masm) { | |
273 if (frame::arg_reg_save_area_bytes != 0) { | |
274 // Pop arg register save area | |
304 | 275 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 276 } |
277 // Recover CPU state | |
278 __ pop_CPU_state(); | |
279 // Get the rbp described implicitly by the calling convention (no oopMap) | |
304 | 280 __ pop(rbp); |
0 | 281 } |
282 | |
283 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
284 | |
285 // Just restore result register. Only used by deoptimization. By | |
286 // now any callee save register that needs to be restored to a c2 | |
287 // caller of the deoptee has been extracted into the vframeArray | |
288 // and will be stuffed into the c2i adapter we create for later | |
289 // restoration so only result registers need to be restored here. | |
290 | |
291 // Restore fp result register | |
292 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes())); | |
293 // Restore integer result register | |
304 | 294 __ movptr(rax, Address(rsp, rax_offset_in_bytes())); |
295 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes())); | |
296 | |
0 | 297 // Pop all of the register save are off the stack except the return address |
304 | 298 __ addptr(rsp, return_offset_in_bytes()); |
0 | 299 } |
300 | |
301 // The java_calling_convention describes stack locations as ideal slots on | |
302 // a frame with no abi restrictions. Since we must observe abi restrictions | |
303 // (like the placement of the register window) the slots must be biased by | |
304 // the following value. | |
305 static int reg2offset_in(VMReg r) { | |
306 // Account for saved rbp and return address | |
307 // This should really be in_preserve_stack_slots | |
308 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size; | |
309 } | |
310 | |
311 static int reg2offset_out(VMReg r) { | |
312 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
313 } | |
314 | |
315 // --------------------------------------------------------------------------- | |
316 // Read the array of BasicTypes from a signature, and compute where the | |
317 // arguments should go. Values in the VMRegPair regs array refer to 4-byte | |
318 // quantities. Values less than VMRegImpl::stack0 are registers, those above | |
319 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer | |
320 // as framesizes are fixed. | |
321 // VMRegImpl::stack0 refers to the first slot 0(sp). | |
322 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
323 // up to RegisterImpl::number_of_registers) are the 64-bit | |
324 // integer registers. | |
325 | |
326 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
327 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
328 // units regardless of build. Of course for i486 there is no 64 bit build | |
329 | |
330 // The Java calling convention is a "shifted" version of the C ABI. | |
331 // By skipping the first C ABI register we can call non-static jni methods | |
332 // with small numbers of arguments without having to shuffle the arguments | |
333 // at all. Since we control the java ABI we ought to at least get some | |
334 // advantage out of it. | |
335 | |
336 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
337 VMRegPair *regs, | |
338 int total_args_passed, | |
339 int is_outgoing) { | |
340 | |
341 // Create the mapping between argument positions and | |
342 // registers. | |
343 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = { | |
344 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5 | |
345 }; | |
346 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = { | |
347 j_farg0, j_farg1, j_farg2, j_farg3, | |
348 j_farg4, j_farg5, j_farg6, j_farg7 | |
349 }; | |
350 | |
351 | |
352 uint int_args = 0; | |
353 uint fp_args = 0; | |
354 uint stk_args = 0; // inc by 2 each time | |
355 | |
356 for (int i = 0; i < total_args_passed; i++) { | |
357 switch (sig_bt[i]) { | |
358 case T_BOOLEAN: | |
359 case T_CHAR: | |
360 case T_BYTE: | |
361 case T_SHORT: | |
362 case T_INT: | |
363 if (int_args < Argument::n_int_register_parameters_j) { | |
364 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
365 } else { | |
366 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
367 stk_args += 2; | |
368 } | |
369 break; | |
370 case T_VOID: | |
371 // halves of T_LONG or T_DOUBLE | |
372 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
373 regs[i].set_bad(); | |
374 break; | |
375 case T_LONG: | |
376 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
377 // fall through | |
378 case T_OBJECT: | |
379 case T_ARRAY: | |
380 case T_ADDRESS: | |
381 if (int_args < Argument::n_int_register_parameters_j) { | |
382 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
383 } else { | |
384 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
385 stk_args += 2; | |
386 } | |
387 break; | |
388 case T_FLOAT: | |
389 if (fp_args < Argument::n_float_register_parameters_j) { | |
390 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
391 } else { | |
392 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
393 stk_args += 2; | |
394 } | |
395 break; | |
396 case T_DOUBLE: | |
397 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
398 if (fp_args < Argument::n_float_register_parameters_j) { | |
399 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
400 } else { | |
401 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
402 stk_args += 2; | |
403 } | |
404 break; | |
405 default: | |
406 ShouldNotReachHere(); | |
407 break; | |
408 } | |
409 } | |
410 | |
411 return round_to(stk_args, 2); | |
412 } | |
413 | |
414 // Patch the callers callsite with entry to compiled code if it exists. | |
415 static void patch_callers_callsite(MacroAssembler *masm) { | |
416 Label L; | |
417 __ verify_oop(rbx); | |
304 | 418 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD); |
0 | 419 __ jcc(Assembler::equal, L); |
420 | |
421 // Save the current stack pointer | |
304 | 422 __ mov(r13, rsp); |
0 | 423 // Schedule the branch target address early. |
424 // Call into the VM to patch the caller, then jump to compiled callee | |
425 // rax isn't live so capture return address while we easily can | |
304 | 426 __ movptr(rax, Address(rsp, 0)); |
0 | 427 |
428 // align stack so push_CPU_state doesn't fault | |
304 | 429 __ andptr(rsp, -(StackAlignmentInBytes)); |
0 | 430 __ push_CPU_state(); |
431 | |
432 | |
433 __ verify_oop(rbx); | |
434 // VM needs caller's callsite | |
435 // VM needs target method | |
436 // This needs to be a long call since we will relocate this adapter to | |
437 // the codeBuffer and it may not reach | |
438 | |
439 // Allocate argument register save area | |
440 if (frame::arg_reg_save_area_bytes != 0) { | |
304 | 441 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 442 } |
304 | 443 __ mov(c_rarg0, rbx); |
444 __ mov(c_rarg1, rax); | |
0 | 445 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); |
446 | |
447 // De-allocate argument register save area | |
448 if (frame::arg_reg_save_area_bytes != 0) { | |
304 | 449 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 450 } |
451 | |
452 __ pop_CPU_state(); | |
453 // restore sp | |
304 | 454 __ mov(rsp, r13); |
0 | 455 __ bind(L); |
456 } | |
457 | |
458 | |
459 static void gen_c2i_adapter(MacroAssembler *masm, | |
460 int total_args_passed, | |
461 int comp_args_on_stack, | |
462 const BasicType *sig_bt, | |
463 const VMRegPair *regs, | |
464 Label& skip_fixup) { | |
465 // Before we get into the guts of the C2I adapter, see if we should be here | |
466 // at all. We've come from compiled code and are attempting to jump to the | |
467 // interpreter, which means the caller made a static call to get here | |
468 // (vcalls always get a compiled target if there is one). Check for a | |
469 // compiled target. If there is one, we need to patch the caller's call. | |
470 patch_callers_callsite(masm); | |
471 | |
472 __ bind(skip_fixup); | |
473 | |
474 // Since all args are passed on the stack, total_args_passed * | |
475 // Interpreter::stackElementSize is the space we need. Plus 1 because | |
476 // we also account for the return address location since | |
477 // we store it first rather than hold it in rax across all the shuffling | |
478 | |
1506 | 479 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize; |
0 | 480 |
481 // stack is aligned, keep it that way | |
482 extraspace = round_to(extraspace, 2*wordSize); | |
483 | |
484 // Get return address | |
304 | 485 __ pop(rax); |
0 | 486 |
487 // set senderSP value | |
304 | 488 __ mov(r13, rsp); |
489 | |
490 __ subptr(rsp, extraspace); | |
0 | 491 |
492 // Store the return address in the expected location | |
304 | 493 __ movptr(Address(rsp, 0), rax); |
0 | 494 |
495 // Now write the args into the outgoing interpreter space | |
496 for (int i = 0; i < total_args_passed; i++) { | |
497 if (sig_bt[i] == T_VOID) { | |
498 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
499 continue; | |
500 } | |
501 | |
502 // offset to start parameters | |
1506 | 503 int st_off = (total_args_passed - i) * Interpreter::stackElementSize; |
504 int next_off = st_off - Interpreter::stackElementSize; | |
0 | 505 |
506 // Say 4 args: | |
507 // i st_off | |
508 // 0 32 T_LONG | |
509 // 1 24 T_VOID | |
510 // 2 16 T_OBJECT | |
511 // 3 8 T_BOOL | |
512 // - 0 return address | |
513 // | |
514 // However to make thing extra confusing. Because we can fit a long/double in | |
515 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter | |
516 // leaves one slot empty and only stores to a single slot. In this case the | |
517 // slot that is occupied is the T_VOID slot. See I said it was confusing. | |
518 | |
519 VMReg r_1 = regs[i].first(); | |
520 VMReg r_2 = regs[i].second(); | |
521 if (!r_1->is_valid()) { | |
522 assert(!r_2->is_valid(), ""); | |
523 continue; | |
524 } | |
525 if (r_1->is_stack()) { | |
526 // memory to memory use rax | |
527 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; | |
528 if (!r_2->is_valid()) { | |
529 // sign extend?? | |
530 __ movl(rax, Address(rsp, ld_off)); | |
304 | 531 __ movptr(Address(rsp, st_off), rax); |
0 | 532 |
533 } else { | |
534 | |
535 __ movq(rax, Address(rsp, ld_off)); | |
536 | |
537 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
538 // T_DOUBLE and T_LONG use two slots in the interpreter | |
539 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
540 // ld_off == LSW, ld_off+wordSize == MSW | |
541 // st_off == MSW, next_off == LSW | |
542 __ movq(Address(rsp, next_off), rax); | |
543 #ifdef ASSERT | |
544 // Overwrite the unused slot with known junk | |
545 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); | |
304 | 546 __ movptr(Address(rsp, st_off), rax); |
0 | 547 #endif /* ASSERT */ |
548 } else { | |
549 __ movq(Address(rsp, st_off), rax); | |
550 } | |
551 } | |
552 } else if (r_1->is_Register()) { | |
553 Register r = r_1->as_Register(); | |
554 if (!r_2->is_valid()) { | |
555 // must be only an int (or less ) so move only 32bits to slot | |
556 // why not sign extend?? | |
557 __ movl(Address(rsp, st_off), r); | |
558 } else { | |
559 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
560 // T_DOUBLE and T_LONG use two slots in the interpreter | |
561 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
562 // long/double in gpr | |
563 #ifdef ASSERT | |
564 // Overwrite the unused slot with known junk | |
565 __ mov64(rax, CONST64(0xdeadffffdeadaaab)); | |
304 | 566 __ movptr(Address(rsp, st_off), rax); |
0 | 567 #endif /* ASSERT */ |
568 __ movq(Address(rsp, next_off), r); | |
569 } else { | |
304 | 570 __ movptr(Address(rsp, st_off), r); |
0 | 571 } |
572 } | |
573 } else { | |
574 assert(r_1->is_XMMRegister(), ""); | |
575 if (!r_2->is_valid()) { | |
576 // only a float use just part of the slot | |
577 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); | |
578 } else { | |
579 #ifdef ASSERT | |
580 // Overwrite the unused slot with known junk | |
581 __ mov64(rax, CONST64(0xdeadffffdeadaaac)); | |
304 | 582 __ movptr(Address(rsp, st_off), rax); |
0 | 583 #endif /* ASSERT */ |
584 __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister()); | |
585 } | |
586 } | |
587 } | |
588 | |
589 // Schedule the branch target address early. | |
304 | 590 __ movptr(rcx, Address(rbx, in_bytes(methodOopDesc::interpreter_entry_offset()))); |
0 | 591 __ jmp(rcx); |
592 } | |
593 | |
594 static void gen_i2c_adapter(MacroAssembler *masm, | |
595 int total_args_passed, | |
596 int comp_args_on_stack, | |
597 const BasicType *sig_bt, | |
598 const VMRegPair *regs) { | |
599 | |
600 // Note: r13 contains the senderSP on entry. We must preserve it since | |
601 // we may do a i2c -> c2i transition if we lose a race where compiled | |
602 // code goes non-entrant while we get args ready. | |
603 // In addition we use r13 to locate all the interpreter args as | |
604 // we must align the stack to 16 bytes on an i2c entry else we | |
605 // lose alignment we expect in all compiled code and register | |
606 // save code can segv when fxsave instructions find improperly | |
607 // aligned stack pointer. | |
608 | |
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609 // Pick up the return address |
304 | 610 __ movptr(rax, Address(rsp, 0)); |
0 | 611 |
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612 // Must preserve original SP for loading incoming arguments because |
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613 // we need to align the outgoing SP for compiled code. |
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614 __ movptr(r11, rsp); |
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615 |
0 | 616 // Cut-out for having no stack args. Since up to 2 int/oop args are passed |
617 // in registers, we will occasionally have no stack args. | |
618 int comp_words_on_stack = 0; | |
619 if (comp_args_on_stack) { | |
620 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in | |
621 // registers are below. By subtracting stack0, we either get a negative | |
622 // number (all values in registers) or the maximum stack slot accessed. | |
623 | |
624 // Convert 4-byte c2 stack slots to words. | |
625 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; | |
626 // Round up to miminum stack alignment, in wordSize | |
627 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
304 | 628 __ subptr(rsp, comp_words_on_stack * wordSize); |
0 | 629 } |
630 | |
631 | |
632 // Ensure compiled code always sees stack at proper alignment | |
304 | 633 __ andptr(rsp, -16); |
0 | 634 |
635 // push the return address and misalign the stack that youngest frame always sees | |
636 // as far as the placement of the call instruction | |
304 | 637 __ push(rax); |
0 | 638 |
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639 // Put saved SP in another register |
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640 const Register saved_sp = rax; |
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641 __ movptr(saved_sp, r11); |
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642 |
0 | 643 // Will jump to the compiled code just as if compiled code was doing it. |
644 // Pre-load the register-jump target early, to schedule it better. | |
304 | 645 __ movptr(r11, Address(rbx, in_bytes(methodOopDesc::from_compiled_offset()))); |
0 | 646 |
647 // Now generate the shuffle code. Pick up all register args and move the | |
648 // rest through the floating point stack top. | |
649 for (int i = 0; i < total_args_passed; i++) { | |
650 if (sig_bt[i] == T_VOID) { | |
651 // Longs and doubles are passed in native word order, but misaligned | |
652 // in the 32-bit build. | |
653 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
654 continue; | |
655 } | |
656 | |
657 // Pick up 0, 1 or 2 words from SP+offset. | |
658 | |
659 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), | |
660 "scrambled load targets?"); | |
661 // Load in argument order going down. | |
1506 | 662 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize; |
0 | 663 // Point to interpreter value (vs. tag) |
1506 | 664 int next_off = ld_off - Interpreter::stackElementSize; |
0 | 665 // |
666 // | |
667 // | |
668 VMReg r_1 = regs[i].first(); | |
669 VMReg r_2 = regs[i].second(); | |
670 if (!r_1->is_valid()) { | |
671 assert(!r_2->is_valid(), ""); | |
672 continue; | |
673 } | |
674 if (r_1->is_stack()) { | |
675 // Convert stack slot to an SP offset (+ wordSize to account for return address ) | |
676 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; | |
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677 |
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678 // We can use r13 as a temp here because compiled code doesn't need r13 as an input |
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679 // and if we end up going thru a c2i because of a miss a reasonable value of r13 |
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680 // will be generated. |
0 | 681 if (!r_2->is_valid()) { |
682 // sign extend??? | |
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683 __ movl(r13, Address(saved_sp, ld_off)); |
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684 __ movptr(Address(rsp, st_off), r13); |
0 | 685 } else { |
686 // | |
687 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
688 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
689 // So we must adjust where to pick up the data to match the interpreter. | |
690 // | |
691 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
692 // are accessed as negative so LSW is at LOW address | |
693 | |
694 // ld_off is MSW so get LSW | |
695 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
696 next_off : ld_off; | |
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697 __ movq(r13, Address(saved_sp, offset)); |
0 | 698 // st_off is LSW (i.e. reg.first()) |
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699 __ movq(Address(rsp, st_off), r13); |
0 | 700 } |
701 } else if (r_1->is_Register()) { // Register argument | |
702 Register r = r_1->as_Register(); | |
703 assert(r != rax, "must be different"); | |
704 if (r_2->is_valid()) { | |
705 // | |
706 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
707 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
708 // So we must adjust where to pick up the data to match the interpreter. | |
709 | |
710 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
711 next_off : ld_off; | |
712 | |
713 // this can be a misaligned move | |
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714 __ movq(r, Address(saved_sp, offset)); |
0 | 715 } else { |
716 // sign extend and use a full word? | |
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717 __ movl(r, Address(saved_sp, ld_off)); |
0 | 718 } |
719 } else { | |
720 if (!r_2->is_valid()) { | |
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721 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); |
0 | 722 } else { |
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723 __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off)); |
0 | 724 } |
725 } | |
726 } | |
727 | |
728 // 6243940 We might end up in handle_wrong_method if | |
729 // the callee is deoptimized as we race thru here. If that | |
730 // happens we don't want to take a safepoint because the | |
731 // caller frame will look interpreted and arguments are now | |
732 // "compiled" so it is much better to make this transition | |
733 // invisible to the stack walking code. Unfortunately if | |
734 // we try and find the callee by normal means a safepoint | |
735 // is possible. So we stash the desired callee in the thread | |
736 // and the vm will find there should this case occur. | |
737 | |
304 | 738 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx); |
0 | 739 |
740 // put methodOop where a c2i would expect should we end up there | |
741 // only needed becaus eof c2 resolve stubs return methodOop as a result in | |
742 // rax | |
304 | 743 __ mov(rax, rbx); |
0 | 744 __ jmp(r11); |
745 } | |
746 | |
747 // --------------------------------------------------------------- | |
748 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
749 int total_args_passed, | |
750 int comp_args_on_stack, | |
751 const BasicType *sig_bt, | |
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752 const VMRegPair *regs, |
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753 AdapterFingerPrint* fingerprint) { |
0 | 754 address i2c_entry = __ pc(); |
755 | |
756 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); | |
757 | |
758 // ------------------------------------------------------------------------- | |
759 // Generate a C2I adapter. On entry we know rbx holds the methodOop during calls | |
760 // to the interpreter. The args start out packed in the compiled layout. They | |
761 // need to be unpacked into the interpreter layout. This will almost always | |
762 // require some stack space. We grow the current (compiled) stack, then repack | |
763 // the args. We finally end in a jump to the generic interpreter entry point. | |
764 // On exit from the interpreter, the interpreter will restore our SP (lest the | |
765 // compiled code, which relys solely on SP and not RBP, get sick). | |
766 | |
767 address c2i_unverified_entry = __ pc(); | |
768 Label skip_fixup; | |
769 Label ok; | |
770 | |
771 Register holder = rax; | |
772 Register receiver = j_rarg0; | |
773 Register temp = rbx; | |
774 | |
775 { | |
776 __ verify_oop(holder); | |
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777 __ load_klass(temp, receiver); |
0 | 778 __ verify_oop(temp); |
779 | |
304 | 780 __ cmpptr(temp, Address(holder, compiledICHolderOopDesc::holder_klass_offset())); |
781 __ movptr(rbx, Address(holder, compiledICHolderOopDesc::holder_method_offset())); | |
0 | 782 __ jcc(Assembler::equal, ok); |
783 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
784 | |
785 __ bind(ok); | |
786 // Method might have been compiled since the call site was patched to | |
787 // interpreted if that is the case treat it as a miss so we can get | |
788 // the call site corrected. | |
304 | 789 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD); |
0 | 790 __ jcc(Assembler::equal, skip_fixup); |
791 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
792 } | |
793 | |
794 address c2i_entry = __ pc(); | |
795 | |
796 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); | |
797 | |
798 __ flush(); | |
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799 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
0 | 800 } |
801 | |
802 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
803 VMRegPair *regs, | |
804 int total_args_passed) { | |
805 // We return the amount of VMRegImpl stack slots we need to reserve for all | |
806 // the arguments NOT counting out_preserve_stack_slots. | |
807 | |
808 // NOTE: These arrays will have to change when c1 is ported | |
809 #ifdef _WIN64 | |
810 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
811 c_rarg0, c_rarg1, c_rarg2, c_rarg3 | |
812 }; | |
813 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
814 c_farg0, c_farg1, c_farg2, c_farg3 | |
815 }; | |
816 #else | |
817 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
818 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5 | |
819 }; | |
820 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
821 c_farg0, c_farg1, c_farg2, c_farg3, | |
822 c_farg4, c_farg5, c_farg6, c_farg7 | |
823 }; | |
824 #endif // _WIN64 | |
825 | |
826 | |
827 uint int_args = 0; | |
828 uint fp_args = 0; | |
829 uint stk_args = 0; // inc by 2 each time | |
830 | |
831 for (int i = 0; i < total_args_passed; i++) { | |
832 switch (sig_bt[i]) { | |
833 case T_BOOLEAN: | |
834 case T_CHAR: | |
835 case T_BYTE: | |
836 case T_SHORT: | |
837 case T_INT: | |
838 if (int_args < Argument::n_int_register_parameters_c) { | |
839 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
840 #ifdef _WIN64 | |
841 fp_args++; | |
842 // Allocate slots for callee to stuff register args the stack. | |
843 stk_args += 2; | |
844 #endif | |
845 } else { | |
846 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
847 stk_args += 2; | |
848 } | |
849 break; | |
850 case T_LONG: | |
851 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
852 // fall through | |
853 case T_OBJECT: | |
854 case T_ARRAY: | |
855 case T_ADDRESS: | |
856 if (int_args < Argument::n_int_register_parameters_c) { | |
857 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
858 #ifdef _WIN64 | |
859 fp_args++; | |
860 stk_args += 2; | |
861 #endif | |
862 } else { | |
863 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
864 stk_args += 2; | |
865 } | |
866 break; | |
867 case T_FLOAT: | |
868 if (fp_args < Argument::n_float_register_parameters_c) { | |
869 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
870 #ifdef _WIN64 | |
871 int_args++; | |
872 // Allocate slots for callee to stuff register args the stack. | |
873 stk_args += 2; | |
874 #endif | |
875 } else { | |
876 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
877 stk_args += 2; | |
878 } | |
879 break; | |
880 case T_DOUBLE: | |
881 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
882 if (fp_args < Argument::n_float_register_parameters_c) { | |
883 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
884 #ifdef _WIN64 | |
885 int_args++; | |
886 // Allocate slots for callee to stuff register args the stack. | |
887 stk_args += 2; | |
888 #endif | |
889 } else { | |
890 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
891 stk_args += 2; | |
892 } | |
893 break; | |
894 case T_VOID: // Halves of longs and doubles | |
895 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
896 regs[i].set_bad(); | |
897 break; | |
898 default: | |
899 ShouldNotReachHere(); | |
900 break; | |
901 } | |
902 } | |
903 #ifdef _WIN64 | |
904 // windows abi requires that we always allocate enough stack space | |
905 // for 4 64bit registers to be stored down. | |
906 if (stk_args < 8) { | |
907 stk_args = 8; | |
908 } | |
909 #endif // _WIN64 | |
910 | |
911 return stk_args; | |
912 } | |
913 | |
914 // On 64 bit we will store integer like items to the stack as | |
915 // 64 bits items (sparc abi) even though java would only store | |
916 // 32bits for a parameter. On 32bit it will simply be 32 bits | |
917 // So this routine will do 32->32 on 32bit and 32->64 on 64bit | |
918 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
919 if (src.first()->is_stack()) { | |
920 if (dst.first()->is_stack()) { | |
921 // stack to stack | |
922 __ movslq(rax, Address(rbp, reg2offset_in(src.first()))); | |
923 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
924 } else { | |
925 // stack to reg | |
926 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); | |
927 } | |
928 } else if (dst.first()->is_stack()) { | |
929 // reg to stack | |
930 // Do we really have to sign extend??? | |
931 // __ movslq(src.first()->as_Register(), src.first()->as_Register()); | |
932 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
933 } else { | |
934 // Do we really have to sign extend??? | |
935 // __ movslq(dst.first()->as_Register(), src.first()->as_Register()); | |
936 if (dst.first() != src.first()) { | |
937 __ movq(dst.first()->as_Register(), src.first()->as_Register()); | |
938 } | |
939 } | |
940 } | |
941 | |
942 | |
943 // An oop arg. Must pass a handle not the oop itself | |
944 static void object_move(MacroAssembler* masm, | |
945 OopMap* map, | |
946 int oop_handle_offset, | |
947 int framesize_in_slots, | |
948 VMRegPair src, | |
949 VMRegPair dst, | |
950 bool is_receiver, | |
951 int* receiver_offset) { | |
952 | |
953 // must pass a handle. First figure out the location we use as a handle | |
954 | |
955 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register(); | |
956 | |
957 // See if oop is NULL if it is we need no handle | |
958 | |
959 if (src.first()->is_stack()) { | |
960 | |
961 // Oop is already on the stack as an argument | |
962 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
963 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
964 if (is_receiver) { | |
965 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
966 } | |
967 | |
304 | 968 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); |
969 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); | |
0 | 970 // conditionally move a NULL |
304 | 971 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first()))); |
0 | 972 } else { |
973 | |
974 // Oop is in an a register we must store it to the space we reserve | |
975 // on the stack for oop_handles and pass a handle if oop is non-NULL | |
976 | |
977 const Register rOop = src.first()->as_Register(); | |
978 int oop_slot; | |
979 if (rOop == j_rarg0) | |
980 oop_slot = 0; | |
981 else if (rOop == j_rarg1) | |
982 oop_slot = 1; | |
983 else if (rOop == j_rarg2) | |
984 oop_slot = 2; | |
985 else if (rOop == j_rarg3) | |
986 oop_slot = 3; | |
987 else if (rOop == j_rarg4) | |
988 oop_slot = 4; | |
989 else { | |
990 assert(rOop == j_rarg5, "wrong register"); | |
991 oop_slot = 5; | |
992 } | |
993 | |
994 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset; | |
995 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
996 | |
997 map->set_oop(VMRegImpl::stack2reg(oop_slot)); | |
998 // Store oop in handle area, may be NULL | |
304 | 999 __ movptr(Address(rsp, offset), rOop); |
0 | 1000 if (is_receiver) { |
1001 *receiver_offset = offset; | |
1002 } | |
1003 | |
304 | 1004 __ cmpptr(rOop, (int32_t)NULL_WORD); |
1005 __ lea(rHandle, Address(rsp, offset)); | |
0 | 1006 // conditionally move a NULL from the handle area where it was just stored |
304 | 1007 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset)); |
0 | 1008 } |
1009 | |
1010 // If arg is on the stack then place it otherwise it is already in correct reg. | |
1011 if (dst.first()->is_stack()) { | |
304 | 1012 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
0 | 1013 } |
1014 } | |
1015 | |
1016 // A float arg may have to do float reg int reg conversion | |
1017 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1018 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
1019 | |
1020 // The calling conventions assures us that each VMregpair is either | |
1021 // all really one physical register or adjacent stack slots. | |
1022 // This greatly simplifies the cases here compared to sparc. | |
1023 | |
1024 if (src.first()->is_stack()) { | |
1025 if (dst.first()->is_stack()) { | |
1026 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); | |
304 | 1027 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); |
0 | 1028 } else { |
1029 // stack to reg | |
1030 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
1031 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first()))); | |
1032 } | |
1033 } else if (dst.first()->is_stack()) { | |
1034 // reg to stack | |
1035 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
1036 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1037 } else { | |
1038 // reg to reg | |
1039 // In theory these overlap but the ordering is such that this is likely a nop | |
1040 if ( src.first() != dst.first()) { | |
1041 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
1042 } | |
1043 } | |
1044 } | |
1045 | |
1046 // A long move | |
1047 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1048 | |
1049 // The calling conventions assures us that each VMregpair is either | |
1050 // all really one physical register or adjacent stack slots. | |
1051 // This greatly simplifies the cases here compared to sparc. | |
1052 | |
1053 if (src.is_single_phys_reg() ) { | |
1054 if (dst.is_single_phys_reg()) { | |
1055 if (dst.first() != src.first()) { | |
304 | 1056 __ mov(dst.first()->as_Register(), src.first()->as_Register()); |
0 | 1057 } |
1058 } else { | |
1059 assert(dst.is_single_reg(), "not a stack pair"); | |
1060 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
1061 } | |
1062 } else if (dst.is_single_phys_reg()) { | |
1063 assert(src.is_single_reg(), "not a stack pair"); | |
1064 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first()))); | |
1065 } else { | |
1066 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
1067 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1068 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1069 } | |
1070 } | |
1071 | |
1072 // A double move | |
1073 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1074 | |
1075 // The calling conventions assures us that each VMregpair is either | |
1076 // all really one physical register or adjacent stack slots. | |
1077 // This greatly simplifies the cases here compared to sparc. | |
1078 | |
1079 if (src.is_single_phys_reg() ) { | |
1080 if (dst.is_single_phys_reg()) { | |
1081 // In theory these overlap but the ordering is such that this is likely a nop | |
1082 if ( src.first() != dst.first()) { | |
1083 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
1084 } | |
1085 } else { | |
1086 assert(dst.is_single_reg(), "not a stack pair"); | |
1087 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1088 } | |
1089 } else if (dst.is_single_phys_reg()) { | |
1090 assert(src.is_single_reg(), "not a stack pair"); | |
1091 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first()))); | |
1092 } else { | |
1093 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
1094 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1095 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1096 } | |
1097 } | |
1098 | |
1099 | |
1100 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1101 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1102 // which by this time is free to use | |
1103 switch (ret_type) { | |
1104 case T_FLOAT: | |
1105 __ movflt(Address(rbp, -wordSize), xmm0); | |
1106 break; | |
1107 case T_DOUBLE: | |
1108 __ movdbl(Address(rbp, -wordSize), xmm0); | |
1109 break; | |
1110 case T_VOID: break; | |
1111 default: { | |
304 | 1112 __ movptr(Address(rbp, -wordSize), rax); |
0 | 1113 } |
1114 } | |
1115 } | |
1116 | |
1117 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1118 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1119 // which by this time is free to use | |
1120 switch (ret_type) { | |
1121 case T_FLOAT: | |
1122 __ movflt(xmm0, Address(rbp, -wordSize)); | |
1123 break; | |
1124 case T_DOUBLE: | |
1125 __ movdbl(xmm0, Address(rbp, -wordSize)); | |
1126 break; | |
1127 case T_VOID: break; | |
1128 default: { | |
304 | 1129 __ movptr(rax, Address(rbp, -wordSize)); |
0 | 1130 } |
1131 } | |
1132 } | |
1133 | |
1134 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
1135 for ( int i = first_arg ; i < arg_count ; i++ ) { | |
1136 if (args[i].first()->is_Register()) { | |
304 | 1137 __ push(args[i].first()->as_Register()); |
0 | 1138 } else if (args[i].first()->is_XMMRegister()) { |
304 | 1139 __ subptr(rsp, 2*wordSize); |
0 | 1140 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister()); |
1141 } | |
1142 } | |
1143 } | |
1144 | |
1145 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
1146 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) { | |
1147 if (args[i].first()->is_Register()) { | |
304 | 1148 __ pop(args[i].first()->as_Register()); |
0 | 1149 } else if (args[i].first()->is_XMMRegister()) { |
1150 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0)); | |
304 | 1151 __ addptr(rsp, 2*wordSize); |
0 | 1152 } |
1153 } | |
1154 } | |
1155 | |
1156 // --------------------------------------------------------------------------- | |
1157 // Generate a native wrapper for a given method. The method takes arguments | |
1158 // in the Java compiled code convention, marshals them to the native | |
1159 // convention (handlizes oops, etc), transitions to native, makes the call, | |
1160 // returns to java state (possibly blocking), unhandlizes any result and | |
1161 // returns. | |
1162 nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm, | |
1163 methodHandle method, | |
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1164 int compile_id, |
0 | 1165 int total_in_args, |
1166 int comp_args_on_stack, | |
1167 BasicType *in_sig_bt, | |
1168 VMRegPair *in_regs, | |
1169 BasicType ret_type) { | |
1170 // Native nmethod wrappers never take possesion of the oop arguments. | |
1171 // So the caller will gc the arguments. The only thing we need an | |
1172 // oopMap for is if the call is static | |
1173 // | |
1174 // An OopMap for lock (and class if static) | |
1175 OopMapSet *oop_maps = new OopMapSet(); | |
1176 intptr_t start = (intptr_t)__ pc(); | |
1177 | |
1178 // We have received a description of where all the java arg are located | |
1179 // on entry to the wrapper. We need to convert these args to where | |
1180 // the jni function will expect them. To figure out where they go | |
1181 // we convert the java signature to a C signature by inserting | |
1182 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
1183 | |
1184 int total_c_args = total_in_args + 1; | |
1185 if (method->is_static()) { | |
1186 total_c_args++; | |
1187 } | |
1188 | |
1189 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
1190 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); | |
1191 | |
1192 int argc = 0; | |
1193 out_sig_bt[argc++] = T_ADDRESS; | |
1194 if (method->is_static()) { | |
1195 out_sig_bt[argc++] = T_OBJECT; | |
1196 } | |
1197 | |
1198 for (int i = 0; i < total_in_args ; i++ ) { | |
1199 out_sig_bt[argc++] = in_sig_bt[i]; | |
1200 } | |
1201 | |
1202 // Now figure out where the args must be stored and how much stack space | |
1203 // they require. | |
1204 // | |
1205 int out_arg_slots; | |
1206 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); | |
1207 | |
1208 // Compute framesize for the wrapper. We need to handlize all oops in | |
1209 // incoming registers | |
1210 | |
1211 // Calculate the total number of stack slots we will need. | |
1212 | |
1213 // First count the abi requirement plus all of the outgoing args | |
1214 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
1215 | |
1216 // Now the space for the inbound oop handle area | |
1217 | |
1218 int oop_handle_offset = stack_slots; | |
1219 stack_slots += 6*VMRegImpl::slots_per_word; | |
1220 | |
1221 // Now any space we need for handlizing a klass if static method | |
1222 | |
1223 int oop_temp_slot_offset = 0; | |
1224 int klass_slot_offset = 0; | |
1225 int klass_offset = -1; | |
1226 int lock_slot_offset = 0; | |
1227 bool is_static = false; | |
1228 | |
1229 if (method->is_static()) { | |
1230 klass_slot_offset = stack_slots; | |
1231 stack_slots += VMRegImpl::slots_per_word; | |
1232 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
1233 is_static = true; | |
1234 } | |
1235 | |
1236 // Plus a lock if needed | |
1237 | |
1238 if (method->is_synchronized()) { | |
1239 lock_slot_offset = stack_slots; | |
1240 stack_slots += VMRegImpl::slots_per_word; | |
1241 } | |
1242 | |
1243 // Now a place (+2) to save return values or temp during shuffling | |
1244 // + 4 for return address (which we own) and saved rbp | |
1245 stack_slots += 6; | |
1246 | |
1247 // Ok The space we have allocated will look like: | |
1248 // | |
1249 // | |
1250 // FP-> | | | |
1251 // |---------------------| | |
1252 // | 2 slots for moves | | |
1253 // |---------------------| | |
1254 // | lock box (if sync) | | |
1255 // |---------------------| <- lock_slot_offset | |
1256 // | klass (if static) | | |
1257 // |---------------------| <- klass_slot_offset | |
1258 // | oopHandle area | | |
1259 // |---------------------| <- oop_handle_offset (6 java arg registers) | |
1260 // | outbound memory | | |
1261 // | based arguments | | |
1262 // | | | |
1263 // |---------------------| | |
1264 // | | | |
1265 // SP-> | out_preserved_slots | | |
1266 // | |
1267 // | |
1268 | |
1269 | |
1270 // Now compute actual number of stack words we need rounding to make | |
1271 // stack properly aligned. | |
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1272 stack_slots = round_to(stack_slots, StackAlignmentInSlots); |
0 | 1273 |
1274 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
1275 | |
1276 | |
1277 // First thing make an ic check to see if we should even be here | |
1278 | |
1279 // We are free to use all registers as temps without saving them and | |
1280 // restoring them except rbp. rbp is the only callee save register | |
1281 // as far as the interpreter and the compiler(s) are concerned. | |
1282 | |
1283 | |
1284 const Register ic_reg = rax; | |
1285 const Register receiver = j_rarg0; | |
1286 | |
1287 Label ok; | |
1288 Label exception_pending; | |
1289 | |
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1290 assert_different_registers(ic_reg, receiver, rscratch1); |
0 | 1291 __ verify_oop(receiver); |
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1292 __ load_klass(rscratch1, receiver); |
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1293 __ cmpq(ic_reg, rscratch1); |
0 | 1294 __ jcc(Assembler::equal, ok); |
1295 | |
1296 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
1297 | |
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1298 __ bind(ok); |
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1299 |
0 | 1300 // Verified entry point must be aligned |
1301 __ align(8); | |
1302 | |
1303 int vep_offset = ((intptr_t)__ pc()) - start; | |
1304 | |
1305 // The instruction at the verified entry point must be 5 bytes or longer | |
1306 // because it can be patched on the fly by make_non_entrant. The stack bang | |
1307 // instruction fits that requirement. | |
1308 | |
1309 // Generate stack overflow check | |
1310 | |
1311 if (UseStackBanging) { | |
1312 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); | |
1313 } else { | |
1314 // need a 5 byte instruction to allow MT safe patching to non-entrant | |
1315 __ fat_nop(); | |
1316 } | |
1317 | |
1318 // Generate a new frame for the wrapper. | |
1319 __ enter(); | |
1320 // -2 because return address is already present and so is saved rbp | |
304 | 1321 __ subptr(rsp, stack_size - 2*wordSize); |
0 | 1322 |
1323 // Frame is now completed as far as size and linkage. | |
1324 | |
1325 int frame_complete = ((intptr_t)__ pc()) - start; | |
1326 | |
1327 #ifdef ASSERT | |
1328 { | |
1329 Label L; | |
304 | 1330 __ mov(rax, rsp); |
605 | 1331 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI) |
304 | 1332 __ cmpptr(rax, rsp); |
0 | 1333 __ jcc(Assembler::equal, L); |
1334 __ stop("improperly aligned stack"); | |
1335 __ bind(L); | |
1336 } | |
1337 #endif /* ASSERT */ | |
1338 | |
1339 | |
1340 // We use r14 as the oop handle for the receiver/klass | |
1341 // It is callee save so it survives the call to native | |
1342 | |
1343 const Register oop_handle_reg = r14; | |
1344 | |
1345 | |
1346 | |
1347 // | |
1348 // We immediately shuffle the arguments so that any vm call we have to | |
1349 // make from here on out (sync slow path, jvmti, etc.) we will have | |
1350 // captured the oops from our caller and have a valid oopMap for | |
1351 // them. | |
1352 | |
1353 // ----------------- | |
1354 // The Grand Shuffle | |
1355 | |
1356 // The Java calling convention is either equal (linux) or denser (win64) than the | |
1357 // c calling convention. However the because of the jni_env argument the c calling | |
1358 // convention always has at least one more (and two for static) arguments than Java. | |
1359 // Therefore if we move the args from java -> c backwards then we will never have | |
1360 // a register->register conflict and we don't have to build a dependency graph | |
1361 // and figure out how to break any cycles. | |
1362 // | |
1363 | |
1364 // Record esp-based slot for receiver on stack for non-static methods | |
1365 int receiver_offset = -1; | |
1366 | |
1367 // This is a trick. We double the stack slots so we can claim | |
1368 // the oops in the caller's frame. Since we are sure to have | |
1369 // more args than the caller doubling is enough to make | |
1370 // sure we can capture all the incoming oop args from the | |
1371 // caller. | |
1372 // | |
1373 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
1374 | |
1375 // Mark location of rbp (someday) | |
1376 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp)); | |
1377 | |
1378 // Use eax, ebx as temporaries during any memory-memory moves we have to do | |
1379 // All inbound args are referenced based on rbp and all outbound args via rsp. | |
1380 | |
1381 | |
1382 #ifdef ASSERT | |
1383 bool reg_destroyed[RegisterImpl::number_of_registers]; | |
1384 bool freg_destroyed[XMMRegisterImpl::number_of_registers]; | |
1385 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { | |
1386 reg_destroyed[r] = false; | |
1387 } | |
1388 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) { | |
1389 freg_destroyed[f] = false; | |
1390 } | |
1391 | |
1392 #endif /* ASSERT */ | |
1393 | |
1394 | |
1395 int c_arg = total_c_args - 1; | |
1396 for ( int i = total_in_args - 1; i >= 0 ; i--, c_arg-- ) { | |
1397 #ifdef ASSERT | |
1398 if (in_regs[i].first()->is_Register()) { | |
1399 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!"); | |
1400 } else if (in_regs[i].first()->is_XMMRegister()) { | |
1401 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!"); | |
1402 } | |
1403 if (out_regs[c_arg].first()->is_Register()) { | |
1404 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; | |
1405 } else if (out_regs[c_arg].first()->is_XMMRegister()) { | |
1406 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; | |
1407 } | |
1408 #endif /* ASSERT */ | |
1409 switch (in_sig_bt[i]) { | |
1410 case T_ARRAY: | |
1411 case T_OBJECT: | |
1412 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], | |
1413 ((i == 0) && (!is_static)), | |
1414 &receiver_offset); | |
1415 break; | |
1416 case T_VOID: | |
1417 break; | |
1418 | |
1419 case T_FLOAT: | |
1420 float_move(masm, in_regs[i], out_regs[c_arg]); | |
1421 break; | |
1422 | |
1423 case T_DOUBLE: | |
1424 assert( i + 1 < total_in_args && | |
1425 in_sig_bt[i + 1] == T_VOID && | |
1426 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
1427 double_move(masm, in_regs[i], out_regs[c_arg]); | |
1428 break; | |
1429 | |
1430 case T_LONG : | |
1431 long_move(masm, in_regs[i], out_regs[c_arg]); | |
1432 break; | |
1433 | |
1434 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
1435 | |
1436 default: | |
1437 move32_64(masm, in_regs[i], out_regs[c_arg]); | |
1438 } | |
1439 } | |
1440 | |
1441 // point c_arg at the first arg that is already loaded in case we | |
1442 // need to spill before we call out | |
1443 c_arg++; | |
1444 | |
1445 // Pre-load a static method's oop into r14. Used both by locking code and | |
1446 // the normal JNI call code. | |
1447 if (method->is_static()) { | |
1448 | |
1449 // load oop into a register | |
1450 __ movoop(oop_handle_reg, JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror())); | |
1451 | |
1452 // Now handlize the static class mirror it's known not-null. | |
304 | 1453 __ movptr(Address(rsp, klass_offset), oop_handle_reg); |
0 | 1454 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
1455 | |
1456 // Now get the handle | |
304 | 1457 __ lea(oop_handle_reg, Address(rsp, klass_offset)); |
0 | 1458 // store the klass handle as second argument |
304 | 1459 __ movptr(c_rarg1, oop_handle_reg); |
0 | 1460 // and protect the arg if we must spill |
1461 c_arg--; | |
1462 } | |
1463 | |
1464 // Change state to native (we save the return address in the thread, since it might not | |
1465 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() | |
1466 // points into the right code segment. It does not have to be the correct return pc. | |
1467 // We use the same pc/oopMap repeatedly when we call out | |
1468 | |
1469 intptr_t the_pc = (intptr_t) __ pc(); | |
1470 oop_maps->add_gc_map(the_pc - start, map); | |
1471 | |
1472 __ set_last_Java_frame(rsp, noreg, (address)the_pc); | |
1473 | |
1474 | |
1475 // We have all of the arguments setup at this point. We must not touch any register | |
1476 // argument registers at this point (what if we save/restore them there are no oop? | |
1477 | |
1478 { | |
1479 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
1480 // protect the args we've loaded | |
1481 save_args(masm, total_c_args, c_arg, out_regs); | |
1482 __ movoop(c_rarg1, JNIHandles::make_local(method())); | |
1483 __ call_VM_leaf( | |
1484 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
1485 r15_thread, c_rarg1); | |
1486 restore_args(masm, total_c_args, c_arg, out_regs); | |
1487 } | |
1488 | |
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1489 // RedefineClasses() tracing support for obsolete method entry |
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1490 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
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1491 // protect the args we've loaded |
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1492 save_args(masm, total_c_args, c_arg, out_regs); |
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1493 __ movoop(c_rarg1, JNIHandles::make_local(method())); |
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1494 __ call_VM_leaf( |
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1495 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
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1496 r15_thread, c_rarg1); |
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1497 restore_args(masm, total_c_args, c_arg, out_regs); |
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1498 } |
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1499 |
0 | 1500 // Lock a synchronized method |
1501 | |
1502 // Register definitions used by locking and unlocking | |
1503 | |
1504 const Register swap_reg = rax; // Must use rax for cmpxchg instruction | |
1505 const Register obj_reg = rbx; // Will contain the oop | |
1506 const Register lock_reg = r13; // Address of compiler lock object (BasicLock) | |
1507 const Register old_hdr = r13; // value of old header at unlock time | |
1508 | |
1509 Label slow_path_lock; | |
1510 Label lock_done; | |
1511 | |
1512 if (method->is_synchronized()) { | |
1513 | |
1514 | |
1515 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); | |
1516 | |
1517 // Get the handle (the 2nd argument) | |
304 | 1518 __ mov(oop_handle_reg, c_rarg1); |
0 | 1519 |
1520 // Get address of the box | |
1521 | |
304 | 1522 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
0 | 1523 |
1524 // Load the oop from the handle | |
304 | 1525 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 1526 |
1527 if (UseBiasedLocking) { | |
1528 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock); | |
1529 } | |
1530 | |
1531 // Load immediate 1 into swap_reg %rax | |
1532 __ movl(swap_reg, 1); | |
1533 | |
1534 // Load (object->mark() | 1) into swap_reg %rax | |
304 | 1535 __ orptr(swap_reg, Address(obj_reg, 0)); |
0 | 1536 |
1537 // Save (object->mark() | 1) into BasicLock's displaced header | |
304 | 1538 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 1539 |
1540 if (os::is_MP()) { | |
1541 __ lock(); | |
1542 } | |
1543 | |
1544 // src -> dest iff dest == rax else rax <- dest | |
304 | 1545 __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); |
0 | 1546 __ jcc(Assembler::equal, lock_done); |
1547 | |
1548 // Hmm should this move to the slow path code area??? | |
1549 | |
1550 // Test if the oopMark is an obvious stack pointer, i.e., | |
1551 // 1) (mark & 3) == 0, and | |
1552 // 2) rsp <= mark < mark + os::pagesize() | |
1553 // These 3 tests can be done by evaluating the following | |
1554 // expression: ((mark - rsp) & (3 - os::vm_page_size())), | |
1555 // assuming both stack pointer and pagesize have their | |
1556 // least significant 2 bits clear. | |
1557 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg | |
1558 | |
304 | 1559 __ subptr(swap_reg, rsp); |
1560 __ andptr(swap_reg, 3 - os::vm_page_size()); | |
0 | 1561 |
1562 // Save the test result, for recursive case, the result is zero | |
304 | 1563 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 1564 __ jcc(Assembler::notEqual, slow_path_lock); |
1565 | |
1566 // Slow path will re-enter here | |
1567 | |
1568 __ bind(lock_done); | |
1569 } | |
1570 | |
1571 | |
1572 // Finally just about ready to make the JNI call | |
1573 | |
1574 | |
1575 // get JNIEnv* which is first argument to native | |
1576 | |
304 | 1577 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset()))); |
0 | 1578 |
1579 // Now set thread in native | |
304 | 1580 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native); |
0 | 1581 |
1582 __ call(RuntimeAddress(method->native_function())); | |
1583 | |
1584 // Either restore the MXCSR register after returning from the JNI Call | |
1585 // or verify that it wasn't changed. | |
1586 if (RestoreMXCSROnJNICalls) { | |
304 | 1587 __ ldmxcsr(ExternalAddress(StubRoutines::x86::mxcsr_std())); |
0 | 1588 |
1589 } | |
1590 else if (CheckJNICalls ) { | |
304 | 1591 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::verify_mxcsr_entry()))); |
0 | 1592 } |
1593 | |
1594 | |
1595 // Unpack native results. | |
1596 switch (ret_type) { | |
1597 case T_BOOLEAN: __ c2bool(rax); break; | |
1598 case T_CHAR : __ movzwl(rax, rax); break; | |
1599 case T_BYTE : __ sign_extend_byte (rax); break; | |
1600 case T_SHORT : __ sign_extend_short(rax); break; | |
1601 case T_INT : /* nothing to do */ break; | |
1602 case T_DOUBLE : | |
1603 case T_FLOAT : | |
1604 // Result is in xmm0 we'll save as needed | |
1605 break; | |
1606 case T_ARRAY: // Really a handle | |
1607 case T_OBJECT: // Really a handle | |
1608 break; // can't de-handlize until after safepoint check | |
1609 case T_VOID: break; | |
1610 case T_LONG: break; | |
1611 default : ShouldNotReachHere(); | |
1612 } | |
1613 | |
1614 // Switch thread to "native transition" state before reading the synchronization state. | |
1615 // This additional state is necessary because reading and testing the synchronization | |
1616 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
1617 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
1618 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
1619 // Thread A is resumed to finish this native method, but doesn't block here since it | |
1620 // didn't see any synchronization is progress, and escapes. | |
304 | 1621 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans); |
0 | 1622 |
1623 if(os::is_MP()) { | |
1624 if (UseMembar) { | |
1625 // Force this write out before the read below | |
1626 __ membar(Assembler::Membar_mask_bits( | |
1627 Assembler::LoadLoad | Assembler::LoadStore | | |
1628 Assembler::StoreLoad | Assembler::StoreStore)); | |
1629 } else { | |
1630 // Write serialization page so VM thread can do a pseudo remote membar. | |
1631 // We use the current thread pointer to calculate a thread specific | |
1632 // offset to write to within the page. This minimizes bus traffic | |
1633 // due to cache line collision. | |
1634 __ serialize_memory(r15_thread, rcx); | |
1635 } | |
1636 } | |
1637 | |
1638 | |
1639 // check for safepoint operation in progress and/or pending suspend requests | |
1640 { | |
1641 Label Continue; | |
1642 | |
1643 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), | |
1644 SafepointSynchronize::_not_synchronized); | |
1645 | |
1646 Label L; | |
1647 __ jcc(Assembler::notEqual, L); | |
1648 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0); | |
1649 __ jcc(Assembler::equal, Continue); | |
1650 __ bind(L); | |
1651 | |
1652 // Don't use call_VM as it will see a possible pending exception and forward it | |
1653 // and never return here preventing us from clearing _last_native_pc down below. | |
1654 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are | |
1655 // preserved and correspond to the bcp/locals pointers. So we do a runtime call | |
1656 // by hand. | |
1657 // | |
1658 save_native_result(masm, ret_type, stack_slots); | |
304 | 1659 __ mov(c_rarg0, r15_thread); |
1660 __ mov(r12, rsp); // remember sp | |
1661 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
1662 __ andptr(rsp, -16); // align stack as required by ABI | |
0 | 1663 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans))); |
304 | 1664 __ mov(rsp, r12); // restore sp |
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1665 __ reinit_heapbase(); |
0 | 1666 // Restore any method result value |
1667 restore_native_result(masm, ret_type, stack_slots); | |
1668 __ bind(Continue); | |
1669 } | |
1670 | |
1671 // change thread state | |
1672 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java); | |
1673 | |
1674 Label reguard; | |
1675 Label reguard_done; | |
1676 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); | |
1677 __ jcc(Assembler::equal, reguard); | |
1678 __ bind(reguard_done); | |
1679 | |
1680 // native result if any is live | |
1681 | |
1682 // Unlock | |
1683 Label unlock_done; | |
1684 Label slow_path_unlock; | |
1685 if (method->is_synchronized()) { | |
1686 | |
1687 // Get locked oop from the handle we passed to jni | |
304 | 1688 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 1689 |
1690 Label done; | |
1691 | |
1692 if (UseBiasedLocking) { | |
1693 __ biased_locking_exit(obj_reg, old_hdr, done); | |
1694 } | |
1695 | |
1696 // Simple recursive lock? | |
1697 | |
304 | 1698 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD); |
0 | 1699 __ jcc(Assembler::equal, done); |
1700 | |
1701 // Must save rax if if it is live now because cmpxchg must use it | |
1702 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
1703 save_native_result(masm, ret_type, stack_slots); | |
1704 } | |
1705 | |
1706 | |
1707 // get address of the stack lock | |
304 | 1708 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
0 | 1709 // get old displaced header |
304 | 1710 __ movptr(old_hdr, Address(rax, 0)); |
0 | 1711 |
1712 // Atomic swap old header if oop still contains the stack lock | |
1713 if (os::is_MP()) { | |
1714 __ lock(); | |
1715 } | |
304 | 1716 __ cmpxchgptr(old_hdr, Address(obj_reg, 0)); |
0 | 1717 __ jcc(Assembler::notEqual, slow_path_unlock); |
1718 | |
1719 // slow path re-enters here | |
1720 __ bind(unlock_done); | |
1721 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
1722 restore_native_result(masm, ret_type, stack_slots); | |
1723 } | |
1724 | |
1725 __ bind(done); | |
1726 | |
1727 } | |
1728 { | |
1729 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
1730 save_native_result(masm, ret_type, stack_slots); | |
1731 __ movoop(c_rarg1, JNIHandles::make_local(method())); | |
1732 __ call_VM_leaf( | |
1733 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
1734 r15_thread, c_rarg1); | |
1735 restore_native_result(masm, ret_type, stack_slots); | |
1736 } | |
1737 | |
1738 __ reset_last_Java_frame(false, true); | |
1739 | |
1740 // Unpack oop result | |
1741 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
1742 Label L; | |
304 | 1743 __ testptr(rax, rax); |
0 | 1744 __ jcc(Assembler::zero, L); |
304 | 1745 __ movptr(rax, Address(rax, 0)); |
0 | 1746 __ bind(L); |
1747 __ verify_oop(rax); | |
1748 } | |
1749 | |
1750 // reset handle block | |
304 | 1751 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset())); |
1752 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD); | |
0 | 1753 |
1754 // pop our frame | |
1755 | |
1756 __ leave(); | |
1757 | |
1758 // Any exception pending? | |
304 | 1759 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
0 | 1760 __ jcc(Assembler::notEqual, exception_pending); |
1761 | |
1762 // Return | |
1763 | |
1764 __ ret(0); | |
1765 | |
1766 // Unexpected paths are out of line and go here | |
1767 | |
1768 // forward the exception | |
1769 __ bind(exception_pending); | |
1770 | |
1771 // and forward the exception | |
1772 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
1773 | |
1774 | |
1775 // Slow path locking & unlocking | |
1776 if (method->is_synchronized()) { | |
1777 | |
1778 // BEGIN Slow path lock | |
1779 __ bind(slow_path_lock); | |
1780 | |
1781 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM | |
1782 // args are (oop obj, BasicLock* lock, JavaThread* thread) | |
1783 | |
1784 // protect the args we've loaded | |
1785 save_args(masm, total_c_args, c_arg, out_regs); | |
1786 | |
304 | 1787 __ mov(c_rarg0, obj_reg); |
1788 __ mov(c_rarg1, lock_reg); | |
1789 __ mov(c_rarg2, r15_thread); | |
0 | 1790 |
1791 // Not a leaf but we have last_Java_frame setup as we want | |
1792 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3); | |
1793 restore_args(masm, total_c_args, c_arg, out_regs); | |
1794 | |
1795 #ifdef ASSERT | |
1796 { Label L; | |
304 | 1797 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
0 | 1798 __ jcc(Assembler::equal, L); |
1799 __ stop("no pending exception allowed on exit from monitorenter"); | |
1800 __ bind(L); | |
1801 } | |
1802 #endif | |
1803 __ jmp(lock_done); | |
1804 | |
1805 // END Slow path lock | |
1806 | |
1807 // BEGIN Slow path unlock | |
1808 __ bind(slow_path_unlock); | |
1809 | |
1810 // If we haven't already saved the native result we must save it now as xmm registers | |
1811 // are still exposed. | |
1812 | |
1813 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
1814 save_native_result(masm, ret_type, stack_slots); | |
1815 } | |
1816 | |
304 | 1817 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
1818 | |
1819 __ mov(c_rarg0, obj_reg); | |
1820 __ mov(r12, rsp); // remember sp | |
1821 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
1822 __ andptr(rsp, -16); // align stack as required by ABI | |
0 | 1823 |
1824 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) | |
1825 // NOTE that obj_reg == rbx currently | |
304 | 1826 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset()))); |
1827 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); | |
0 | 1828 |
1829 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); | |
304 | 1830 __ mov(rsp, r12); // restore sp |
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1831 __ reinit_heapbase(); |
0 | 1832 #ifdef ASSERT |
1833 { | |
1834 Label L; | |
304 | 1835 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); |
0 | 1836 __ jcc(Assembler::equal, L); |
1837 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); | |
1838 __ bind(L); | |
1839 } | |
1840 #endif /* ASSERT */ | |
1841 | |
304 | 1842 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx); |
0 | 1843 |
1844 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
1845 restore_native_result(masm, ret_type, stack_slots); | |
1846 } | |
1847 __ jmp(unlock_done); | |
1848 | |
1849 // END Slow path unlock | |
1850 | |
1851 } // synchronized | |
1852 | |
1853 // SLOW PATH Reguard the stack if needed | |
1854 | |
1855 __ bind(reguard); | |
1856 save_native_result(masm, ret_type, stack_slots); | |
304 | 1857 __ mov(r12, rsp); // remember sp |
1858 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
1859 __ andptr(rsp, -16); // align stack as required by ABI | |
0 | 1860 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); |
304 | 1861 __ mov(rsp, r12); // restore sp |
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1862 __ reinit_heapbase(); |
0 | 1863 restore_native_result(masm, ret_type, stack_slots); |
1864 // and continue | |
1865 __ jmp(reguard_done); | |
1866 | |
1867 | |
1868 | |
1869 __ flush(); | |
1870 | |
1871 nmethod *nm = nmethod::new_native_nmethod(method, | |
2405
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1872 compile_id, |
0 | 1873 masm->code(), |
1874 vep_offset, | |
1875 frame_complete, | |
1876 stack_slots / VMRegImpl::slots_per_word, | |
1877 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
1878 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), | |
1879 oop_maps); | |
1880 return nm; | |
1881 | |
1882 } | |
1883 | |
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1884 #ifdef HAVE_DTRACE_H |
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1885 // --------------------------------------------------------------------------- |
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1886 // Generate a dtrace nmethod for a given signature. The method takes arguments |
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1887 // in the Java compiled code convention, marshals them to the native |
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1888 // abi and then leaves nops at the position you would expect to call a native |
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1889 // function. When the probe is enabled the nops are replaced with a trap |
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1890 // instruction that dtrace inserts and the trace will cause a notification |
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1891 // to dtrace. |
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1892 // |
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1893 // The probes are only able to take primitive types and java/lang/String as |
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1894 // arguments. No other java types are allowed. Strings are converted to utf8 |
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1895 // strings so that from dtrace point of view java strings are converted to C |
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1896 // strings. There is an arbitrary fixed limit on the total space that a method |
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1897 // can use for converting the strings. (256 chars per string in the signature). |
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1898 // So any java string larger then this is truncated. |
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1899 |
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1900 static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 }; |
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1901 static bool offsets_initialized = false; |
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1902 |
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1903 |
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1904 nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm, |
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1905 methodHandle method) { |
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1906 |
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1907 |
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1908 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
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1909 // be single threaded in this method. |
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1910 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
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1911 |
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1912 if (!offsets_initialized) { |
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1913 fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize; |
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1914 fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize; |
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1915 fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize; |
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1916 fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize; |
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1917 fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize; |
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1918 fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize; |
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1919 |
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1920 fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize; |
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1921 fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize; |
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1922 fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize; |
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1923 fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize; |
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1924 fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize; |
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1925 fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize; |
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1926 fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize; |
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1927 fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize; |
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1928 |
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1929 offsets_initialized = true; |
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1930 } |
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1931 // Fill in the signature array, for the calling-convention call. |
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1932 int total_args_passed = method->size_of_parameters(); |
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1933 |
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1934 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
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1935 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
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1936 |
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1937 // The signature we are going to use for the trap that dtrace will see |
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1938 // java/lang/String is converted. We drop "this" and any other object |
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1939 // is converted to NULL. (A one-slot java/lang/Long object reference |
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1940 // is converted to a two-slot long, which is why we double the allocation). |
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1941 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
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1942 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
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1943 |
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1944 int i=0; |
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1945 int total_strings = 0; |
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1946 int first_arg_to_pass = 0; |
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1947 int total_c_args = 0; |
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1948 |
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1949 // Skip the receiver as dtrace doesn't want to see it |
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1950 if( !method->is_static() ) { |
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1951 in_sig_bt[i++] = T_OBJECT; |
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1952 first_arg_to_pass = 1; |
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1953 } |
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1954 |
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1955 // We need to convert the java args to where a native (non-jni) function |
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1956 // would expect them. To figure out where they go we convert the java |
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1957 // signature to a C signature. |
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1958 |
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1959 SignatureStream ss(method->signature()); |
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1960 for ( ; !ss.at_return_type(); ss.next()) { |
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1961 BasicType bt = ss.type(); |
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1962 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
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1963 out_sig_bt[total_c_args++] = bt; |
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1964 if( bt == T_OBJECT) { |
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1965 Symbol* s = ss.as_symbol_or_null(); // symbol is created |
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1966 if (s == vmSymbols::java_lang_String()) { |
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1967 total_strings++; |
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1968 out_sig_bt[total_c_args-1] = T_ADDRESS; |
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1969 } else if (s == vmSymbols::java_lang_Boolean() || |
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1970 s == vmSymbols::java_lang_Character() || |
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1971 s == vmSymbols::java_lang_Byte() || |
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1972 s == vmSymbols::java_lang_Short() || |
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1973 s == vmSymbols::java_lang_Integer() || |
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1974 s == vmSymbols::java_lang_Float()) { |
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1975 out_sig_bt[total_c_args-1] = T_INT; |
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1976 } else if (s == vmSymbols::java_lang_Long() || |
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1977 s == vmSymbols::java_lang_Double()) { |
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1978 out_sig_bt[total_c_args-1] = T_LONG; |
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1979 out_sig_bt[total_c_args++] = T_VOID; |
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1980 } |
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1981 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
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1982 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
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1983 // We convert double to long |
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1984 out_sig_bt[total_c_args-1] = T_LONG; |
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1985 out_sig_bt[total_c_args++] = T_VOID; |
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1986 } else if ( bt == T_FLOAT) { |
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1987 // We convert float to int |
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1988 out_sig_bt[total_c_args-1] = T_INT; |
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1989 } |
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1990 } |
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1991 |
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1992 assert(i==total_args_passed, "validly parsed signature"); |
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1993 |
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1994 // Now get the compiled-Java layout as input arguments |
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1995 int comp_args_on_stack; |
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1996 comp_args_on_stack = SharedRuntime::java_calling_convention( |
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1997 in_sig_bt, in_regs, total_args_passed, false); |
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1998 |
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1999 // Now figure out where the args must be stored and how much stack space |
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2000 // they require (neglecting out_preserve_stack_slots but space for storing |
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2001 // the 1st six register arguments). It's weird see int_stk_helper. |
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2002 |
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2003 int out_arg_slots; |
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2004 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); |
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2005 |
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2006 // Calculate the total number of stack slots we will need. |
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2007 |
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2008 // First count the abi requirement plus all of the outgoing args |
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2009 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
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2010 |
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2011 // Now space for the string(s) we must convert |
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2012 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1); |
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2013 for (i = 0; i < total_strings ; i++) { |
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2014 string_locs[i] = stack_slots; |
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2015 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size; |
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2016 } |
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2017 |
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2018 // Plus the temps we might need to juggle register args |
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2019 // regs take two slots each |
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2020 stack_slots += (Argument::n_int_register_parameters_c + |
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2021 Argument::n_float_register_parameters_c) * 2; |
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2022 |
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2023 |
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2024 // + 4 for return address (which we own) and saved rbp, |
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2025 |
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2026 stack_slots += 4; |
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2027 |
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2028 // Ok The space we have allocated will look like: |
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2029 // |
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2030 // |
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2031 // FP-> | | |
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2032 // |---------------------| |
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2033 // | string[n] | |
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2034 // |---------------------| <- string_locs[n] |
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2035 // | string[n-1] | |
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2036 // |---------------------| <- string_locs[n-1] |
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2037 // | ... | |
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2038 // | ... | |
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2039 // |---------------------| <- string_locs[1] |
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2040 // | string[0] | |
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2041 // |---------------------| <- string_locs[0] |
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2042 // | outbound memory | |
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2043 // | based arguments | |
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2044 // | | |
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2045 // |---------------------| |
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2046 // | | |
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2047 // SP-> | out_preserved_slots | |
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2048 // |
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2049 // |
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2050 |
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2051 // Now compute actual number of stack words we need rounding to make |
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2052 // stack properly aligned. |
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2053 stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word); |
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2054 |
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2055 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
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2056 |
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2057 intptr_t start = (intptr_t)__ pc(); |
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2058 |
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2059 // First thing make an ic check to see if we should even be here |
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2060 |
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2061 // We are free to use all registers as temps without saving them and |
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2062 // restoring them except rbp. rbp, is the only callee save register |
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2063 // as far as the interpreter and the compiler(s) are concerned. |
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2064 |
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2065 const Register ic_reg = rax; |
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2066 const Register receiver = rcx; |
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2067 Label hit; |
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2068 Label exception_pending; |
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2069 |
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2070 |
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2071 __ verify_oop(receiver); |
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2072 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
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2073 __ jcc(Assembler::equal, hit); |
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2074 |
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2075 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); |
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2076 |
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2077 // verified entry must be aligned for code patching. |
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2078 // and the first 5 bytes must be in the same cache line |
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2079 // if we align at 8 then we will be sure 5 bytes are in the same line |
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2080 __ align(8); |
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2081 |
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2082 __ bind(hit); |
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2083 |
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2084 int vep_offset = ((intptr_t)__ pc()) - start; |
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2085 |
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2086 |
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2087 // The instruction at the verified entry point must be 5 bytes or longer |
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2088 // because it can be patched on the fly by make_non_entrant. The stack bang |
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2089 // instruction fits that requirement. |
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2090 |
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2091 // Generate stack overflow check |
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2092 |
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2093 if (UseStackBanging) { |
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2094 if (stack_size <= StackShadowPages*os::vm_page_size()) { |
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2095 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); |
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2096 } else { |
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2097 __ movl(rax, stack_size); |
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2098 __ bang_stack_size(rax, rbx); |
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2099 } |
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2100 } else { |
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2101 // need a 5 byte instruction to allow MT safe patching to non-entrant |
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2102 __ fat_nop(); |
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2103 } |
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2104 |
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2105 assert(((uintptr_t)__ pc() - start - vep_offset) >= 5, |
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2106 "valid size for make_non_entrant"); |
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2107 |
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2108 // Generate a new frame for the wrapper. |
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2109 __ enter(); |
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2110 |
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2111 // -4 because return address is already present and so is saved rbp, |
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2112 if (stack_size - 2*wordSize != 0) { |
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2113 __ subq(rsp, stack_size - 2*wordSize); |
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2114 } |
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2115 |
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2116 // Frame is now completed as far a size and linkage. |
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2117 |
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2118 int frame_complete = ((intptr_t)__ pc()) - start; |
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2119 |
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2120 int c_arg, j_arg; |
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2121 |
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2122 // State of input register args |
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2123 |
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2124 bool live[ConcreteRegisterImpl::number_of_registers]; |
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2125 |
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2126 live[j_rarg0->as_VMReg()->value()] = false; |
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2127 live[j_rarg1->as_VMReg()->value()] = false; |
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2128 live[j_rarg2->as_VMReg()->value()] = false; |
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2129 live[j_rarg3->as_VMReg()->value()] = false; |
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2130 live[j_rarg4->as_VMReg()->value()] = false; |
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2131 live[j_rarg5->as_VMReg()->value()] = false; |
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2132 |
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2133 live[j_farg0->as_VMReg()->value()] = false; |
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2134 live[j_farg1->as_VMReg()->value()] = false; |
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2135 live[j_farg2->as_VMReg()->value()] = false; |
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2136 live[j_farg3->as_VMReg()->value()] = false; |
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2137 live[j_farg4->as_VMReg()->value()] = false; |
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2138 live[j_farg5->as_VMReg()->value()] = false; |
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2139 live[j_farg6->as_VMReg()->value()] = false; |
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2140 live[j_farg7->as_VMReg()->value()] = false; |
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2141 |
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2142 |
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2143 bool rax_is_zero = false; |
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2144 |
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2145 // All args (except strings) destined for the stack are moved first |
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2146 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2147 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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2148 VMRegPair src = in_regs[j_arg]; |
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2149 VMRegPair dst = out_regs[c_arg]; |
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2150 |
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2151 // Get the real reg value or a dummy (rsp) |
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2152 |
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2153 int src_reg = src.first()->is_reg() ? |
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2154 src.first()->value() : |
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2155 rsp->as_VMReg()->value(); |
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2156 |
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2157 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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2158 (in_sig_bt[j_arg] == T_OBJECT && |
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2159 out_sig_bt[c_arg] != T_INT && |
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2160 out_sig_bt[c_arg] != T_ADDRESS && |
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2161 out_sig_bt[c_arg] != T_LONG); |
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2162 |
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2163 live[src_reg] = !useless; |
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2164 |
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2165 if (dst.first()->is_stack()) { |
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2166 |
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2167 // Even though a string arg in a register is still live after this loop |
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2168 // after the string conversion loop (next) it will be dead so we take |
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2169 // advantage of that now for simpler code to manage live. |
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2170 |
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2171 live[src_reg] = false; |
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2172 switch (in_sig_bt[j_arg]) { |
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2173 |
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2174 case T_ARRAY: |
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2175 case T_OBJECT: |
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2176 { |
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2177 Address stack_dst(rsp, reg2offset_out(dst.first())); |
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2178 |
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2179 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
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2180 // need to unbox a one-word value |
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2181 Register in_reg = rax; |
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2182 if ( src.first()->is_reg() ) { |
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2183 in_reg = src.first()->as_Register(); |
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2184 } else { |
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2185 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
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2186 rax_is_zero = false; |
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2187 } |
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2188 Label skipUnbox; |
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2189 __ movptr(Address(rsp, reg2offset_out(dst.first())), |
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2190 (int32_t)NULL_WORD); |
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2191 __ testq(in_reg, in_reg); |
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2192 __ jcc(Assembler::zero, skipUnbox); |
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2193 |
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2194 BasicType bt = out_sig_bt[c_arg]; |
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2195 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
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2196 Address src1(in_reg, box_offset); |
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2197 if ( bt == T_LONG ) { |
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2198 __ movq(in_reg, src1); |
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2199 __ movq(stack_dst, in_reg); |
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2200 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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2201 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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2202 } else { |
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2203 __ movl(in_reg, src1); |
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2204 __ movl(stack_dst, in_reg); |
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2205 } |
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2206 |
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2207 __ bind(skipUnbox); |
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2208 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
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2209 // Convert the arg to NULL |
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2210 if (!rax_is_zero) { |
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2211 __ xorq(rax, rax); |
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2212 rax_is_zero = true; |
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2213 } |
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2214 __ movq(stack_dst, rax); |
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2215 } |
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2216 } |
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|
2217 break; |
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|
2218 |
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2219 case T_VOID: |
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2220 break; |
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|
2221 |
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2222 case T_FLOAT: |
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2223 // This does the right thing since we know it is destined for the |
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2224 // stack |
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2225 float_move(masm, src, dst); |
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2226 break; |
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|
2227 |
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2228 case T_DOUBLE: |
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2229 // This does the right thing since we know it is destined for the |
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2230 // stack |
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2231 double_move(masm, src, dst); |
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2232 break; |
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|
2233 |
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2234 case T_LONG : |
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2235 long_move(masm, src, dst); |
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2236 break; |
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2237 |
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2238 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
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2239 |
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2240 default: |
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2241 move32_64(masm, src, dst); |
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2242 } |
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|
2243 } |
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|
2244 |
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|
2245 } |
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|
2246 |
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2247 // If we have any strings we must store any register based arg to the stack |
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2248 // This includes any still live xmm registers too. |
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|
2249 |
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|
2250 int sid = 0; |
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|
2251 |
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2252 if (total_strings > 0 ) { |
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2253 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2254 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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2255 VMRegPair src = in_regs[j_arg]; |
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2256 VMRegPair dst = out_regs[c_arg]; |
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|
2257 |
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2258 if (src.first()->is_reg()) { |
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2259 Address src_tmp(rbp, fp_offset[src.first()->value()]); |
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|
2260 |
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2261 // string oops were left untouched by the previous loop even if the |
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2262 // eventual (converted) arg is destined for the stack so park them |
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2263 // away now (except for first) |
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|
2264 |
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2265 if (out_sig_bt[c_arg] == T_ADDRESS) { |
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2266 Address utf8_addr = Address( |
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2267 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
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2268 if (sid != 1) { |
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2269 // The first string arg won't be killed until after the utf8 |
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|
2270 // conversion |
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|
2271 __ movq(utf8_addr, src.first()->as_Register()); |
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|
2272 } |
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|
2273 } else if (dst.first()->is_reg()) { |
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2274 if (in_sig_bt[j_arg] == T_FLOAT || in_sig_bt[j_arg] == T_DOUBLE) { |
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|
2275 |
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|
2276 // Convert the xmm register to an int and store it in the reserved |
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2277 // location for the eventual c register arg |
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2278 XMMRegister f = src.first()->as_XMMRegister(); |
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2279 if (in_sig_bt[j_arg] == T_FLOAT) { |
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2280 __ movflt(src_tmp, f); |
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|
2281 } else { |
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|
2282 __ movdbl(src_tmp, f); |
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|
2283 } |
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|
2284 } else { |
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|
2285 // If the arg is an oop type we don't support don't bother to store |
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2286 // it remember string was handled above. |
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2287 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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2288 (in_sig_bt[j_arg] == T_OBJECT && |
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2289 out_sig_bt[c_arg] != T_INT && |
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2290 out_sig_bt[c_arg] != T_LONG); |
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|
2291 |
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|
2292 if (!useless) { |
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2293 __ movq(src_tmp, src.first()->as_Register()); |
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|
2294 } |
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|
2295 } |
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|
2296 } |
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|
2297 } |
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|
2298 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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2299 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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2300 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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|
2301 } |
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|
2302 } |
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|
2303 |
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2304 // Now that the volatile registers are safe, convert all the strings |
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|
2305 sid = 0; |
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|
2306 |
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2307 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2308 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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2309 if (out_sig_bt[c_arg] == T_ADDRESS) { |
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2310 // It's a string |
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2311 Address utf8_addr = Address( |
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2312 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
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2313 // The first string we find might still be in the original java arg |
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2314 // register |
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|
2315 |
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2316 VMReg src = in_regs[j_arg].first(); |
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2317 |
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2318 // We will need to eventually save the final argument to the trap |
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2319 // in the von-volatile location dedicated to src. This is the offset |
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2320 // from fp we will use. |
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2321 int src_off = src->is_reg() ? |
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2322 fp_offset[src->value()] : reg2offset_in(src); |
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|
2323 |
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2324 // This is where the argument will eventually reside |
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2325 VMRegPair dst = out_regs[c_arg]; |
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2326 |
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2327 if (src->is_reg()) { |
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2328 if (sid == 1) { |
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2329 __ movq(c_rarg0, src->as_Register()); |
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2330 } else { |
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2331 __ movq(c_rarg0, utf8_addr); |
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2332 } |
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|
2333 } else { |
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2334 // arg is still in the original location |
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|
2335 __ movq(c_rarg0, Address(rbp, reg2offset_in(src))); |
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2336 } |
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2337 Label done, convert; |
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2338 |
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2339 // see if the oop is NULL |
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2340 __ testq(c_rarg0, c_rarg0); |
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2341 __ jcc(Assembler::notEqual, convert); |
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2342 |
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2343 if (dst.first()->is_reg()) { |
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2344 // Save the ptr to utf string in the origina src loc or the tmp |
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2345 // dedicated to it |
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2346 __ movq(Address(rbp, src_off), c_rarg0); |
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2347 } else { |
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2348 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg0); |
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2349 } |
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2350 __ jmp(done); |
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2351 |
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2352 __ bind(convert); |
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2353 |
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2354 __ lea(c_rarg1, utf8_addr); |
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2355 if (dst.first()->is_reg()) { |
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2356 __ movq(Address(rbp, src_off), c_rarg1); |
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2357 } else { |
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2358 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1); |
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2359 } |
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2360 // And do the conversion |
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2361 __ call(RuntimeAddress( |
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2362 CAST_FROM_FN_PTR(address, SharedRuntime::get_utf))); |
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2363 |
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2364 __ bind(done); |
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2365 } |
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2366 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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2367 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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2368 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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2369 } |
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2370 } |
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2371 // The get_utf call killed all the c_arg registers |
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2372 live[c_rarg0->as_VMReg()->value()] = false; |
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2373 live[c_rarg1->as_VMReg()->value()] = false; |
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2374 live[c_rarg2->as_VMReg()->value()] = false; |
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2375 live[c_rarg3->as_VMReg()->value()] = false; |
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2376 live[c_rarg4->as_VMReg()->value()] = false; |
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2377 live[c_rarg5->as_VMReg()->value()] = false; |
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2378 |
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2379 live[c_farg0->as_VMReg()->value()] = false; |
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2380 live[c_farg1->as_VMReg()->value()] = false; |
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2381 live[c_farg2->as_VMReg()->value()] = false; |
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2382 live[c_farg3->as_VMReg()->value()] = false; |
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2383 live[c_farg4->as_VMReg()->value()] = false; |
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2384 live[c_farg5->as_VMReg()->value()] = false; |
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2385 live[c_farg6->as_VMReg()->value()] = false; |
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2386 live[c_farg7->as_VMReg()->value()] = false; |
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2387 } |
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2388 |
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2389 // Now we can finally move the register args to their desired locations |
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2390 |
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2391 rax_is_zero = false; |
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2392 |
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2393 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2394 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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2395 |
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2396 VMRegPair src = in_regs[j_arg]; |
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2397 VMRegPair dst = out_regs[c_arg]; |
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2398 |
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2399 // Only need to look for args destined for the interger registers (since we |
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2400 // convert float/double args to look like int/long outbound) |
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2401 if (dst.first()->is_reg()) { |
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2402 Register r = dst.first()->as_Register(); |
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2403 |
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2404 // Check if the java arg is unsupported and thereofre useless |
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2405 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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2406 (in_sig_bt[j_arg] == T_OBJECT && |
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2407 out_sig_bt[c_arg] != T_INT && |
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2408 out_sig_bt[c_arg] != T_ADDRESS && |
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2409 out_sig_bt[c_arg] != T_LONG); |
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2410 |
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2411 |
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2412 // If we're going to kill an existing arg save it first |
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2413 if (live[dst.first()->value()]) { |
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2414 // you can't kill yourself |
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2415 if (src.first() != dst.first()) { |
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2416 __ movq(Address(rbp, fp_offset[dst.first()->value()]), r); |
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2417 } |
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2418 } |
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2419 if (src.first()->is_reg()) { |
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2420 if (live[src.first()->value()] ) { |
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2421 if (in_sig_bt[j_arg] == T_FLOAT) { |
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2422 __ movdl(r, src.first()->as_XMMRegister()); |
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2423 } else if (in_sig_bt[j_arg] == T_DOUBLE) { |
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2424 __ movdq(r, src.first()->as_XMMRegister()); |
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2425 } else if (r != src.first()->as_Register()) { |
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2426 if (!useless) { |
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2427 __ movq(r, src.first()->as_Register()); |
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2428 } |
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2429 } |
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2430 } else { |
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2431 // If the arg is an oop type we don't support don't bother to store |
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2432 // it |
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2433 if (!useless) { |
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2434 if (in_sig_bt[j_arg] == T_DOUBLE || |
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2435 in_sig_bt[j_arg] == T_LONG || |
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2436 in_sig_bt[j_arg] == T_OBJECT ) { |
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2437 __ movq(r, Address(rbp, fp_offset[src.first()->value()])); |
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2438 } else { |
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2439 __ movl(r, Address(rbp, fp_offset[src.first()->value()])); |
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2440 } |
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2441 } |
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2442 } |
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2443 live[src.first()->value()] = false; |
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2444 } else if (!useless) { |
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2445 // full sized move even for int should be ok |
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2446 __ movq(r, Address(rbp, reg2offset_in(src.first()))); |
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2447 } |
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2448 |
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2449 // At this point r has the original java arg in the final location |
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2450 // (assuming it wasn't useless). If the java arg was an oop |
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2451 // we have a bit more to do |
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2452 |
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2453 if (in_sig_bt[j_arg] == T_ARRAY || in_sig_bt[j_arg] == T_OBJECT ) { |
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2454 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
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2455 // need to unbox a one-word value |
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2456 Label skip; |
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2457 __ testq(r, r); |
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2458 __ jcc(Assembler::equal, skip); |
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2459 BasicType bt = out_sig_bt[c_arg]; |
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2460 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
116
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2461 Address src1(r, box_offset); |
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2462 if ( bt == T_LONG ) { |
116
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2463 __ movq(r, src1); |
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2464 } else { |
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2465 __ movl(r, src1); |
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2466 } |
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2467 __ bind(skip); |
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2468 |
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2469 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
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2470 // Convert the arg to NULL |
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2471 __ xorq(r, r); |
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2472 } |
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2473 } |
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2474 |
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2475 // dst can longer be holding an input value |
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2476 live[dst.first()->value()] = false; |
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2477 } |
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2478 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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2479 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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2480 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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2481 } |
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2482 } |
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2483 |
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2484 |
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2485 // Ok now we are done. Need to place the nop that dtrace wants in order to |
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2486 // patch in the trap |
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2487 int patch_offset = ((intptr_t)__ pc()) - start; |
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2488 |
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2489 __ nop(); |
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2490 |
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2491 |
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2492 // Return |
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2493 |
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2494 __ leave(); |
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2495 __ ret(0); |
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2496 |
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2497 __ flush(); |
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2498 |
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2499 nmethod *nm = nmethod::new_dtrace_nmethod( |
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2500 method, masm->code(), vep_offset, patch_offset, frame_complete, |
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2501 stack_slots / VMRegImpl::slots_per_word); |
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2502 return nm; |
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2503 |
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2504 } |
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2505 |
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2506 #endif // HAVE_DTRACE_H |
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2507 |
0 | 2508 // this function returns the adjust size (in number of words) to a c2i adapter |
2509 // activation for use during deoptimization | |
2510 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { | |
1506 | 2511 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
0 | 2512 } |
2513 | |
2514 | |
2515 uint SharedRuntime::out_preserve_stack_slots() { | |
2516 return 0; | |
2517 } | |
2518 | |
2519 | |
2520 //------------------------------generate_deopt_blob---------------------------- | |
2521 void SharedRuntime::generate_deopt_blob() { | |
2522 // Allocate space for the code | |
2523 ResourceMark rm; | |
2524 // Setup code generation tools | |
2525 CodeBuffer buffer("deopt_blob", 2048, 1024); | |
2526 MacroAssembler* masm = new MacroAssembler(&buffer); | |
2527 int frame_size_in_words; | |
2528 OopMap* map = NULL; | |
2529 OopMapSet *oop_maps = new OopMapSet(); | |
2530 | |
2531 // ------------- | |
2532 // This code enters when returning to a de-optimized nmethod. A return | |
2533 // address has been pushed on the the stack, and return values are in | |
2534 // registers. | |
2535 // If we are doing a normal deopt then we were called from the patched | |
2536 // nmethod from the point we returned to the nmethod. So the return | |
2537 // address on the stack is wrong by NativeCall::instruction_size | |
2538 // We will adjust the value so it looks like we have the original return | |
2539 // address on the stack (like when we eagerly deoptimized). | |
2540 // In the case of an exception pending when deoptimizing, we enter | |
2541 // with a return address on the stack that points after the call we patched | |
2542 // into the exception handler. We have the following register state from, | |
2543 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp). | |
2544 // rax: exception oop | |
2545 // rbx: exception handler | |
2546 // rdx: throwing pc | |
2547 // So in this case we simply jam rdx into the useless return address and | |
2548 // the stack looks just like we want. | |
2549 // | |
2550 // At this point we need to de-opt. We save the argument return | |
2551 // registers. We call the first C routine, fetch_unroll_info(). This | |
2552 // routine captures the return values and returns a structure which | |
2553 // describes the current frame size and the sizes of all replacement frames. | |
2554 // The current frame is compiled code and may contain many inlined | |
2555 // functions, each with their own JVM state. We pop the current frame, then | |
2556 // push all the new frames. Then we call the C routine unpack_frames() to | |
2557 // populate these frames. Finally unpack_frames() returns us the new target | |
2558 // address. Notice that callee-save registers are BLOWN here; they have | |
2559 // already been captured in the vframeArray at the time the return PC was | |
2560 // patched. | |
2561 address start = __ pc(); | |
2562 Label cont; | |
2563 | |
2564 // Prolog for non exception case! | |
2565 | |
2566 // Save everything in sight. | |
2567 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
2568 | |
2569 // Normal deoptimization. Save exec mode for unpack_frames. | |
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2570 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved |
0 | 2571 __ jmp(cont); |
304 | 2572 |
2573 int reexecute_offset = __ pc() - start; | |
2574 | |
2575 // Reexecute case | |
2576 // return address is the pc describes what bci to do re-execute at | |
2577 | |
2578 // No need to update map as each call to save_live_registers will produce identical oopmap | |
2579 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
2580 | |
2581 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved | |
2582 __ jmp(cont); | |
2583 | |
0 | 2584 int exception_offset = __ pc() - start; |
2585 | |
2586 // Prolog for exception case | |
2587 | |
304 | 2588 // all registers are dead at this entry point, except for rax, and |
2589 // rdx which contain the exception oop and exception pc | |
2590 // respectively. Set them in TLS and fall thru to the | |
2591 // unpack_with_exception_in_tls entry point. | |
2592 | |
2593 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
2594 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax); | |
2595 | |
2596 int exception_in_tls_offset = __ pc() - start; | |
2597 | |
2598 // new implementation because exception oop is now passed in JavaThread | |
2599 | |
2600 // Prolog for exception case | |
2601 // All registers must be preserved because they might be used by LinearScan | |
2602 // Exceptiop oop and throwing PC are passed in JavaThread | |
2603 // tos: stack at point of call to method that threw the exception (i.e. only | |
2604 // args are on the stack, no return address) | |
2605 | |
2606 // make room on stack for the return address | |
2607 // It will be patched later with the throwing pc. The correct value is not | |
2608 // available now because loading it from memory would destroy registers. | |
2609 __ push(0); | |
0 | 2610 |
2611 // Save everything in sight. | |
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2612 RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); |
0 | 2613 |
304 | 2614 // Now it is safe to overwrite any register |
2615 | |
0 | 2616 // Deopt during an exception. Save exec mode for unpack_frames. |
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2617 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved |
0 | 2618 |
304 | 2619 // load throwing pc from JavaThread and patch it as the return address |
2620 // of the current frame. Then clear the field in JavaThread | |
2621 | |
2622 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
2623 __ movptr(Address(rbp, wordSize), rdx); | |
2624 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
2625 | |
2626 #ifdef ASSERT | |
2627 // verify that there is really an exception oop in JavaThread | |
2628 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
2629 __ verify_oop(rax); | |
2630 | |
2631 // verify that there is no pending exception | |
2632 Label no_pending_exception; | |
2633 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); | |
2634 __ testptr(rax, rax); | |
2635 __ jcc(Assembler::zero, no_pending_exception); | |
2636 __ stop("must not have pending exception here"); | |
2637 __ bind(no_pending_exception); | |
2638 #endif | |
2639 | |
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2640 // (tw) Start of graal uncommon trap code. |
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2641 __ jmp(cont); |
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2642 |
2605
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2643 int jmp_uncommon_trap_offset = __ pc() - start; |
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2644 __ pushptr(Address(r15_thread, in_bytes(JavaThread::ScratchA_offset()))); |
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2645 __ movptr(rscratch1, 2); // InvalidateRecompile |
2605
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2646 |
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2647 int uncommon_trap_offset = __ pc() - start; |
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2648 |
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2649 // Warning: Duplicate code |
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2650 |
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2651 // Save everything in sight. |
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2652 RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); |
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2653 |
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2654 // Normal deoptimization |
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2655 |
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|
2656 |
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|
2657 // fetch_unroll_info needs to call last_java_frame() |
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|
2658 __ set_last_Java_frame(noreg, noreg, NULL); |
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2659 |
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2660 |
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2661 // __ movl(c_rarg1, (int32_t)Deoptimization::Unpack_reexecute); |
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2662 // __ movl(r14, c_rarg1); // save into r14 for later call to unpack_frames |
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2663 |
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|
2664 assert(r10 == rscratch1, "scratch register should be r10"); |
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|
2665 __ movl(c_rarg1, Address(rsp, RegisterSaver::r10_offset_in_bytes())); |
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|
2666 __ orq(c_rarg1, ~(int32_t)Deoptimization::make_trap_request(Deoptimization::Reason_unreached, Deoptimization::Action_none)); |
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|
2667 __ notq(c_rarg1); |
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1e13559b112d
small fix in deopt stub, more branch prediction code
Lukas Stadler <lukas.stadler@jku.at>
parents:
2891
diff
changeset
|
2668 __ movl(r14, (int32_t)Deoptimization::Unpack_reexecute); |
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
2669 __ mov(c_rarg0, r15_thread); |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
2670 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
2671 |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
2672 // Need to have an oopmap that tells fetch_unroll_info where to |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
2673 // find any register it might need. |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
2674 |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
2675 oop_maps->add_gc_map( __ pc()-start, map->deep_copy()); |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
2676 |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
2677 __ reset_last_Java_frame(false, false); |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
2678 |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
2679 Label after_fetch_unroll_info_call; |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
2680 __ jmp(after_fetch_unroll_info_call); |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
2681 |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
2682 |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2605
diff
changeset
|
2683 // (tw) End of graal uncommon trap code. |
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
2684 |
0 | 2685 __ bind(cont); |
2686 | |
2687 // Call C code. Need thread and this frame, but NOT official VM entry | |
2688 // crud. We cannot block on this call, no GC can happen. | |
2689 // | |
2690 // UnrollBlock* fetch_unroll_info(JavaThread* thread) | |
2691 | |
2692 // fetch_unroll_info needs to call last_java_frame(). | |
2693 | |
2694 __ set_last_Java_frame(noreg, noreg, NULL); | |
2695 #ifdef ASSERT | |
2696 { Label L; | |
304 | 2697 __ cmpptr(Address(r15_thread, |
0 | 2698 JavaThread::last_Java_fp_offset()), |
304 | 2699 (int32_t)0); |
0 | 2700 __ jcc(Assembler::equal, L); |
2701 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared"); | |
2702 __ bind(L); | |
2703 } | |
2704 #endif // ASSERT | |
4661
9ae5048b9153
Call uncommon_trap instead of fetch_unroll_info to correctly revoke biased locks on deopt.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4137
diff
changeset
|
2705 |
304 | 2706 __ mov(c_rarg0, r15_thread); |
4673
8021e46f4a99
another fix for resolving the issue with biased monitor and deoptimization
Christian Haeubl <christian.haeubl@oracle.com>
parents:
4661
diff
changeset
|
2707 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); |
0 | 2708 |
2709 // Need to have an oopmap that tells fetch_unroll_info where to | |
2710 // find any register it might need. | |
4673
8021e46f4a99
another fix for resolving the issue with biased monitor and deoptimization
Christian Haeubl <christian.haeubl@oracle.com>
parents:
4661
diff
changeset
|
2711 oop_maps->add_gc_map(__ pc() - start, map); |
0 | 2712 |
2713 __ reset_last_Java_frame(false, false); | |
2714 | |
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
2715 __ bind(after_fetch_unroll_info_call); |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
2716 |
0 | 2717 // Load UnrollBlock* into rdi |
304 | 2718 __ mov(rdi, rax); |
2719 | |
2720 Label noException; | |
682
69aefafe69c1
6824463: deopt blob is testing wrong register on 64-bit x86
never
parents:
628
diff
changeset
|
2721 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending? |
304 | 2722 __ jcc(Assembler::notEqual, noException); |
2723 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
2724 // QQQ this is useless it was NULL above | |
2725 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
2726 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); | |
2727 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
2728 | |
2729 __ verify_oop(rax); | |
2730 | |
2731 // Overwrite the result registers with the exception results. | |
2732 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
2733 // I think this is useless | |
2734 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx); | |
2735 | |
2736 __ bind(noException); | |
0 | 2737 |
2738 // Only register save data is on the stack. | |
2739 // Now restore the result registers. Everything else is either dead | |
2740 // or captured in the vframeArray. | |
2741 RegisterSaver::restore_result_registers(masm); | |
2742 | |
4675
c2384f5b2e6e
Small changes to the deopt stub.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4661
diff
changeset
|
2743 // All of the register save area has been popped of the stack. Only the |
0 | 2744 // return address remains. |
2745 | |
2746 // Pop all the frames we must move/replace. | |
2747 // | |
2748 // Frame picture (youngest to oldest) | |
2749 // 1: self-frame (no frame link) | |
2750 // 2: deopting frame (no frame link) | |
2751 // 3: caller of deopting frame (could be compiled/interpreted). | |
2752 // | |
2753 // Note: by leaving the return address of self-frame on the stack | |
2754 // and using the size of frame 2 to adjust the stack | |
2755 // when we are done the return to frame 3 will still be on the stack. | |
2756 | |
2757 // Pop deoptimized frame | |
2758 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); | |
304 | 2759 __ addptr(rsp, rcx); |
0 | 2760 |
2761 // rsp should be pointing at the return address to the caller (3) | |
2762 | |
2763 // Stack bang to make sure there's enough room for these interpreter frames. | |
2764 if (UseStackBanging) { | |
2765 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
2766 __ bang_stack_size(rbx, rcx); | |
2767 } | |
2768 | |
2769 // Load address of array of frame pcs into rcx | |
304 | 2770 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
0 | 2771 |
2772 // Trash the old pc | |
304 | 2773 __ addptr(rsp, wordSize); |
0 | 2774 |
2775 // Load address of array of frame sizes into rsi | |
304 | 2776 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
0 | 2777 |
2778 // Load counter into rdx | |
2779 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
2780 | |
2781 // Pick up the initial fp we should save | |
3931
5432047c7db7
7087445: Improve platform independence of JSR292 shared code
bdelsart
parents:
3442
diff
changeset
|
2782 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
0 | 2783 |
2784 // Now adjust the caller's stack to make up for the extra locals | |
2785 // but record the original sp so that we can save it in the skeletal interpreter | |
2786 // frame and the stack walking of interpreter_sender will get the unextended sp | |
2787 // value and not the "real" sp value. | |
2788 | |
2789 const Register sender_sp = r8; | |
2790 | |
304 | 2791 __ mov(sender_sp, rsp); |
0 | 2792 __ movl(rbx, Address(rdi, |
2793 Deoptimization::UnrollBlock:: | |
2794 caller_adjustment_offset_in_bytes())); | |
304 | 2795 __ subptr(rsp, rbx); |
0 | 2796 |
2797 // Push interpreter frames in a loop | |
2798 Label loop; | |
2799 __ bind(loop); | |
304 | 2800 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
2801 #ifdef CC_INTERP | |
2802 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and | |
2803 #ifdef ASSERT | |
2804 __ push(0xDEADDEAD); // Make a recognizable pattern | |
2805 __ push(0xDEADDEAD); | |
2806 #else /* ASSERT */ | |
2807 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" | |
2808 #endif /* ASSERT */ | |
2809 #else | |
2810 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand | |
2811 #endif // CC_INTERP | |
2812 __ pushptr(Address(rcx, 0)); // Save return address | |
0 | 2813 __ enter(); // Save old & set new ebp |
304 | 2814 __ subptr(rsp, rbx); // Prolog |
2815 #ifdef CC_INTERP | |
2816 __ movptr(Address(rbp, | |
2817 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), | |
2818 sender_sp); // Make it walkable | |
2819 #else /* CC_INTERP */ | |
0 | 2820 // This value is corrected by layout_activation_impl |
304 | 2821 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
2822 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable | |
2823 #endif /* CC_INTERP */ | |
2824 __ mov(sender_sp, rsp); // Pass sender_sp to next frame | |
2825 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
2826 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
0 | 2827 __ decrementl(rdx); // Decrement counter |
2828 __ jcc(Assembler::notZero, loop); | |
304 | 2829 __ pushptr(Address(rcx, 0)); // Save final return address |
0 | 2830 |
2831 // Re-push self-frame | |
2832 __ enter(); // Save old & set new ebp | |
2833 | |
2834 // Allocate a full sized register save area. | |
2835 // Return address and rbp are in place, so we allocate two less words. | |
304 | 2836 __ subptr(rsp, (frame_size_in_words - 2) * wordSize); |
0 | 2837 |
2838 // Restore frame locals after moving the frame | |
2839 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0); | |
304 | 2840 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); |
0 | 2841 |
2842 // Call C code. Need thread but NOT official VM entry | |
2843 // crud. We cannot block on this call, no GC can happen. Call should | |
2844 // restore return values to their stack-slots with the new SP. | |
2845 // | |
2846 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode) | |
2847 | |
2848 // Use rbp because the frames look interpreted now | |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
2849 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
2850 // Don't need the precise return PC here, just precise enough to point into this code blob. |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
2851 address the_pc = __ pc(); |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
2852 __ set_last_Java_frame(noreg, rbp, the_pc); |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
2853 |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
2854 __ andptr(rsp, -(StackAlignmentInBytes)); // Fix stack alignment as required by ABI |
304 | 2855 __ mov(c_rarg0, r15_thread); |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
2856 __ movl(c_rarg1, r14); // second arg: exec_mode |
0 | 2857 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
2858 // Revert SP alignment after call since we're going to do some SP relative addressing below |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
2859 __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset())); |
0 | 2860 |
2861 // Set an oopmap for the call site | |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
2862 // Use the same PC we used for the last java frame |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
2863 oop_maps->add_gc_map(the_pc - start, |
0 | 2864 new OopMap( frame_size_in_words, 0 )); |
2865 | |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
2866 // Clear fp AND pc |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
2867 __ reset_last_Java_frame(true, true); |
0 | 2868 |
2869 // Collect return values | |
2870 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes())); | |
304 | 2871 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes())); |
2872 // I think this is useless (throwing pc?) | |
2873 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes())); | |
0 | 2874 |
2875 // Pop self-frame. | |
2876 __ leave(); // Epilog | |
2877 | |
2878 // Jump to interpreter | |
2879 __ ret(0); | |
2880 | |
2881 // Make sure all code is generated | |
2882 masm->flush(); | |
2883 | |
304 | 2884 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); |
2885 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
2886 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset); |
2605
98fa88528319
Deopt on implicit null pointer exception.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2491
diff
changeset
|
2887 _deopt_blob->set_jmp_uncommon_trap_offset(jmp_uncommon_trap_offset); |
0 | 2888 } |
2889 | |
2890 #ifdef COMPILER2 | |
2891 //------------------------------generate_uncommon_trap_blob-------------------- | |
2892 void SharedRuntime::generate_uncommon_trap_blob() { | |
2893 // Allocate space for the code | |
2894 ResourceMark rm; | |
2895 // Setup code generation tools | |
2896 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024); | |
2897 MacroAssembler* masm = new MacroAssembler(&buffer); | |
2898 | |
2899 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
2900 | |
2901 address start = __ pc(); | |
2902 | |
2903 // Push self-frame. We get here with a return address on the | |
2904 // stack, so rsp is 8-byte aligned until we allocate our frame. | |
304 | 2905 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog! |
0 | 2906 |
2907 // No callee saved registers. rbp is assumed implicitly saved | |
304 | 2908 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
0 | 2909 |
2910 // compiler left unloaded_class_index in j_rarg0 move to where the | |
2911 // runtime expects it. | |
2912 __ movl(c_rarg1, j_rarg0); | |
2913 | |
2914 __ set_last_Java_frame(noreg, noreg, NULL); | |
2915 | |
2916 // Call C code. Need thread but NOT official VM entry | |
2917 // crud. We cannot block on this call, no GC can happen. Call should | |
2918 // capture callee-saved registers as well as return values. | |
2919 // Thread is in rdi already. | |
2920 // | |
2921 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index); | |
2922 | |
304 | 2923 __ mov(c_rarg0, r15_thread); |
0 | 2924 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
2925 | |
2926 // Set an oopmap for the call site | |
2927 OopMapSet* oop_maps = new OopMapSet(); | |
2928 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0); | |
2929 | |
2930 // location of rbp is known implicitly by the frame sender code | |
2931 | |
2932 oop_maps->add_gc_map(__ pc() - start, map); | |
2933 | |
2934 __ reset_last_Java_frame(false, false); | |
2935 | |
2936 // Load UnrollBlock* into rdi | |
304 | 2937 __ mov(rdi, rax); |
0 | 2938 |
2939 // Pop all the frames we must move/replace. | |
2940 // | |
2941 // Frame picture (youngest to oldest) | |
2942 // 1: self-frame (no frame link) | |
2943 // 2: deopting frame (no frame link) | |
2944 // 3: caller of deopting frame (could be compiled/interpreted). | |
2945 | |
2946 // Pop self-frame. We have no frame, and must rely only on rax and rsp. | |
304 | 2947 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog! |
0 | 2948 |
2949 // Pop deoptimized frame (int) | |
2950 __ movl(rcx, Address(rdi, | |
2951 Deoptimization::UnrollBlock:: | |
2952 size_of_deoptimized_frame_offset_in_bytes())); | |
304 | 2953 __ addptr(rsp, rcx); |
0 | 2954 |
2955 // rsp should be pointing at the return address to the caller (3) | |
2956 | |
2957 // Stack bang to make sure there's enough room for these interpreter frames. | |
2958 if (UseStackBanging) { | |
2959 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
2960 __ bang_stack_size(rbx, rcx); | |
2961 } | |
2962 | |
2963 // Load address of array of frame pcs into rcx (address*) | |
304 | 2964 __ movptr(rcx, |
2965 Address(rdi, | |
2966 Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); | |
0 | 2967 |
2968 // Trash the return pc | |
304 | 2969 __ addptr(rsp, wordSize); |
0 | 2970 |
2971 // Load address of array of frame sizes into rsi (intptr_t*) | |
304 | 2972 __ movptr(rsi, Address(rdi, |
2973 Deoptimization::UnrollBlock:: | |
2974 frame_sizes_offset_in_bytes())); | |
0 | 2975 |
2976 // Counter | |
2977 __ movl(rdx, Address(rdi, | |
2978 Deoptimization::UnrollBlock:: | |
2979 number_of_frames_offset_in_bytes())); // (int) | |
2980 | |
2981 // Pick up the initial fp we should save | |
304 | 2982 __ movptr(rbp, |
2983 Address(rdi, | |
3931
5432047c7db7
7087445: Improve platform independence of JSR292 shared code
bdelsart
parents:
3442
diff
changeset
|
2984 Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
0 | 2985 |
2986 // Now adjust the caller's stack to make up for the extra locals but | |
2987 // record the original sp so that we can save it in the skeletal | |
2988 // interpreter frame and the stack walking of interpreter_sender | |
2989 // will get the unextended sp value and not the "real" sp value. | |
2990 | |
2991 const Register sender_sp = r8; | |
2992 | |
304 | 2993 __ mov(sender_sp, rsp); |
0 | 2994 __ movl(rbx, Address(rdi, |
2995 Deoptimization::UnrollBlock:: | |
2996 caller_adjustment_offset_in_bytes())); // (int) | |
304 | 2997 __ subptr(rsp, rbx); |
0 | 2998 |
2999 // Push interpreter frames in a loop | |
3000 Label loop; | |
3001 __ bind(loop); | |
304 | 3002 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
3003 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand | |
3004 __ pushptr(Address(rcx, 0)); // Save return address | |
3005 __ enter(); // Save old & set new rbp | |
3006 __ subptr(rsp, rbx); // Prolog | |
520
52a431267315
6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents:
304
diff
changeset
|
3007 #ifdef CC_INTERP |
52a431267315
6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents:
304
diff
changeset
|
3008 __ movptr(Address(rbp, |
52a431267315
6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents:
304
diff
changeset
|
3009 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
52a431267315
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3010 sender_sp); // Make it walkable |
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3011 #else // CC_INTERP |
304 | 3012 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), |
3013 sender_sp); // Make it walkable | |
0 | 3014 // This value is corrected by layout_activation_impl |
304 | 3015 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
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3016 #endif // CC_INTERP |
304 | 3017 __ mov(sender_sp, rsp); // Pass sender_sp to next frame |
3018 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
3019 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
3020 __ decrementl(rdx); // Decrement counter | |
0 | 3021 __ jcc(Assembler::notZero, loop); |
304 | 3022 __ pushptr(Address(rcx, 0)); // Save final return address |
0 | 3023 |
3024 // Re-push self-frame | |
3025 __ enter(); // Save old & set new rbp | |
304 | 3026 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt); |
0 | 3027 // Prolog |
3028 | |
3029 // Use rbp because the frames look interpreted now | |
4057
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3030 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
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3031 // Don't need the precise return PC here, just precise enough to point into this code blob. |
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3032 address the_pc = __ pc(); |
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3033 __ set_last_Java_frame(noreg, rbp, the_pc); |
0 | 3034 |
3035 // Call C code. Need thread but NOT official VM entry | |
3036 // crud. We cannot block on this call, no GC can happen. Call should | |
3037 // restore return values to their stack-slots with the new SP. | |
3038 // Thread is in rdi already. | |
3039 // | |
3040 // BasicType unpack_frames(JavaThread* thread, int exec_mode); | |
3041 | |
4057
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3042 __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI |
304 | 3043 __ mov(c_rarg0, r15_thread); |
0 | 3044 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap); |
3045 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
3046 | |
3047 // Set an oopmap for the call site | |
4057
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3048 // Use the same PC we used for the last java frame |
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3049 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
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3050 |
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3051 // Clear fp AND pc |
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3052 __ reset_last_Java_frame(true, true); |
0 | 3053 |
3054 // Pop self-frame. | |
3055 __ leave(); // Epilog | |
3056 | |
3057 // Jump to interpreter | |
3058 __ ret(0); | |
3059 | |
3060 // Make sure all code is generated | |
3061 masm->flush(); | |
3062 | |
3063 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, | |
3064 SimpleRuntimeFrame::framesize >> 1); | |
3065 } | |
3066 #endif // COMPILER2 | |
3067 | |
3068 | |
3069 //------------------------------generate_handler_blob------ | |
3070 // | |
3071 // Generate a special Compile2Runtime blob that saves all registers, | |
3072 // and setup oopmap. | |
3073 // | |
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3074 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, bool cause_return) { |
0 | 3075 assert(StubRoutines::forward_exception_entry() != NULL, |
3076 "must be generated before"); | |
3077 | |
3078 ResourceMark rm; | |
3079 OopMapSet *oop_maps = new OopMapSet(); | |
3080 OopMap* map; | |
3081 | |
3082 // Allocate space for the code. Setup code generation tools. | |
3083 CodeBuffer buffer("handler_blob", 2048, 1024); | |
3084 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3085 | |
3086 address start = __ pc(); | |
3087 address call_pc = NULL; | |
3088 int frame_size_in_words; | |
3089 | |
3090 // Make room for return address (or push it again) | |
3091 if (!cause_return) { | |
304 | 3092 __ push(rbx); |
0 | 3093 } |
3094 | |
3095 // Save registers, fpu state, and flags | |
3096 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3097 | |
3098 // The following is basically a call_VM. However, we need the precise | |
3099 // address of the call in order to generate an oopmap. Hence, we do all the | |
3100 // work outselves. | |
3101 | |
3102 __ set_last_Java_frame(noreg, noreg, NULL); | |
3103 | |
3104 // The return address must always be correct so that frame constructor never | |
3105 // sees an invalid pc. | |
3106 | |
3107 if (!cause_return) { | |
3108 // overwrite the dummy value we pushed on entry | |
304 | 3109 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset())); |
3110 __ movptr(Address(rbp, wordSize), c_rarg0); | |
0 | 3111 } |
3112 | |
3113 // Do the call | |
304 | 3114 __ mov(c_rarg0, r15_thread); |
0 | 3115 __ call(RuntimeAddress(call_ptr)); |
3116 | |
3117 // Set an oopmap for the call site. This oopmap will map all | |
3118 // oop-registers and debug-info registers as callee-saved. This | |
3119 // will allow deoptimization at this safepoint to find all possible | |
3120 // debug-info recordings, as well as let GC find all oops. | |
3121 | |
3122 oop_maps->add_gc_map( __ pc() - start, map); | |
3123 | |
3124 Label noException; | |
3125 | |
3126 __ reset_last_Java_frame(false, false); | |
3127 | |
304 | 3128 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 3129 __ jcc(Assembler::equal, noException); |
3130 | |
3131 // Exception pending | |
3132 | |
3133 RegisterSaver::restore_live_registers(masm); | |
3134 | |
3135 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
3136 | |
3137 // No exception case | |
3138 __ bind(noException); | |
3139 | |
3140 // Normal exit, restore registers and exit. | |
3141 RegisterSaver::restore_live_registers(masm); | |
3142 | |
3143 __ ret(0); | |
3144 | |
3145 // Make sure all code is generated | |
3146 masm->flush(); | |
3147 | |
3148 // Fill-out other meta info | |
3149 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); | |
3150 } | |
3151 | |
3152 // | |
3153 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
3154 // | |
3155 // Generate a stub that calls into vm to find out the proper destination | |
3156 // of a java call. All the argument registers are live at this point | |
3157 // but since this is generic code we don't know what they are and the caller | |
3158 // must do any gc of the args. | |
3159 // | |
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3160 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
0 | 3161 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
3162 | |
3163 // allocate space for the code | |
3164 ResourceMark rm; | |
3165 | |
3166 CodeBuffer buffer(name, 1000, 512); | |
3167 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3168 | |
3169 int frame_size_in_words; | |
3170 | |
3171 OopMapSet *oop_maps = new OopMapSet(); | |
3172 OopMap* map = NULL; | |
3173 | |
3174 int start = __ offset(); | |
3175 | |
3176 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3177 | |
3178 int frame_complete = __ offset(); | |
3179 | |
3180 __ set_last_Java_frame(noreg, noreg, NULL); | |
3181 | |
304 | 3182 __ mov(c_rarg0, r15_thread); |
0 | 3183 |
3184 __ call(RuntimeAddress(destination)); | |
3185 | |
3186 | |
3187 // Set an oopmap for the call site. | |
3188 // We need this not only for callee-saved registers, but also for volatile | |
3189 // registers that the compiler might be keeping live across a safepoint. | |
3190 | |
3191 oop_maps->add_gc_map( __ offset() - start, map); | |
3192 | |
3193 // rax contains the address we are going to jump to assuming no exception got installed | |
3194 | |
3195 // clear last_Java_sp | |
3196 __ reset_last_Java_frame(false, false); | |
3197 // check for pending exceptions | |
3198 Label pending; | |
304 | 3199 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 3200 __ jcc(Assembler::notEqual, pending); |
3201 | |
3202 // get the returned methodOop | |
304 | 3203 __ movptr(rbx, Address(r15_thread, JavaThread::vm_result_offset())); |
3204 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx); | |
3205 | |
3206 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
0 | 3207 |
3208 RegisterSaver::restore_live_registers(masm); | |
3209 | |
3210 // We are back the the original state on entry and ready to go. | |
3211 | |
3212 __ jmp(rax); | |
3213 | |
3214 // Pending exception after the safepoint | |
3215 | |
3216 __ bind(pending); | |
3217 | |
3218 RegisterSaver::restore_live_registers(masm); | |
3219 | |
3220 // exception pending => remove activation and forward to exception handler | |
3221 | |
3222 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD); | |
3223 | |
304 | 3224 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); |
0 | 3225 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
3226 | |
3227 // ------------- | |
3228 // make sure all code is generated | |
3229 masm->flush(); | |
3230 | |
3231 // return the blob | |
3232 // frame_size_words or bytes?? | |
3233 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true); | |
3234 } | |
3235 | |
3236 | |
3237 #ifdef COMPILER2 | |
3238 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame | |
3239 // | |
3240 //------------------------------generate_exception_blob--------------------------- | |
3241 // creates exception blob at the end | |
3242 // Using exception blob, this code is jumped from a compiled method. | |
3243 // (see emit_exception_handler in x86_64.ad file) | |
3244 // | |
3245 // Given an exception pc at a call we call into the runtime for the | |
3246 // handler in this method. This handler might merely restore state | |
3247 // (i.e. callee save registers) unwind the frame and jump to the | |
3248 // exception handler for the nmethod if there is no Java level handler | |
3249 // for the nmethod. | |
3250 // | |
3251 // This code is entered with a jmp. | |
3252 // | |
3253 // Arguments: | |
3254 // rax: exception oop | |
3255 // rdx: exception pc | |
3256 // | |
3257 // Results: | |
3258 // rax: exception oop | |
3259 // rdx: exception pc in caller or ??? | |
3260 // destination: exception handler of caller | |
3261 // | |
3262 // Note: the exception pc MUST be at a call (precise debug information) | |
3263 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved. | |
3264 // | |
3265 | |
3266 void OptoRuntime::generate_exception_blob() { | |
3267 assert(!OptoRuntime::is_callee_saved_register(RDX_num), ""); | |
3268 assert(!OptoRuntime::is_callee_saved_register(RAX_num), ""); | |
3269 assert(!OptoRuntime::is_callee_saved_register(RCX_num), ""); | |
3270 | |
3271 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
3272 | |
3273 // Allocate space for the code | |
3274 ResourceMark rm; | |
3275 // Setup code generation tools | |
3276 CodeBuffer buffer("exception_blob", 2048, 1024); | |
3277 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3278 | |
3279 | |
3280 address start = __ pc(); | |
3281 | |
3282 // Exception pc is 'return address' for stack walker | |
304 | 3283 __ push(rdx); |
3284 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog | |
0 | 3285 |
3286 // Save callee-saved registers. See x86_64.ad. | |
3287 | |
3288 // rbp is an implicitly saved callee saved register (i.e. the calling | |
3289 // convention will save restore it in prolog/epilog) Other than that | |
3290 // there are no callee save registers now that adapter frames are gone. | |
3291 | |
304 | 3292 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
0 | 3293 |
3294 // Store exception in Thread object. We cannot pass any arguments to the | |
3295 // handle_exception call, since we do not want to make any assumption | |
3296 // about the size of the frame where the exception happened in. | |
3297 // c_rarg0 is either rdi (Linux) or rcx (Windows). | |
304 | 3298 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax); |
3299 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
0 | 3300 |
3301 // This call does all the hard work. It checks if an exception handler | |
3302 // exists in the method. | |
3303 // If so, it returns the handler address. | |
3304 // If not, it prepares for stack-unwinding, restoring the callee-save | |
3305 // registers of the frame being removed. | |
3306 // | |
3307 // address OptoRuntime::handle_exception_C(JavaThread* thread) | |
3308 | |
3309 __ set_last_Java_frame(noreg, noreg, NULL); | |
304 | 3310 __ mov(c_rarg0, r15_thread); |
0 | 3311 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C))); |
3312 | |
3313 // Set an oopmap for the call site. This oopmap will only be used if we | |
3314 // are unwinding the stack. Hence, all locations will be dead. | |
3315 // Callee-saved registers will be the same as the frame above (i.e., | |
3316 // handle_exception_stub), since they were restored when we got the | |
3317 // exception. | |
3318 | |
3319 OopMapSet* oop_maps = new OopMapSet(); | |
3320 | |
3321 oop_maps->add_gc_map( __ pc()-start, new OopMap(SimpleRuntimeFrame::framesize, 0)); | |
3322 | |
3323 __ reset_last_Java_frame(false, false); | |
3324 | |
3325 // Restore callee-saved registers | |
3326 | |
3327 // rbp is an implicitly saved callee saved register (i.e. the calling | |
3328 // convention will save restore it in prolog/epilog) Other than that | |
3329 // there are no callee save registers no that adapter frames are gone. | |
3330 | |
304 | 3331 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt)); |
3332 | |
3333 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog | |
3334 __ pop(rdx); // No need for exception pc anymore | |
0 | 3335 |
3336 // rax: exception handler | |
3337 | |
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3338 // Restore SP from BP if the exception PC is a MethodHandle call site. |
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3339 __ cmpl(Address(r15_thread, JavaThread::is_method_handle_return_offset()), 0); |
1567 | 3340 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
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3341 |
0 | 3342 // We have a handler in rax (could be deopt blob). |
304 | 3343 __ mov(r8, rax); |
0 | 3344 |
3345 // Get the exception oop | |
304 | 3346 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); |
0 | 3347 // Get the exception pc in case we are deoptimized |
304 | 3348 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); |
0 | 3349 #ifdef ASSERT |
3350 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD); | |
3351 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD); | |
3352 #endif | |
3353 // Clear the exception oop so GC no longer processes it as a root. | |
3354 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD); | |
3355 | |
3356 // rax: exception oop | |
3357 // r8: exception handler | |
3358 // rdx: exception pc | |
3359 // Jump to handler | |
3360 | |
3361 __ jmp(r8); | |
3362 | |
3363 // Make sure all code is generated | |
3364 masm->flush(); | |
3365 | |
3366 // Set exception blob | |
3367 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1); | |
3368 } | |
3369 #endif // COMPILER2 |