Mercurial > hg > truffle
annotate src/share/vm/c1/c1_LIR.hpp @ 6862:8a5ea0a9ccc4
7127708: G1: change task num types from int to uint in concurrent mark
Summary: Change the type of various task num fields, parameters etc to unsigned and rename them to be more consistent with the other collectors. Code changes were also reviewed by Vitaly Davidovich.
Reviewed-by: johnc
Contributed-by: Kaushik Srenevasan <kaushik@twitter.com>
| author | johnc |
|---|---|
| date | Sat, 06 Oct 2012 01:17:44 -0700 |
| parents | 7eca5de9e0b6 |
| children | 608b2e8a0063 |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #ifndef SHARE_VM_C1_C1_LIR_HPP |
| 26 #define SHARE_VM_C1_C1_LIR_HPP | |
| 27 | |
| 28 #include "c1/c1_ValueType.hpp" | |
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29 #include "oops/method.hpp" |
| 1972 | 30 |
| 0 | 31 class BlockBegin; |
| 32 class BlockList; | |
| 33 class LIR_Assembler; | |
| 34 class CodeEmitInfo; | |
| 35 class CodeStub; | |
| 36 class CodeStubList; | |
| 37 class ArrayCopyStub; | |
| 38 class LIR_Op; | |
| 39 class ciType; | |
| 40 class ValueType; | |
| 41 class LIR_OpVisitState; | |
| 42 class FpuStackSim; | |
| 43 | |
| 44 //--------------------------------------------------------------------- | |
| 45 // LIR Operands | |
| 46 // LIR_OprDesc | |
| 47 // LIR_OprPtr | |
| 48 // LIR_Const | |
| 49 // LIR_Address | |
| 50 //--------------------------------------------------------------------- | |
| 51 class LIR_OprDesc; | |
| 52 class LIR_OprPtr; | |
| 53 class LIR_Const; | |
| 54 class LIR_Address; | |
| 55 class LIR_OprVisitor; | |
| 56 | |
| 57 | |
| 58 typedef LIR_OprDesc* LIR_Opr; | |
| 59 typedef int RegNr; | |
| 60 | |
| 61 define_array(LIR_OprArray, LIR_Opr) | |
| 62 define_stack(LIR_OprList, LIR_OprArray) | |
| 63 | |
| 64 define_array(LIR_OprRefArray, LIR_Opr*) | |
| 65 define_stack(LIR_OprRefList, LIR_OprRefArray) | |
| 66 | |
| 67 define_array(CodeEmitInfoArray, CodeEmitInfo*) | |
| 68 define_stack(CodeEmitInfoList, CodeEmitInfoArray) | |
| 69 | |
| 70 define_array(LIR_OpArray, LIR_Op*) | |
| 71 define_stack(LIR_OpList, LIR_OpArray) | |
| 72 | |
| 73 // define LIR_OprPtr early so LIR_OprDesc can refer to it | |
| 74 class LIR_OprPtr: public CompilationResourceObj { | |
| 75 public: | |
| 76 bool is_oop_pointer() const { return (type() == T_OBJECT); } | |
| 77 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); } | |
| 78 | |
| 79 virtual LIR_Const* as_constant() { return NULL; } | |
| 80 virtual LIR_Address* as_address() { return NULL; } | |
| 81 virtual BasicType type() const = 0; | |
| 82 virtual void print_value_on(outputStream* out) const = 0; | |
| 83 }; | |
| 84 | |
| 85 | |
| 86 | |
| 87 // LIR constants | |
| 88 class LIR_Const: public LIR_OprPtr { | |
| 89 private: | |
| 90 JavaValue _value; | |
| 91 | |
| 92 void type_check(BasicType t) const { assert(type() == t, "type check"); } | |
| 93 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); } | |
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94 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); } |
| 0 | 95 |
| 96 public: | |
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97 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); } |
| 0 | 98 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); } |
| 99 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); } | |
| 100 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); } | |
| 101 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); } | |
| 102 LIR_Const(void* p) { | |
| 103 #ifdef _LP64 | |
| 104 assert(sizeof(jlong) >= sizeof(p), "too small");; | |
| 105 _value.set_type(T_LONG); _value.set_jlong((jlong)p); | |
| 106 #else | |
| 107 assert(sizeof(jint) >= sizeof(p), "too small");; | |
| 108 _value.set_type(T_INT); _value.set_jint((jint)p); | |
| 109 #endif | |
| 110 } | |
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111 LIR_Const(Metadata* m) { |
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112 _value.set_type(T_METADATA); |
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113 #ifdef _LP64 |
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114 _value.set_jlong((jlong)m); |
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115 #else |
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116 _value.set_jint((jint)m); |
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117 #endif // _LP64 |
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118 } |
| 0 | 119 |
| 120 virtual BasicType type() const { return _value.get_type(); } | |
| 121 virtual LIR_Const* as_constant() { return this; } | |
| 122 | |
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123 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); } |
| 0 | 124 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); } |
| 125 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); } | |
| 126 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); } | |
| 127 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); } | |
| 128 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); } | |
| 129 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); } | |
| 130 | |
| 131 #ifdef _LP64 | |
| 132 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); } | |
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133 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jlong(); } |
| 0 | 134 #else |
| 135 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); } | |
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136 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jint(); } |
| 0 | 137 #endif |
| 138 | |
| 139 | |
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140 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); } |
| 0 | 141 jint as_jint_lo_bits() const { |
| 142 if (type() == T_DOUBLE) { | |
| 143 return low(jlong_cast(_value.get_jdouble())); | |
| 144 } else { | |
| 145 return as_jint_lo(); | |
| 146 } | |
| 147 } | |
| 148 jint as_jint_hi_bits() const { | |
| 149 if (type() == T_DOUBLE) { | |
| 150 return high(jlong_cast(_value.get_jdouble())); | |
| 151 } else { | |
| 152 return as_jint_hi(); | |
| 153 } | |
| 154 } | |
| 304 | 155 jlong as_jlong_bits() const { |
| 156 if (type() == T_DOUBLE) { | |
| 157 return jlong_cast(_value.get_jdouble()); | |
| 158 } else { | |
| 159 return as_jlong(); | |
| 160 } | |
| 161 } | |
| 0 | 162 |
| 163 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN; | |
| 164 | |
| 165 | |
| 166 bool is_zero_float() { | |
| 167 jfloat f = as_jfloat(); | |
| 168 jfloat ok = 0.0f; | |
| 169 return jint_cast(f) == jint_cast(ok); | |
| 170 } | |
| 171 | |
| 172 bool is_one_float() { | |
| 173 jfloat f = as_jfloat(); | |
| 174 return !g_isnan(f) && g_isfinite(f) && f == 1.0; | |
| 175 } | |
| 176 | |
| 177 bool is_zero_double() { | |
| 178 jdouble d = as_jdouble(); | |
| 179 jdouble ok = 0.0; | |
| 180 return jlong_cast(d) == jlong_cast(ok); | |
| 181 } | |
| 182 | |
| 183 bool is_one_double() { | |
| 184 jdouble d = as_jdouble(); | |
| 185 return !g_isnan(d) && g_isfinite(d) && d == 1.0; | |
| 186 } | |
| 187 }; | |
| 188 | |
| 189 | |
| 190 //---------------------LIR Operand descriptor------------------------------------ | |
| 191 // | |
| 192 // The class LIR_OprDesc represents a LIR instruction operand; | |
| 193 // it can be a register (ALU/FPU), stack location or a constant; | |
| 194 // Constants and addresses are represented as resource area allocated | |
| 195 // structures (see above). | |
| 196 // Registers and stack locations are inlined into the this pointer | |
| 197 // (see value function). | |
| 198 | |
| 199 class LIR_OprDesc: public CompilationResourceObj { | |
| 200 public: | |
| 201 // value structure: | |
| 202 // data opr-type opr-kind | |
| 203 // +--------------+-------+-------+ | |
| 204 // [max...........|7 6 5 4|3 2 1 0] | |
| 205 // ^ | |
| 206 // is_pointer bit | |
| 207 // | |
| 208 // lowest bit cleared, means it is a structure pointer | |
| 209 // we need 4 bits to represent types | |
| 210 | |
| 211 private: | |
| 212 friend class LIR_OprFact; | |
| 213 | |
| 214 // Conversion | |
| 215 intptr_t value() const { return (intptr_t) this; } | |
| 216 | |
| 217 bool check_value_mask(intptr_t mask, intptr_t masked_value) const { | |
| 218 return (value() & mask) == masked_value; | |
| 219 } | |
| 220 | |
| 221 enum OprKind { | |
| 222 pointer_value = 0 | |
| 223 , stack_value = 1 | |
| 224 , cpu_register = 3 | |
| 225 , fpu_register = 5 | |
| 226 , illegal_value = 7 | |
| 227 }; | |
| 228 | |
| 229 enum OprBits { | |
| 230 pointer_bits = 1 | |
| 231 , kind_bits = 3 | |
| 232 , type_bits = 4 | |
| 233 , size_bits = 2 | |
| 234 , destroys_bits = 1 | |
| 235 , virtual_bits = 1 | |
| 236 , is_xmm_bits = 1 | |
| 237 , last_use_bits = 1 | |
| 238 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation | |
| 239 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits + | |
| 240 is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits | |
| 241 , data_bits = BitsPerInt - non_data_bits | |
| 242 , reg_bits = data_bits / 2 // for two registers in one value encoding | |
| 243 }; | |
| 244 | |
| 245 enum OprShift { | |
| 246 kind_shift = 0 | |
| 247 , type_shift = kind_shift + kind_bits | |
| 248 , size_shift = type_shift + type_bits | |
| 249 , destroys_shift = size_shift + size_bits | |
| 250 , last_use_shift = destroys_shift + destroys_bits | |
| 251 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits | |
| 252 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits | |
| 253 , is_xmm_shift = virtual_shift + virtual_bits | |
| 254 , data_shift = is_xmm_shift + is_xmm_bits | |
| 255 , reg1_shift = data_shift | |
| 256 , reg2_shift = data_shift + reg_bits | |
| 257 | |
| 258 }; | |
| 259 | |
| 260 enum OprSize { | |
| 261 single_size = 0 << size_shift | |
| 262 , double_size = 1 << size_shift | |
| 263 }; | |
| 264 | |
| 265 enum OprMask { | |
| 266 kind_mask = right_n_bits(kind_bits) | |
| 267 , type_mask = right_n_bits(type_bits) << type_shift | |
| 268 , size_mask = right_n_bits(size_bits) << size_shift | |
| 269 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift | |
| 270 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift | |
| 271 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift | |
| 272 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift | |
| 273 , pointer_mask = right_n_bits(pointer_bits) | |
| 274 , lower_reg_mask = right_n_bits(reg_bits) | |
| 275 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask)) | |
| 276 }; | |
| 277 | |
| 278 uintptr_t data() const { return value() >> data_shift; } | |
| 279 int lo_reg_half() const { return data() & lower_reg_mask; } | |
| 280 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; } | |
| 281 OprKind kind_field() const { return (OprKind)(value() & kind_mask); } | |
| 282 OprSize size_field() const { return (OprSize)(value() & size_mask); } | |
| 283 | |
| 284 static char type_char(BasicType t); | |
| 285 | |
| 286 public: | |
| 287 enum { | |
| 288 vreg_base = ConcreteRegisterImpl::number_of_registers, | |
| 289 vreg_max = (1 << data_bits) - 1 | |
| 290 }; | |
| 291 | |
| 292 static inline LIR_Opr illegalOpr(); | |
| 293 | |
| 294 enum OprType { | |
| 295 unknown_type = 0 << type_shift // means: not set (catch uninitialized types) | |
| 296 , int_type = 1 << type_shift | |
| 297 , long_type = 2 << type_shift | |
| 298 , object_type = 3 << type_shift | |
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299 , address_type = 4 << type_shift |
| 0 | 300 , float_type = 5 << type_shift |
| 301 , double_type = 6 << type_shift | |
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302 , metadata_type = 7 << type_shift |
| 0 | 303 }; |
| 304 friend OprType as_OprType(BasicType t); | |
| 305 friend BasicType as_BasicType(OprType t); | |
| 306 | |
| 307 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); } | |
| 308 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); } | |
| 309 | |
| 310 static OprSize size_for(BasicType t) { | |
| 311 switch (t) { | |
| 312 case T_LONG: | |
| 313 case T_DOUBLE: | |
| 314 return double_size; | |
| 315 break; | |
| 316 | |
| 317 case T_FLOAT: | |
| 318 case T_BOOLEAN: | |
| 319 case T_CHAR: | |
| 320 case T_BYTE: | |
| 321 case T_SHORT: | |
| 322 case T_INT: | |
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323 case T_ADDRESS: |
| 0 | 324 case T_OBJECT: |
| 325 case T_ARRAY: | |
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326 case T_METADATA: |
| 0 | 327 return single_size; |
| 328 break; | |
| 329 | |
| 330 default: | |
| 331 ShouldNotReachHere(); | |
| 304 | 332 return single_size; |
| 0 | 333 } |
| 334 } | |
| 335 | |
| 336 | |
| 337 void validate_type() const PRODUCT_RETURN; | |
| 338 | |
| 339 BasicType type() const { | |
| 340 if (is_pointer()) { | |
| 341 return pointer()->type(); | |
| 342 } | |
| 343 return as_BasicType(type_field()); | |
| 344 } | |
| 345 | |
| 346 | |
| 347 ValueType* value_type() const { return as_ValueType(type()); } | |
| 348 | |
| 349 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); } | |
| 350 | |
| 351 bool is_equal(LIR_Opr opr) const { return this == opr; } | |
| 352 // checks whether types are same | |
| 353 bool is_same_type(LIR_Opr opr) const { | |
| 354 assert(type_field() != unknown_type && | |
| 355 opr->type_field() != unknown_type, "shouldn't see unknown_type"); | |
| 356 return type_field() == opr->type_field(); | |
| 357 } | |
| 358 bool is_same_register(LIR_Opr opr) { | |
| 359 return (is_register() && opr->is_register() && | |
| 360 kind_field() == opr->kind_field() && | |
| 361 (value() & no_type_mask) == (opr->value() & no_type_mask)); | |
| 362 } | |
| 363 | |
| 364 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); } | |
| 365 bool is_illegal() const { return kind_field() == illegal_value; } | |
| 366 bool is_valid() const { return kind_field() != illegal_value; } | |
| 367 | |
| 368 bool is_register() const { return is_cpu_register() || is_fpu_register(); } | |
| 369 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); } | |
| 370 | |
| 371 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; } | |
| 372 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; } | |
| 373 | |
| 374 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); } | |
| 375 bool is_oop() const; | |
| 376 | |
| 377 // semantic for fpu- and xmm-registers: | |
| 378 // * is_float and is_double return true for xmm_registers | |
| 379 // (so is_single_fpu and is_single_xmm are true) | |
| 380 // * So you must always check for is_???_xmm prior to is_???_fpu to | |
| 381 // distinguish between fpu- and xmm-registers | |
| 382 | |
| 383 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); } | |
| 384 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); } | |
| 385 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); } | |
| 386 | |
| 387 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); } | |
| 388 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); } | |
| 389 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); } | |
| 390 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); } | |
| 391 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); } | |
| 392 | |
| 393 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); } | |
| 394 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); } | |
| 395 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); } | |
| 396 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); } | |
| 397 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); } | |
| 398 | |
| 399 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); } | |
| 400 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); } | |
| 401 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); } | |
| 402 | |
| 403 // fast accessor functions for special bits that do not work for pointers | |
| 404 // (in this functions, the check for is_pointer() is omitted) | |
| 405 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); } | |
| 406 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); } | |
| 407 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); } | |
| 408 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; } | |
| 409 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); } | |
| 410 | |
| 411 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; } | |
| 412 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; } | |
| 413 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); } | |
| 414 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); } | |
| 415 | |
| 416 | |
| 417 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); } | |
| 418 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); } | |
| 419 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); } | |
| 420 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } | |
| 421 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } | |
| 422 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); } | |
| 423 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } | |
| 424 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } | |
| 425 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); } | |
| 426 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } | |
| 427 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } | |
| 428 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); } | |
| 429 | |
| 430 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; } | |
| 431 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); } | |
| 432 LIR_Address* as_address_ptr() const { return pointer()->as_address(); } | |
| 433 | |
| 434 Register as_register() const; | |
| 435 Register as_register_lo() const; | |
| 436 Register as_register_hi() const; | |
| 437 | |
| 438 Register as_pointer_register() { | |
| 439 #ifdef _LP64 | |
| 440 if (is_double_cpu()) { | |
| 441 assert(as_register_lo() == as_register_hi(), "should be a single register"); | |
| 442 return as_register_lo(); | |
| 443 } | |
| 444 #endif | |
| 445 return as_register(); | |
| 446 } | |
| 447 | |
| 304 | 448 #ifdef X86 |
| 0 | 449 XMMRegister as_xmm_float_reg() const; |
| 450 XMMRegister as_xmm_double_reg() const; | |
| 451 // for compatibility with RInfo | |
| 452 int fpu () const { return lo_reg_half(); } | |
| 304 | 453 #endif // X86 |
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454 #if defined(SPARC) || defined(ARM) || defined(PPC) |
| 0 | 455 FloatRegister as_float_reg () const; |
| 456 FloatRegister as_double_reg () const; | |
| 457 #endif | |
| 458 | |
| 459 jint as_jint() const { return as_constant_ptr()->as_jint(); } | |
| 460 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); } | |
| 461 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); } | |
| 462 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); } | |
| 463 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); } | |
| 464 | |
| 465 void print() const PRODUCT_RETURN; | |
| 466 void print(outputStream* out) const PRODUCT_RETURN; | |
| 467 }; | |
| 468 | |
| 469 | |
| 470 inline LIR_OprDesc::OprType as_OprType(BasicType type) { | |
| 471 switch (type) { | |
| 472 case T_INT: return LIR_OprDesc::int_type; | |
| 473 case T_LONG: return LIR_OprDesc::long_type; | |
| 474 case T_FLOAT: return LIR_OprDesc::float_type; | |
| 475 case T_DOUBLE: return LIR_OprDesc::double_type; | |
| 476 case T_OBJECT: | |
| 477 case T_ARRAY: return LIR_OprDesc::object_type; | |
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478 case T_ADDRESS: return LIR_OprDesc::address_type; |
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479 case T_METADATA: return LIR_OprDesc::metadata_type; |
| 0 | 480 case T_ILLEGAL: // fall through |
| 481 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type; | |
| 482 } | |
| 483 } | |
| 484 | |
| 485 inline BasicType as_BasicType(LIR_OprDesc::OprType t) { | |
| 486 switch (t) { | |
| 487 case LIR_OprDesc::int_type: return T_INT; | |
| 488 case LIR_OprDesc::long_type: return T_LONG; | |
| 489 case LIR_OprDesc::float_type: return T_FLOAT; | |
| 490 case LIR_OprDesc::double_type: return T_DOUBLE; | |
| 491 case LIR_OprDesc::object_type: return T_OBJECT; | |
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492 case LIR_OprDesc::address_type: return T_ADDRESS; |
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493 case LIR_OprDesc::metadata_type:return T_METADATA; |
| 0 | 494 case LIR_OprDesc::unknown_type: // fall through |
| 495 default: ShouldNotReachHere(); return T_ILLEGAL; | |
| 496 } | |
| 497 } | |
| 498 | |
| 499 | |
| 500 // LIR_Address | |
| 501 class LIR_Address: public LIR_OprPtr { | |
| 502 friend class LIR_OpVisitState; | |
| 503 | |
| 504 public: | |
| 505 // NOTE: currently these must be the log2 of the scale factor (and | |
| 506 // must also be equivalent to the ScaleFactor enum in | |
| 507 // assembler_i486.hpp) | |
| 508 enum Scale { | |
| 509 times_1 = 0, | |
| 510 times_2 = 1, | |
| 511 times_4 = 2, | |
| 512 times_8 = 3 | |
| 513 }; | |
| 514 | |
| 515 private: | |
| 516 LIR_Opr _base; | |
| 517 LIR_Opr _index; | |
| 518 Scale _scale; | |
| 519 intx _disp; | |
| 520 BasicType _type; | |
| 521 | |
| 522 public: | |
| 523 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type): | |
| 524 _base(base) | |
| 525 , _index(index) | |
| 526 , _scale(times_1) | |
| 527 , _type(type) | |
| 528 , _disp(0) { verify(); } | |
| 529 | |
| 1572 | 530 LIR_Address(LIR_Opr base, intx disp, BasicType type): |
| 0 | 531 _base(base) |
| 532 , _index(LIR_OprDesc::illegalOpr()) | |
| 533 , _scale(times_1) | |
| 534 , _type(type) | |
| 535 , _disp(disp) { verify(); } | |
| 536 | |
| 1572 | 537 LIR_Address(LIR_Opr base, BasicType type): |
| 538 _base(base) | |
| 539 , _index(LIR_OprDesc::illegalOpr()) | |
| 540 , _scale(times_1) | |
| 541 , _type(type) | |
| 542 , _disp(0) { verify(); } | |
| 543 | |
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544 #if defined(X86) || defined(ARM) |
| 1572 | 545 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type): |
| 0 | 546 _base(base) |
| 547 , _index(index) | |
| 548 , _scale(scale) | |
| 549 , _type(type) | |
| 550 , _disp(disp) { verify(); } | |
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551 #endif // X86 || ARM |
| 0 | 552 |
| 553 LIR_Opr base() const { return _base; } | |
| 554 LIR_Opr index() const { return _index; } | |
| 555 Scale scale() const { return _scale; } | |
| 556 intx disp() const { return _disp; } | |
| 557 | |
| 558 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); } | |
| 559 | |
| 560 virtual LIR_Address* as_address() { return this; } | |
| 561 virtual BasicType type() const { return _type; } | |
| 562 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN; | |
| 563 | |
| 564 void verify() const PRODUCT_RETURN; | |
| 565 | |
| 566 static Scale scale(BasicType type); | |
| 567 }; | |
| 568 | |
| 569 | |
| 570 // operand factory | |
| 571 class LIR_OprFact: public AllStatic { | |
| 572 public: | |
| 573 | |
| 574 static LIR_Opr illegalOpr; | |
| 575 | |
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576 static LIR_Opr single_cpu(int reg) { |
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577 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
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578 LIR_OprDesc::int_type | |
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579 LIR_OprDesc::cpu_register | |
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580 LIR_OprDesc::single_size); |
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581 } |
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582 static LIR_Opr single_cpu_oop(int reg) { |
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583 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
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584 LIR_OprDesc::object_type | |
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585 LIR_OprDesc::cpu_register | |
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586 LIR_OprDesc::single_size); |
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587 } |
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588 static LIR_Opr single_cpu_address(int reg) { |
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589 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
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590 LIR_OprDesc::address_type | |
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591 LIR_OprDesc::cpu_register | |
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592 LIR_OprDesc::single_size); |
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593 } |
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594 static LIR_Opr single_cpu_metadata(int reg) { |
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595 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
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596 LIR_OprDesc::metadata_type | |
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597 LIR_OprDesc::cpu_register | |
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598 LIR_OprDesc::single_size); |
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599 } |
| 304 | 600 static LIR_Opr double_cpu(int reg1, int reg2) { |
| 601 LP64_ONLY(assert(reg1 == reg2, "must be identical")); | |
| 602 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | | |
| 603 (reg2 << LIR_OprDesc::reg2_shift) | | |
| 604 LIR_OprDesc::long_type | | |
| 605 LIR_OprDesc::cpu_register | | |
| 606 LIR_OprDesc::double_size); | |
| 607 } | |
| 0 | 608 |
| 304 | 609 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
| 610 LIR_OprDesc::float_type | | |
| 611 LIR_OprDesc::fpu_register | | |
| 612 LIR_OprDesc::single_size); } | |
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613 #if defined(ARM) |
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614 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); } |
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615 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::float_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); } |
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616 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); } |
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617 #endif |
| 0 | 618 #ifdef SPARC |
| 304 | 619 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | |
| 620 (reg2 << LIR_OprDesc::reg2_shift) | | |
| 621 LIR_OprDesc::double_type | | |
| 622 LIR_OprDesc::fpu_register | | |
| 623 LIR_OprDesc::double_size); } | |
| 0 | 624 #endif |
| 304 | 625 #ifdef X86 |
| 626 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | | |
| 627 (reg << LIR_OprDesc::reg2_shift) | | |
| 628 LIR_OprDesc::double_type | | |
| 629 LIR_OprDesc::fpu_register | | |
| 630 LIR_OprDesc::double_size); } | |
| 631 | |
| 632 static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | | |
| 633 LIR_OprDesc::float_type | | |
| 634 LIR_OprDesc::fpu_register | | |
| 635 LIR_OprDesc::single_size | | |
| 636 LIR_OprDesc::is_xmm_mask); } | |
| 637 static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | | |
| 638 (reg << LIR_OprDesc::reg2_shift) | | |
| 639 LIR_OprDesc::double_type | | |
| 640 LIR_OprDesc::fpu_register | | |
| 641 LIR_OprDesc::double_size | | |
| 642 LIR_OprDesc::is_xmm_mask); } | |
| 643 #endif // X86 | |
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644 #ifdef PPC |
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645 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
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646 (reg << LIR_OprDesc::reg2_shift) | |
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647 LIR_OprDesc::double_type | |
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648 LIR_OprDesc::fpu_register | |
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649 LIR_OprDesc::double_size); } |
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650 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | |
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651 LIR_OprDesc::float_type | |
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652 LIR_OprDesc::cpu_register | |
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653 LIR_OprDesc::single_size); } |
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654 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift) | |
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655 (reg1 << LIR_OprDesc::reg2_shift) | |
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656 LIR_OprDesc::double_type | |
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657 LIR_OprDesc::cpu_register | |
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658 LIR_OprDesc::double_size); } |
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659 #endif // PPC |
| 0 | 660 |
| 661 static LIR_Opr virtual_register(int index, BasicType type) { | |
| 662 LIR_Opr res; | |
| 663 switch (type) { | |
| 664 case T_OBJECT: // fall through | |
| 304 | 665 case T_ARRAY: |
| 666 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 667 LIR_OprDesc::object_type | | |
| 668 LIR_OprDesc::cpu_register | | |
| 669 LIR_OprDesc::single_size | | |
| 670 LIR_OprDesc::virtual_mask); | |
| 671 break; | |
| 672 | |
|
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673 case T_METADATA: |
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674 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
|
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675 LIR_OprDesc::metadata_type| |
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676 LIR_OprDesc::cpu_register | |
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677 LIR_OprDesc::single_size | |
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678 LIR_OprDesc::virtual_mask); |
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679 break; |
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680 |
| 304 | 681 case T_INT: |
| 682 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 683 LIR_OprDesc::int_type | | |
| 684 LIR_OprDesc::cpu_register | | |
| 685 LIR_OprDesc::single_size | | |
| 686 LIR_OprDesc::virtual_mask); | |
| 687 break; | |
| 688 | |
|
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689 case T_ADDRESS: |
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690 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
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691 LIR_OprDesc::address_type | |
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692 LIR_OprDesc::cpu_register | |
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693 LIR_OprDesc::single_size | |
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694 LIR_OprDesc::virtual_mask); |
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695 break; |
|
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|
696 |
| 304 | 697 case T_LONG: |
| 698 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 699 LIR_OprDesc::long_type | | |
| 700 LIR_OprDesc::cpu_register | | |
| 701 LIR_OprDesc::double_size | | |
| 702 LIR_OprDesc::virtual_mask); | |
| 703 break; | |
| 704 | |
|
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705 #ifdef __SOFTFP__ |
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706 case T_FLOAT: |
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707 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
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708 LIR_OprDesc::float_type | |
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709 LIR_OprDesc::cpu_register | |
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710 LIR_OprDesc::single_size | |
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711 LIR_OprDesc::virtual_mask); |
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712 break; |
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713 case T_DOUBLE: |
|
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714 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
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715 LIR_OprDesc::double_type | |
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716 LIR_OprDesc::cpu_register | |
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717 LIR_OprDesc::double_size | |
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718 LIR_OprDesc::virtual_mask); |
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719 break; |
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720 #else // __SOFTFP__ |
| 304 | 721 case T_FLOAT: |
| 722 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 723 LIR_OprDesc::float_type | | |
| 724 LIR_OprDesc::fpu_register | | |
| 725 LIR_OprDesc::single_size | | |
| 726 LIR_OprDesc::virtual_mask); | |
| 727 break; | |
| 728 | |
| 729 case | |
| 730 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 731 LIR_OprDesc::double_type | | |
| 732 LIR_OprDesc::fpu_register | | |
| 733 LIR_OprDesc::double_size | | |
| 734 LIR_OprDesc::virtual_mask); | |
| 735 break; | |
|
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|
736 #endif // __SOFTFP__ |
| 0 | 737 default: ShouldNotReachHere(); res = illegalOpr; |
| 738 } | |
| 739 | |
| 740 #ifdef ASSERT | |
| 741 res->validate_type(); | |
| 742 assert(res->vreg_number() == index, "conversion check"); | |
| 743 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base"); | |
| 744 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); | |
| 745 | |
| 746 // old-style calculation; check if old and new method are equal | |
| 747 LIR_OprDesc::OprType t = as_OprType(type); | |
|
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748 #ifdef __SOFTFP__ |
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749 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
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750 t | |
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751 LIR_OprDesc::cpu_register | |
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752 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask); |
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753 #else // __SOFTFP__ |
| 304 | 754 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t | |
| 755 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) | | |
| 0 | 756 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask); |
| 757 assert(res == old_res, "old and new method not equal"); | |
|
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758 #endif // __SOFTFP__ |
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759 #endif // ASSERT |
| 0 | 760 |
| 761 return res; | |
| 762 } | |
| 763 | |
| 764 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as | |
| 765 // the index is platform independent; a double stack useing indeces 2 and 3 has always | |
| 766 // index 2. | |
| 767 static LIR_Opr stack(int index, BasicType type) { | |
| 768 LIR_Opr res; | |
| 769 switch (type) { | |
| 770 case T_OBJECT: // fall through | |
| 304 | 771 case T_ARRAY: |
| 772 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 773 LIR_OprDesc::object_type | | |
| 774 LIR_OprDesc::stack_value | | |
| 775 LIR_OprDesc::single_size); | |
| 776 break; | |
| 777 | |
|
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778 case T_METADATA: |
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779 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
|
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|
780 LIR_OprDesc::metadata_type | |
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781 LIR_OprDesc::stack_value | |
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782 LIR_OprDesc::single_size); |
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|
783 break; |
| 304 | 784 case T_INT: |
| 785 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 786 LIR_OprDesc::int_type | | |
| 787 LIR_OprDesc::stack_value | | |
| 788 LIR_OprDesc::single_size); | |
| 789 break; | |
| 790 | |
|
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791 case T_ADDRESS: |
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|
792 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
|
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|
793 LIR_OprDesc::address_type | |
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794 LIR_OprDesc::stack_value | |
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|
795 LIR_OprDesc::single_size); |
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796 break; |
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|
797 |
| 304 | 798 case T_LONG: |
| 799 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 800 LIR_OprDesc::long_type | | |
| 801 LIR_OprDesc::stack_value | | |
| 802 LIR_OprDesc::double_size); | |
| 803 break; | |
| 804 | |
| 805 case T_FLOAT: | |
| 806 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 807 LIR_OprDesc::float_type | | |
| 808 LIR_OprDesc::stack_value | | |
| 809 LIR_OprDesc::single_size); | |
| 810 break; | |
| 811 case T_DOUBLE: | |
| 812 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 813 LIR_OprDesc::double_type | | |
| 814 LIR_OprDesc::stack_value | | |
| 815 LIR_OprDesc::double_size); | |
| 816 break; | |
| 0 | 817 |
| 818 default: ShouldNotReachHere(); res = illegalOpr; | |
| 819 } | |
| 820 | |
| 821 #ifdef ASSERT | |
| 822 assert(index >= 0, "index must be positive"); | |
| 823 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); | |
| 824 | |
| 304 | 825 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
| 826 LIR_OprDesc::stack_value | | |
| 827 as_OprType(type) | | |
| 828 LIR_OprDesc::size_for(type)); | |
| 0 | 829 assert(res == old_res, "old and new method not equal"); |
| 830 #endif | |
| 831 | |
| 832 return res; | |
| 833 } | |
| 834 | |
| 835 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); } | |
| 836 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); } | |
| 837 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); } | |
| 838 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); } | |
| 839 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); } | |
| 840 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; } | |
| 841 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); } | |
| 842 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); } | |
| 843 static LIR_Opr illegal() { return (LIR_Opr)-1; } | |
|
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844 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); } |
|
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845 static LIR_Opr metadataConst(Metadata* m) { return (LIR_Opr)(new LIR_Const(m)); } |
| 0 | 846 |
| 847 static LIR_Opr value_type(ValueType* type); | |
| 848 static LIR_Opr dummy_value_type(ValueType* type); | |
| 849 }; | |
| 850 | |
| 851 | |
| 852 //------------------------------------------------------------------------------- | |
| 853 // LIR Instructions | |
| 854 //------------------------------------------------------------------------------- | |
| 855 // | |
| 856 // Note: | |
| 857 // - every instruction has a result operand | |
| 858 // - every instruction has an CodeEmitInfo operand (can be revisited later) | |
| 859 // - every instruction has a LIR_OpCode operand | |
| 860 // - LIR_OpN, means an instruction that has N input operands | |
| 861 // | |
| 862 // class hierarchy: | |
| 863 // | |
| 864 class LIR_Op; | |
| 865 class LIR_Op0; | |
| 866 class LIR_OpLabel; | |
| 867 class LIR_Op1; | |
| 868 class LIR_OpBranch; | |
| 869 class LIR_OpConvert; | |
| 870 class LIR_OpAllocObj; | |
| 871 class LIR_OpRoundFP; | |
| 872 class LIR_Op2; | |
| 873 class LIR_OpDelay; | |
| 874 class LIR_Op3; | |
| 875 class LIR_OpAllocArray; | |
| 876 class LIR_OpCall; | |
| 877 class LIR_OpJavaCall; | |
| 878 class LIR_OpRTCall; | |
| 879 class LIR_OpArrayCopy; | |
| 880 class LIR_OpLock; | |
| 881 class LIR_OpTypeCheck; | |
| 882 class LIR_OpCompareAndSwap; | |
| 883 class LIR_OpProfileCall; | |
| 884 | |
| 885 | |
| 886 // LIR operation codes | |
| 887 enum LIR_Code { | |
| 888 lir_none | |
| 889 , begin_op0 | |
| 890 , lir_word_align | |
| 891 , lir_label | |
| 892 , lir_nop | |
| 893 , lir_backwardbranch_target | |
| 894 , lir_std_entry | |
| 895 , lir_osr_entry | |
| 896 , lir_build_frame | |
| 897 , lir_fpop_raw | |
| 898 , lir_24bit_FPU | |
| 899 , lir_reset_FPU | |
| 900 , lir_breakpoint | |
| 901 , lir_rtcall | |
| 902 , lir_membar | |
| 903 , lir_membar_acquire | |
| 904 , lir_membar_release | |
|
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905 , lir_membar_loadload |
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906 , lir_membar_storestore |
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|
907 , lir_membar_loadstore |
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|
908 , lir_membar_storeload |
| 0 | 909 , lir_get_thread |
| 910 , end_op0 | |
| 911 , begin_op1 | |
| 912 , lir_fxch | |
| 913 , lir_fld | |
| 914 , lir_ffree | |
| 915 , lir_push | |
| 916 , lir_pop | |
| 917 , lir_null_check | |
| 918 , lir_return | |
| 919 , lir_leal | |
| 920 , lir_neg | |
| 921 , lir_branch | |
| 922 , lir_cond_float_branch | |
| 923 , lir_move | |
| 924 , lir_prefetchr | |
| 925 , lir_prefetchw | |
| 926 , lir_convert | |
| 927 , lir_alloc_object | |
| 928 , lir_monaddr | |
| 929 , lir_roundfp | |
| 930 , lir_safepoint | |
| 1783 | 931 , lir_pack64 |
| 932 , lir_unpack64 | |
|
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933 , lir_unwind |
| 0 | 934 , end_op1 |
| 935 , begin_op2 | |
| 936 , lir_cmp | |
| 937 , lir_cmp_l2i | |
| 938 , lir_ucmp_fd2i | |
| 939 , lir_cmp_fd2i | |
| 940 , lir_cmove | |
| 941 , lir_add | |
| 942 , lir_sub | |
| 943 , lir_mul | |
| 944 , lir_mul_strictfp | |
| 945 , lir_div | |
| 946 , lir_div_strictfp | |
| 947 , lir_rem | |
| 948 , lir_sqrt | |
| 949 , lir_abs | |
| 950 , lir_sin | |
| 951 , lir_cos | |
| 952 , lir_tan | |
| 953 , lir_log | |
| 954 , lir_log10 | |
|
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955 , lir_exp |
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|
956 , lir_pow |
| 0 | 957 , lir_logic_and |
| 958 , lir_logic_or | |
| 959 , lir_logic_xor | |
| 960 , lir_shl | |
| 961 , lir_shr | |
| 962 , lir_ushr | |
| 963 , lir_alloc_array | |
| 964 , lir_throw | |
| 965 , lir_compare_to | |
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966 , lir_xadd |
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967 , lir_xchg |
| 0 | 968 , end_op2 |
| 969 , begin_op3 | |
| 970 , lir_idiv | |
| 971 , lir_irem | |
| 972 , end_op3 | |
| 973 , begin_opJavaCall | |
| 974 , lir_static_call | |
| 975 , lir_optvirtual_call | |
| 976 , lir_icvirtual_call | |
| 977 , lir_virtual_call | |
| 1295 | 978 , lir_dynamic_call |
| 0 | 979 , end_opJavaCall |
| 980 , begin_opArrayCopy | |
| 981 , lir_arraycopy | |
| 982 , end_opArrayCopy | |
| 983 , begin_opLock | |
| 984 , lir_lock | |
| 985 , lir_unlock | |
| 986 , end_opLock | |
| 987 , begin_delay_slot | |
| 988 , lir_delay_slot | |
| 989 , end_delay_slot | |
| 990 , begin_opTypeCheck | |
| 991 , lir_instanceof | |
| 992 , lir_checkcast | |
| 993 , lir_store_check | |
| 994 , end_opTypeCheck | |
| 995 , begin_opCompareAndSwap | |
| 996 , lir_cas_long | |
| 997 , lir_cas_obj | |
| 998 , lir_cas_int | |
| 999 , end_opCompareAndSwap | |
| 1000 , begin_opMDOProfile | |
| 1001 , lir_profile_call | |
| 1002 , end_opMDOProfile | |
| 1003 }; | |
| 1004 | |
| 1005 | |
| 1006 enum LIR_Condition { | |
| 1007 lir_cond_equal | |
| 1008 , lir_cond_notEqual | |
| 1009 , lir_cond_less | |
| 1010 , lir_cond_lessEqual | |
| 1011 , lir_cond_greaterEqual | |
| 1012 , lir_cond_greater | |
| 1013 , lir_cond_belowEqual | |
| 1014 , lir_cond_aboveEqual | |
| 1015 , lir_cond_always | |
| 1016 , lir_cond_unknown = -1 | |
| 1017 }; | |
| 1018 | |
| 1019 | |
| 1020 enum LIR_PatchCode { | |
| 1021 lir_patch_none, | |
| 1022 lir_patch_low, | |
| 1023 lir_patch_high, | |
| 1024 lir_patch_normal | |
| 1025 }; | |
| 1026 | |
| 1027 | |
| 1028 enum LIR_MoveKind { | |
| 1029 lir_move_normal, | |
| 1030 lir_move_volatile, | |
| 1031 lir_move_unaligned, | |
| 2002 | 1032 lir_move_wide, |
| 0 | 1033 lir_move_max_flag |
| 1034 }; | |
| 1035 | |
| 1036 | |
| 1037 // -------------------------------------------------- | |
| 1038 // LIR_Op | |
| 1039 // -------------------------------------------------- | |
| 1040 class LIR_Op: public CompilationResourceObj { | |
| 1041 friend class LIR_OpVisitState; | |
| 1042 | |
| 1043 #ifdef ASSERT | |
| 1044 private: | |
| 1045 const char * _file; | |
| 1046 int _line; | |
| 1047 #endif | |
| 1048 | |
| 1049 protected: | |
| 1050 LIR_Opr _result; | |
| 1051 unsigned short _code; | |
| 1052 unsigned short _flags; | |
| 1053 CodeEmitInfo* _info; | |
| 1054 int _id; // value id for register allocation | |
| 1055 int _fpu_pop_count; | |
| 1056 Instruction* _source; // for debugging | |
| 1057 | |
| 1058 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN; | |
| 1059 | |
| 1060 protected: | |
| 1061 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; } | |
| 1062 | |
| 1063 public: | |
| 1064 LIR_Op() | |
| 1065 : _result(LIR_OprFact::illegalOpr) | |
| 1066 , _code(lir_none) | |
| 1067 , _flags(0) | |
| 1068 , _info(NULL) | |
| 1069 #ifdef ASSERT | |
| 1070 , _file(NULL) | |
| 1071 , _line(0) | |
| 1072 #endif | |
| 1073 , _fpu_pop_count(0) | |
| 1074 , _source(NULL) | |
| 1075 , _id(-1) {} | |
| 1076 | |
| 1077 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info) | |
| 1078 : _result(result) | |
| 1079 , _code(code) | |
| 1080 , _flags(0) | |
| 1081 , _info(info) | |
| 1082 #ifdef ASSERT | |
| 1083 , _file(NULL) | |
| 1084 , _line(0) | |
| 1085 #endif | |
| 1086 , _fpu_pop_count(0) | |
| 1087 , _source(NULL) | |
| 1088 , _id(-1) {} | |
| 1089 | |
| 1090 CodeEmitInfo* info() const { return _info; } | |
| 1091 LIR_Code code() const { return (LIR_Code)_code; } | |
| 1092 LIR_Opr result_opr() const { return _result; } | |
| 1093 void set_result_opr(LIR_Opr opr) { _result = opr; } | |
| 1094 | |
| 1095 #ifdef ASSERT | |
| 1096 void set_file_and_line(const char * file, int line) { | |
| 1097 _file = file; | |
| 1098 _line = line; | |
| 1099 } | |
| 1100 #endif | |
| 1101 | |
| 1102 virtual const char * name() const PRODUCT_RETURN0; | |
| 1103 | |
| 1104 int id() const { return _id; } | |
| 1105 void set_id(int id) { _id = id; } | |
| 1106 | |
| 1107 // FPU stack simulation helpers -- only used on Intel | |
| 1108 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; } | |
| 1109 int fpu_pop_count() const { return _fpu_pop_count; } | |
| 1110 bool pop_fpu_stack() { return _fpu_pop_count > 0; } | |
| 1111 | |
| 1112 Instruction* source() const { return _source; } | |
| 1113 void set_source(Instruction* ins) { _source = ins; } | |
| 1114 | |
| 1115 virtual void emit_code(LIR_Assembler* masm) = 0; | |
| 1116 virtual void print_instr(outputStream* out) const = 0; | |
| 1117 virtual void print_on(outputStream* st) const PRODUCT_RETURN; | |
| 1118 | |
| 1119 virtual LIR_OpCall* as_OpCall() { return NULL; } | |
| 1120 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; } | |
| 1121 virtual LIR_OpLabel* as_OpLabel() { return NULL; } | |
| 1122 virtual LIR_OpDelay* as_OpDelay() { return NULL; } | |
| 1123 virtual LIR_OpLock* as_OpLock() { return NULL; } | |
| 1124 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; } | |
| 1125 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; } | |
| 1126 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; } | |
| 1127 virtual LIR_OpBranch* as_OpBranch() { return NULL; } | |
| 1128 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; } | |
| 1129 virtual LIR_OpConvert* as_OpConvert() { return NULL; } | |
| 1130 virtual LIR_Op0* as_Op0() { return NULL; } | |
| 1131 virtual LIR_Op1* as_Op1() { return NULL; } | |
| 1132 virtual LIR_Op2* as_Op2() { return NULL; } | |
| 1133 virtual LIR_Op3* as_Op3() { return NULL; } | |
| 1134 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; } | |
| 1135 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; } | |
| 1136 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; } | |
| 1137 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; } | |
| 1138 | |
| 1139 virtual void verify() const {} | |
| 1140 }; | |
| 1141 | |
| 1142 // for calls | |
| 1143 class LIR_OpCall: public LIR_Op { | |
| 1144 friend class LIR_OpVisitState; | |
| 1145 | |
| 1146 protected: | |
| 1147 address _addr; | |
| 1148 LIR_OprList* _arguments; | |
| 1149 protected: | |
| 1150 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result, | |
| 1151 LIR_OprList* arguments, CodeEmitInfo* info = NULL) | |
| 1152 : LIR_Op(code, result, info) | |
| 1153 , _arguments(arguments) | |
| 1154 , _addr(addr) {} | |
| 1155 | |
| 1156 public: | |
| 1157 address addr() const { return _addr; } | |
| 1158 const LIR_OprList* arguments() const { return _arguments; } | |
| 1159 virtual LIR_OpCall* as_OpCall() { return this; } | |
| 1160 }; | |
| 1161 | |
| 1162 | |
| 1163 // -------------------------------------------------- | |
| 1164 // LIR_OpJavaCall | |
| 1165 // -------------------------------------------------- | |
| 1166 class LIR_OpJavaCall: public LIR_OpCall { | |
| 1167 friend class LIR_OpVisitState; | |
| 1168 | |
| 1169 private: | |
| 1564 | 1170 ciMethod* _method; |
| 1171 LIR_Opr _receiver; | |
| 1172 LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr. | |
| 0 | 1173 |
| 1174 public: | |
| 1175 LIR_OpJavaCall(LIR_Code code, ciMethod* method, | |
| 1176 LIR_Opr receiver, LIR_Opr result, | |
| 1177 address addr, LIR_OprList* arguments, | |
| 1178 CodeEmitInfo* info) | |
| 1179 : LIR_OpCall(code, addr, result, arguments, info) | |
| 1180 , _receiver(receiver) | |
| 1564 | 1181 , _method(method) |
| 1182 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr) | |
| 1183 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); } | |
| 0 | 1184 |
| 1185 LIR_OpJavaCall(LIR_Code code, ciMethod* method, | |
| 1186 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset, | |
| 1187 LIR_OprList* arguments, CodeEmitInfo* info) | |
| 1188 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info) | |
| 1189 , _receiver(receiver) | |
| 1564 | 1190 , _method(method) |
| 1191 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr) | |
| 1192 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); } | |
| 0 | 1193 |
| 1194 LIR_Opr receiver() const { return _receiver; } | |
| 1195 ciMethod* method() const { return _method; } | |
| 1196 | |
| 1295 | 1197 // JSR 292 support. |
| 1198 bool is_invokedynamic() const { return code() == lir_dynamic_call; } | |
| 1199 bool is_method_handle_invoke() const { | |
| 1200 return | |
| 1201 is_invokedynamic() // An invokedynamic is always a MethodHandle call site. | |
| 1202 || | |
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1203 method()->is_compiled_lambda_form() // Java-generated adapter |
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1204 || |
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1205 method()->is_method_handle_intrinsic(); // JVM-generated MH intrinsic |
| 1295 | 1206 } |
| 1207 | |
| 0 | 1208 intptr_t vtable_offset() const { |
| 1209 assert(_code == lir_virtual_call, "only have vtable for real vcall"); | |
| 1210 return (intptr_t) addr(); | |
| 1211 } | |
| 1212 | |
| 1213 virtual void emit_code(LIR_Assembler* masm); | |
| 1214 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; } | |
| 1215 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1216 }; | |
| 1217 | |
| 1218 // -------------------------------------------------- | |
| 1219 // LIR_OpLabel | |
| 1220 // -------------------------------------------------- | |
| 1221 // Location where a branch can continue | |
| 1222 class LIR_OpLabel: public LIR_Op { | |
| 1223 friend class LIR_OpVisitState; | |
| 1224 | |
| 1225 private: | |
| 1226 Label* _label; | |
| 1227 public: | |
| 1228 LIR_OpLabel(Label* lbl) | |
| 1229 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL) | |
| 1230 , _label(lbl) {} | |
| 1231 Label* label() const { return _label; } | |
| 1232 | |
| 1233 virtual void emit_code(LIR_Assembler* masm); | |
| 1234 virtual LIR_OpLabel* as_OpLabel() { return this; } | |
| 1235 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1236 }; | |
| 1237 | |
| 1238 // LIR_OpArrayCopy | |
| 1239 class LIR_OpArrayCopy: public LIR_Op { | |
| 1240 friend class LIR_OpVisitState; | |
| 1241 | |
| 1242 private: | |
| 1243 ArrayCopyStub* _stub; | |
| 1244 LIR_Opr _src; | |
| 1245 LIR_Opr _src_pos; | |
| 1246 LIR_Opr _dst; | |
| 1247 LIR_Opr _dst_pos; | |
| 1248 LIR_Opr _length; | |
| 1249 LIR_Opr _tmp; | |
| 1250 ciArrayKlass* _expected_type; | |
| 1251 int _flags; | |
| 1252 | |
| 1253 public: | |
| 1254 enum Flags { | |
| 1255 src_null_check = 1 << 0, | |
| 1256 dst_null_check = 1 << 1, | |
| 1257 src_pos_positive_check = 1 << 2, | |
| 1258 dst_pos_positive_check = 1 << 3, | |
| 1259 length_positive_check = 1 << 4, | |
| 1260 src_range_check = 1 << 5, | |
| 1261 dst_range_check = 1 << 6, | |
| 1262 type_check = 1 << 7, | |
| 2446 | 1263 overlapping = 1 << 8, |
| 1264 unaligned = 1 << 9, | |
| 1265 src_objarray = 1 << 10, | |
| 1266 dst_objarray = 1 << 11, | |
| 1267 all_flags = (1 << 12) - 1 | |
| 0 | 1268 }; |
| 1269 | |
| 1270 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, | |
| 1271 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info); | |
| 1272 | |
| 1273 LIR_Opr src() const { return _src; } | |
| 1274 LIR_Opr src_pos() const { return _src_pos; } | |
| 1275 LIR_Opr dst() const { return _dst; } | |
| 1276 LIR_Opr dst_pos() const { return _dst_pos; } | |
| 1277 LIR_Opr length() const { return _length; } | |
| 1278 LIR_Opr tmp() const { return _tmp; } | |
| 1279 int flags() const { return _flags; } | |
| 1280 ciArrayKlass* expected_type() const { return _expected_type; } | |
| 1281 ArrayCopyStub* stub() const { return _stub; } | |
| 1282 | |
| 1283 virtual void emit_code(LIR_Assembler* masm); | |
| 1284 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; } | |
| 1285 void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1286 }; | |
| 1287 | |
| 1288 | |
| 1289 // -------------------------------------------------- | |
| 1290 // LIR_Op0 | |
| 1291 // -------------------------------------------------- | |
| 1292 class LIR_Op0: public LIR_Op { | |
| 1293 friend class LIR_OpVisitState; | |
| 1294 | |
| 1295 public: | |
| 1296 LIR_Op0(LIR_Code code) | |
| 1297 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); } | |
| 1298 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL) | |
| 1299 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); } | |
| 1300 | |
| 1301 virtual void emit_code(LIR_Assembler* masm); | |
| 1302 virtual LIR_Op0* as_Op0() { return this; } | |
| 1303 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1304 }; | |
| 1305 | |
| 1306 | |
| 1307 // -------------------------------------------------- | |
| 1308 // LIR_Op1 | |
| 1309 // -------------------------------------------------- | |
| 1310 | |
| 1311 class LIR_Op1: public LIR_Op { | |
| 1312 friend class LIR_OpVisitState; | |
| 1313 | |
| 1314 protected: | |
| 1315 LIR_Opr _opr; // input operand | |
| 1316 BasicType _type; // Operand types | |
| 1317 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?) | |
| 1318 | |
| 1319 static void print_patch_code(outputStream* out, LIR_PatchCode code); | |
| 1320 | |
| 1321 void set_kind(LIR_MoveKind kind) { | |
| 1322 assert(code() == lir_move, "must be"); | |
| 1323 _flags = kind; | |
| 1324 } | |
| 1325 | |
| 1326 public: | |
| 1327 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL) | |
| 1328 : LIR_Op(code, result, info) | |
| 1329 , _opr(opr) | |
| 1330 , _patch(patch) | |
| 1331 , _type(type) { assert(is_in_range(code, begin_op1, end_op1), "code check"); } | |
| 1332 | |
| 1333 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind) | |
| 1334 : LIR_Op(code, result, info) | |
| 1335 , _opr(opr) | |
| 1336 , _patch(patch) | |
| 1337 , _type(type) { | |
| 1338 assert(code == lir_move, "must be"); | |
| 1339 set_kind(kind); | |
| 1340 } | |
| 1341 | |
| 1342 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info) | |
| 1343 : LIR_Op(code, LIR_OprFact::illegalOpr, info) | |
| 1344 , _opr(opr) | |
| 1345 , _patch(lir_patch_none) | |
| 1346 , _type(T_ILLEGAL) { assert(is_in_range(code, begin_op1, end_op1), "code check"); } | |
| 1347 | |
| 1348 LIR_Opr in_opr() const { return _opr; } | |
| 1349 LIR_PatchCode patch_code() const { return _patch; } | |
| 1350 BasicType type() const { return _type; } | |
| 1351 | |
| 1352 LIR_MoveKind move_kind() const { | |
| 1353 assert(code() == lir_move, "must be"); | |
| 1354 return (LIR_MoveKind)_flags; | |
| 1355 } | |
| 1356 | |
| 1357 virtual void emit_code(LIR_Assembler* masm); | |
| 1358 virtual LIR_Op1* as_Op1() { return this; } | |
| 1359 virtual const char * name() const PRODUCT_RETURN0; | |
| 1360 | |
| 1361 void set_in_opr(LIR_Opr opr) { _opr = opr; } | |
| 1362 | |
| 1363 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1364 virtual void verify() const; | |
| 1365 }; | |
| 1366 | |
| 1367 | |
| 1368 // for runtime calls | |
| 1369 class LIR_OpRTCall: public LIR_OpCall { | |
| 1370 friend class LIR_OpVisitState; | |
| 1371 | |
| 1372 private: | |
| 1373 LIR_Opr _tmp; | |
| 1374 public: | |
| 1375 LIR_OpRTCall(address addr, LIR_Opr tmp, | |
| 1376 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL) | |
| 1377 : LIR_OpCall(lir_rtcall, addr, result, arguments, info) | |
| 1378 , _tmp(tmp) {} | |
| 1379 | |
| 1380 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1381 virtual void emit_code(LIR_Assembler* masm); | |
| 1382 virtual LIR_OpRTCall* as_OpRTCall() { return this; } | |
| 1383 | |
| 1384 LIR_Opr tmp() const { return _tmp; } | |
| 1385 | |
| 1386 virtual void verify() const; | |
| 1387 }; | |
| 1388 | |
| 1389 | |
| 1390 class LIR_OpBranch: public LIR_Op { | |
| 1391 friend class LIR_OpVisitState; | |
| 1392 | |
| 1393 private: | |
| 1394 LIR_Condition _cond; | |
| 1395 BasicType _type; | |
| 1396 Label* _label; | |
| 1397 BlockBegin* _block; // if this is a branch to a block, this is the block | |
| 1398 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block | |
| 1399 CodeStub* _stub; // if this is a branch to a stub, this is the stub | |
| 1400 | |
| 1401 public: | |
| 4816 | 1402 LIR_OpBranch(LIR_Condition cond, BasicType type, Label* lbl) |
| 0 | 1403 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL) |
| 1404 , _cond(cond) | |
| 4816 | 1405 , _type(type) |
| 0 | 1406 , _label(lbl) |
| 1407 , _block(NULL) | |
| 1408 , _ublock(NULL) | |
| 1409 , _stub(NULL) { } | |
| 1410 | |
| 1411 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block); | |
| 1412 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub); | |
| 1413 | |
| 1414 // for unordered comparisons | |
| 1415 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock); | |
| 1416 | |
| 1417 LIR_Condition cond() const { return _cond; } | |
| 1418 BasicType type() const { return _type; } | |
| 1419 Label* label() const { return _label; } | |
| 1420 BlockBegin* block() const { return _block; } | |
| 1421 BlockBegin* ublock() const { return _ublock; } | |
| 1422 CodeStub* stub() const { return _stub; } | |
| 1423 | |
| 1424 void change_block(BlockBegin* b); | |
| 1425 void change_ublock(BlockBegin* b); | |
| 1426 void negate_cond(); | |
| 1427 | |
| 1428 virtual void emit_code(LIR_Assembler* masm); | |
| 1429 virtual LIR_OpBranch* as_OpBranch() { return this; } | |
| 1430 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1431 }; | |
| 1432 | |
| 1433 | |
| 1434 class ConversionStub; | |
| 1435 | |
| 1436 class LIR_OpConvert: public LIR_Op1 { | |
| 1437 friend class LIR_OpVisitState; | |
| 1438 | |
| 1439 private: | |
| 1440 Bytecodes::Code _bytecode; | |
| 1441 ConversionStub* _stub; | |
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1443 LIR_Opr _tmp1; |
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1444 LIR_Opr _tmp2; |
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1445 #endif |
| 0 | 1446 |
| 1447 public: | |
| 1448 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub) | |
| 1449 : LIR_Op1(lir_convert, opr, result) | |
| 1450 , _stub(stub) | |
|
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1451 #ifdef PPC |
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1452 , _tmp1(LIR_OprDesc::illegalOpr()) |
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1453 , _tmp2(LIR_OprDesc::illegalOpr()) |
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1454 #endif |
| 0 | 1455 , _bytecode(code) {} |
| 1456 | |
|
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1457 #ifdef PPC |
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1458 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub |
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1459 ,LIR_Opr tmp1, LIR_Opr tmp2) |
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1460 : LIR_Op1(lir_convert, opr, result) |
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1461 , _stub(stub) |
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1462 , _tmp1(tmp1) |
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1463 , _tmp2(tmp2) |
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1464 , _bytecode(code) {} |
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1465 #endif |
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1466 |
| 0 | 1467 Bytecodes::Code bytecode() const { return _bytecode; } |
| 1468 ConversionStub* stub() const { return _stub; } | |
|
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1469 #ifdef PPC |
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1470 LIR_Opr tmp1() const { return _tmp1; } |
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1471 LIR_Opr tmp2() const { return _tmp2; } |
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1472 #endif |
| 0 | 1473 |
| 1474 virtual void emit_code(LIR_Assembler* masm); | |
| 1475 virtual LIR_OpConvert* as_OpConvert() { return this; } | |
| 1476 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1477 | |
| 1478 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN; | |
| 1479 }; | |
| 1480 | |
| 1481 | |
| 1482 // LIR_OpAllocObj | |
| 1483 class LIR_OpAllocObj : public LIR_Op1 { | |
| 1484 friend class LIR_OpVisitState; | |
| 1485 | |
| 1486 private: | |
| 1487 LIR_Opr _tmp1; | |
| 1488 LIR_Opr _tmp2; | |
| 1489 LIR_Opr _tmp3; | |
| 1490 LIR_Opr _tmp4; | |
| 1491 int _hdr_size; | |
| 1492 int _obj_size; | |
| 1493 CodeStub* _stub; | |
| 1494 bool _init_check; | |
| 1495 | |
| 1496 public: | |
| 1497 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result, | |
| 1498 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, | |
| 1499 int hdr_size, int obj_size, bool init_check, CodeStub* stub) | |
| 1500 : LIR_Op1(lir_alloc_object, klass, result) | |
| 1501 , _tmp1(t1) | |
| 1502 , _tmp2(t2) | |
| 1503 , _tmp3(t3) | |
| 1504 , _tmp4(t4) | |
| 1505 , _hdr_size(hdr_size) | |
| 1506 , _obj_size(obj_size) | |
| 1507 , _init_check(init_check) | |
| 1508 , _stub(stub) { } | |
| 1509 | |
| 1510 LIR_Opr klass() const { return in_opr(); } | |
| 1511 LIR_Opr obj() const { return result_opr(); } | |
| 1512 LIR_Opr tmp1() const { return _tmp1; } | |
| 1513 LIR_Opr tmp2() const { return _tmp2; } | |
| 1514 LIR_Opr tmp3() const { return _tmp3; } | |
| 1515 LIR_Opr tmp4() const { return _tmp4; } | |
| 1516 int header_size() const { return _hdr_size; } | |
| 1517 int object_size() const { return _obj_size; } | |
| 1518 bool init_check() const { return _init_check; } | |
| 1519 CodeStub* stub() const { return _stub; } | |
| 1520 | |
| 1521 virtual void emit_code(LIR_Assembler* masm); | |
| 1522 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; } | |
| 1523 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1524 }; | |
| 1525 | |
| 1526 | |
| 1527 // LIR_OpRoundFP | |
| 1528 class LIR_OpRoundFP : public LIR_Op1 { | |
| 1529 friend class LIR_OpVisitState; | |
| 1530 | |
| 1531 private: | |
| 1532 LIR_Opr _tmp; | |
| 1533 | |
| 1534 public: | |
| 1535 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) | |
| 1536 : LIR_Op1(lir_roundfp, reg, result) | |
| 1537 , _tmp(stack_loc_temp) {} | |
| 1538 | |
| 1539 LIR_Opr tmp() const { return _tmp; } | |
| 1540 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; } | |
| 1541 void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1542 }; | |
| 1543 | |
| 1544 // LIR_OpTypeCheck | |
| 1545 class LIR_OpTypeCheck: public LIR_Op { | |
| 1546 friend class LIR_OpVisitState; | |
| 1547 | |
| 1548 private: | |
| 1549 LIR_Opr _object; | |
| 1550 LIR_Opr _array; | |
| 1551 ciKlass* _klass; | |
| 1552 LIR_Opr _tmp1; | |
| 1553 LIR_Opr _tmp2; | |
| 1554 LIR_Opr _tmp3; | |
| 1555 bool _fast_check; | |
| 1556 CodeEmitInfo* _info_for_patch; | |
| 1557 CodeEmitInfo* _info_for_exception; | |
| 1558 CodeStub* _stub; | |
| 1559 ciMethod* _profiled_method; | |
| 1560 int _profiled_bci; | |
| 1783 | 1561 bool _should_profile; |
| 0 | 1562 |
| 1563 public: | |
| 1564 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, | |
| 1565 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, | |
| 1783 | 1566 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub); |
| 0 | 1567 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, |
| 1783 | 1568 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception); |
| 0 | 1569 |
| 1570 LIR_Opr object() const { return _object; } | |
| 1571 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; } | |
| 1572 LIR_Opr tmp1() const { return _tmp1; } | |
| 1573 LIR_Opr tmp2() const { return _tmp2; } | |
| 1574 LIR_Opr tmp3() const { return _tmp3; } | |
| 1575 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; } | |
| 1576 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; } | |
| 1577 CodeEmitInfo* info_for_patch() const { return _info_for_patch; } | |
| 1578 CodeEmitInfo* info_for_exception() const { return _info_for_exception; } | |
| 1579 CodeStub* stub() const { return _stub; } | |
| 1580 | |
|
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1581 // MethodData* profiling |
| 1783 | 1582 void set_profiled_method(ciMethod *method) { _profiled_method = method; } |
| 1583 void set_profiled_bci(int bci) { _profiled_bci = bci; } | |
| 1584 void set_should_profile(bool b) { _should_profile = b; } | |
| 1585 ciMethod* profiled_method() const { return _profiled_method; } | |
| 1586 int profiled_bci() const { return _profiled_bci; } | |
| 1587 bool should_profile() const { return _should_profile; } | |
| 0 | 1588 |
| 1589 virtual void emit_code(LIR_Assembler* masm); | |
| 1590 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; } | |
| 1591 void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1592 }; | |
| 1593 | |
| 1594 // LIR_Op2 | |
| 1595 class LIR_Op2: public LIR_Op { | |
| 1596 friend class LIR_OpVisitState; | |
| 1597 | |
| 1598 int _fpu_stack_size; // for sin/cos implementation on Intel | |
| 1599 | |
| 1600 protected: | |
| 1601 LIR_Opr _opr1; | |
| 1602 LIR_Opr _opr2; | |
| 1603 BasicType _type; | |
|
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1604 LIR_Opr _tmp1; |
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1605 LIR_Opr _tmp2; |
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1606 LIR_Opr _tmp3; |
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1607 LIR_Opr _tmp4; |
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1608 LIR_Opr _tmp5; |
| 0 | 1609 LIR_Condition _condition; |
| 1610 | |
| 1611 void verify() const; | |
| 1612 | |
| 1613 public: | |
| 1614 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL) | |
| 1615 : LIR_Op(code, LIR_OprFact::illegalOpr, info) | |
| 1616 , _opr1(opr1) | |
| 1617 , _opr2(opr2) | |
| 1618 , _type(T_ILLEGAL) | |
| 1619 , _condition(condition) | |
| 1620 , _fpu_stack_size(0) | |
|
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1621 , _tmp1(LIR_OprFact::illegalOpr) |
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1622 , _tmp2(LIR_OprFact::illegalOpr) |
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1623 , _tmp3(LIR_OprFact::illegalOpr) |
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1624 , _tmp4(LIR_OprFact::illegalOpr) |
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1625 , _tmp5(LIR_OprFact::illegalOpr) { |
| 0 | 1626 assert(code == lir_cmp, "code check"); |
| 1627 } | |
| 1628 | |
|
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1629 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type) |
| 0 | 1630 : LIR_Op(code, result, NULL) |
| 1631 , _opr1(opr1) | |
| 1632 , _opr2(opr2) | |
|
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1633 , _type(type) |
| 0 | 1634 , _condition(condition) |
| 1635 , _fpu_stack_size(0) | |
|
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1636 , _tmp1(LIR_OprFact::illegalOpr) |
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1637 , _tmp2(LIR_OprFact::illegalOpr) |
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1638 , _tmp3(LIR_OprFact::illegalOpr) |
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1639 , _tmp4(LIR_OprFact::illegalOpr) |
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1640 , _tmp5(LIR_OprFact::illegalOpr) { |
| 0 | 1641 assert(code == lir_cmove, "code check"); |
|
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1642 assert(type != T_ILLEGAL, "cmove should have type"); |
| 0 | 1643 } |
| 1644 | |
| 1645 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr, | |
| 1646 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL) | |
| 1647 : LIR_Op(code, result, info) | |
| 1648 , _opr1(opr1) | |
| 1649 , _opr2(opr2) | |
| 1650 , _type(type) | |
| 1651 , _condition(lir_cond_unknown) | |
| 1652 , _fpu_stack_size(0) | |
|
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1653 , _tmp1(LIR_OprFact::illegalOpr) |
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1654 , _tmp2(LIR_OprFact::illegalOpr) |
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1655 , _tmp3(LIR_OprFact::illegalOpr) |
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1656 , _tmp4(LIR_OprFact::illegalOpr) |
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1657 , _tmp5(LIR_OprFact::illegalOpr) { |
| 0 | 1658 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); |
| 1659 } | |
| 1660 | |
|
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1661 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr, |
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1662 LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr) |
| 0 | 1663 : LIR_Op(code, result, NULL) |
| 1664 , _opr1(opr1) | |
| 1665 , _opr2(opr2) | |
| 1666 , _type(T_ILLEGAL) | |
| 1667 , _condition(lir_cond_unknown) | |
| 1668 , _fpu_stack_size(0) | |
|
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1669 , _tmp1(tmp1) |
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1670 , _tmp2(tmp2) |
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1671 , _tmp3(tmp3) |
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1672 , _tmp4(tmp4) |
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1673 , _tmp5(tmp5) { |
| 0 | 1674 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); |
| 1675 } | |
| 1676 | |
| 1677 LIR_Opr in_opr1() const { return _opr1; } | |
| 1678 LIR_Opr in_opr2() const { return _opr2; } | |
| 1679 BasicType type() const { return _type; } | |
|
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1680 LIR_Opr tmp1_opr() const { return _tmp1; } |
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1681 LIR_Opr tmp2_opr() const { return _tmp2; } |
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1682 LIR_Opr tmp3_opr() const { return _tmp3; } |
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1683 LIR_Opr tmp4_opr() const { return _tmp4; } |
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|
1684 LIR_Opr tmp5_opr() const { return _tmp5; } |
| 0 | 1685 LIR_Condition condition() const { |
| 1686 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); return _condition; | |
| 1687 } | |
|
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1688 void set_condition(LIR_Condition condition) { |
|
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1689 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition; |
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1690 } |
| 0 | 1691 |
| 1692 void set_fpu_stack_size(int size) { _fpu_stack_size = size; } | |
| 1693 int fpu_stack_size() const { return _fpu_stack_size; } | |
| 1694 | |
| 1695 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; } | |
| 1696 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; } | |
| 1697 | |
| 1698 virtual void emit_code(LIR_Assembler* masm); | |
| 1699 virtual LIR_Op2* as_Op2() { return this; } | |
| 1700 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1701 }; | |
| 1702 | |
| 1703 class LIR_OpAllocArray : public LIR_Op { | |
| 1704 friend class LIR_OpVisitState; | |
| 1705 | |
| 1706 private: | |
| 1707 LIR_Opr _klass; | |
| 1708 LIR_Opr _len; | |
| 1709 LIR_Opr _tmp1; | |
| 1710 LIR_Opr _tmp2; | |
| 1711 LIR_Opr _tmp3; | |
| 1712 LIR_Opr _tmp4; | |
| 1713 BasicType _type; | |
| 1714 CodeStub* _stub; | |
| 1715 | |
| 1716 public: | |
| 1717 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub) | |
| 1718 : LIR_Op(lir_alloc_array, result, NULL) | |
| 1719 , _klass(klass) | |
| 1720 , _len(len) | |
| 1721 , _tmp1(t1) | |
| 1722 , _tmp2(t2) | |
| 1723 , _tmp3(t3) | |
| 1724 , _tmp4(t4) | |
| 1725 , _type(type) | |
| 1726 , _stub(stub) {} | |
| 1727 | |
| 1728 LIR_Opr klass() const { return _klass; } | |
| 1729 LIR_Opr len() const { return _len; } | |
| 1730 LIR_Opr obj() const { return result_opr(); } | |
| 1731 LIR_Opr tmp1() const { return _tmp1; } | |
| 1732 LIR_Opr tmp2() const { return _tmp2; } | |
| 1733 LIR_Opr tmp3() const { return _tmp3; } | |
| 1734 LIR_Opr tmp4() const { return _tmp4; } | |
| 1735 BasicType type() const { return _type; } | |
| 1736 CodeStub* stub() const { return _stub; } | |
| 1737 | |
| 1738 virtual void emit_code(LIR_Assembler* masm); | |
| 1739 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; } | |
| 1740 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1741 }; | |
| 1742 | |
| 1743 | |
| 1744 class LIR_Op3: public LIR_Op { | |
| 1745 friend class LIR_OpVisitState; | |
| 1746 | |
| 1747 private: | |
| 1748 LIR_Opr _opr1; | |
| 1749 LIR_Opr _opr2; | |
| 1750 LIR_Opr _opr3; | |
| 1751 public: | |
| 1752 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL) | |
| 1753 : LIR_Op(code, result, info) | |
| 1754 , _opr1(opr1) | |
| 1755 , _opr2(opr2) | |
| 1756 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); } | |
| 1757 LIR_Opr in_opr1() const { return _opr1; } | |
| 1758 LIR_Opr in_opr2() const { return _opr2; } | |
| 1759 LIR_Opr in_opr3() const { return _opr3; } | |
| 1760 | |
| 1761 virtual void emit_code(LIR_Assembler* masm); | |
| 1762 virtual LIR_Op3* as_Op3() { return this; } | |
| 1763 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1764 }; | |
| 1765 | |
| 1766 | |
| 1767 //-------------------------------- | |
| 1768 class LabelObj: public CompilationResourceObj { | |
| 1769 private: | |
| 1770 Label _label; | |
| 1771 public: | |
| 1772 LabelObj() {} | |
| 1773 Label* label() { return &_label; } | |
| 1774 }; | |
| 1775 | |
| 1776 | |
| 1777 class LIR_OpLock: public LIR_Op { | |
| 1778 friend class LIR_OpVisitState; | |
| 1779 | |
| 1780 private: | |
| 1781 LIR_Opr _hdr; | |
| 1782 LIR_Opr _obj; | |
| 1783 LIR_Opr _lock; | |
| 1784 LIR_Opr _scratch; | |
| 1785 CodeStub* _stub; | |
| 1786 public: | |
| 1787 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) | |
| 1788 : LIR_Op(code, LIR_OprFact::illegalOpr, info) | |
| 1789 , _hdr(hdr) | |
| 1790 , _obj(obj) | |
| 1791 , _lock(lock) | |
| 1792 , _scratch(scratch) | |
| 1793 , _stub(stub) {} | |
| 1794 | |
| 1795 LIR_Opr hdr_opr() const { return _hdr; } | |
| 1796 LIR_Opr obj_opr() const { return _obj; } | |
| 1797 LIR_Opr lock_opr() const { return _lock; } | |
| 1798 LIR_Opr scratch_opr() const { return _scratch; } | |
| 1799 CodeStub* stub() const { return _stub; } | |
| 1800 | |
| 1801 virtual void emit_code(LIR_Assembler* masm); | |
| 1802 virtual LIR_OpLock* as_OpLock() { return this; } | |
| 1803 void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1804 }; | |
| 1805 | |
| 1806 | |
| 1807 class LIR_OpDelay: public LIR_Op { | |
| 1808 friend class LIR_OpVisitState; | |
| 1809 | |
| 1810 private: | |
| 1811 LIR_Op* _op; | |
| 1812 | |
| 1813 public: | |
| 1814 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info): | |
| 1815 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info), | |
| 1816 _op(op) { | |
| 1817 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops"); | |
| 1818 } | |
| 1819 virtual void emit_code(LIR_Assembler* masm); | |
| 1820 virtual LIR_OpDelay* as_OpDelay() { return this; } | |
| 1821 void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1822 LIR_Op* delay_op() const { return _op; } | |
| 1823 CodeEmitInfo* call_info() const { return info(); } | |
| 1824 }; | |
| 1825 | |
| 1826 | |
| 1827 // LIR_OpCompareAndSwap | |
| 1828 class LIR_OpCompareAndSwap : public LIR_Op { | |
| 1829 friend class LIR_OpVisitState; | |
| 1830 | |
| 1831 private: | |
| 1832 LIR_Opr _addr; | |
| 1833 LIR_Opr _cmp_value; | |
| 1834 LIR_Opr _new_value; | |
| 1835 LIR_Opr _tmp1; | |
| 1836 LIR_Opr _tmp2; | |
| 1837 | |
| 1838 public: | |
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1839 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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1840 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) |
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1841 : LIR_Op(code, result, NULL) // no result, no info |
| 0 | 1842 , _addr(addr) |
| 1843 , _cmp_value(cmp_value) | |
| 1844 , _new_value(new_value) | |
| 1845 , _tmp1(t1) | |
| 1846 , _tmp2(t2) { } | |
| 1847 | |
| 1848 LIR_Opr addr() const { return _addr; } | |
| 1849 LIR_Opr cmp_value() const { return _cmp_value; } | |
| 1850 LIR_Opr new_value() const { return _new_value; } | |
| 1851 LIR_Opr tmp1() const { return _tmp1; } | |
| 1852 LIR_Opr tmp2() const { return _tmp2; } | |
| 1853 | |
| 1854 virtual void emit_code(LIR_Assembler* masm); | |
| 1855 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; } | |
| 1856 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1857 }; | |
| 1858 | |
| 1859 // LIR_OpProfileCall | |
| 1860 class LIR_OpProfileCall : public LIR_Op { | |
| 1861 friend class LIR_OpVisitState; | |
| 1862 | |
| 1863 private: | |
| 1864 ciMethod* _profiled_method; | |
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1865 int _profiled_bci; |
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1866 ciMethod* _profiled_callee; |
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1867 LIR_Opr _mdo; |
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1868 LIR_Opr _recv; |
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1869 LIR_Opr _tmp1; |
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1870 ciKlass* _known_holder; |
| 0 | 1871 |
| 1872 public: | |
| 1873 // Destroys recv | |
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1874 LIR_OpProfileCall(LIR_Code code, ciMethod* profiled_method, int profiled_bci, ciMethod* profiled_callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder) |
| 0 | 1875 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) // no result, no info |
| 1876 , _profiled_method(profiled_method) | |
| 1877 , _profiled_bci(profiled_bci) | |
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1878 , _profiled_callee(profiled_callee) |
| 0 | 1879 , _mdo(mdo) |
| 1880 , _recv(recv) | |
| 1881 , _tmp1(t1) | |
| 1882 , _known_holder(known_holder) { } | |
| 1883 | |
| 1884 ciMethod* profiled_method() const { return _profiled_method; } | |
| 1885 int profiled_bci() const { return _profiled_bci; } | |
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1886 ciMethod* profiled_callee() const { return _profiled_callee; } |
| 0 | 1887 LIR_Opr mdo() const { return _mdo; } |
| 1888 LIR_Opr recv() const { return _recv; } | |
| 1889 LIR_Opr tmp1() const { return _tmp1; } | |
| 1890 ciKlass* known_holder() const { return _known_holder; } | |
| 1891 | |
| 1892 virtual void emit_code(LIR_Assembler* masm); | |
| 1893 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; } | |
| 1894 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1895 }; | |
| 1896 | |
| 1897 class LIR_InsertionBuffer; | |
| 1898 | |
| 1899 //--------------------------------LIR_List--------------------------------------------------- | |
| 1900 // Maintains a list of LIR instructions (one instance of LIR_List per basic block) | |
| 1901 // The LIR instructions are appended by the LIR_List class itself; | |
| 1902 // | |
| 1903 // Notes: | |
| 1904 // - all offsets are(should be) in bytes | |
| 1905 // - local positions are specified with an offset, with offset 0 being local 0 | |
| 1906 | |
| 1907 class LIR_List: public CompilationResourceObj { | |
| 1908 private: | |
| 1909 LIR_OpList _operations; | |
| 1910 | |
| 1911 Compilation* _compilation; | |
| 1912 #ifndef PRODUCT | |
| 1913 BlockBegin* _block; | |
| 1914 #endif | |
| 1915 #ifdef ASSERT | |
| 1916 const char * _file; | |
| 1917 int _line; | |
| 1918 #endif | |
| 1919 | |
| 1920 void append(LIR_Op* op) { | |
| 1921 if (op->source() == NULL) | |
| 1922 op->set_source(_compilation->current_instruction()); | |
| 1923 #ifndef PRODUCT | |
| 1924 if (PrintIRWithLIR) { | |
| 1925 _compilation->maybe_print_current_instruction(); | |
| 1926 op->print(); tty->cr(); | |
| 1927 } | |
| 1928 #endif // PRODUCT | |
| 1929 | |
| 1930 _operations.append(op); | |
| 1931 | |
| 1932 #ifdef ASSERT | |
| 1933 op->verify(); | |
| 1934 op->set_file_and_line(_file, _line); | |
| 1935 _file = NULL; | |
| 1936 _line = 0; | |
| 1937 #endif | |
| 1938 } | |
| 1939 | |
| 1940 public: | |
| 1941 LIR_List(Compilation* compilation, BlockBegin* block = NULL); | |
| 1942 | |
| 1943 #ifdef ASSERT | |
| 1944 void set_file_and_line(const char * file, int line); | |
| 1945 #endif | |
| 1946 | |
| 1947 //---------- accessors --------------- | |
| 1948 LIR_OpList* instructions_list() { return &_operations; } | |
| 1949 int length() const { return _operations.length(); } | |
| 1950 LIR_Op* at(int i) const { return _operations.at(i); } | |
| 1951 | |
| 1952 NOT_PRODUCT(BlockBegin* block() const { return _block; }); | |
| 1953 | |
| 1954 // insert LIR_Ops in buffer to right places in LIR_List | |
| 1955 void append(LIR_InsertionBuffer* buffer); | |
| 1956 | |
| 1957 //---------- mutators --------------- | |
| 1958 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); } | |
| 1959 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); } | |
| 1783 | 1960 void remove_at(int i) { _operations.remove_at(i); } |
| 0 | 1961 |
| 1962 //---------- printing ------------- | |
| 1963 void print_instructions() PRODUCT_RETURN; | |
| 1964 | |
| 1965 | |
| 1966 //---------- instructions ------------- | |
| 1967 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, | |
| 1968 address dest, LIR_OprList* arguments, | |
| 1969 CodeEmitInfo* info) { | |
| 1970 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info)); | |
| 1971 } | |
| 1972 void call_static(ciMethod* method, LIR_Opr result, | |
| 1973 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { | |
| 1974 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info)); | |
| 1975 } | |
| 1976 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, | |
| 1977 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { | |
| 1978 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info)); | |
| 1979 } | |
| 1980 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, | |
| 1981 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) { | |
| 1982 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info)); | |
| 1983 } | |
| 1295 | 1984 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result, |
| 1985 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { | |
| 1986 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info)); | |
| 1987 } | |
| 0 | 1988 |
| 1989 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); } | |
| 1990 void word_align() { append(new LIR_Op0(lir_word_align)); } | |
| 1991 void membar() { append(new LIR_Op0(lir_membar)); } | |
| 1992 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); } | |
| 1993 void membar_release() { append(new LIR_Op0(lir_membar_release)); } | |
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1994 void membar_loadload() { append(new LIR_Op0(lir_membar_loadload)); } |
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1995 void membar_storestore() { append(new LIR_Op0(lir_membar_storestore)); } |
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1996 void membar_loadstore() { append(new LIR_Op0(lir_membar_loadstore)); } |
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1997 void membar_storeload() { append(new LIR_Op0(lir_membar_storeload)); } |
| 0 | 1998 |
| 1999 void nop() { append(new LIR_Op0(lir_nop)); } | |
| 2000 void build_frame() { append(new LIR_Op0(lir_build_frame)); } | |
| 2001 | |
| 2002 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); } | |
| 2003 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); } | |
| 2004 | |
| 2005 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); } | |
| 2006 | |
| 2007 void negate(LIR_Opr from, LIR_Opr to) { append(new LIR_Op1(lir_neg, from, to)); } | |
| 2008 void leal(LIR_Opr from, LIR_Opr result_reg) { append(new LIR_Op1(lir_leal, from, result_reg)); } | |
| 2009 | |
| 2010 // result is a stack location for old backend and vreg for UseLinearScan | |
| 2011 // stack_loc_temp is an illegal register for old backend | |
| 2012 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); } | |
| 2013 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); } | |
| 2014 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); } | |
| 2015 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); } | |
| 2016 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); } | |
| 2017 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); } | |
| 2018 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); } | |
| 2002 | 2019 void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { |
| 2020 if (UseCompressedOops) { | |
| 2021 append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide)); | |
| 2022 } else { | |
| 2023 move(src, dst, info); | |
| 2024 } | |
| 2025 } | |
| 2026 void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { | |
| 2027 if (UseCompressedOops) { | |
| 2028 append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide)); | |
| 2029 } else { | |
| 2030 move(src, dst, info); | |
| 2031 } | |
| 2032 } | |
| 0 | 2033 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); } |
| 2034 | |
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2035 void oop2reg (jobject o, LIR_Opr reg) { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); } |
| 0 | 2036 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info); |
| 2037 | |
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2038 void metadata2reg (Metadata* o, LIR_Opr reg) { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg)); } |
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2039 void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info); |
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2040 |
| 0 | 2041 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); } |
| 2042 | |
| 2043 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); } | |
| 2044 | |
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2045 #ifdef PPC |
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2046 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); } |
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2047 #endif |
| 0 | 2048 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); } |
| 2049 | |
| 2050 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); } | |
| 2051 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); } | |
| 2052 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); } | |
| 2053 | |
| 1783 | 2054 void pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64, src, dst, T_LONG, lir_patch_none, NULL)); } |
| 2055 void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); } | |
| 2056 | |
| 0 | 2057 void null_check(LIR_Opr opr, CodeEmitInfo* info) { append(new LIR_Op1(lir_null_check, opr, info)); } |
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2058 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) { |
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2059 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info)); |
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2060 } |
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2061 void unwind_exception(LIR_Opr exceptionOop) { |
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2062 append(new LIR_Op1(lir_unwind, exceptionOop)); |
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2063 } |
| 0 | 2064 |
| 2065 void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { | |
| 2066 append(new LIR_Op2(lir_compare_to, left, right, dst)); | |
| 2067 } | |
| 2068 | |
| 2069 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); } | |
| 2070 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); } | |
| 2071 | |
| 2072 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) { | |
| 2073 append(new LIR_Op2(lir_cmp, condition, left, right, info)); | |
| 2074 } | |
| 2075 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) { | |
| 2076 cmp(condition, left, LIR_OprFact::intConst(right), info); | |
| 2077 } | |
| 2078 | |
| 2079 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info); | |
| 2080 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info); | |
| 2081 | |
|
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2082 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { |
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2083 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type)); |
| 0 | 2084 } |
| 2085 | |
|
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2086 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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2087 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); |
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2088 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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2089 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); |
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2090 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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2091 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); |
| 0 | 2092 |
| 2093 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); } | |
| 2094 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); } | |
|
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2095 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); } |
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2096 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); } |
| 0 | 2097 void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); } |
| 2098 void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); } | |
| 2099 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); } | |
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2100 void exp (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_exp , from, tmp1, to, tmp2, tmp3, tmp4, tmp5)); } |
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2101 void pow (LIR_Opr arg1, LIR_Opr arg2, LIR_Opr res, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_pow, arg1, arg2, res, tmp1, tmp2, tmp3, tmp4, tmp5)); } |
| 0 | 2102 |
| 2103 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); } | |
| 2104 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); } | |
| 2105 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); } | |
| 2106 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); } | |
| 2107 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); } | |
| 2108 void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); } | |
| 2109 void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); } | |
| 2110 | |
| 2111 void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); | |
| 2112 void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); | |
| 2113 | |
| 2114 void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); | |
| 2115 | |
| 2116 void prefetch(LIR_Address* addr, bool is_store); | |
| 2117 | |
| 2118 void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); | |
| 2119 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); | |
| 2120 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); | |
| 2121 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); | |
| 2122 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); | |
| 2123 | |
| 2124 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); | |
| 2125 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); | |
| 2126 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); | |
| 2127 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); | |
| 2128 | |
| 2129 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub); | |
| 2130 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub); | |
| 2131 | |
| 2132 // jump is an unconditional branch | |
| 2133 void jump(BlockBegin* block) { | |
| 2134 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block)); | |
| 2135 } | |
| 2136 void jump(CodeStub* stub) { | |
| 2137 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub)); | |
| 2138 } | |
| 4816 | 2139 void branch(LIR_Condition cond, BasicType type, Label* lbl) { append(new LIR_OpBranch(cond, type, lbl)); } |
| 0 | 2140 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) { |
| 2141 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); | |
| 2142 append(new LIR_OpBranch(cond, type, block)); | |
| 2143 } | |
| 2144 void branch(LIR_Condition cond, BasicType type, CodeStub* stub) { | |
| 2145 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); | |
| 2146 append(new LIR_OpBranch(cond, type, stub)); | |
| 2147 } | |
| 2148 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) { | |
| 2149 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only"); | |
| 2150 append(new LIR_OpBranch(cond, type, block, unordered)); | |
| 2151 } | |
| 2152 | |
| 2153 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); | |
| 2154 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); | |
| 2155 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); | |
| 2156 | |
| 2157 void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } | |
| 2158 void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } | |
| 2159 void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } | |
| 2160 | |
| 2161 void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); } | |
| 2162 void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less); | |
| 2163 | |
| 2164 void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) { | |
| 2165 append(new LIR_OpRTCall(routine, tmp, result, arguments)); | |
| 2166 } | |
| 2167 | |
| 2168 void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result, | |
| 2169 LIR_OprList* arguments, CodeEmitInfo* info) { | |
| 2170 append(new LIR_OpRTCall(routine, tmp, result, arguments, info)); | |
| 2171 } | |
| 2172 | |
| 2173 void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); } | |
|
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2174 void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub); |
| 0 | 2175 void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info); |
| 2176 | |
| 2177 void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); } | |
| 2178 void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); } | |
| 2179 void breakpoint() { append(new LIR_Op0(lir_breakpoint)); } | |
| 2180 | |
| 2181 void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); } | |
| 2182 | |
| 2183 void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); } | |
| 2184 | |
|
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2185 void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci); |
| 3957 | 2186 void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci); |
| 1783 | 2187 |
| 0 | 2188 void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, |
| 2189 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, | |
| 2190 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, | |
| 2191 ciMethod* profiled_method, int profiled_bci); | |
|
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2192 // MethodData* profiling |
|
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2193 void profile_call(ciMethod* method, int bci, ciMethod* callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) { |
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2194 append(new LIR_OpProfileCall(lir_profile_call, method, bci, callee, mdo, recv, t1, cha_klass)); |
| 1783 | 2195 } |
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2196 |
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2197 void xadd(LIR_Opr src, LIR_Opr add, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xadd, src, add, res, tmp)); } |
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2198 void xchg(LIR_Opr src, LIR_Opr set, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xchg, src, set, res, tmp)); } |
| 0 | 2199 }; |
| 2200 | |
| 2201 void print_LIR(BlockList* blocks); | |
| 2202 | |
| 2203 class LIR_InsertionBuffer : public CompilationResourceObj { | |
| 2204 private: | |
| 2205 LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized) | |
| 2206 | |
| 2207 // list of insertion points. index and count are stored alternately: | |
| 2208 // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted | |
| 2209 // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index | |
| 2210 intStack _index_and_count; | |
| 2211 | |
| 2212 // the LIR_Ops to be inserted | |
| 2213 LIR_OpList _ops; | |
| 2214 | |
| 2215 void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); } | |
| 2216 void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); } | |
| 2217 void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); } | |
| 2218 | |
| 2219 #ifdef ASSERT | |
| 2220 void verify(); | |
| 2221 #endif | |
| 2222 public: | |
| 2223 LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { } | |
| 2224 | |
| 2225 // must be called before using the insertion buffer | |
| 2226 void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); } | |
| 2227 bool initialized() const { return _lir != NULL; } | |
| 2228 // called automatically when the buffer is appended to the LIR_List | |
| 2229 void finish() { _lir = NULL; } | |
| 2230 | |
| 2231 // accessors | |
| 2232 LIR_List* lir_list() const { return _lir; } | |
| 2233 int number_of_insertion_points() const { return _index_and_count.length() >> 1; } | |
| 2234 int index_at(int i) const { return _index_and_count.at((i << 1)); } | |
| 2235 int count_at(int i) const { return _index_and_count.at((i << 1) + 1); } | |
| 2236 | |
| 2237 int number_of_ops() const { return _ops.length(); } | |
| 2238 LIR_Op* op_at(int i) const { return _ops.at(i); } | |
| 2239 | |
| 2240 // append an instruction to the buffer | |
| 2241 void append(int index, LIR_Op* op); | |
| 2242 | |
| 2243 // instruction | |
| 2244 void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); } | |
| 2245 }; | |
| 2246 | |
| 2247 | |
| 2248 // | |
| 2249 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way. | |
| 2250 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes | |
| 2251 // information about the input, output and temporaries used by the | |
| 2252 // op to be recorded. It also records whether the op has call semantics | |
| 2253 // and also records all the CodeEmitInfos used by this op. | |
| 2254 // | |
| 2255 | |
| 2256 | |
| 2257 class LIR_OpVisitState: public StackObj { | |
| 2258 public: | |
| 2259 typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode; | |
| 2260 | |
| 2261 enum { | |
|
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2262 maxNumberOfOperands = 16, |
| 0 | 2263 maxNumberOfInfos = 4 |
| 2264 }; | |
| 2265 | |
| 2266 private: | |
| 2267 LIR_Op* _op; | |
| 2268 | |
| 2269 // optimization: the operands and infos are not stored in a variable-length | |
| 2270 // list, but in a fixed-size array to save time of size checks and resizing | |
| 2271 int _oprs_len[numModes]; | |
| 2272 LIR_Opr* _oprs_new[numModes][maxNumberOfOperands]; | |
| 2273 int _info_len; | |
| 2274 CodeEmitInfo* _info_new[maxNumberOfInfos]; | |
| 2275 | |
| 2276 bool _has_call; | |
| 2277 bool _has_slow_case; | |
| 2278 | |
| 2279 | |
| 2280 // only include register operands | |
| 2281 // addresses are decomposed to the base and index registers | |
| 2282 // constants and stack operands are ignored | |
| 2283 void append(LIR_Opr& opr, OprMode mode) { | |
| 2284 assert(opr->is_valid(), "should not call this otherwise"); | |
| 2285 assert(mode >= 0 && mode < numModes, "bad mode"); | |
| 2286 | |
| 2287 if (opr->is_register()) { | |
| 2288 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); | |
| 2289 _oprs_new[mode][_oprs_len[mode]++] = &opr; | |
| 2290 | |
| 2291 } else if (opr->is_pointer()) { | |
| 2292 LIR_Address* address = opr->as_address_ptr(); | |
| 2293 if (address != NULL) { | |
| 2294 // special handling for addresses: add base and index register of the address | |
|
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2295 // both are always input operands or temp if we want to extend |
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2296 // their liveness! |
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2297 if (mode == outputMode) { |
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2298 mode = inputMode; |
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2299 } |
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2300 assert (mode == inputMode || mode == tempMode, "input or temp only for addresses"); |
| 0 | 2301 if (address->_base->is_valid()) { |
| 2302 assert(address->_base->is_register(), "must be"); | |
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2303 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); |
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2304 _oprs_new[mode][_oprs_len[mode]++] = &address->_base; |
| 0 | 2305 } |
| 2306 if (address->_index->is_valid()) { | |
| 2307 assert(address->_index->is_register(), "must be"); | |
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2308 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); |
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2309 _oprs_new[mode][_oprs_len[mode]++] = &address->_index; |
| 0 | 2310 } |
| 2311 | |
| 2312 } else { | |
| 2313 assert(opr->is_constant(), "constant operands are not processed"); | |
| 2314 } | |
| 2315 } else { | |
| 2316 assert(opr->is_stack(), "stack operands are not processed"); | |
| 2317 } | |
| 2318 } | |
| 2319 | |
| 2320 void append(CodeEmitInfo* info) { | |
| 2321 assert(info != NULL, "should not call this otherwise"); | |
| 2322 assert(_info_len < maxNumberOfInfos, "array overflow"); | |
| 2323 _info_new[_info_len++] = info; | |
| 2324 } | |
| 2325 | |
| 2326 public: | |
| 2327 LIR_OpVisitState() { reset(); } | |
| 2328 | |
| 2329 LIR_Op* op() const { return _op; } | |
| 2330 void set_op(LIR_Op* op) { reset(); _op = op; } | |
| 2331 | |
| 2332 bool has_call() const { return _has_call; } | |
| 2333 bool has_slow_case() const { return _has_slow_case; } | |
| 2334 | |
| 2335 void reset() { | |
| 2336 _op = NULL; | |
| 2337 _has_call = false; | |
| 2338 _has_slow_case = false; | |
| 2339 | |
| 2340 _oprs_len[inputMode] = 0; | |
| 2341 _oprs_len[tempMode] = 0; | |
| 2342 _oprs_len[outputMode] = 0; | |
| 2343 _info_len = 0; | |
| 2344 } | |
| 2345 | |
| 2346 | |
| 2347 int opr_count(OprMode mode) const { | |
| 2348 assert(mode >= 0 && mode < numModes, "bad mode"); | |
| 2349 return _oprs_len[mode]; | |
| 2350 } | |
| 2351 | |
| 2352 LIR_Opr opr_at(OprMode mode, int index) const { | |
| 2353 assert(mode >= 0 && mode < numModes, "bad mode"); | |
| 2354 assert(index >= 0 && index < _oprs_len[mode], "index out of bound"); | |
| 2355 return *_oprs_new[mode][index]; | |
| 2356 } | |
| 2357 | |
| 2358 void set_opr_at(OprMode mode, int index, LIR_Opr opr) const { | |
| 2359 assert(mode >= 0 && mode < numModes, "bad mode"); | |
| 2360 assert(index >= 0 && index < _oprs_len[mode], "index out of bound"); | |
| 2361 *_oprs_new[mode][index] = opr; | |
| 2362 } | |
| 2363 | |
| 2364 int info_count() const { | |
| 2365 return _info_len; | |
| 2366 } | |
| 2367 | |
| 2368 CodeEmitInfo* info_at(int index) const { | |
| 2369 assert(index < _info_len, "index out of bounds"); | |
| 2370 return _info_new[index]; | |
| 2371 } | |
| 2372 | |
| 2373 XHandlers* all_xhandler(); | |
| 2374 | |
| 2375 // collects all register operands of the instruction | |
| 2376 void visit(LIR_Op* op); | |
| 2377 | |
| 2378 #if ASSERT | |
| 2379 // check that an operation has no operands | |
| 2380 bool no_operands(LIR_Op* op); | |
| 2381 #endif | |
| 2382 | |
| 2383 // LIR_Op visitor functions use these to fill in the state | |
| 2384 void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); } | |
| 2385 void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); } | |
| 2386 void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); } | |
| 2387 void do_info(CodeEmitInfo* info) { append(info); } | |
| 2388 | |
| 2389 void do_stub(CodeStub* stub); | |
| 2390 void do_call() { _has_call = true; } | |
| 2391 void do_slow_case() { _has_slow_case = true; } | |
| 2392 void do_slow_case(CodeEmitInfo* info) { | |
| 2393 _has_slow_case = true; | |
| 2394 append(info); | |
| 2395 } | |
| 2396 }; | |
| 2397 | |
| 2398 | |
| 2399 inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; }; | |
| 1972 | 2400 |
| 2401 #endif // SHARE_VM_C1_C1_LIR_HPP |