annotate src/share/vm/code/vmreg.hpp @ 7062:8c5333c80cfd

increased CompileThreshold to increase reliability of profiling information increased InitialCodeCacheSize to fit the bootstrapping added flag -XX:GraalClassPath to allow providing a .jar or .zip file that contains all Graal classes added support for the flag -XX:TraceCompilationPolicy to the Graal-specific compilation policy
author Christian Haeubl <haeubl@ssw.jku.at>
date Thu, 15 Nov 2012 11:40:50 +0100
parents 2c368ea3e844
children b9a9ed0f8eeb
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1 /*
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2 * Copyright (c) 1998, 2011, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #ifndef SHARE_VM_CODE_VMREG_HPP
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26 #define SHARE_VM_CODE_VMREG_HPP
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27
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28 #include "memory/allocation.hpp"
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29 #include "utilities/globalDefinitions.hpp"
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30 #ifdef TARGET_ARCH_x86
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31 # include "register_x86.hpp"
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32 #endif
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33 #ifdef TARGET_ARCH_sparc
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34 # include "register_sparc.hpp"
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35 #endif
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36 #ifdef TARGET_ARCH_zero
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37 # include "register_zero.hpp"
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38 #endif
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39 #ifdef TARGET_ARCH_arm
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40 # include "register_arm.hpp"
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41 #endif
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42 #ifdef TARGET_ARCH_ppc
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43 # include "register_ppc.hpp"
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44 #endif
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45 #ifdef COMPILER2
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46 #include "opto/adlcVMDeps.hpp"
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47 #include "utilities/ostream.hpp"
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48 #ifdef TARGET_ARCH_MODEL_x86_32
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49 # include "adfiles/adGlobals_x86_32.hpp"
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50 #endif
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51 #ifdef TARGET_ARCH_MODEL_x86_64
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52 # include "adfiles/adGlobals_x86_64.hpp"
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53 #endif
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54 #ifdef TARGET_ARCH_MODEL_sparc
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55 # include "adfiles/adGlobals_sparc.hpp"
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56 #endif
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57 #ifdef TARGET_ARCH_MODEL_zero
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58 # include "adfiles/adGlobals_zero.hpp"
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59 #endif
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60 #ifdef TARGET_ARCH_MODEL_arm
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61 # include "adfiles/adGlobals_arm.hpp"
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62 #endif
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63 #ifdef TARGET_ARCH_MODEL_ppc
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64 # include "adfiles/adGlobals_ppc.hpp"
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65 #endif
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66 #endif
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67
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68 //------------------------------VMReg------------------------------------------
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69 // The VM uses 'unwarped' stack slots; the compiler uses 'warped' stack slots.
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70 // Register numbers below VMRegImpl::stack0 are the same for both. Register
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71 // numbers above stack0 are either warped (in the compiler) or unwarped
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72 // (in the VM). Unwarped numbers represent stack indices, offsets from
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73 // the current stack pointer. Warped numbers are required during compilation
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74 // when we do not yet know how big the frame will be.
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75
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76 class VMRegImpl;
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77 typedef VMRegImpl* VMReg;
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78
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79 class VMRegImpl {
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80 // friend class OopMap;
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81 friend class VMStructs;
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82 friend class OptoReg;
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83 // friend class Location;
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84 private:
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85 enum {
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86 BAD = -1
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87 };
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88
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89
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90
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91 static VMReg stack0;
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92 // Names for registers
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93 static const char *regName[];
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94 static const int register_count;
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95
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96
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97 public:
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98
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99 static VMReg as_VMReg(int val, bool bad_ok = false) { assert(val > BAD || bad_ok, "invalid"); return (VMReg) (intptr_t) val; }
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100
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101 const char* name() {
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102 if (is_reg()) {
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103 return regName[value()];
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104 } else if (!is_valid()) {
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105 return "BAD";
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106 } else {
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107 // shouldn't really be called with stack
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108 return "STACKED REG";
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109 }
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110 }
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111 static VMReg Bad() { return (VMReg) (intptr_t) BAD; }
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112 bool is_valid() const { return ((intptr_t) this) != BAD; }
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113 bool is_stack() const { return (intptr_t) this >= (intptr_t) stack0; }
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114 bool is_reg() const { return is_valid() && !is_stack(); }
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115
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116 // A concrete register is a value that returns true for is_reg() and is
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117 // also a register you could use in the assembler. On machines with
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118 // 64bit registers only one half of the VMReg (and OptoReg) is considered
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119 // concrete.
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120 bool is_concrete();
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121
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122 // VMRegs are 4 bytes wide on all platforms
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123 static const int stack_slot_size;
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124 static const int slots_per_word;
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125
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126
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127 // This really ought to check that the register is "real" in the sense that
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128 // we don't try and get the VMReg number of a physical register that doesn't
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129 // have an expressible part. That would be pd specific code
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130 VMReg next() {
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131 assert((is_reg() && value() < stack0->value() - 1) || is_stack(), "must be");
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132 return (VMReg)(intptr_t)(value() + 1);
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133 }
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134 VMReg next(int i) {
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135 assert((is_reg() && value() < stack0->value() - i) || is_stack(), "must be");
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136 return (VMReg)(intptr_t)(value() + i);
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137 }
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138 VMReg prev() {
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139 assert((is_stack() && value() > stack0->value()) || (is_reg() && value() != 0), "must be");
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140 return (VMReg)(intptr_t)(value() - 1);
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141 }
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142
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143
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144 intptr_t value() const {return (intptr_t) this; }
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145
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146 void print_on(outputStream* st) const;
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147 void print() const { print_on(tty); }
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148
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149 // bias a stack slot.
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150 // Typically used to adjust a virtual frame slots by amounts that are offset by
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151 // amounts that are part of the native abi. The VMReg must be a stack slot
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152 // and the result must be also.
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153
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154 VMReg bias(int offset) {
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155 assert(is_stack(), "must be");
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156 // VMReg res = VMRegImpl::as_VMReg(value() + offset);
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157 VMReg res = stack2reg(reg2stack() + offset);
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158 assert(res->is_stack(), "must be");
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159 return res;
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160 }
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161
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162 // Convert register numbers to stack slots and vice versa
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163 static VMReg stack2reg( int idx ) {
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164 return (VMReg) (intptr_t) (stack0->value() + idx);
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165 }
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166
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167 uintptr_t reg2stack() {
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168 assert( is_stack(), "Not a stack-based register" );
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169 return value() - stack0->value();
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170 }
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171
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172 static void set_regName();
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173
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174 #ifdef TARGET_ARCH_x86
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175 # include "vmreg_x86.hpp"
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176 #endif
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177 #ifdef TARGET_ARCH_sparc
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178 # include "vmreg_sparc.hpp"
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179 #endif
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180 #ifdef TARGET_ARCH_zero
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181 # include "vmreg_zero.hpp"
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182 #endif
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183 #ifdef TARGET_ARCH_arm
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184 # include "vmreg_arm.hpp"
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185 #endif
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186 #ifdef TARGET_ARCH_ppc
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187 # include "vmreg_ppc.hpp"
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188 #endif
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189
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191 };
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192
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193 //---------------------------VMRegPair-------------------------------------------
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194 // Pairs of 32-bit registers for arguments.
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195 // SharedRuntime::java_calling_convention will overwrite the structs with
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196 // the calling convention's registers. VMRegImpl::Bad is returned for any
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197 // unused 32-bit register. This happens for the unused high half of Int
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198 // arguments, or for 32-bit pointers or for longs in the 32-bit sparc build
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199 // (which are passed to natives in low 32-bits of e.g. O0/O1 and the high
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200 // 32-bits of O0/O1 are set to VMRegImpl::Bad). Longs in one register & doubles
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201 // always return a high and a low register, as do 64-bit pointers.
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202 //
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203 class VMRegPair {
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204 private:
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205 VMReg _second;
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206 VMReg _first;
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207 public:
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208 void set_bad ( ) { _second=VMRegImpl::Bad(); _first=VMRegImpl::Bad(); }
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209 void set1 ( VMReg v ) { _second=VMRegImpl::Bad(); _first=v; }
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210 void set2 ( VMReg v ) { _second=v->next(); _first=v; }
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211 void set_pair( VMReg second, VMReg first ) { _second= second; _first= first; }
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212 void set_ptr ( VMReg ptr ) {
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213 #ifdef _LP64
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214 _second = ptr->next();
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215 #else
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216 _second = VMRegImpl::Bad();
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217 #endif
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218 _first = ptr;
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219 }
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220 // Return true if single register, even if the pair is really just adjacent stack slots
100
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221 bool is_single_reg() const {
0
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222 return (_first->is_valid()) && (_first->value() + 1 == _second->value());
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223 }
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224
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225 // Return true if single stack based "register" where the slot alignment matches input alignment
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226 bool is_adjacent_on_stack(int alignment) const {
0
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227 return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0));
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228 }
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229
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230 // Return true if single stack based "register" where the slot alignment matches input alignment
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231 bool is_adjacent_aligned_on_stack(int alignment) const {
0
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232 return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0));
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233 }
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234
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235 // Return true if single register but adjacent stack slots do not count
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236 bool is_single_phys_reg() const {
0
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237 return (_first->is_reg() && (_first->value() + 1 == _second->value()));
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238 }
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239
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240 VMReg second() const { return _second; }
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241 VMReg first() const { return _first; }
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242 VMRegPair(VMReg s, VMReg f) { _second = s; _first = f; }
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243 VMRegPair(VMReg f) { _second = VMRegImpl::Bad(); _first = f; }
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244 VMRegPair() { _second = VMRegImpl::Bad(); _first = VMRegImpl::Bad(); }
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245 };
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246
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247 #endif // SHARE_VM_CODE_VMREG_HPP