Mercurial > hg > truffle
annotate src/cpu/x86/vm/sharedRuntime_x86_64.cpp @ 4714:96ce4c27112f
7122939: TraceBytecodes broken with UseCompressedOops
Summary: Disable verify_heapbase on sparc if TraceBytecodes because the latter uses r12 as a temp register
Reviewed-by: coleenp, phh
Contributed-by: Volker Simonis <volker.simonis@gmail.com>
| author | coleenp |
|---|---|
| date | Mon, 19 Dec 2011 15:34:09 -0500 |
| parents | 1feb272af3a7 |
| children | 04b9a2566eec 0382d2b469b2 |
| rev | line source |
|---|---|
| 0 | 1 /* |
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7009309: JSR 292: compiler/6991596/Test6991596.java crashes on fastdebug JDK7/b122
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2 * Copyright (c) 2003, 2011, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
|
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20 * or visit www.oracle.com if you need additional information or have any |
|
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #include "precompiled.hpp" |
| 26 #include "asm/assembler.hpp" | |
| 27 #include "assembler_x86.inline.hpp" | |
| 28 #include "code/debugInfoRec.hpp" | |
| 29 #include "code/icBuffer.hpp" | |
| 30 #include "code/vtableStubs.hpp" | |
| 31 #include "interpreter/interpreter.hpp" | |
| 32 #include "oops/compiledICHolderOop.hpp" | |
| 33 #include "prims/jvmtiRedefineClassesTrace.hpp" | |
| 34 #include "runtime/sharedRuntime.hpp" | |
| 35 #include "runtime/vframeArray.hpp" | |
| 36 #include "vmreg_x86.inline.hpp" | |
| 37 #ifdef COMPILER1 | |
| 38 #include "c1/c1_Runtime1.hpp" | |
| 39 #endif | |
| 40 #ifdef COMPILER2 | |
| 41 #include "opto/runtime.hpp" | |
| 42 #endif | |
| 0 | 43 |
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44 #define __ masm-> |
| 0 | 45 |
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46 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; |
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47 |
| 0 | 48 class SimpleRuntimeFrame { |
| 49 | |
| 50 public: | |
| 51 | |
| 52 // Most of the runtime stubs have this simple frame layout. | |
| 53 // This class exists to make the layout shared in one place. | |
| 54 // Offsets are for compiler stack slots, which are jints. | |
| 55 enum layout { | |
| 56 // The frame sender code expects that rbp will be in the "natural" place and | |
| 57 // will override any oopMap setting for it. We must therefore force the layout | |
| 58 // so that it agrees with the frame sender code. | |
| 59 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt, | |
| 60 rbp_off2, | |
| 61 return_off, return_off2, | |
| 62 framesize | |
| 63 }; | |
| 64 }; | |
| 65 | |
| 66 class RegisterSaver { | |
| 67 // Capture info about frame layout. Layout offsets are in jint | |
| 68 // units because compiler frame slots are jints. | |
| 69 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off | |
| 70 enum layout { | |
| 71 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area | |
| 72 xmm_off = fpu_state_off + 160/BytesPerInt, // offset in fxsave save area | |
| 73 DEF_XMM_OFFS(0), | |
| 74 DEF_XMM_OFFS(1), | |
| 75 DEF_XMM_OFFS(2), | |
| 76 DEF_XMM_OFFS(3), | |
| 77 DEF_XMM_OFFS(4), | |
| 78 DEF_XMM_OFFS(5), | |
| 79 DEF_XMM_OFFS(6), | |
| 80 DEF_XMM_OFFS(7), | |
| 81 DEF_XMM_OFFS(8), | |
| 82 DEF_XMM_OFFS(9), | |
| 83 DEF_XMM_OFFS(10), | |
| 84 DEF_XMM_OFFS(11), | |
| 85 DEF_XMM_OFFS(12), | |
| 86 DEF_XMM_OFFS(13), | |
| 87 DEF_XMM_OFFS(14), | |
| 88 DEF_XMM_OFFS(15), | |
| 89 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt), | |
| 90 fpu_stateH_end, | |
| 91 r15_off, r15H_off, | |
| 92 r14_off, r14H_off, | |
| 93 r13_off, r13H_off, | |
| 94 r12_off, r12H_off, | |
| 95 r11_off, r11H_off, | |
| 96 r10_off, r10H_off, | |
| 97 r9_off, r9H_off, | |
| 98 r8_off, r8H_off, | |
| 99 rdi_off, rdiH_off, | |
| 100 rsi_off, rsiH_off, | |
| 101 ignore_off, ignoreH_off, // extra copy of rbp | |
| 102 rsp_off, rspH_off, | |
| 103 rbx_off, rbxH_off, | |
| 104 rdx_off, rdxH_off, | |
| 105 rcx_off, rcxH_off, | |
| 106 rax_off, raxH_off, | |
| 107 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state | |
| 108 align_off, alignH_off, | |
| 109 flags_off, flagsH_off, | |
| 110 // The frame sender code expects that rbp will be in the "natural" place and | |
| 111 // will override any oopMap setting for it. We must therefore force the layout | |
| 112 // so that it agrees with the frame sender code. | |
| 113 rbp_off, rbpH_off, // copy of rbp we will restore | |
| 114 return_off, returnH_off, // slot for return address | |
| 115 reg_save_size // size in compiler stack slots | |
| 116 }; | |
| 117 | |
| 118 public: | |
| 119 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words); | |
| 120 static void restore_live_registers(MacroAssembler* masm); | |
| 121 | |
| 122 // Offsets into the register save area | |
| 123 // Used by deoptimization when it is managing result register | |
| 124 // values on its own | |
| 125 | |
| 126 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; } | |
| 304 | 127 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; } |
| 0 | 128 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; } |
| 129 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; } | |
| 130 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; } | |
| 131 | |
| 132 // During deoptimization only the result registers need to be restored, | |
| 133 // all the other values have already been extracted. | |
| 134 static void restore_result_registers(MacroAssembler* masm); | |
| 135 }; | |
| 136 | |
| 137 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) { | |
| 138 | |
| 139 // Always make the frame size 16-byte aligned | |
| 140 int frame_size_in_bytes = round_to(additional_frame_words*wordSize + | |
| 141 reg_save_size*BytesPerInt, 16); | |
| 142 // OopMap frame size is in compiler stack slots (jint's) not bytes or words | |
| 143 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt; | |
| 144 // The caller will allocate additional_frame_words | |
| 145 int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt; | |
| 146 // CodeBlob frame size is in words. | |
| 147 int frame_size_in_words = frame_size_in_bytes / wordSize; | |
| 148 *total_frame_words = frame_size_in_words; | |
| 149 | |
| 150 // Save registers, fpu state, and flags. | |
| 151 // We assume caller has already pushed the return address onto the | |
| 152 // stack, so rsp is 8-byte aligned here. | |
| 153 // We push rpb twice in this sequence because we want the real rbp | |
| 154 // to be under the return like a normal enter. | |
| 155 | |
| 156 __ enter(); // rsp becomes 16-byte aligned here | |
| 157 __ push_CPU_state(); // Push a multiple of 16 bytes | |
| 158 if (frame::arg_reg_save_area_bytes != 0) { | |
| 159 // Allocate argument register save area | |
| 304 | 160 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
| 0 | 161 } |
| 162 | |
| 163 // Set an oopmap for the call site. This oopmap will map all | |
| 164 // oop-registers and debug-info registers as callee-saved. This | |
| 165 // will allow deoptimization at this safepoint to find all possible | |
| 166 // debug-info recordings, as well as let GC find all oops. | |
| 167 | |
| 168 OopMapSet *oop_maps = new OopMapSet(); | |
| 169 OopMap* map = new OopMap(frame_size_in_slots, 0); | |
| 170 map->set_callee_saved(VMRegImpl::stack2reg( rax_off + additional_frame_slots), rax->as_VMReg()); | |
| 171 map->set_callee_saved(VMRegImpl::stack2reg( rcx_off + additional_frame_slots), rcx->as_VMReg()); | |
| 172 map->set_callee_saved(VMRegImpl::stack2reg( rdx_off + additional_frame_slots), rdx->as_VMReg()); | |
| 173 map->set_callee_saved(VMRegImpl::stack2reg( rbx_off + additional_frame_slots), rbx->as_VMReg()); | |
| 174 // rbp location is known implicitly by the frame sender code, needs no oopmap | |
| 175 // and the location where rbp was saved by is ignored | |
| 176 map->set_callee_saved(VMRegImpl::stack2reg( rsi_off + additional_frame_slots), rsi->as_VMReg()); | |
| 177 map->set_callee_saved(VMRegImpl::stack2reg( rdi_off + additional_frame_slots), rdi->as_VMReg()); | |
| 178 map->set_callee_saved(VMRegImpl::stack2reg( r8_off + additional_frame_slots), r8->as_VMReg()); | |
| 179 map->set_callee_saved(VMRegImpl::stack2reg( r9_off + additional_frame_slots), r9->as_VMReg()); | |
| 180 map->set_callee_saved(VMRegImpl::stack2reg( r10_off + additional_frame_slots), r10->as_VMReg()); | |
| 181 map->set_callee_saved(VMRegImpl::stack2reg( r11_off + additional_frame_slots), r11->as_VMReg()); | |
| 182 map->set_callee_saved(VMRegImpl::stack2reg( r12_off + additional_frame_slots), r12->as_VMReg()); | |
| 183 map->set_callee_saved(VMRegImpl::stack2reg( r13_off + additional_frame_slots), r13->as_VMReg()); | |
| 184 map->set_callee_saved(VMRegImpl::stack2reg( r14_off + additional_frame_slots), r14->as_VMReg()); | |
| 185 map->set_callee_saved(VMRegImpl::stack2reg( r15_off + additional_frame_slots), r15->as_VMReg()); | |
| 186 map->set_callee_saved(VMRegImpl::stack2reg(xmm0_off + additional_frame_slots), xmm0->as_VMReg()); | |
| 187 map->set_callee_saved(VMRegImpl::stack2reg(xmm1_off + additional_frame_slots), xmm1->as_VMReg()); | |
| 188 map->set_callee_saved(VMRegImpl::stack2reg(xmm2_off + additional_frame_slots), xmm2->as_VMReg()); | |
| 189 map->set_callee_saved(VMRegImpl::stack2reg(xmm3_off + additional_frame_slots), xmm3->as_VMReg()); | |
| 190 map->set_callee_saved(VMRegImpl::stack2reg(xmm4_off + additional_frame_slots), xmm4->as_VMReg()); | |
| 191 map->set_callee_saved(VMRegImpl::stack2reg(xmm5_off + additional_frame_slots), xmm5->as_VMReg()); | |
| 192 map->set_callee_saved(VMRegImpl::stack2reg(xmm6_off + additional_frame_slots), xmm6->as_VMReg()); | |
| 193 map->set_callee_saved(VMRegImpl::stack2reg(xmm7_off + additional_frame_slots), xmm7->as_VMReg()); | |
| 194 map->set_callee_saved(VMRegImpl::stack2reg(xmm8_off + additional_frame_slots), xmm8->as_VMReg()); | |
| 195 map->set_callee_saved(VMRegImpl::stack2reg(xmm9_off + additional_frame_slots), xmm9->as_VMReg()); | |
| 196 map->set_callee_saved(VMRegImpl::stack2reg(xmm10_off + additional_frame_slots), xmm10->as_VMReg()); | |
| 197 map->set_callee_saved(VMRegImpl::stack2reg(xmm11_off + additional_frame_slots), xmm11->as_VMReg()); | |
| 198 map->set_callee_saved(VMRegImpl::stack2reg(xmm12_off + additional_frame_slots), xmm12->as_VMReg()); | |
| 199 map->set_callee_saved(VMRegImpl::stack2reg(xmm13_off + additional_frame_slots), xmm13->as_VMReg()); | |
| 200 map->set_callee_saved(VMRegImpl::stack2reg(xmm14_off + additional_frame_slots), xmm14->as_VMReg()); | |
| 201 map->set_callee_saved(VMRegImpl::stack2reg(xmm15_off + additional_frame_slots), xmm15->as_VMReg()); | |
| 202 | |
| 203 // %%% These should all be a waste but we'll keep things as they were for now | |
| 204 if (true) { | |
| 205 map->set_callee_saved(VMRegImpl::stack2reg( raxH_off + additional_frame_slots), | |
| 206 rax->as_VMReg()->next()); | |
| 207 map->set_callee_saved(VMRegImpl::stack2reg( rcxH_off + additional_frame_slots), | |
| 208 rcx->as_VMReg()->next()); | |
| 209 map->set_callee_saved(VMRegImpl::stack2reg( rdxH_off + additional_frame_slots), | |
| 210 rdx->as_VMReg()->next()); | |
| 211 map->set_callee_saved(VMRegImpl::stack2reg( rbxH_off + additional_frame_slots), | |
| 212 rbx->as_VMReg()->next()); | |
| 213 // rbp location is known implicitly by the frame sender code, needs no oopmap | |
| 214 map->set_callee_saved(VMRegImpl::stack2reg( rsiH_off + additional_frame_slots), | |
| 215 rsi->as_VMReg()->next()); | |
| 216 map->set_callee_saved(VMRegImpl::stack2reg( rdiH_off + additional_frame_slots), | |
| 217 rdi->as_VMReg()->next()); | |
| 218 map->set_callee_saved(VMRegImpl::stack2reg( r8H_off + additional_frame_slots), | |
| 219 r8->as_VMReg()->next()); | |
| 220 map->set_callee_saved(VMRegImpl::stack2reg( r9H_off + additional_frame_slots), | |
| 221 r9->as_VMReg()->next()); | |
| 222 map->set_callee_saved(VMRegImpl::stack2reg( r10H_off + additional_frame_slots), | |
| 223 r10->as_VMReg()->next()); | |
| 224 map->set_callee_saved(VMRegImpl::stack2reg( r11H_off + additional_frame_slots), | |
| 225 r11->as_VMReg()->next()); | |
| 226 map->set_callee_saved(VMRegImpl::stack2reg( r12H_off + additional_frame_slots), | |
| 227 r12->as_VMReg()->next()); | |
| 228 map->set_callee_saved(VMRegImpl::stack2reg( r13H_off + additional_frame_slots), | |
| 229 r13->as_VMReg()->next()); | |
| 230 map->set_callee_saved(VMRegImpl::stack2reg( r14H_off + additional_frame_slots), | |
| 231 r14->as_VMReg()->next()); | |
| 232 map->set_callee_saved(VMRegImpl::stack2reg( r15H_off + additional_frame_slots), | |
| 233 r15->as_VMReg()->next()); | |
| 234 map->set_callee_saved(VMRegImpl::stack2reg(xmm0H_off + additional_frame_slots), | |
| 235 xmm0->as_VMReg()->next()); | |
| 236 map->set_callee_saved(VMRegImpl::stack2reg(xmm1H_off + additional_frame_slots), | |
| 237 xmm1->as_VMReg()->next()); | |
| 238 map->set_callee_saved(VMRegImpl::stack2reg(xmm2H_off + additional_frame_slots), | |
| 239 xmm2->as_VMReg()->next()); | |
| 240 map->set_callee_saved(VMRegImpl::stack2reg(xmm3H_off + additional_frame_slots), | |
| 241 xmm3->as_VMReg()->next()); | |
| 242 map->set_callee_saved(VMRegImpl::stack2reg(xmm4H_off + additional_frame_slots), | |
| 243 xmm4->as_VMReg()->next()); | |
| 244 map->set_callee_saved(VMRegImpl::stack2reg(xmm5H_off + additional_frame_slots), | |
| 245 xmm5->as_VMReg()->next()); | |
| 246 map->set_callee_saved(VMRegImpl::stack2reg(xmm6H_off + additional_frame_slots), | |
| 247 xmm6->as_VMReg()->next()); | |
| 248 map->set_callee_saved(VMRegImpl::stack2reg(xmm7H_off + additional_frame_slots), | |
| 249 xmm7->as_VMReg()->next()); | |
| 250 map->set_callee_saved(VMRegImpl::stack2reg(xmm8H_off + additional_frame_slots), | |
| 251 xmm8->as_VMReg()->next()); | |
| 252 map->set_callee_saved(VMRegImpl::stack2reg(xmm9H_off + additional_frame_slots), | |
| 253 xmm9->as_VMReg()->next()); | |
| 254 map->set_callee_saved(VMRegImpl::stack2reg(xmm10H_off + additional_frame_slots), | |
| 255 xmm10->as_VMReg()->next()); | |
| 256 map->set_callee_saved(VMRegImpl::stack2reg(xmm11H_off + additional_frame_slots), | |
| 257 xmm11->as_VMReg()->next()); | |
| 258 map->set_callee_saved(VMRegImpl::stack2reg(xmm12H_off + additional_frame_slots), | |
| 259 xmm12->as_VMReg()->next()); | |
| 260 map->set_callee_saved(VMRegImpl::stack2reg(xmm13H_off + additional_frame_slots), | |
| 261 xmm13->as_VMReg()->next()); | |
| 262 map->set_callee_saved(VMRegImpl::stack2reg(xmm14H_off + additional_frame_slots), | |
| 263 xmm14->as_VMReg()->next()); | |
| 264 map->set_callee_saved(VMRegImpl::stack2reg(xmm15H_off + additional_frame_slots), | |
| 265 xmm15->as_VMReg()->next()); | |
| 266 } | |
| 267 | |
| 268 return map; | |
| 269 } | |
| 270 | |
| 271 void RegisterSaver::restore_live_registers(MacroAssembler* masm) { | |
| 272 if (frame::arg_reg_save_area_bytes != 0) { | |
| 273 // Pop arg register save area | |
| 304 | 274 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
| 0 | 275 } |
| 276 // Recover CPU state | |
| 277 __ pop_CPU_state(); | |
| 278 // Get the rbp described implicitly by the calling convention (no oopMap) | |
| 304 | 279 __ pop(rbp); |
| 0 | 280 } |
| 281 | |
| 282 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
| 283 | |
| 284 // Just restore result register. Only used by deoptimization. By | |
| 285 // now any callee save register that needs to be restored to a c2 | |
| 286 // caller of the deoptee has been extracted into the vframeArray | |
| 287 // and will be stuffed into the c2i adapter we create for later | |
| 288 // restoration so only result registers need to be restored here. | |
| 289 | |
| 290 // Restore fp result register | |
| 291 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes())); | |
| 292 // Restore integer result register | |
| 304 | 293 __ movptr(rax, Address(rsp, rax_offset_in_bytes())); |
| 294 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes())); | |
| 295 | |
| 0 | 296 // Pop all of the register save are off the stack except the return address |
| 304 | 297 __ addptr(rsp, return_offset_in_bytes()); |
| 0 | 298 } |
| 299 | |
| 300 // The java_calling_convention describes stack locations as ideal slots on | |
| 301 // a frame with no abi restrictions. Since we must observe abi restrictions | |
| 302 // (like the placement of the register window) the slots must be biased by | |
| 303 // the following value. | |
| 304 static int reg2offset_in(VMReg r) { | |
| 305 // Account for saved rbp and return address | |
| 306 // This should really be in_preserve_stack_slots | |
| 307 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size; | |
| 308 } | |
| 309 | |
| 310 static int reg2offset_out(VMReg r) { | |
| 311 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
| 312 } | |
| 313 | |
| 314 // --------------------------------------------------------------------------- | |
| 315 // Read the array of BasicTypes from a signature, and compute where the | |
| 316 // arguments should go. Values in the VMRegPair regs array refer to 4-byte | |
| 317 // quantities. Values less than VMRegImpl::stack0 are registers, those above | |
| 318 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer | |
| 319 // as framesizes are fixed. | |
| 320 // VMRegImpl::stack0 refers to the first slot 0(sp). | |
| 321 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
| 322 // up to RegisterImpl::number_of_registers) are the 64-bit | |
| 323 // integer registers. | |
| 324 | |
| 325 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
| 326 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
| 327 // units regardless of build. Of course for i486 there is no 64 bit build | |
| 328 | |
| 329 // The Java calling convention is a "shifted" version of the C ABI. | |
| 330 // By skipping the first C ABI register we can call non-static jni methods | |
| 331 // with small numbers of arguments without having to shuffle the arguments | |
| 332 // at all. Since we control the java ABI we ought to at least get some | |
| 333 // advantage out of it. | |
| 334 | |
| 335 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
| 336 VMRegPair *regs, | |
| 337 int total_args_passed, | |
| 338 int is_outgoing) { | |
| 339 | |
| 340 // Create the mapping between argument positions and | |
| 341 // registers. | |
| 342 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = { | |
| 343 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5 | |
| 344 }; | |
| 345 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = { | |
| 346 j_farg0, j_farg1, j_farg2, j_farg3, | |
| 347 j_farg4, j_farg5, j_farg6, j_farg7 | |
| 348 }; | |
| 349 | |
| 350 | |
| 351 uint int_args = 0; | |
| 352 uint fp_args = 0; | |
| 353 uint stk_args = 0; // inc by 2 each time | |
| 354 | |
| 355 for (int i = 0; i < total_args_passed; i++) { | |
| 356 switch (sig_bt[i]) { | |
| 357 case T_BOOLEAN: | |
| 358 case T_CHAR: | |
| 359 case T_BYTE: | |
| 360 case T_SHORT: | |
| 361 case T_INT: | |
| 362 if (int_args < Argument::n_int_register_parameters_j) { | |
| 363 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
| 364 } else { | |
| 365 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
| 366 stk_args += 2; | |
| 367 } | |
| 368 break; | |
| 369 case T_VOID: | |
| 370 // halves of T_LONG or T_DOUBLE | |
| 371 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
| 372 regs[i].set_bad(); | |
| 373 break; | |
| 374 case T_LONG: | |
| 375 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
| 376 // fall through | |
| 377 case T_OBJECT: | |
| 378 case T_ARRAY: | |
| 379 case T_ADDRESS: | |
| 380 if (int_args < Argument::n_int_register_parameters_j) { | |
| 381 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
| 382 } else { | |
| 383 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
| 384 stk_args += 2; | |
| 385 } | |
| 386 break; | |
| 387 case T_FLOAT: | |
| 388 if (fp_args < Argument::n_float_register_parameters_j) { | |
| 389 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
| 390 } else { | |
| 391 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
| 392 stk_args += 2; | |
| 393 } | |
| 394 break; | |
| 395 case T_DOUBLE: | |
| 396 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
| 397 if (fp_args < Argument::n_float_register_parameters_j) { | |
| 398 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
| 399 } else { | |
| 400 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
| 401 stk_args += 2; | |
| 402 } | |
| 403 break; | |
| 404 default: | |
| 405 ShouldNotReachHere(); | |
| 406 break; | |
| 407 } | |
| 408 } | |
| 409 | |
| 410 return round_to(stk_args, 2); | |
| 411 } | |
| 412 | |
| 413 // Patch the callers callsite with entry to compiled code if it exists. | |
| 414 static void patch_callers_callsite(MacroAssembler *masm) { | |
| 415 Label L; | |
| 416 __ verify_oop(rbx); | |
| 304 | 417 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD); |
| 0 | 418 __ jcc(Assembler::equal, L); |
| 419 | |
| 420 // Save the current stack pointer | |
| 304 | 421 __ mov(r13, rsp); |
| 0 | 422 // Schedule the branch target address early. |
| 423 // Call into the VM to patch the caller, then jump to compiled callee | |
| 424 // rax isn't live so capture return address while we easily can | |
| 304 | 425 __ movptr(rax, Address(rsp, 0)); |
| 0 | 426 |
| 427 // align stack so push_CPU_state doesn't fault | |
| 304 | 428 __ andptr(rsp, -(StackAlignmentInBytes)); |
| 0 | 429 __ push_CPU_state(); |
| 430 | |
| 431 | |
| 432 __ verify_oop(rbx); | |
| 433 // VM needs caller's callsite | |
| 434 // VM needs target method | |
| 435 // This needs to be a long call since we will relocate this adapter to | |
| 436 // the codeBuffer and it may not reach | |
| 437 | |
| 438 // Allocate argument register save area | |
| 439 if (frame::arg_reg_save_area_bytes != 0) { | |
| 304 | 440 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
| 0 | 441 } |
| 304 | 442 __ mov(c_rarg0, rbx); |
| 443 __ mov(c_rarg1, rax); | |
| 0 | 444 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); |
| 445 | |
| 446 // De-allocate argument register save area | |
| 447 if (frame::arg_reg_save_area_bytes != 0) { | |
| 304 | 448 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
| 0 | 449 } |
| 450 | |
| 451 __ pop_CPU_state(); | |
| 452 // restore sp | |
| 304 | 453 __ mov(rsp, r13); |
| 0 | 454 __ bind(L); |
| 455 } | |
| 456 | |
| 457 | |
| 458 static void gen_c2i_adapter(MacroAssembler *masm, | |
| 459 int total_args_passed, | |
| 460 int comp_args_on_stack, | |
| 461 const BasicType *sig_bt, | |
| 462 const VMRegPair *regs, | |
| 463 Label& skip_fixup) { | |
| 464 // Before we get into the guts of the C2I adapter, see if we should be here | |
| 465 // at all. We've come from compiled code and are attempting to jump to the | |
| 466 // interpreter, which means the caller made a static call to get here | |
| 467 // (vcalls always get a compiled target if there is one). Check for a | |
| 468 // compiled target. If there is one, we need to patch the caller's call. | |
| 469 patch_callers_callsite(masm); | |
| 470 | |
| 471 __ bind(skip_fixup); | |
| 472 | |
| 473 // Since all args are passed on the stack, total_args_passed * | |
| 474 // Interpreter::stackElementSize is the space we need. Plus 1 because | |
| 475 // we also account for the return address location since | |
| 476 // we store it first rather than hold it in rax across all the shuffling | |
| 477 | |
| 1506 | 478 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize; |
| 0 | 479 |
| 480 // stack is aligned, keep it that way | |
| 481 extraspace = round_to(extraspace, 2*wordSize); | |
| 482 | |
| 483 // Get return address | |
| 304 | 484 __ pop(rax); |
| 0 | 485 |
| 486 // set senderSP value | |
| 304 | 487 __ mov(r13, rsp); |
| 488 | |
| 489 __ subptr(rsp, extraspace); | |
| 0 | 490 |
| 491 // Store the return address in the expected location | |
| 304 | 492 __ movptr(Address(rsp, 0), rax); |
| 0 | 493 |
| 494 // Now write the args into the outgoing interpreter space | |
| 495 for (int i = 0; i < total_args_passed; i++) { | |
| 496 if (sig_bt[i] == T_VOID) { | |
| 497 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
| 498 continue; | |
| 499 } | |
| 500 | |
| 501 // offset to start parameters | |
| 1506 | 502 int st_off = (total_args_passed - i) * Interpreter::stackElementSize; |
| 503 int next_off = st_off - Interpreter::stackElementSize; | |
| 0 | 504 |
| 505 // Say 4 args: | |
| 506 // i st_off | |
| 507 // 0 32 T_LONG | |
| 508 // 1 24 T_VOID | |
| 509 // 2 16 T_OBJECT | |
| 510 // 3 8 T_BOOL | |
| 511 // - 0 return address | |
| 512 // | |
| 513 // However to make thing extra confusing. Because we can fit a long/double in | |
| 514 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter | |
| 515 // leaves one slot empty and only stores to a single slot. In this case the | |
| 516 // slot that is occupied is the T_VOID slot. See I said it was confusing. | |
| 517 | |
| 518 VMReg r_1 = regs[i].first(); | |
| 519 VMReg r_2 = regs[i].second(); | |
| 520 if (!r_1->is_valid()) { | |
| 521 assert(!r_2->is_valid(), ""); | |
| 522 continue; | |
| 523 } | |
| 524 if (r_1->is_stack()) { | |
| 525 // memory to memory use rax | |
| 526 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; | |
| 527 if (!r_2->is_valid()) { | |
| 528 // sign extend?? | |
| 529 __ movl(rax, Address(rsp, ld_off)); | |
| 304 | 530 __ movptr(Address(rsp, st_off), rax); |
| 0 | 531 |
| 532 } else { | |
| 533 | |
| 534 __ movq(rax, Address(rsp, ld_off)); | |
| 535 | |
| 536 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
| 537 // T_DOUBLE and T_LONG use two slots in the interpreter | |
| 538 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
| 539 // ld_off == LSW, ld_off+wordSize == MSW | |
| 540 // st_off == MSW, next_off == LSW | |
| 541 __ movq(Address(rsp, next_off), rax); | |
| 542 #ifdef ASSERT | |
| 543 // Overwrite the unused slot with known junk | |
| 544 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); | |
| 304 | 545 __ movptr(Address(rsp, st_off), rax); |
| 0 | 546 #endif /* ASSERT */ |
| 547 } else { | |
| 548 __ movq(Address(rsp, st_off), rax); | |
| 549 } | |
| 550 } | |
| 551 } else if (r_1->is_Register()) { | |
| 552 Register r = r_1->as_Register(); | |
| 553 if (!r_2->is_valid()) { | |
| 554 // must be only an int (or less ) so move only 32bits to slot | |
| 555 // why not sign extend?? | |
| 556 __ movl(Address(rsp, st_off), r); | |
| 557 } else { | |
| 558 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
| 559 // T_DOUBLE and T_LONG use two slots in the interpreter | |
| 560 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
| 561 // long/double in gpr | |
| 562 #ifdef ASSERT | |
| 563 // Overwrite the unused slot with known junk | |
| 564 __ mov64(rax, CONST64(0xdeadffffdeadaaab)); | |
| 304 | 565 __ movptr(Address(rsp, st_off), rax); |
| 0 | 566 #endif /* ASSERT */ |
| 567 __ movq(Address(rsp, next_off), r); | |
| 568 } else { | |
| 304 | 569 __ movptr(Address(rsp, st_off), r); |
| 0 | 570 } |
| 571 } | |
| 572 } else { | |
| 573 assert(r_1->is_XMMRegister(), ""); | |
| 574 if (!r_2->is_valid()) { | |
| 575 // only a float use just part of the slot | |
| 576 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); | |
| 577 } else { | |
| 578 #ifdef ASSERT | |
| 579 // Overwrite the unused slot with known junk | |
| 580 __ mov64(rax, CONST64(0xdeadffffdeadaaac)); | |
| 304 | 581 __ movptr(Address(rsp, st_off), rax); |
| 0 | 582 #endif /* ASSERT */ |
| 583 __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister()); | |
| 584 } | |
| 585 } | |
| 586 } | |
| 587 | |
| 588 // Schedule the branch target address early. | |
| 304 | 589 __ movptr(rcx, Address(rbx, in_bytes(methodOopDesc::interpreter_entry_offset()))); |
| 0 | 590 __ jmp(rcx); |
| 591 } | |
| 592 | |
| 593 static void gen_i2c_adapter(MacroAssembler *masm, | |
| 594 int total_args_passed, | |
| 595 int comp_args_on_stack, | |
| 596 const BasicType *sig_bt, | |
| 597 const VMRegPair *regs) { | |
| 598 | |
| 599 // Note: r13 contains the senderSP on entry. We must preserve it since | |
| 600 // we may do a i2c -> c2i transition if we lose a race where compiled | |
| 601 // code goes non-entrant while we get args ready. | |
| 602 // In addition we use r13 to locate all the interpreter args as | |
| 603 // we must align the stack to 16 bytes on an i2c entry else we | |
| 604 // lose alignment we expect in all compiled code and register | |
| 605 // save code can segv when fxsave instructions find improperly | |
| 606 // aligned stack pointer. | |
| 607 | |
|
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608 // Pick up the return address |
| 304 | 609 __ movptr(rax, Address(rsp, 0)); |
| 0 | 610 |
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611 // Must preserve original SP for loading incoming arguments because |
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612 // we need to align the outgoing SP for compiled code. |
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613 __ movptr(r11, rsp); |
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614 |
| 0 | 615 // Cut-out for having no stack args. Since up to 2 int/oop args are passed |
| 616 // in registers, we will occasionally have no stack args. | |
| 617 int comp_words_on_stack = 0; | |
| 618 if (comp_args_on_stack) { | |
| 619 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in | |
| 620 // registers are below. By subtracting stack0, we either get a negative | |
| 621 // number (all values in registers) or the maximum stack slot accessed. | |
| 622 | |
| 623 // Convert 4-byte c2 stack slots to words. | |
| 624 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; | |
| 625 // Round up to miminum stack alignment, in wordSize | |
| 626 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
| 304 | 627 __ subptr(rsp, comp_words_on_stack * wordSize); |
| 0 | 628 } |
| 629 | |
| 630 | |
| 631 // Ensure compiled code always sees stack at proper alignment | |
| 304 | 632 __ andptr(rsp, -16); |
| 0 | 633 |
| 634 // push the return address and misalign the stack that youngest frame always sees | |
| 635 // as far as the placement of the call instruction | |
| 304 | 636 __ push(rax); |
| 0 | 637 |
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638 // Put saved SP in another register |
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639 const Register saved_sp = rax; |
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640 __ movptr(saved_sp, r11); |
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641 |
| 0 | 642 // Will jump to the compiled code just as if compiled code was doing it. |
| 643 // Pre-load the register-jump target early, to schedule it better. | |
| 304 | 644 __ movptr(r11, Address(rbx, in_bytes(methodOopDesc::from_compiled_offset()))); |
| 0 | 645 |
| 646 // Now generate the shuffle code. Pick up all register args and move the | |
| 647 // rest through the floating point stack top. | |
| 648 for (int i = 0; i < total_args_passed; i++) { | |
| 649 if (sig_bt[i] == T_VOID) { | |
| 650 // Longs and doubles are passed in native word order, but misaligned | |
| 651 // in the 32-bit build. | |
| 652 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
| 653 continue; | |
| 654 } | |
| 655 | |
| 656 // Pick up 0, 1 or 2 words from SP+offset. | |
| 657 | |
| 658 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), | |
| 659 "scrambled load targets?"); | |
| 660 // Load in argument order going down. | |
| 1506 | 661 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize; |
| 0 | 662 // Point to interpreter value (vs. tag) |
| 1506 | 663 int next_off = ld_off - Interpreter::stackElementSize; |
| 0 | 664 // |
| 665 // | |
| 666 // | |
| 667 VMReg r_1 = regs[i].first(); | |
| 668 VMReg r_2 = regs[i].second(); | |
| 669 if (!r_1->is_valid()) { | |
| 670 assert(!r_2->is_valid(), ""); | |
| 671 continue; | |
| 672 } | |
| 673 if (r_1->is_stack()) { | |
| 674 // Convert stack slot to an SP offset (+ wordSize to account for return address ) | |
| 675 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; | |
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676 |
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677 // We can use r13 as a temp here because compiled code doesn't need r13 as an input |
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678 // and if we end up going thru a c2i because of a miss a reasonable value of r13 |
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679 // will be generated. |
| 0 | 680 if (!r_2->is_valid()) { |
| 681 // sign extend??? | |
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682 __ movl(r13, Address(saved_sp, ld_off)); |
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683 __ movptr(Address(rsp, st_off), r13); |
| 0 | 684 } else { |
| 685 // | |
| 686 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
| 687 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
| 688 // So we must adjust where to pick up the data to match the interpreter. | |
| 689 // | |
| 690 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
| 691 // are accessed as negative so LSW is at LOW address | |
| 692 | |
| 693 // ld_off is MSW so get LSW | |
| 694 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
| 695 next_off : ld_off; | |
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696 __ movq(r13, Address(saved_sp, offset)); |
| 0 | 697 // st_off is LSW (i.e. reg.first()) |
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698 __ movq(Address(rsp, st_off), r13); |
| 0 | 699 } |
| 700 } else if (r_1->is_Register()) { // Register argument | |
| 701 Register r = r_1->as_Register(); | |
| 702 assert(r != rax, "must be different"); | |
| 703 if (r_2->is_valid()) { | |
| 704 // | |
| 705 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
| 706 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
| 707 // So we must adjust where to pick up the data to match the interpreter. | |
| 708 | |
| 709 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
| 710 next_off : ld_off; | |
| 711 | |
| 712 // this can be a misaligned move | |
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713 __ movq(r, Address(saved_sp, offset)); |
| 0 | 714 } else { |
| 715 // sign extend and use a full word? | |
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716 __ movl(r, Address(saved_sp, ld_off)); |
| 0 | 717 } |
| 718 } else { | |
| 719 if (!r_2->is_valid()) { | |
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720 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); |
| 0 | 721 } else { |
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722 __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off)); |
| 0 | 723 } |
| 724 } | |
| 725 } | |
| 726 | |
| 727 // 6243940 We might end up in handle_wrong_method if | |
| 728 // the callee is deoptimized as we race thru here. If that | |
| 729 // happens we don't want to take a safepoint because the | |
| 730 // caller frame will look interpreted and arguments are now | |
| 731 // "compiled" so it is much better to make this transition | |
| 732 // invisible to the stack walking code. Unfortunately if | |
| 733 // we try and find the callee by normal means a safepoint | |
| 734 // is possible. So we stash the desired callee in the thread | |
| 735 // and the vm will find there should this case occur. | |
| 736 | |
| 304 | 737 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx); |
| 0 | 738 |
| 739 // put methodOop where a c2i would expect should we end up there | |
| 740 // only needed becaus eof c2 resolve stubs return methodOop as a result in | |
| 741 // rax | |
| 304 | 742 __ mov(rax, rbx); |
| 0 | 743 __ jmp(r11); |
| 744 } | |
| 745 | |
| 746 // --------------------------------------------------------------- | |
| 747 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
| 748 int total_args_passed, | |
| 749 int comp_args_on_stack, | |
| 750 const BasicType *sig_bt, | |
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751 const VMRegPair *regs, |
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752 AdapterFingerPrint* fingerprint) { |
| 0 | 753 address i2c_entry = __ pc(); |
| 754 | |
| 755 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); | |
| 756 | |
| 757 // ------------------------------------------------------------------------- | |
| 758 // Generate a C2I adapter. On entry we know rbx holds the methodOop during calls | |
| 759 // to the interpreter. The args start out packed in the compiled layout. They | |
| 760 // need to be unpacked into the interpreter layout. This will almost always | |
| 761 // require some stack space. We grow the current (compiled) stack, then repack | |
| 762 // the args. We finally end in a jump to the generic interpreter entry point. | |
| 763 // On exit from the interpreter, the interpreter will restore our SP (lest the | |
| 764 // compiled code, which relys solely on SP and not RBP, get sick). | |
| 765 | |
| 766 address c2i_unverified_entry = __ pc(); | |
| 767 Label skip_fixup; | |
| 768 Label ok; | |
| 769 | |
| 770 Register holder = rax; | |
| 771 Register receiver = j_rarg0; | |
| 772 Register temp = rbx; | |
| 773 | |
| 774 { | |
| 775 __ verify_oop(holder); | |
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6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
776 __ load_klass(temp, receiver); |
| 0 | 777 __ verify_oop(temp); |
| 778 | |
| 304 | 779 __ cmpptr(temp, Address(holder, compiledICHolderOopDesc::holder_klass_offset())); |
| 780 __ movptr(rbx, Address(holder, compiledICHolderOopDesc::holder_method_offset())); | |
| 0 | 781 __ jcc(Assembler::equal, ok); |
| 782 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 783 | |
| 784 __ bind(ok); | |
| 785 // Method might have been compiled since the call site was patched to | |
| 786 // interpreted if that is the case treat it as a miss so we can get | |
| 787 // the call site corrected. | |
| 304 | 788 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD); |
| 0 | 789 __ jcc(Assembler::equal, skip_fixup); |
| 790 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 791 } | |
| 792 | |
| 793 address c2i_entry = __ pc(); | |
| 794 | |
| 795 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); | |
| 796 | |
| 797 __ flush(); | |
|
1187
cf0685d550f1
6911204: generated adapters with large signatures can fill up the code cache
never
parents:
1135
diff
changeset
|
798 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
| 0 | 799 } |
| 800 | |
| 801 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
| 802 VMRegPair *regs, | |
| 803 int total_args_passed) { | |
| 804 // We return the amount of VMRegImpl stack slots we need to reserve for all | |
| 805 // the arguments NOT counting out_preserve_stack_slots. | |
| 806 | |
| 807 // NOTE: These arrays will have to change when c1 is ported | |
| 808 #ifdef _WIN64 | |
| 809 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
| 810 c_rarg0, c_rarg1, c_rarg2, c_rarg3 | |
| 811 }; | |
| 812 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
| 813 c_farg0, c_farg1, c_farg2, c_farg3 | |
| 814 }; | |
| 815 #else | |
| 816 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
| 817 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5 | |
| 818 }; | |
| 819 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
| 820 c_farg0, c_farg1, c_farg2, c_farg3, | |
| 821 c_farg4, c_farg5, c_farg6, c_farg7 | |
| 822 }; | |
| 823 #endif // _WIN64 | |
| 824 | |
| 825 | |
| 826 uint int_args = 0; | |
| 827 uint fp_args = 0; | |
| 828 uint stk_args = 0; // inc by 2 each time | |
| 829 | |
| 830 for (int i = 0; i < total_args_passed; i++) { | |
| 831 switch (sig_bt[i]) { | |
| 832 case T_BOOLEAN: | |
| 833 case T_CHAR: | |
| 834 case T_BYTE: | |
| 835 case T_SHORT: | |
| 836 case T_INT: | |
| 837 if (int_args < Argument::n_int_register_parameters_c) { | |
| 838 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
| 839 #ifdef _WIN64 | |
| 840 fp_args++; | |
| 841 // Allocate slots for callee to stuff register args the stack. | |
| 842 stk_args += 2; | |
| 843 #endif | |
| 844 } else { | |
| 845 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
| 846 stk_args += 2; | |
| 847 } | |
| 848 break; | |
| 849 case T_LONG: | |
| 850 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
| 851 // fall through | |
| 852 case T_OBJECT: | |
| 853 case T_ARRAY: | |
| 854 case T_ADDRESS: | |
| 855 if (int_args < Argument::n_int_register_parameters_c) { | |
| 856 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
| 857 #ifdef _WIN64 | |
| 858 fp_args++; | |
| 859 stk_args += 2; | |
| 860 #endif | |
| 861 } else { | |
| 862 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
| 863 stk_args += 2; | |
| 864 } | |
| 865 break; | |
| 866 case T_FLOAT: | |
| 867 if (fp_args < Argument::n_float_register_parameters_c) { | |
| 868 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
| 869 #ifdef _WIN64 | |
| 870 int_args++; | |
| 871 // Allocate slots for callee to stuff register args the stack. | |
| 872 stk_args += 2; | |
| 873 #endif | |
| 874 } else { | |
| 875 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
| 876 stk_args += 2; | |
| 877 } | |
| 878 break; | |
| 879 case T_DOUBLE: | |
| 880 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
| 881 if (fp_args < Argument::n_float_register_parameters_c) { | |
| 882 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
| 883 #ifdef _WIN64 | |
| 884 int_args++; | |
| 885 // Allocate slots for callee to stuff register args the stack. | |
| 886 stk_args += 2; | |
| 887 #endif | |
| 888 } else { | |
| 889 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
| 890 stk_args += 2; | |
| 891 } | |
| 892 break; | |
| 893 case T_VOID: // Halves of longs and doubles | |
| 894 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
| 895 regs[i].set_bad(); | |
| 896 break; | |
| 897 default: | |
| 898 ShouldNotReachHere(); | |
| 899 break; | |
| 900 } | |
| 901 } | |
| 902 #ifdef _WIN64 | |
| 903 // windows abi requires that we always allocate enough stack space | |
| 904 // for 4 64bit registers to be stored down. | |
| 905 if (stk_args < 8) { | |
| 906 stk_args = 8; | |
| 907 } | |
| 908 #endif // _WIN64 | |
| 909 | |
| 910 return stk_args; | |
| 911 } | |
| 912 | |
| 913 // On 64 bit we will store integer like items to the stack as | |
| 914 // 64 bits items (sparc abi) even though java would only store | |
| 915 // 32bits for a parameter. On 32bit it will simply be 32 bits | |
| 916 // So this routine will do 32->32 on 32bit and 32->64 on 64bit | |
| 917 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 918 if (src.first()->is_stack()) { | |
| 919 if (dst.first()->is_stack()) { | |
| 920 // stack to stack | |
| 921 __ movslq(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 922 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 923 } else { | |
| 924 // stack to reg | |
| 925 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); | |
| 926 } | |
| 927 } else if (dst.first()->is_stack()) { | |
| 928 // reg to stack | |
| 929 // Do we really have to sign extend??? | |
| 930 // __ movslq(src.first()->as_Register(), src.first()->as_Register()); | |
| 931 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
| 932 } else { | |
| 933 // Do we really have to sign extend??? | |
| 934 // __ movslq(dst.first()->as_Register(), src.first()->as_Register()); | |
| 935 if (dst.first() != src.first()) { | |
| 936 __ movq(dst.first()->as_Register(), src.first()->as_Register()); | |
| 937 } | |
| 938 } | |
| 939 } | |
| 940 | |
| 941 | |
| 942 // An oop arg. Must pass a handle not the oop itself | |
| 943 static void object_move(MacroAssembler* masm, | |
| 944 OopMap* map, | |
| 945 int oop_handle_offset, | |
| 946 int framesize_in_slots, | |
| 947 VMRegPair src, | |
| 948 VMRegPair dst, | |
| 949 bool is_receiver, | |
| 950 int* receiver_offset) { | |
| 951 | |
| 952 // must pass a handle. First figure out the location we use as a handle | |
| 953 | |
| 954 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register(); | |
| 955 | |
| 956 // See if oop is NULL if it is we need no handle | |
| 957 | |
| 958 if (src.first()->is_stack()) { | |
| 959 | |
| 960 // Oop is already on the stack as an argument | |
| 961 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
| 962 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
| 963 if (is_receiver) { | |
| 964 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
| 965 } | |
| 966 | |
| 304 | 967 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); |
| 968 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); | |
| 0 | 969 // conditionally move a NULL |
| 304 | 970 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first()))); |
| 0 | 971 } else { |
| 972 | |
| 973 // Oop is in an a register we must store it to the space we reserve | |
| 974 // on the stack for oop_handles and pass a handle if oop is non-NULL | |
| 975 | |
| 976 const Register rOop = src.first()->as_Register(); | |
| 977 int oop_slot; | |
| 978 if (rOop == j_rarg0) | |
| 979 oop_slot = 0; | |
| 980 else if (rOop == j_rarg1) | |
| 981 oop_slot = 1; | |
| 982 else if (rOop == j_rarg2) | |
| 983 oop_slot = 2; | |
| 984 else if (rOop == j_rarg3) | |
| 985 oop_slot = 3; | |
| 986 else if (rOop == j_rarg4) | |
| 987 oop_slot = 4; | |
| 988 else { | |
| 989 assert(rOop == j_rarg5, "wrong register"); | |
| 990 oop_slot = 5; | |
| 991 } | |
| 992 | |
| 993 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset; | |
| 994 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
| 995 | |
| 996 map->set_oop(VMRegImpl::stack2reg(oop_slot)); | |
| 997 // Store oop in handle area, may be NULL | |
| 304 | 998 __ movptr(Address(rsp, offset), rOop); |
| 0 | 999 if (is_receiver) { |
| 1000 *receiver_offset = offset; | |
| 1001 } | |
| 1002 | |
| 304 | 1003 __ cmpptr(rOop, (int32_t)NULL_WORD); |
| 1004 __ lea(rHandle, Address(rsp, offset)); | |
| 0 | 1005 // conditionally move a NULL from the handle area where it was just stored |
| 304 | 1006 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset)); |
| 0 | 1007 } |
| 1008 | |
| 1009 // If arg is on the stack then place it otherwise it is already in correct reg. | |
| 1010 if (dst.first()->is_stack()) { | |
| 304 | 1011 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
| 0 | 1012 } |
| 1013 } | |
| 1014 | |
| 1015 // A float arg may have to do float reg int reg conversion | |
| 1016 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1017 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
| 1018 | |
| 1019 // The calling conventions assures us that each VMregpair is either | |
| 1020 // all really one physical register or adjacent stack slots. | |
| 1021 // This greatly simplifies the cases here compared to sparc. | |
| 1022 | |
| 1023 if (src.first()->is_stack()) { | |
| 1024 if (dst.first()->is_stack()) { | |
| 1025 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 304 | 1026 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); |
| 0 | 1027 } else { |
| 1028 // stack to reg | |
| 1029 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
| 1030 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first()))); | |
| 1031 } | |
| 1032 } else if (dst.first()->is_stack()) { | |
| 1033 // reg to stack | |
| 1034 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
| 1035 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
| 1036 } else { | |
| 1037 // reg to reg | |
| 1038 // In theory these overlap but the ordering is such that this is likely a nop | |
| 1039 if ( src.first() != dst.first()) { | |
| 1040 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
| 1041 } | |
| 1042 } | |
| 1043 } | |
| 1044 | |
| 1045 // A long move | |
| 1046 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1047 | |
| 1048 // The calling conventions assures us that each VMregpair is either | |
| 1049 // all really one physical register or adjacent stack slots. | |
| 1050 // This greatly simplifies the cases here compared to sparc. | |
| 1051 | |
| 1052 if (src.is_single_phys_reg() ) { | |
| 1053 if (dst.is_single_phys_reg()) { | |
| 1054 if (dst.first() != src.first()) { | |
| 304 | 1055 __ mov(dst.first()->as_Register(), src.first()->as_Register()); |
| 0 | 1056 } |
| 1057 } else { | |
| 1058 assert(dst.is_single_reg(), "not a stack pair"); | |
| 1059 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
| 1060 } | |
| 1061 } else if (dst.is_single_phys_reg()) { | |
| 1062 assert(src.is_single_reg(), "not a stack pair"); | |
| 1063 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first()))); | |
| 1064 } else { | |
| 1065 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
| 1066 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 1067 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1068 } | |
| 1069 } | |
| 1070 | |
| 1071 // A double move | |
| 1072 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1073 | |
| 1074 // The calling conventions assures us that each VMregpair is either | |
| 1075 // all really one physical register or adjacent stack slots. | |
| 1076 // This greatly simplifies the cases here compared to sparc. | |
| 1077 | |
| 1078 if (src.is_single_phys_reg() ) { | |
| 1079 if (dst.is_single_phys_reg()) { | |
| 1080 // In theory these overlap but the ordering is such that this is likely a nop | |
| 1081 if ( src.first() != dst.first()) { | |
| 1082 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
| 1083 } | |
| 1084 } else { | |
| 1085 assert(dst.is_single_reg(), "not a stack pair"); | |
| 1086 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
| 1087 } | |
| 1088 } else if (dst.is_single_phys_reg()) { | |
| 1089 assert(src.is_single_reg(), "not a stack pair"); | |
| 1090 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first()))); | |
| 1091 } else { | |
| 1092 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
| 1093 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 1094 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1095 } | |
| 1096 } | |
| 1097 | |
| 1098 | |
| 1099 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
| 1100 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
| 1101 // which by this time is free to use | |
| 1102 switch (ret_type) { | |
| 1103 case T_FLOAT: | |
| 1104 __ movflt(Address(rbp, -wordSize), xmm0); | |
| 1105 break; | |
| 1106 case T_DOUBLE: | |
| 1107 __ movdbl(Address(rbp, -wordSize), xmm0); | |
| 1108 break; | |
| 1109 case T_VOID: break; | |
| 1110 default: { | |
| 304 | 1111 __ movptr(Address(rbp, -wordSize), rax); |
| 0 | 1112 } |
| 1113 } | |
| 1114 } | |
| 1115 | |
| 1116 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
| 1117 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
| 1118 // which by this time is free to use | |
| 1119 switch (ret_type) { | |
| 1120 case T_FLOAT: | |
| 1121 __ movflt(xmm0, Address(rbp, -wordSize)); | |
| 1122 break; | |
| 1123 case T_DOUBLE: | |
| 1124 __ movdbl(xmm0, Address(rbp, -wordSize)); | |
| 1125 break; | |
| 1126 case T_VOID: break; | |
| 1127 default: { | |
| 304 | 1128 __ movptr(rax, Address(rbp, -wordSize)); |
| 0 | 1129 } |
| 1130 } | |
| 1131 } | |
| 1132 | |
| 1133 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
| 1134 for ( int i = first_arg ; i < arg_count ; i++ ) { | |
| 1135 if (args[i].first()->is_Register()) { | |
| 304 | 1136 __ push(args[i].first()->as_Register()); |
| 0 | 1137 } else if (args[i].first()->is_XMMRegister()) { |
| 304 | 1138 __ subptr(rsp, 2*wordSize); |
| 0 | 1139 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister()); |
| 1140 } | |
| 1141 } | |
| 1142 } | |
| 1143 | |
| 1144 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
| 1145 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) { | |
| 1146 if (args[i].first()->is_Register()) { | |
| 304 | 1147 __ pop(args[i].first()->as_Register()); |
| 0 | 1148 } else if (args[i].first()->is_XMMRegister()) { |
| 1149 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0)); | |
| 304 | 1150 __ addptr(rsp, 2*wordSize); |
| 0 | 1151 } |
| 1152 } | |
| 1153 } | |
| 1154 | |
| 1155 // --------------------------------------------------------------------------- | |
| 1156 // Generate a native wrapper for a given method. The method takes arguments | |
| 1157 // in the Java compiled code convention, marshals them to the native | |
| 1158 // convention (handlizes oops, etc), transitions to native, makes the call, | |
| 1159 // returns to java state (possibly blocking), unhandlizes any result and | |
| 1160 // returns. | |
| 1161 nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm, | |
| 1162 methodHandle method, | |
|
2405
3d58a4983660
7022998: JSR 292 recursive method handle calls inline themselves infinitely
twisti
parents:
2245
diff
changeset
|
1163 int compile_id, |
| 0 | 1164 int total_in_args, |
| 1165 int comp_args_on_stack, | |
| 1166 BasicType *in_sig_bt, | |
| 1167 VMRegPair *in_regs, | |
| 1168 BasicType ret_type) { | |
| 1169 // Native nmethod wrappers never take possesion of the oop arguments. | |
| 1170 // So the caller will gc the arguments. The only thing we need an | |
| 1171 // oopMap for is if the call is static | |
| 1172 // | |
| 1173 // An OopMap for lock (and class if static) | |
| 1174 OopMapSet *oop_maps = new OopMapSet(); | |
| 1175 intptr_t start = (intptr_t)__ pc(); | |
| 1176 | |
| 1177 // We have received a description of where all the java arg are located | |
| 1178 // on entry to the wrapper. We need to convert these args to where | |
| 1179 // the jni function will expect them. To figure out where they go | |
| 1180 // we convert the java signature to a C signature by inserting | |
| 1181 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
| 1182 | |
| 1183 int total_c_args = total_in_args + 1; | |
| 1184 if (method->is_static()) { | |
| 1185 total_c_args++; | |
| 1186 } | |
| 1187 | |
| 1188 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
| 1189 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); | |
| 1190 | |
| 1191 int argc = 0; | |
| 1192 out_sig_bt[argc++] = T_ADDRESS; | |
| 1193 if (method->is_static()) { | |
| 1194 out_sig_bt[argc++] = T_OBJECT; | |
| 1195 } | |
| 1196 | |
| 1197 for (int i = 0; i < total_in_args ; i++ ) { | |
| 1198 out_sig_bt[argc++] = in_sig_bt[i]; | |
| 1199 } | |
| 1200 | |
| 1201 // Now figure out where the args must be stored and how much stack space | |
| 1202 // they require. | |
| 1203 // | |
| 1204 int out_arg_slots; | |
| 1205 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); | |
| 1206 | |
| 1207 // Compute framesize for the wrapper. We need to handlize all oops in | |
| 1208 // incoming registers | |
| 1209 | |
| 1210 // Calculate the total number of stack slots we will need. | |
| 1211 | |
| 1212 // First count the abi requirement plus all of the outgoing args | |
| 1213 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
| 1214 | |
| 1215 // Now the space for the inbound oop handle area | |
| 1216 | |
| 1217 int oop_handle_offset = stack_slots; | |
| 1218 stack_slots += 6*VMRegImpl::slots_per_word; | |
| 1219 | |
| 1220 // Now any space we need for handlizing a klass if static method | |
| 1221 | |
| 1222 int oop_temp_slot_offset = 0; | |
| 1223 int klass_slot_offset = 0; | |
| 1224 int klass_offset = -1; | |
| 1225 int lock_slot_offset = 0; | |
| 1226 bool is_static = false; | |
| 1227 | |
| 1228 if (method->is_static()) { | |
| 1229 klass_slot_offset = stack_slots; | |
| 1230 stack_slots += VMRegImpl::slots_per_word; | |
| 1231 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
| 1232 is_static = true; | |
| 1233 } | |
| 1234 | |
| 1235 // Plus a lock if needed | |
| 1236 | |
| 1237 if (method->is_synchronized()) { | |
| 1238 lock_slot_offset = stack_slots; | |
| 1239 stack_slots += VMRegImpl::slots_per_word; | |
| 1240 } | |
| 1241 | |
| 1242 // Now a place (+2) to save return values or temp during shuffling | |
| 1243 // + 4 for return address (which we own) and saved rbp | |
| 1244 stack_slots += 6; | |
| 1245 | |
| 1246 // Ok The space we have allocated will look like: | |
| 1247 // | |
| 1248 // | |
| 1249 // FP-> | | | |
| 1250 // |---------------------| | |
| 1251 // | 2 slots for moves | | |
| 1252 // |---------------------| | |
| 1253 // | lock box (if sync) | | |
| 1254 // |---------------------| <- lock_slot_offset | |
| 1255 // | klass (if static) | | |
| 1256 // |---------------------| <- klass_slot_offset | |
| 1257 // | oopHandle area | | |
| 1258 // |---------------------| <- oop_handle_offset (6 java arg registers) | |
| 1259 // | outbound memory | | |
| 1260 // | based arguments | | |
| 1261 // | | | |
| 1262 // |---------------------| | |
| 1263 // | | | |
| 1264 // SP-> | out_preserved_slots | | |
| 1265 // | |
| 1266 // | |
| 1267 | |
| 1268 | |
| 1269 // Now compute actual number of stack words we need rounding to make | |
| 1270 // stack properly aligned. | |
|
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1271 stack_slots = round_to(stack_slots, StackAlignmentInSlots); |
| 0 | 1272 |
| 1273 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
| 1274 | |
| 1275 | |
| 1276 // First thing make an ic check to see if we should even be here | |
| 1277 | |
| 1278 // We are free to use all registers as temps without saving them and | |
| 1279 // restoring them except rbp. rbp is the only callee save register | |
| 1280 // as far as the interpreter and the compiler(s) are concerned. | |
| 1281 | |
| 1282 | |
| 1283 const Register ic_reg = rax; | |
| 1284 const Register receiver = j_rarg0; | |
| 1285 | |
| 1286 Label ok; | |
| 1287 Label exception_pending; | |
| 1288 | |
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1289 assert_different_registers(ic_reg, receiver, rscratch1); |
| 0 | 1290 __ verify_oop(receiver); |
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1291 __ load_klass(rscratch1, receiver); |
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1292 __ cmpq(ic_reg, rscratch1); |
| 0 | 1293 __ jcc(Assembler::equal, ok); |
| 1294 | |
| 1295 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 1296 | |
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1297 __ bind(ok); |
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1298 |
| 0 | 1299 // Verified entry point must be aligned |
| 1300 __ align(8); | |
| 1301 | |
| 1302 int vep_offset = ((intptr_t)__ pc()) - start; | |
| 1303 | |
| 1304 // The instruction at the verified entry point must be 5 bytes or longer | |
| 1305 // because it can be patched on the fly by make_non_entrant. The stack bang | |
| 1306 // instruction fits that requirement. | |
| 1307 | |
| 1308 // Generate stack overflow check | |
| 1309 | |
| 1310 if (UseStackBanging) { | |
| 1311 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); | |
| 1312 } else { | |
| 1313 // need a 5 byte instruction to allow MT safe patching to non-entrant | |
| 1314 __ fat_nop(); | |
| 1315 } | |
| 1316 | |
| 1317 // Generate a new frame for the wrapper. | |
| 1318 __ enter(); | |
| 1319 // -2 because return address is already present and so is saved rbp | |
| 304 | 1320 __ subptr(rsp, stack_size - 2*wordSize); |
| 0 | 1321 |
| 1322 // Frame is now completed as far as size and linkage. | |
| 1323 | |
| 1324 int frame_complete = ((intptr_t)__ pc()) - start; | |
| 1325 | |
| 1326 #ifdef ASSERT | |
| 1327 { | |
| 1328 Label L; | |
| 304 | 1329 __ mov(rax, rsp); |
| 605 | 1330 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI) |
| 304 | 1331 __ cmpptr(rax, rsp); |
| 0 | 1332 __ jcc(Assembler::equal, L); |
| 1333 __ stop("improperly aligned stack"); | |
| 1334 __ bind(L); | |
| 1335 } | |
| 1336 #endif /* ASSERT */ | |
| 1337 | |
| 1338 | |
| 1339 // We use r14 as the oop handle for the receiver/klass | |
| 1340 // It is callee save so it survives the call to native | |
| 1341 | |
| 1342 const Register oop_handle_reg = r14; | |
| 1343 | |
| 1344 | |
| 1345 | |
| 1346 // | |
| 1347 // We immediately shuffle the arguments so that any vm call we have to | |
| 1348 // make from here on out (sync slow path, jvmti, etc.) we will have | |
| 1349 // captured the oops from our caller and have a valid oopMap for | |
| 1350 // them. | |
| 1351 | |
| 1352 // ----------------- | |
| 1353 // The Grand Shuffle | |
| 1354 | |
| 1355 // The Java calling convention is either equal (linux) or denser (win64) than the | |
| 1356 // c calling convention. However the because of the jni_env argument the c calling | |
| 1357 // convention always has at least one more (and two for static) arguments than Java. | |
| 1358 // Therefore if we move the args from java -> c backwards then we will never have | |
| 1359 // a register->register conflict and we don't have to build a dependency graph | |
| 1360 // and figure out how to break any cycles. | |
| 1361 // | |
| 1362 | |
| 1363 // Record esp-based slot for receiver on stack for non-static methods | |
| 1364 int receiver_offset = -1; | |
| 1365 | |
| 1366 // This is a trick. We double the stack slots so we can claim | |
| 1367 // the oops in the caller's frame. Since we are sure to have | |
| 1368 // more args than the caller doubling is enough to make | |
| 1369 // sure we can capture all the incoming oop args from the | |
| 1370 // caller. | |
| 1371 // | |
| 1372 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
| 1373 | |
| 1374 // Mark location of rbp (someday) | |
| 1375 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp)); | |
| 1376 | |
| 1377 // Use eax, ebx as temporaries during any memory-memory moves we have to do | |
| 1378 // All inbound args are referenced based on rbp and all outbound args via rsp. | |
| 1379 | |
| 1380 | |
| 1381 #ifdef ASSERT | |
| 1382 bool reg_destroyed[RegisterImpl::number_of_registers]; | |
| 1383 bool freg_destroyed[XMMRegisterImpl::number_of_registers]; | |
| 1384 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { | |
| 1385 reg_destroyed[r] = false; | |
| 1386 } | |
| 1387 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) { | |
| 1388 freg_destroyed[f] = false; | |
| 1389 } | |
| 1390 | |
| 1391 #endif /* ASSERT */ | |
| 1392 | |
| 1393 | |
| 1394 int c_arg = total_c_args - 1; | |
| 1395 for ( int i = total_in_args - 1; i >= 0 ; i--, c_arg-- ) { | |
| 1396 #ifdef ASSERT | |
| 1397 if (in_regs[i].first()->is_Register()) { | |
| 1398 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!"); | |
| 1399 } else if (in_regs[i].first()->is_XMMRegister()) { | |
| 1400 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!"); | |
| 1401 } | |
| 1402 if (out_regs[c_arg].first()->is_Register()) { | |
| 1403 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; | |
| 1404 } else if (out_regs[c_arg].first()->is_XMMRegister()) { | |
| 1405 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; | |
| 1406 } | |
| 1407 #endif /* ASSERT */ | |
| 1408 switch (in_sig_bt[i]) { | |
| 1409 case T_ARRAY: | |
| 1410 case T_OBJECT: | |
| 1411 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], | |
| 1412 ((i == 0) && (!is_static)), | |
| 1413 &receiver_offset); | |
| 1414 break; | |
| 1415 case T_VOID: | |
| 1416 break; | |
| 1417 | |
| 1418 case T_FLOAT: | |
| 1419 float_move(masm, in_regs[i], out_regs[c_arg]); | |
| 1420 break; | |
| 1421 | |
| 1422 case T_DOUBLE: | |
| 1423 assert( i + 1 < total_in_args && | |
| 1424 in_sig_bt[i + 1] == T_VOID && | |
| 1425 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
| 1426 double_move(masm, in_regs[i], out_regs[c_arg]); | |
| 1427 break; | |
| 1428 | |
| 1429 case T_LONG : | |
| 1430 long_move(masm, in_regs[i], out_regs[c_arg]); | |
| 1431 break; | |
| 1432 | |
| 1433 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
| 1434 | |
| 1435 default: | |
| 1436 move32_64(masm, in_regs[i], out_regs[c_arg]); | |
| 1437 } | |
| 1438 } | |
| 1439 | |
| 1440 // point c_arg at the first arg that is already loaded in case we | |
| 1441 // need to spill before we call out | |
| 1442 c_arg++; | |
| 1443 | |
| 1444 // Pre-load a static method's oop into r14. Used both by locking code and | |
| 1445 // the normal JNI call code. | |
| 1446 if (method->is_static()) { | |
| 1447 | |
| 1448 // load oop into a register | |
| 1449 __ movoop(oop_handle_reg, JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror())); | |
| 1450 | |
| 1451 // Now handlize the static class mirror it's known not-null. | |
| 304 | 1452 __ movptr(Address(rsp, klass_offset), oop_handle_reg); |
| 0 | 1453 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
| 1454 | |
| 1455 // Now get the handle | |
| 304 | 1456 __ lea(oop_handle_reg, Address(rsp, klass_offset)); |
| 0 | 1457 // store the klass handle as second argument |
| 304 | 1458 __ movptr(c_rarg1, oop_handle_reg); |
| 0 | 1459 // and protect the arg if we must spill |
| 1460 c_arg--; | |
| 1461 } | |
| 1462 | |
| 1463 // Change state to native (we save the return address in the thread, since it might not | |
| 1464 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() | |
| 1465 // points into the right code segment. It does not have to be the correct return pc. | |
| 1466 // We use the same pc/oopMap repeatedly when we call out | |
| 1467 | |
| 1468 intptr_t the_pc = (intptr_t) __ pc(); | |
| 1469 oop_maps->add_gc_map(the_pc - start, map); | |
| 1470 | |
| 1471 __ set_last_Java_frame(rsp, noreg, (address)the_pc); | |
| 1472 | |
| 1473 | |
| 1474 // We have all of the arguments setup at this point. We must not touch any register | |
| 1475 // argument registers at this point (what if we save/restore them there are no oop? | |
| 1476 | |
| 1477 { | |
| 1478 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
| 1479 // protect the args we've loaded | |
| 1480 save_args(masm, total_c_args, c_arg, out_regs); | |
| 1481 __ movoop(c_rarg1, JNIHandles::make_local(method())); | |
| 1482 __ call_VM_leaf( | |
| 1483 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
| 1484 r15_thread, c_rarg1); | |
| 1485 restore_args(masm, total_c_args, c_arg, out_regs); | |
| 1486 } | |
| 1487 | |
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1488 // RedefineClasses() tracing support for obsolete method entry |
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1489 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
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1490 // protect the args we've loaded |
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1491 save_args(masm, total_c_args, c_arg, out_regs); |
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1492 __ movoop(c_rarg1, JNIHandles::make_local(method())); |
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1493 __ call_VM_leaf( |
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1494 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
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1495 r15_thread, c_rarg1); |
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1496 restore_args(masm, total_c_args, c_arg, out_regs); |
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1497 } |
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1498 |
| 0 | 1499 // Lock a synchronized method |
| 1500 | |
| 1501 // Register definitions used by locking and unlocking | |
| 1502 | |
| 1503 const Register swap_reg = rax; // Must use rax for cmpxchg instruction | |
| 1504 const Register obj_reg = rbx; // Will contain the oop | |
| 1505 const Register lock_reg = r13; // Address of compiler lock object (BasicLock) | |
| 1506 const Register old_hdr = r13; // value of old header at unlock time | |
| 1507 | |
| 1508 Label slow_path_lock; | |
| 1509 Label lock_done; | |
| 1510 | |
| 1511 if (method->is_synchronized()) { | |
| 1512 | |
| 1513 | |
| 1514 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); | |
| 1515 | |
| 1516 // Get the handle (the 2nd argument) | |
| 304 | 1517 __ mov(oop_handle_reg, c_rarg1); |
| 0 | 1518 |
| 1519 // Get address of the box | |
| 1520 | |
| 304 | 1521 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
| 0 | 1522 |
| 1523 // Load the oop from the handle | |
| 304 | 1524 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
| 0 | 1525 |
| 1526 if (UseBiasedLocking) { | |
| 1527 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock); | |
| 1528 } | |
| 1529 | |
| 1530 // Load immediate 1 into swap_reg %rax | |
| 1531 __ movl(swap_reg, 1); | |
| 1532 | |
| 1533 // Load (object->mark() | 1) into swap_reg %rax | |
| 304 | 1534 __ orptr(swap_reg, Address(obj_reg, 0)); |
| 0 | 1535 |
| 1536 // Save (object->mark() | 1) into BasicLock's displaced header | |
| 304 | 1537 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
| 0 | 1538 |
| 1539 if (os::is_MP()) { | |
| 1540 __ lock(); | |
| 1541 } | |
| 1542 | |
| 1543 // src -> dest iff dest == rax else rax <- dest | |
| 304 | 1544 __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); |
| 0 | 1545 __ jcc(Assembler::equal, lock_done); |
| 1546 | |
| 1547 // Hmm should this move to the slow path code area??? | |
| 1548 | |
| 1549 // Test if the oopMark is an obvious stack pointer, i.e., | |
| 1550 // 1) (mark & 3) == 0, and | |
| 1551 // 2) rsp <= mark < mark + os::pagesize() | |
| 1552 // These 3 tests can be done by evaluating the following | |
| 1553 // expression: ((mark - rsp) & (3 - os::vm_page_size())), | |
| 1554 // assuming both stack pointer and pagesize have their | |
| 1555 // least significant 2 bits clear. | |
| 1556 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg | |
| 1557 | |
| 304 | 1558 __ subptr(swap_reg, rsp); |
| 1559 __ andptr(swap_reg, 3 - os::vm_page_size()); | |
| 0 | 1560 |
| 1561 // Save the test result, for recursive case, the result is zero | |
| 304 | 1562 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
| 0 | 1563 __ jcc(Assembler::notEqual, slow_path_lock); |
| 1564 | |
| 1565 // Slow path will re-enter here | |
| 1566 | |
| 1567 __ bind(lock_done); | |
| 1568 } | |
| 1569 | |
| 1570 | |
| 1571 // Finally just about ready to make the JNI call | |
| 1572 | |
| 1573 | |
| 1574 // get JNIEnv* which is first argument to native | |
| 1575 | |
| 304 | 1576 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset()))); |
| 0 | 1577 |
| 1578 // Now set thread in native | |
| 304 | 1579 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native); |
| 0 | 1580 |
| 1581 __ call(RuntimeAddress(method->native_function())); | |
| 1582 | |
| 1583 // Either restore the MXCSR register after returning from the JNI Call | |
| 1584 // or verify that it wasn't changed. | |
| 1585 if (RestoreMXCSROnJNICalls) { | |
| 304 | 1586 __ ldmxcsr(ExternalAddress(StubRoutines::x86::mxcsr_std())); |
| 0 | 1587 |
| 1588 } | |
| 1589 else if (CheckJNICalls ) { | |
| 304 | 1590 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::verify_mxcsr_entry()))); |
| 0 | 1591 } |
| 1592 | |
| 1593 | |
| 1594 // Unpack native results. | |
| 1595 switch (ret_type) { | |
| 1596 case T_BOOLEAN: __ c2bool(rax); break; | |
| 1597 case T_CHAR : __ movzwl(rax, rax); break; | |
| 1598 case T_BYTE : __ sign_extend_byte (rax); break; | |
| 1599 case T_SHORT : __ sign_extend_short(rax); break; | |
| 1600 case T_INT : /* nothing to do */ break; | |
| 1601 case T_DOUBLE : | |
| 1602 case T_FLOAT : | |
| 1603 // Result is in xmm0 we'll save as needed | |
| 1604 break; | |
| 1605 case T_ARRAY: // Really a handle | |
| 1606 case T_OBJECT: // Really a handle | |
| 1607 break; // can't de-handlize until after safepoint check | |
| 1608 case T_VOID: break; | |
| 1609 case T_LONG: break; | |
| 1610 default : ShouldNotReachHere(); | |
| 1611 } | |
| 1612 | |
| 1613 // Switch thread to "native transition" state before reading the synchronization state. | |
| 1614 // This additional state is necessary because reading and testing the synchronization | |
| 1615 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
| 1616 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
| 1617 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
| 1618 // Thread A is resumed to finish this native method, but doesn't block here since it | |
| 1619 // didn't see any synchronization is progress, and escapes. | |
| 304 | 1620 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans); |
| 0 | 1621 |
| 1622 if(os::is_MP()) { | |
| 1623 if (UseMembar) { | |
| 1624 // Force this write out before the read below | |
| 1625 __ membar(Assembler::Membar_mask_bits( | |
| 1626 Assembler::LoadLoad | Assembler::LoadStore | | |
| 1627 Assembler::StoreLoad | Assembler::StoreStore)); | |
| 1628 } else { | |
| 1629 // Write serialization page so VM thread can do a pseudo remote membar. | |
| 1630 // We use the current thread pointer to calculate a thread specific | |
| 1631 // offset to write to within the page. This minimizes bus traffic | |
| 1632 // due to cache line collision. | |
| 1633 __ serialize_memory(r15_thread, rcx); | |
| 1634 } | |
| 1635 } | |
| 1636 | |
| 1637 | |
| 1638 // check for safepoint operation in progress and/or pending suspend requests | |
| 1639 { | |
| 1640 Label Continue; | |
| 1641 | |
| 1642 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), | |
| 1643 SafepointSynchronize::_not_synchronized); | |
| 1644 | |
| 1645 Label L; | |
| 1646 __ jcc(Assembler::notEqual, L); | |
| 1647 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0); | |
| 1648 __ jcc(Assembler::equal, Continue); | |
| 1649 __ bind(L); | |
| 1650 | |
| 1651 // Don't use call_VM as it will see a possible pending exception and forward it | |
| 1652 // and never return here preventing us from clearing _last_native_pc down below. | |
| 1653 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are | |
| 1654 // preserved and correspond to the bcp/locals pointers. So we do a runtime call | |
| 1655 // by hand. | |
| 1656 // | |
| 1657 save_native_result(masm, ret_type, stack_slots); | |
| 304 | 1658 __ mov(c_rarg0, r15_thread); |
| 1659 __ mov(r12, rsp); // remember sp | |
| 1660 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
| 1661 __ andptr(rsp, -16); // align stack as required by ABI | |
| 0 | 1662 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans))); |
| 304 | 1663 __ mov(rsp, r12); // restore sp |
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1664 __ reinit_heapbase(); |
| 0 | 1665 // Restore any method result value |
| 1666 restore_native_result(masm, ret_type, stack_slots); | |
| 1667 __ bind(Continue); | |
| 1668 } | |
| 1669 | |
| 1670 // change thread state | |
| 1671 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java); | |
| 1672 | |
| 1673 Label reguard; | |
| 1674 Label reguard_done; | |
| 1675 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); | |
| 1676 __ jcc(Assembler::equal, reguard); | |
| 1677 __ bind(reguard_done); | |
| 1678 | |
| 1679 // native result if any is live | |
| 1680 | |
| 1681 // Unlock | |
| 1682 Label unlock_done; | |
| 1683 Label slow_path_unlock; | |
| 1684 if (method->is_synchronized()) { | |
| 1685 | |
| 1686 // Get locked oop from the handle we passed to jni | |
| 304 | 1687 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
| 0 | 1688 |
| 1689 Label done; | |
| 1690 | |
| 1691 if (UseBiasedLocking) { | |
| 1692 __ biased_locking_exit(obj_reg, old_hdr, done); | |
| 1693 } | |
| 1694 | |
| 1695 // Simple recursive lock? | |
| 1696 | |
| 304 | 1697 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD); |
| 0 | 1698 __ jcc(Assembler::equal, done); |
| 1699 | |
| 1700 // Must save rax if if it is live now because cmpxchg must use it | |
| 1701 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
| 1702 save_native_result(masm, ret_type, stack_slots); | |
| 1703 } | |
| 1704 | |
| 1705 | |
| 1706 // get address of the stack lock | |
| 304 | 1707 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
| 0 | 1708 // get old displaced header |
| 304 | 1709 __ movptr(old_hdr, Address(rax, 0)); |
| 0 | 1710 |
| 1711 // Atomic swap old header if oop still contains the stack lock | |
| 1712 if (os::is_MP()) { | |
| 1713 __ lock(); | |
| 1714 } | |
| 304 | 1715 __ cmpxchgptr(old_hdr, Address(obj_reg, 0)); |
| 0 | 1716 __ jcc(Assembler::notEqual, slow_path_unlock); |
| 1717 | |
| 1718 // slow path re-enters here | |
| 1719 __ bind(unlock_done); | |
| 1720 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
| 1721 restore_native_result(masm, ret_type, stack_slots); | |
| 1722 } | |
| 1723 | |
| 1724 __ bind(done); | |
| 1725 | |
| 1726 } | |
| 1727 { | |
| 1728 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
| 1729 save_native_result(masm, ret_type, stack_slots); | |
| 1730 __ movoop(c_rarg1, JNIHandles::make_local(method())); | |
| 1731 __ call_VM_leaf( | |
| 1732 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
| 1733 r15_thread, c_rarg1); | |
| 1734 restore_native_result(masm, ret_type, stack_slots); | |
| 1735 } | |
| 1736 | |
| 1737 __ reset_last_Java_frame(false, true); | |
| 1738 | |
| 1739 // Unpack oop result | |
| 1740 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
| 1741 Label L; | |
| 304 | 1742 __ testptr(rax, rax); |
| 0 | 1743 __ jcc(Assembler::zero, L); |
| 304 | 1744 __ movptr(rax, Address(rax, 0)); |
| 0 | 1745 __ bind(L); |
| 1746 __ verify_oop(rax); | |
| 1747 } | |
| 1748 | |
| 1749 // reset handle block | |
| 304 | 1750 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset())); |
| 1751 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD); | |
| 0 | 1752 |
| 1753 // pop our frame | |
| 1754 | |
| 1755 __ leave(); | |
| 1756 | |
| 1757 // Any exception pending? | |
| 304 | 1758 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
| 0 | 1759 __ jcc(Assembler::notEqual, exception_pending); |
| 1760 | |
| 1761 // Return | |
| 1762 | |
| 1763 __ ret(0); | |
| 1764 | |
| 1765 // Unexpected paths are out of line and go here | |
| 1766 | |
| 1767 // forward the exception | |
| 1768 __ bind(exception_pending); | |
| 1769 | |
| 1770 // and forward the exception | |
| 1771 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
| 1772 | |
| 1773 | |
| 1774 // Slow path locking & unlocking | |
| 1775 if (method->is_synchronized()) { | |
| 1776 | |
| 1777 // BEGIN Slow path lock | |
| 1778 __ bind(slow_path_lock); | |
| 1779 | |
| 1780 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM | |
| 1781 // args are (oop obj, BasicLock* lock, JavaThread* thread) | |
| 1782 | |
| 1783 // protect the args we've loaded | |
| 1784 save_args(masm, total_c_args, c_arg, out_regs); | |
| 1785 | |
| 304 | 1786 __ mov(c_rarg0, obj_reg); |
| 1787 __ mov(c_rarg1, lock_reg); | |
| 1788 __ mov(c_rarg2, r15_thread); | |
| 0 | 1789 |
| 1790 // Not a leaf but we have last_Java_frame setup as we want | |
| 1791 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3); | |
| 1792 restore_args(masm, total_c_args, c_arg, out_regs); | |
| 1793 | |
| 1794 #ifdef ASSERT | |
| 1795 { Label L; | |
| 304 | 1796 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
| 0 | 1797 __ jcc(Assembler::equal, L); |
| 1798 __ stop("no pending exception allowed on exit from monitorenter"); | |
| 1799 __ bind(L); | |
| 1800 } | |
| 1801 #endif | |
| 1802 __ jmp(lock_done); | |
| 1803 | |
| 1804 // END Slow path lock | |
| 1805 | |
| 1806 // BEGIN Slow path unlock | |
| 1807 __ bind(slow_path_unlock); | |
| 1808 | |
| 1809 // If we haven't already saved the native result we must save it now as xmm registers | |
| 1810 // are still exposed. | |
| 1811 | |
| 1812 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
| 1813 save_native_result(masm, ret_type, stack_slots); | |
| 1814 } | |
| 1815 | |
| 304 | 1816 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
| 1817 | |
| 1818 __ mov(c_rarg0, obj_reg); | |
| 1819 __ mov(r12, rsp); // remember sp | |
| 1820 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
| 1821 __ andptr(rsp, -16); // align stack as required by ABI | |
| 0 | 1822 |
| 1823 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) | |
| 1824 // NOTE that obj_reg == rbx currently | |
| 304 | 1825 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset()))); |
| 1826 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); | |
| 0 | 1827 |
| 1828 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); | |
| 304 | 1829 __ mov(rsp, r12); // restore sp |
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1830 __ reinit_heapbase(); |
| 0 | 1831 #ifdef ASSERT |
| 1832 { | |
| 1833 Label L; | |
| 304 | 1834 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); |
| 0 | 1835 __ jcc(Assembler::equal, L); |
| 1836 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); | |
| 1837 __ bind(L); | |
| 1838 } | |
| 1839 #endif /* ASSERT */ | |
| 1840 | |
| 304 | 1841 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx); |
| 0 | 1842 |
| 1843 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
| 1844 restore_native_result(masm, ret_type, stack_slots); | |
| 1845 } | |
| 1846 __ jmp(unlock_done); | |
| 1847 | |
| 1848 // END Slow path unlock | |
| 1849 | |
| 1850 } // synchronized | |
| 1851 | |
| 1852 // SLOW PATH Reguard the stack if needed | |
| 1853 | |
| 1854 __ bind(reguard); | |
| 1855 save_native_result(masm, ret_type, stack_slots); | |
| 304 | 1856 __ mov(r12, rsp); // remember sp |
| 1857 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
| 1858 __ andptr(rsp, -16); // align stack as required by ABI | |
| 0 | 1859 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); |
| 304 | 1860 __ mov(rsp, r12); // restore sp |
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1861 __ reinit_heapbase(); |
| 0 | 1862 restore_native_result(masm, ret_type, stack_slots); |
| 1863 // and continue | |
| 1864 __ jmp(reguard_done); | |
| 1865 | |
| 1866 | |
| 1867 | |
| 1868 __ flush(); | |
| 1869 | |
| 1870 nmethod *nm = nmethod::new_native_nmethod(method, | |
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1871 compile_id, |
| 0 | 1872 masm->code(), |
| 1873 vep_offset, | |
| 1874 frame_complete, | |
| 1875 stack_slots / VMRegImpl::slots_per_word, | |
| 1876 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
| 1877 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), | |
| 1878 oop_maps); | |
| 1879 return nm; | |
| 1880 | |
| 1881 } | |
| 1882 | |
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1883 #ifdef HAVE_DTRACE_H |
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1884 // --------------------------------------------------------------------------- |
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1885 // Generate a dtrace nmethod for a given signature. The method takes arguments |
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1886 // in the Java compiled code convention, marshals them to the native |
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1887 // abi and then leaves nops at the position you would expect to call a native |
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1888 // function. When the probe is enabled the nops are replaced with a trap |
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1889 // instruction that dtrace inserts and the trace will cause a notification |
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1890 // to dtrace. |
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1891 // |
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1892 // The probes are only able to take primitive types and java/lang/String as |
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1893 // arguments. No other java types are allowed. Strings are converted to utf8 |
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1894 // strings so that from dtrace point of view java strings are converted to C |
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1895 // strings. There is an arbitrary fixed limit on the total space that a method |
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1896 // can use for converting the strings. (256 chars per string in the signature). |
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1897 // So any java string larger then this is truncated. |
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1898 |
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1899 static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 }; |
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1900 static bool offsets_initialized = false; |
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1901 |
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1902 |
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1903 nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm, |
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1904 methodHandle method) { |
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1905 |
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1906 |
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1907 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
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1908 // be single threaded in this method. |
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1909 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
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1910 |
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1911 if (!offsets_initialized) { |
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1912 fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize; |
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1913 fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize; |
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1914 fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize; |
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1915 fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize; |
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1916 fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize; |
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1917 fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize; |
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1918 |
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1919 fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize; |
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1920 fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize; |
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1921 fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize; |
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1922 fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize; |
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1923 fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize; |
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1924 fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize; |
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1925 fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize; |
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1926 fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize; |
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1927 |
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1928 offsets_initialized = true; |
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1929 } |
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1930 // Fill in the signature array, for the calling-convention call. |
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1931 int total_args_passed = method->size_of_parameters(); |
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1932 |
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1933 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
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1934 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
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1935 |
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1936 // The signature we are going to use for the trap that dtrace will see |
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1937 // java/lang/String is converted. We drop "this" and any other object |
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1938 // is converted to NULL. (A one-slot java/lang/Long object reference |
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1939 // is converted to a two-slot long, which is why we double the allocation). |
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1940 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
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1941 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
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1942 |
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1943 int i=0; |
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1944 int total_strings = 0; |
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1945 int first_arg_to_pass = 0; |
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1946 int total_c_args = 0; |
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1947 |
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1948 // Skip the receiver as dtrace doesn't want to see it |
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1949 if( !method->is_static() ) { |
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1950 in_sig_bt[i++] = T_OBJECT; |
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1951 first_arg_to_pass = 1; |
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1952 } |
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1953 |
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1954 // We need to convert the java args to where a native (non-jni) function |
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1955 // would expect them. To figure out where they go we convert the java |
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1956 // signature to a C signature. |
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1957 |
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1958 SignatureStream ss(method->signature()); |
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1959 for ( ; !ss.at_return_type(); ss.next()) { |
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1960 BasicType bt = ss.type(); |
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1961 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
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1962 out_sig_bt[total_c_args++] = bt; |
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1963 if( bt == T_OBJECT) { |
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2177
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1964 Symbol* s = ss.as_symbol_or_null(); // symbol is created |
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1965 if (s == vmSymbols::java_lang_String()) { |
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1966 total_strings++; |
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1967 out_sig_bt[total_c_args-1] = T_ADDRESS; |
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1968 } else if (s == vmSymbols::java_lang_Boolean() || |
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1969 s == vmSymbols::java_lang_Character() || |
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1970 s == vmSymbols::java_lang_Byte() || |
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1971 s == vmSymbols::java_lang_Short() || |
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1972 s == vmSymbols::java_lang_Integer() || |
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1973 s == vmSymbols::java_lang_Float()) { |
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1974 out_sig_bt[total_c_args-1] = T_INT; |
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1975 } else if (s == vmSymbols::java_lang_Long() || |
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1976 s == vmSymbols::java_lang_Double()) { |
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1977 out_sig_bt[total_c_args-1] = T_LONG; |
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1978 out_sig_bt[total_c_args++] = T_VOID; |
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1979 } |
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1980 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
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1981 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
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1982 // We convert double to long |
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1983 out_sig_bt[total_c_args-1] = T_LONG; |
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1984 out_sig_bt[total_c_args++] = T_VOID; |
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1985 } else if ( bt == T_FLOAT) { |
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1986 // We convert float to int |
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1987 out_sig_bt[total_c_args-1] = T_INT; |
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1988 } |
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1989 } |
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1990 |
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1991 assert(i==total_args_passed, "validly parsed signature"); |
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1992 |
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1993 // Now get the compiled-Java layout as input arguments |
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1994 int comp_args_on_stack; |
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1995 comp_args_on_stack = SharedRuntime::java_calling_convention( |
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1996 in_sig_bt, in_regs, total_args_passed, false); |
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1997 |
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1998 // Now figure out where the args must be stored and how much stack space |
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1999 // they require (neglecting out_preserve_stack_slots but space for storing |
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2000 // the 1st six register arguments). It's weird see int_stk_helper. |
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2001 |
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2002 int out_arg_slots; |
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2003 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); |
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2004 |
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2005 // Calculate the total number of stack slots we will need. |
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2006 |
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2007 // First count the abi requirement plus all of the outgoing args |
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2008 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
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2009 |
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2010 // Now space for the string(s) we must convert |
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2011 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1); |
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2012 for (i = 0; i < total_strings ; i++) { |
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2013 string_locs[i] = stack_slots; |
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2014 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size; |
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2015 } |
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2016 |
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2017 // Plus the temps we might need to juggle register args |
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2018 // regs take two slots each |
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2019 stack_slots += (Argument::n_int_register_parameters_c + |
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2020 Argument::n_float_register_parameters_c) * 2; |
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2021 |
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2022 |
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2023 // + 4 for return address (which we own) and saved rbp, |
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2024 |
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2025 stack_slots += 4; |
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2026 |
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2027 // Ok The space we have allocated will look like: |
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2028 // |
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2029 // |
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2030 // FP-> | | |
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2031 // |---------------------| |
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2032 // | string[n] | |
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2033 // |---------------------| <- string_locs[n] |
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2034 // | string[n-1] | |
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2035 // |---------------------| <- string_locs[n-1] |
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2036 // | ... | |
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2037 // | ... | |
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2038 // |---------------------| <- string_locs[1] |
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2039 // | string[0] | |
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2040 // |---------------------| <- string_locs[0] |
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2041 // | outbound memory | |
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2042 // | based arguments | |
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2043 // | | |
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2044 // |---------------------| |
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2045 // | | |
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2046 // SP-> | out_preserved_slots | |
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2047 // |
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2048 // |
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2049 |
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2050 // Now compute actual number of stack words we need rounding to make |
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2051 // stack properly aligned. |
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2052 stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word); |
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2053 |
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2054 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
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2055 |
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2056 intptr_t start = (intptr_t)__ pc(); |
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2057 |
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2058 // First thing make an ic check to see if we should even be here |
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2059 |
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2060 // We are free to use all registers as temps without saving them and |
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2061 // restoring them except rbp. rbp, is the only callee save register |
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2062 // as far as the interpreter and the compiler(s) are concerned. |
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2063 |
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2064 const Register ic_reg = rax; |
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2065 const Register receiver = rcx; |
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2066 Label hit; |
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2067 Label exception_pending; |
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2068 |
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2069 |
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2070 __ verify_oop(receiver); |
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2071 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
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2072 __ jcc(Assembler::equal, hit); |
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2073 |
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2074 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); |
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2075 |
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2076 // verified entry must be aligned for code patching. |
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2077 // and the first 5 bytes must be in the same cache line |
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2078 // if we align at 8 then we will be sure 5 bytes are in the same line |
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2079 __ align(8); |
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2080 |
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2081 __ bind(hit); |
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2082 |
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2083 int vep_offset = ((intptr_t)__ pc()) - start; |
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2084 |
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2085 |
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2086 // The instruction at the verified entry point must be 5 bytes or longer |
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2087 // because it can be patched on the fly by make_non_entrant. The stack bang |
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2088 // instruction fits that requirement. |
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2089 |
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2090 // Generate stack overflow check |
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2091 |
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2092 if (UseStackBanging) { |
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2093 if (stack_size <= StackShadowPages*os::vm_page_size()) { |
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2094 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); |
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2095 } else { |
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2096 __ movl(rax, stack_size); |
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2097 __ bang_stack_size(rax, rbx); |
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2098 } |
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2099 } else { |
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2100 // need a 5 byte instruction to allow MT safe patching to non-entrant |
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2101 __ fat_nop(); |
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2102 } |
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2103 |
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2104 assert(((uintptr_t)__ pc() - start - vep_offset) >= 5, |
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2105 "valid size for make_non_entrant"); |
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2106 |
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2107 // Generate a new frame for the wrapper. |
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2108 __ enter(); |
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2109 |
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2110 // -4 because return address is already present and so is saved rbp, |
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2111 if (stack_size - 2*wordSize != 0) { |
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2112 __ subq(rsp, stack_size - 2*wordSize); |
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2113 } |
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2114 |
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2115 // Frame is now completed as far a size and linkage. |
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2116 |
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2117 int frame_complete = ((intptr_t)__ pc()) - start; |
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2118 |
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2119 int c_arg, j_arg; |
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2120 |
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2121 // State of input register args |
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2122 |
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2123 bool live[ConcreteRegisterImpl::number_of_registers]; |
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2124 |
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2125 live[j_rarg0->as_VMReg()->value()] = false; |
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2126 live[j_rarg1->as_VMReg()->value()] = false; |
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2127 live[j_rarg2->as_VMReg()->value()] = false; |
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2128 live[j_rarg3->as_VMReg()->value()] = false; |
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2129 live[j_rarg4->as_VMReg()->value()] = false; |
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2130 live[j_rarg5->as_VMReg()->value()] = false; |
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2131 |
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2132 live[j_farg0->as_VMReg()->value()] = false; |
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2133 live[j_farg1->as_VMReg()->value()] = false; |
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2134 live[j_farg2->as_VMReg()->value()] = false; |
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2135 live[j_farg3->as_VMReg()->value()] = false; |
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2136 live[j_farg4->as_VMReg()->value()] = false; |
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2137 live[j_farg5->as_VMReg()->value()] = false; |
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2138 live[j_farg6->as_VMReg()->value()] = false; |
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2139 live[j_farg7->as_VMReg()->value()] = false; |
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2140 |
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2141 |
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2142 bool rax_is_zero = false; |
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2143 |
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2144 // All args (except strings) destined for the stack are moved first |
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2145 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2146 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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2147 VMRegPair src = in_regs[j_arg]; |
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2148 VMRegPair dst = out_regs[c_arg]; |
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2149 |
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2150 // Get the real reg value or a dummy (rsp) |
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2151 |
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2152 int src_reg = src.first()->is_reg() ? |
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2153 src.first()->value() : |
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2154 rsp->as_VMReg()->value(); |
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2155 |
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2156 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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2157 (in_sig_bt[j_arg] == T_OBJECT && |
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2158 out_sig_bt[c_arg] != T_INT && |
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2159 out_sig_bt[c_arg] != T_ADDRESS && |
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2160 out_sig_bt[c_arg] != T_LONG); |
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2161 |
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2162 live[src_reg] = !useless; |
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2163 |
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2164 if (dst.first()->is_stack()) { |
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2165 |
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2166 // Even though a string arg in a register is still live after this loop |
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2167 // after the string conversion loop (next) it will be dead so we take |
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2168 // advantage of that now for simpler code to manage live. |
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2169 |
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2170 live[src_reg] = false; |
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2171 switch (in_sig_bt[j_arg]) { |
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|
2172 |
|
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2173 case T_ARRAY: |
|
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2174 case T_OBJECT: |
|
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|
2175 { |
|
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2176 Address stack_dst(rsp, reg2offset_out(dst.first())); |
|
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|
2177 |
|
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2178 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
|
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2179 // need to unbox a one-word value |
|
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2180 Register in_reg = rax; |
|
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2181 if ( src.first()->is_reg() ) { |
|
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2182 in_reg = src.first()->as_Register(); |
|
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2183 } else { |
|
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2184 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
|
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2185 rax_is_zero = false; |
|
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2186 } |
|
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|
2187 Label skipUnbox; |
|
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2188 __ movptr(Address(rsp, reg2offset_out(dst.first())), |
|
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2189 (int32_t)NULL_WORD); |
|
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2190 __ testq(in_reg, in_reg); |
|
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2191 __ jcc(Assembler::zero, skipUnbox); |
|
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2192 |
|
165
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
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|
2193 BasicType bt = out_sig_bt[c_arg]; |
|
437d03ea40b1
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|
2194 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
|
116
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2195 Address src1(in_reg, box_offset); |
|
165
437d03ea40b1
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2196 if ( bt == T_LONG ) { |
|
116
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2197 __ movq(in_reg, src1); |
|
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2198 __ movq(stack_dst, in_reg); |
|
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2199 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
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2200 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
|
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2201 } else { |
|
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|
2202 __ movl(in_reg, src1); |
|
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2203 __ movl(stack_dst, in_reg); |
|
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|
2204 } |
|
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|
2205 |
|
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|
2206 __ bind(skipUnbox); |
|
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|
2207 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
|
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2208 // Convert the arg to NULL |
|
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|
2209 if (!rax_is_zero) { |
|
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|
2210 __ xorq(rax, rax); |
|
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|
2211 rax_is_zero = true; |
|
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|
2212 } |
|
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|
2213 __ movq(stack_dst, rax); |
|
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|
2214 } |
|
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|
2215 } |
|
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|
2216 break; |
|
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113
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|
2217 |
|
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|
2218 case T_VOID: |
|
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|
2219 break; |
|
018d5b58dd4f
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kamg
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113
diff
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|
2220 |
|
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|
2221 case T_FLOAT: |
|
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|
2222 // This does the right thing since we know it is destined for the |
|
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|
2223 // stack |
|
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|
2224 float_move(masm, src, dst); |
|
018d5b58dd4f
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kamg
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113
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|
2225 break; |
|
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kamg
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113
diff
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|
2226 |
|
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|
2227 case T_DOUBLE: |
|
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|
2228 // This does the right thing since we know it is destined for the |
|
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|
2229 // stack |
|
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|
2230 double_move(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
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|
2231 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2232 |
|
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113
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|
2233 case T_LONG : |
|
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|
2234 long_move(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
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|
2235 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2236 |
|
018d5b58dd4f
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113
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|
2237 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
|
018d5b58dd4f
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kamg
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113
diff
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|
2238 |
|
018d5b58dd4f
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kamg
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113
diff
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|
2239 default: |
|
018d5b58dd4f
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kamg
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|
2240 move32_64(masm, src, dst); |
|
018d5b58dd4f
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kamg
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113
diff
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|
2241 } |
|
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kamg
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113
diff
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|
2242 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2243 |
|
018d5b58dd4f
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kamg
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113
diff
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|
2244 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2245 |
|
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kamg
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113
diff
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|
2246 // If we have any strings we must store any register based arg to the stack |
|
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kamg
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|
2247 // This includes any still live xmm registers too. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2248 |
|
018d5b58dd4f
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113
diff
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|
2249 int sid = 0; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2250 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2251 if (total_strings > 0 ) { |
|
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2252 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
|
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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|
2253 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
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|
2254 VMRegPair src = in_regs[j_arg]; |
|
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kamg
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|
2255 VMRegPair dst = out_regs[c_arg]; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2256 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2257 if (src.first()->is_reg()) { |
|
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|
2258 Address src_tmp(rbp, fp_offset[src.first()->value()]); |
|
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kamg
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|
2259 |
|
018d5b58dd4f
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kamg
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113
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|
2260 // string oops were left untouched by the previous loop even if the |
|
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kamg
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113
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|
2261 // eventual (converted) arg is destined for the stack so park them |
|
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|
2262 // away now (except for first) |
|
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kamg
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113
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|
2263 |
|
018d5b58dd4f
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|
2264 if (out_sig_bt[c_arg] == T_ADDRESS) { |
|
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|
2265 Address utf8_addr = Address( |
|
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|
2266 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
|
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|
2267 if (sid != 1) { |
|
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113
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|
2268 // The first string arg won't be killed until after the utf8 |
|
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kamg
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113
diff
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|
2269 // conversion |
|
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113
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|
2270 __ movq(utf8_addr, src.first()->as_Register()); |
|
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kamg
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113
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|
2271 } |
|
018d5b58dd4f
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kamg
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|
2272 } else if (dst.first()->is_reg()) { |
|
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|
2273 if (in_sig_bt[j_arg] == T_FLOAT || in_sig_bt[j_arg] == T_DOUBLE) { |
|
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|
2274 |
|
018d5b58dd4f
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113
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|
2275 // Convert the xmm register to an int and store it in the reserved |
|
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113
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|
2276 // location for the eventual c register arg |
|
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|
2277 XMMRegister f = src.first()->as_XMMRegister(); |
|
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kamg
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|
2278 if (in_sig_bt[j_arg] == T_FLOAT) { |
|
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|
2279 __ movflt(src_tmp, f); |
|
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|
2280 } else { |
|
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|
2281 __ movdbl(src_tmp, f); |
|
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kamg
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113
diff
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|
2282 } |
|
018d5b58dd4f
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kamg
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|
2283 } else { |
|
018d5b58dd4f
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|
2284 // If the arg is an oop type we don't support don't bother to store |
|
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|
2285 // it remember string was handled above. |
|
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|
2286 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
|
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2287 (in_sig_bt[j_arg] == T_OBJECT && |
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2288 out_sig_bt[c_arg] != T_INT && |
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2289 out_sig_bt[c_arg] != T_LONG); |
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2290 |
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2291 if (!useless) { |
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2292 __ movq(src_tmp, src.first()->as_Register()); |
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2293 } |
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2294 } |
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2295 } |
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2296 } |
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2297 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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2298 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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2299 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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2300 } |
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2301 } |
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2302 |
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2303 // Now that the volatile registers are safe, convert all the strings |
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2304 sid = 0; |
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2305 |
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2306 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2307 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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2308 if (out_sig_bt[c_arg] == T_ADDRESS) { |
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2309 // It's a string |
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2310 Address utf8_addr = Address( |
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2311 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
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2312 // The first string we find might still be in the original java arg |
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2313 // register |
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2314 |
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2315 VMReg src = in_regs[j_arg].first(); |
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2316 |
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2317 // We will need to eventually save the final argument to the trap |
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2318 // in the von-volatile location dedicated to src. This is the offset |
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2319 // from fp we will use. |
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2320 int src_off = src->is_reg() ? |
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2321 fp_offset[src->value()] : reg2offset_in(src); |
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2322 |
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2323 // This is where the argument will eventually reside |
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2324 VMRegPair dst = out_regs[c_arg]; |
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2325 |
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2326 if (src->is_reg()) { |
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2327 if (sid == 1) { |
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2328 __ movq(c_rarg0, src->as_Register()); |
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2329 } else { |
|
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2330 __ movq(c_rarg0, utf8_addr); |
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2331 } |
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2332 } else { |
|
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2333 // arg is still in the original location |
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2334 __ movq(c_rarg0, Address(rbp, reg2offset_in(src))); |
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2335 } |
|
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2336 Label done, convert; |
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2337 |
|
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2338 // see if the oop is NULL |
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2339 __ testq(c_rarg0, c_rarg0); |
|
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2340 __ jcc(Assembler::notEqual, convert); |
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2341 |
|
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2342 if (dst.first()->is_reg()) { |
|
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2343 // Save the ptr to utf string in the origina src loc or the tmp |
|
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2344 // dedicated to it |
|
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2345 __ movq(Address(rbp, src_off), c_rarg0); |
|
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2346 } else { |
|
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2347 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg0); |
|
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2348 } |
|
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2349 __ jmp(done); |
|
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2350 |
|
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|
2351 __ bind(convert); |
|
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2352 |
|
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2353 __ lea(c_rarg1, utf8_addr); |
|
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2354 if (dst.first()->is_reg()) { |
|
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2355 __ movq(Address(rbp, src_off), c_rarg1); |
|
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2356 } else { |
|
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2357 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1); |
|
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2358 } |
|
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2359 // And do the conversion |
|
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2360 __ call(RuntimeAddress( |
|
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2361 CAST_FROM_FN_PTR(address, SharedRuntime::get_utf))); |
|
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2362 |
|
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|
2363 __ bind(done); |
|
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|
2364 } |
|
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2365 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
|
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2366 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
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2367 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
|
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2368 } |
|
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|
2369 } |
|
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2370 // The get_utf call killed all the c_arg registers |
|
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2371 live[c_rarg0->as_VMReg()->value()] = false; |
|
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2372 live[c_rarg1->as_VMReg()->value()] = false; |
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2373 live[c_rarg2->as_VMReg()->value()] = false; |
|
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2374 live[c_rarg3->as_VMReg()->value()] = false; |
|
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2375 live[c_rarg4->as_VMReg()->value()] = false; |
|
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2376 live[c_rarg5->as_VMReg()->value()] = false; |
|
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2377 |
|
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2378 live[c_farg0->as_VMReg()->value()] = false; |
|
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2379 live[c_farg1->as_VMReg()->value()] = false; |
|
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2380 live[c_farg2->as_VMReg()->value()] = false; |
|
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2381 live[c_farg3->as_VMReg()->value()] = false; |
|
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2382 live[c_farg4->as_VMReg()->value()] = false; |
|
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2383 live[c_farg5->as_VMReg()->value()] = false; |
|
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2384 live[c_farg6->as_VMReg()->value()] = false; |
|
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2385 live[c_farg7->as_VMReg()->value()] = false; |
|
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2386 } |
|
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|
2387 |
|
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|
2388 // Now we can finally move the register args to their desired locations |
|
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2389 |
|
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2390 rax_is_zero = false; |
|
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2391 |
|
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2392 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
|
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2393 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
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2394 |
|
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2395 VMRegPair src = in_regs[j_arg]; |
|
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2396 VMRegPair dst = out_regs[c_arg]; |
|
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2397 |
|
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2398 // Only need to look for args destined for the interger registers (since we |
|
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2399 // convert float/double args to look like int/long outbound) |
|
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2400 if (dst.first()->is_reg()) { |
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2401 Register r = dst.first()->as_Register(); |
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2402 |
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2403 // Check if the java arg is unsupported and thereofre useless |
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2404 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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2405 (in_sig_bt[j_arg] == T_OBJECT && |
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2406 out_sig_bt[c_arg] != T_INT && |
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2407 out_sig_bt[c_arg] != T_ADDRESS && |
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2408 out_sig_bt[c_arg] != T_LONG); |
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2409 |
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2410 |
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2411 // If we're going to kill an existing arg save it first |
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2412 if (live[dst.first()->value()]) { |
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2413 // you can't kill yourself |
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2414 if (src.first() != dst.first()) { |
|
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2415 __ movq(Address(rbp, fp_offset[dst.first()->value()]), r); |
|
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2416 } |
|
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2417 } |
|
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2418 if (src.first()->is_reg()) { |
|
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2419 if (live[src.first()->value()] ) { |
|
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2420 if (in_sig_bt[j_arg] == T_FLOAT) { |
|
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2421 __ movdl(r, src.first()->as_XMMRegister()); |
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2422 } else if (in_sig_bt[j_arg] == T_DOUBLE) { |
|
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2423 __ movdq(r, src.first()->as_XMMRegister()); |
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2424 } else if (r != src.first()->as_Register()) { |
|
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2425 if (!useless) { |
|
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2426 __ movq(r, src.first()->as_Register()); |
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2427 } |
|
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2428 } |
|
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2429 } else { |
|
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2430 // If the arg is an oop type we don't support don't bother to store |
|
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2431 // it |
|
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2432 if (!useless) { |
|
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2433 if (in_sig_bt[j_arg] == T_DOUBLE || |
|
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2434 in_sig_bt[j_arg] == T_LONG || |
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2435 in_sig_bt[j_arg] == T_OBJECT ) { |
|
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2436 __ movq(r, Address(rbp, fp_offset[src.first()->value()])); |
|
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2437 } else { |
|
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2438 __ movl(r, Address(rbp, fp_offset[src.first()->value()])); |
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2439 } |
|
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2440 } |
|
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2441 } |
|
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2442 live[src.first()->value()] = false; |
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2443 } else if (!useless) { |
|
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2444 // full sized move even for int should be ok |
|
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2445 __ movq(r, Address(rbp, reg2offset_in(src.first()))); |
|
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2446 } |
|
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2447 |
|
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2448 // At this point r has the original java arg in the final location |
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2449 // (assuming it wasn't useless). If the java arg was an oop |
|
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2450 // we have a bit more to do |
|
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2451 |
|
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2452 if (in_sig_bt[j_arg] == T_ARRAY || in_sig_bt[j_arg] == T_OBJECT ) { |
|
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2453 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
|
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2454 // need to unbox a one-word value |
|
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2455 Label skip; |
|
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2456 __ testq(r, r); |
|
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2457 __ jcc(Assembler::equal, skip); |
|
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2458 BasicType bt = out_sig_bt[c_arg]; |
|
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2459 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
|
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2460 Address src1(r, box_offset); |
|
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2461 if ( bt == T_LONG ) { |
|
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2462 __ movq(r, src1); |
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2463 } else { |
|
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2464 __ movl(r, src1); |
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2465 } |
|
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2466 __ bind(skip); |
|
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2467 |
|
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2468 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
|
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2469 // Convert the arg to NULL |
|
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2470 __ xorq(r, r); |
|
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2471 } |
|
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2472 } |
|
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|
2473 |
|
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2474 // dst can longer be holding an input value |
|
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2475 live[dst.first()->value()] = false; |
|
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2476 } |
|
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2477 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
|
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2478 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
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2479 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
|
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2480 } |
|
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|
2481 } |
|
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|
2482 |
|
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|
2483 |
|
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2484 // Ok now we are done. Need to place the nop that dtrace wants in order to |
|
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2485 // patch in the trap |
|
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2486 int patch_offset = ((intptr_t)__ pc()) - start; |
|
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2487 |
|
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|
2488 __ nop(); |
|
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|
2489 |
|
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|
2490 |
|
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|
2491 // Return |
|
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|
2492 |
|
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|
2493 __ leave(); |
|
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2494 __ ret(0); |
|
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2495 |
|
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|
2496 __ flush(); |
|
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|
2497 |
|
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|
2498 nmethod *nm = nmethod::new_dtrace_nmethod( |
|
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2499 method, masm->code(), vep_offset, patch_offset, frame_complete, |
|
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2500 stack_slots / VMRegImpl::slots_per_word); |
|
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2501 return nm; |
|
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2502 |
|
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|
2503 } |
|
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2504 |
|
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|
2505 #endif // HAVE_DTRACE_H |
|
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2506 |
| 0 | 2507 // this function returns the adjust size (in number of words) to a c2i adapter |
| 2508 // activation for use during deoptimization | |
| 2509 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { | |
| 1506 | 2510 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
| 0 | 2511 } |
| 2512 | |
| 2513 | |
| 2514 uint SharedRuntime::out_preserve_stack_slots() { | |
| 2515 return 0; | |
| 2516 } | |
| 2517 | |
| 2518 | |
| 2519 //------------------------------generate_deopt_blob---------------------------- | |
| 2520 void SharedRuntime::generate_deopt_blob() { | |
| 2521 // Allocate space for the code | |
| 2522 ResourceMark rm; | |
| 2523 // Setup code generation tools | |
| 2524 CodeBuffer buffer("deopt_blob", 2048, 1024); | |
| 2525 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 2526 int frame_size_in_words; | |
| 2527 OopMap* map = NULL; | |
| 2528 OopMapSet *oop_maps = new OopMapSet(); | |
| 2529 | |
| 2530 // ------------- | |
| 2531 // This code enters when returning to a de-optimized nmethod. A return | |
| 2532 // address has been pushed on the the stack, and return values are in | |
| 2533 // registers. | |
| 2534 // If we are doing a normal deopt then we were called from the patched | |
| 2535 // nmethod from the point we returned to the nmethod. So the return | |
| 2536 // address on the stack is wrong by NativeCall::instruction_size | |
| 2537 // We will adjust the value so it looks like we have the original return | |
| 2538 // address on the stack (like when we eagerly deoptimized). | |
| 2539 // In the case of an exception pending when deoptimizing, we enter | |
| 2540 // with a return address on the stack that points after the call we patched | |
| 2541 // into the exception handler. We have the following register state from, | |
| 2542 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp). | |
| 2543 // rax: exception oop | |
| 2544 // rbx: exception handler | |
| 2545 // rdx: throwing pc | |
| 2546 // So in this case we simply jam rdx into the useless return address and | |
| 2547 // the stack looks just like we want. | |
| 2548 // | |
| 2549 // At this point we need to de-opt. We save the argument return | |
| 2550 // registers. We call the first C routine, fetch_unroll_info(). This | |
| 2551 // routine captures the return values and returns a structure which | |
| 2552 // describes the current frame size and the sizes of all replacement frames. | |
| 2553 // The current frame is compiled code and may contain many inlined | |
| 2554 // functions, each with their own JVM state. We pop the current frame, then | |
| 2555 // push all the new frames. Then we call the C routine unpack_frames() to | |
| 2556 // populate these frames. Finally unpack_frames() returns us the new target | |
| 2557 // address. Notice that callee-save registers are BLOWN here; they have | |
| 2558 // already been captured in the vframeArray at the time the return PC was | |
| 2559 // patched. | |
| 2560 address start = __ pc(); | |
| 2561 Label cont; | |
| 2562 | |
| 2563 // Prolog for non exception case! | |
| 2564 | |
| 2565 // Save everything in sight. | |
| 2566 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
| 2567 | |
| 2568 // Normal deoptimization. Save exec mode for unpack_frames. | |
|
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2569 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved |
| 0 | 2570 __ jmp(cont); |
| 304 | 2571 |
| 2572 int reexecute_offset = __ pc() - start; | |
| 2573 | |
| 2574 // Reexecute case | |
| 2575 // return address is the pc describes what bci to do re-execute at | |
| 2576 | |
| 2577 // No need to update map as each call to save_live_registers will produce identical oopmap | |
| 2578 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
| 2579 | |
| 2580 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved | |
| 2581 __ jmp(cont); | |
| 2582 | |
| 0 | 2583 int exception_offset = __ pc() - start; |
| 2584 | |
| 2585 // Prolog for exception case | |
| 2586 | |
| 304 | 2587 // all registers are dead at this entry point, except for rax, and |
| 2588 // rdx which contain the exception oop and exception pc | |
| 2589 // respectively. Set them in TLS and fall thru to the | |
| 2590 // unpack_with_exception_in_tls entry point. | |
| 2591 | |
| 2592 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
| 2593 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax); | |
| 2594 | |
| 2595 int exception_in_tls_offset = __ pc() - start; | |
| 2596 | |
| 2597 // new implementation because exception oop is now passed in JavaThread | |
| 2598 | |
| 2599 // Prolog for exception case | |
| 2600 // All registers must be preserved because they might be used by LinearScan | |
| 2601 // Exceptiop oop and throwing PC are passed in JavaThread | |
| 2602 // tos: stack at point of call to method that threw the exception (i.e. only | |
| 2603 // args are on the stack, no return address) | |
| 2604 | |
| 2605 // make room on stack for the return address | |
| 2606 // It will be patched later with the throwing pc. The correct value is not | |
| 2607 // available now because loading it from memory would destroy registers. | |
| 2608 __ push(0); | |
| 0 | 2609 |
| 2610 // Save everything in sight. | |
| 2611 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
| 2612 | |
| 304 | 2613 // Now it is safe to overwrite any register |
| 2614 | |
| 0 | 2615 // Deopt during an exception. Save exec mode for unpack_frames. |
|
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2616 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved |
| 0 | 2617 |
| 304 | 2618 // load throwing pc from JavaThread and patch it as the return address |
| 2619 // of the current frame. Then clear the field in JavaThread | |
| 2620 | |
| 2621 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
| 2622 __ movptr(Address(rbp, wordSize), rdx); | |
| 2623 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
| 2624 | |
| 2625 #ifdef ASSERT | |
| 2626 // verify that there is really an exception oop in JavaThread | |
| 2627 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
| 2628 __ verify_oop(rax); | |
| 2629 | |
| 2630 // verify that there is no pending exception | |
| 2631 Label no_pending_exception; | |
| 2632 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); | |
| 2633 __ testptr(rax, rax); | |
| 2634 __ jcc(Assembler::zero, no_pending_exception); | |
| 2635 __ stop("must not have pending exception here"); | |
| 2636 __ bind(no_pending_exception); | |
| 2637 #endif | |
| 2638 | |
| 0 | 2639 __ bind(cont); |
| 2640 | |
| 2641 // Call C code. Need thread and this frame, but NOT official VM entry | |
| 2642 // crud. We cannot block on this call, no GC can happen. | |
| 2643 // | |
| 2644 // UnrollBlock* fetch_unroll_info(JavaThread* thread) | |
| 2645 | |
| 2646 // fetch_unroll_info needs to call last_java_frame(). | |
| 2647 | |
| 2648 __ set_last_Java_frame(noreg, noreg, NULL); | |
| 2649 #ifdef ASSERT | |
| 2650 { Label L; | |
| 304 | 2651 __ cmpptr(Address(r15_thread, |
| 0 | 2652 JavaThread::last_Java_fp_offset()), |
| 304 | 2653 (int32_t)0); |
| 0 | 2654 __ jcc(Assembler::equal, L); |
| 2655 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared"); | |
| 2656 __ bind(L); | |
| 2657 } | |
| 2658 #endif // ASSERT | |
| 304 | 2659 __ mov(c_rarg0, r15_thread); |
| 0 | 2660 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); |
| 2661 | |
| 2662 // Need to have an oopmap that tells fetch_unroll_info where to | |
| 2663 // find any register it might need. | |
| 2664 oop_maps->add_gc_map(__ pc() - start, map); | |
| 2665 | |
| 2666 __ reset_last_Java_frame(false, false); | |
| 2667 | |
| 2668 // Load UnrollBlock* into rdi | |
| 304 | 2669 __ mov(rdi, rax); |
| 2670 | |
| 2671 Label noException; | |
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2672 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending? |
| 304 | 2673 __ jcc(Assembler::notEqual, noException); |
| 2674 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
| 2675 // QQQ this is useless it was NULL above | |
| 2676 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
| 2677 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); | |
| 2678 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
| 2679 | |
| 2680 __ verify_oop(rax); | |
| 2681 | |
| 2682 // Overwrite the result registers with the exception results. | |
| 2683 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
| 2684 // I think this is useless | |
| 2685 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx); | |
| 2686 | |
| 2687 __ bind(noException); | |
| 0 | 2688 |
| 2689 // Only register save data is on the stack. | |
| 2690 // Now restore the result registers. Everything else is either dead | |
| 2691 // or captured in the vframeArray. | |
| 2692 RegisterSaver::restore_result_registers(masm); | |
| 2693 | |
| 2694 // All of the register save area has been popped of the stack. Only the | |
| 2695 // return address remains. | |
| 2696 | |
| 2697 // Pop all the frames we must move/replace. | |
| 2698 // | |
| 2699 // Frame picture (youngest to oldest) | |
| 2700 // 1: self-frame (no frame link) | |
| 2701 // 2: deopting frame (no frame link) | |
| 2702 // 3: caller of deopting frame (could be compiled/interpreted). | |
| 2703 // | |
| 2704 // Note: by leaving the return address of self-frame on the stack | |
| 2705 // and using the size of frame 2 to adjust the stack | |
| 2706 // when we are done the return to frame 3 will still be on the stack. | |
| 2707 | |
| 2708 // Pop deoptimized frame | |
| 2709 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); | |
| 304 | 2710 __ addptr(rsp, rcx); |
| 0 | 2711 |
| 2712 // rsp should be pointing at the return address to the caller (3) | |
| 2713 | |
| 2714 // Stack bang to make sure there's enough room for these interpreter frames. | |
| 2715 if (UseStackBanging) { | |
| 2716 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
| 2717 __ bang_stack_size(rbx, rcx); | |
| 2718 } | |
| 2719 | |
| 2720 // Load address of array of frame pcs into rcx | |
| 304 | 2721 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
| 0 | 2722 |
| 2723 // Trash the old pc | |
| 304 | 2724 __ addptr(rsp, wordSize); |
| 0 | 2725 |
| 2726 // Load address of array of frame sizes into rsi | |
| 304 | 2727 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
| 0 | 2728 |
| 2729 // Load counter into rdx | |
| 2730 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
| 2731 | |
| 2732 // Pick up the initial fp we should save | |
|
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2733 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
| 0 | 2734 |
| 2735 // Now adjust the caller's stack to make up for the extra locals | |
| 2736 // but record the original sp so that we can save it in the skeletal interpreter | |
| 2737 // frame and the stack walking of interpreter_sender will get the unextended sp | |
| 2738 // value and not the "real" sp value. | |
| 2739 | |
| 2740 const Register sender_sp = r8; | |
| 2741 | |
| 304 | 2742 __ mov(sender_sp, rsp); |
| 0 | 2743 __ movl(rbx, Address(rdi, |
| 2744 Deoptimization::UnrollBlock:: | |
| 2745 caller_adjustment_offset_in_bytes())); | |
| 304 | 2746 __ subptr(rsp, rbx); |
| 0 | 2747 |
| 2748 // Push interpreter frames in a loop | |
| 2749 Label loop; | |
| 2750 __ bind(loop); | |
| 304 | 2751 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
| 2752 #ifdef CC_INTERP | |
| 2753 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and | |
| 2754 #ifdef ASSERT | |
| 2755 __ push(0xDEADDEAD); // Make a recognizable pattern | |
| 2756 __ push(0xDEADDEAD); | |
| 2757 #else /* ASSERT */ | |
| 2758 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" | |
| 2759 #endif /* ASSERT */ | |
| 2760 #else | |
| 2761 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand | |
| 2762 #endif // CC_INTERP | |
| 2763 __ pushptr(Address(rcx, 0)); // Save return address | |
| 0 | 2764 __ enter(); // Save old & set new ebp |
| 304 | 2765 __ subptr(rsp, rbx); // Prolog |
| 2766 #ifdef CC_INTERP | |
| 2767 __ movptr(Address(rbp, | |
| 2768 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), | |
| 2769 sender_sp); // Make it walkable | |
| 2770 #else /* CC_INTERP */ | |
| 0 | 2771 // This value is corrected by layout_activation_impl |
| 304 | 2772 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
| 2773 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable | |
| 2774 #endif /* CC_INTERP */ | |
| 2775 __ mov(sender_sp, rsp); // Pass sender_sp to next frame | |
| 2776 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
| 2777 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
| 0 | 2778 __ decrementl(rdx); // Decrement counter |
| 2779 __ jcc(Assembler::notZero, loop); | |
| 304 | 2780 __ pushptr(Address(rcx, 0)); // Save final return address |
| 0 | 2781 |
| 2782 // Re-push self-frame | |
| 2783 __ enter(); // Save old & set new ebp | |
| 2784 | |
| 2785 // Allocate a full sized register save area. | |
| 2786 // Return address and rbp are in place, so we allocate two less words. | |
| 304 | 2787 __ subptr(rsp, (frame_size_in_words - 2) * wordSize); |
| 0 | 2788 |
| 2789 // Restore frame locals after moving the frame | |
| 2790 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0); | |
| 304 | 2791 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); |
| 0 | 2792 |
| 2793 // Call C code. Need thread but NOT official VM entry | |
| 2794 // crud. We cannot block on this call, no GC can happen. Call should | |
| 2795 // restore return values to their stack-slots with the new SP. | |
| 2796 // | |
| 2797 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode) | |
| 2798 | |
| 2799 // Use rbp because the frames look interpreted now | |
|
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2800 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
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2801 // Don't need the precise return PC here, just precise enough to point into this code blob. |
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2802 address the_pc = __ pc(); |
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2803 __ set_last_Java_frame(noreg, rbp, the_pc); |
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2804 |
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2805 __ andptr(rsp, -(StackAlignmentInBytes)); // Fix stack alignment as required by ABI |
| 304 | 2806 __ mov(c_rarg0, r15_thread); |
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2807 __ movl(c_rarg1, r14); // second arg: exec_mode |
| 0 | 2808 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); |
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2809 // Revert SP alignment after call since we're going to do some SP relative addressing below |
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2810 __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset())); |
| 0 | 2811 |
| 2812 // Set an oopmap for the call site | |
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2813 // Use the same PC we used for the last java frame |
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2814 oop_maps->add_gc_map(the_pc - start, |
| 0 | 2815 new OopMap( frame_size_in_words, 0 )); |
| 2816 | |
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2817 // Clear fp AND pc |
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2818 __ reset_last_Java_frame(true, true); |
| 0 | 2819 |
| 2820 // Collect return values | |
| 2821 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes())); | |
| 304 | 2822 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes())); |
| 2823 // I think this is useless (throwing pc?) | |
| 2824 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes())); | |
| 0 | 2825 |
| 2826 // Pop self-frame. | |
| 2827 __ leave(); // Epilog | |
| 2828 | |
| 2829 // Jump to interpreter | |
| 2830 __ ret(0); | |
| 2831 | |
| 2832 // Make sure all code is generated | |
| 2833 masm->flush(); | |
| 2834 | |
| 304 | 2835 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); |
| 2836 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
| 0 | 2837 } |
| 2838 | |
| 2839 #ifdef COMPILER2 | |
| 2840 //------------------------------generate_uncommon_trap_blob-------------------- | |
| 2841 void SharedRuntime::generate_uncommon_trap_blob() { | |
| 2842 // Allocate space for the code | |
| 2843 ResourceMark rm; | |
| 2844 // Setup code generation tools | |
| 2845 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024); | |
| 2846 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 2847 | |
| 2848 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
| 2849 | |
| 2850 address start = __ pc(); | |
| 2851 | |
| 2852 // Push self-frame. We get here with a return address on the | |
| 2853 // stack, so rsp is 8-byte aligned until we allocate our frame. | |
| 304 | 2854 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog! |
| 0 | 2855 |
| 2856 // No callee saved registers. rbp is assumed implicitly saved | |
| 304 | 2857 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
| 0 | 2858 |
| 2859 // compiler left unloaded_class_index in j_rarg0 move to where the | |
| 2860 // runtime expects it. | |
| 2861 __ movl(c_rarg1, j_rarg0); | |
| 2862 | |
| 2863 __ set_last_Java_frame(noreg, noreg, NULL); | |
| 2864 | |
| 2865 // Call C code. Need thread but NOT official VM entry | |
| 2866 // crud. We cannot block on this call, no GC can happen. Call should | |
| 2867 // capture callee-saved registers as well as return values. | |
| 2868 // Thread is in rdi already. | |
| 2869 // | |
| 2870 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index); | |
| 2871 | |
| 304 | 2872 __ mov(c_rarg0, r15_thread); |
| 0 | 2873 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
| 2874 | |
| 2875 // Set an oopmap for the call site | |
| 2876 OopMapSet* oop_maps = new OopMapSet(); | |
| 2877 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0); | |
| 2878 | |
| 2879 // location of rbp is known implicitly by the frame sender code | |
| 2880 | |
| 2881 oop_maps->add_gc_map(__ pc() - start, map); | |
| 2882 | |
| 2883 __ reset_last_Java_frame(false, false); | |
| 2884 | |
| 2885 // Load UnrollBlock* into rdi | |
| 304 | 2886 __ mov(rdi, rax); |
| 0 | 2887 |
| 2888 // Pop all the frames we must move/replace. | |
| 2889 // | |
| 2890 // Frame picture (youngest to oldest) | |
| 2891 // 1: self-frame (no frame link) | |
| 2892 // 2: deopting frame (no frame link) | |
| 2893 // 3: caller of deopting frame (could be compiled/interpreted). | |
| 2894 | |
| 2895 // Pop self-frame. We have no frame, and must rely only on rax and rsp. | |
| 304 | 2896 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog! |
| 0 | 2897 |
| 2898 // Pop deoptimized frame (int) | |
| 2899 __ movl(rcx, Address(rdi, | |
| 2900 Deoptimization::UnrollBlock:: | |
| 2901 size_of_deoptimized_frame_offset_in_bytes())); | |
| 304 | 2902 __ addptr(rsp, rcx); |
| 0 | 2903 |
| 2904 // rsp should be pointing at the return address to the caller (3) | |
| 2905 | |
| 2906 // Stack bang to make sure there's enough room for these interpreter frames. | |
| 2907 if (UseStackBanging) { | |
| 2908 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
| 2909 __ bang_stack_size(rbx, rcx); | |
| 2910 } | |
| 2911 | |
| 2912 // Load address of array of frame pcs into rcx (address*) | |
| 304 | 2913 __ movptr(rcx, |
| 2914 Address(rdi, | |
| 2915 Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); | |
| 0 | 2916 |
| 2917 // Trash the return pc | |
| 304 | 2918 __ addptr(rsp, wordSize); |
| 0 | 2919 |
| 2920 // Load address of array of frame sizes into rsi (intptr_t*) | |
| 304 | 2921 __ movptr(rsi, Address(rdi, |
| 2922 Deoptimization::UnrollBlock:: | |
| 2923 frame_sizes_offset_in_bytes())); | |
| 0 | 2924 |
| 2925 // Counter | |
| 2926 __ movl(rdx, Address(rdi, | |
| 2927 Deoptimization::UnrollBlock:: | |
| 2928 number_of_frames_offset_in_bytes())); // (int) | |
| 2929 | |
| 2930 // Pick up the initial fp we should save | |
| 304 | 2931 __ movptr(rbp, |
| 2932 Address(rdi, | |
|
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2933 Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
| 0 | 2934 |
| 2935 // Now adjust the caller's stack to make up for the extra locals but | |
| 2936 // record the original sp so that we can save it in the skeletal | |
| 2937 // interpreter frame and the stack walking of interpreter_sender | |
| 2938 // will get the unextended sp value and not the "real" sp value. | |
| 2939 | |
| 2940 const Register sender_sp = r8; | |
| 2941 | |
| 304 | 2942 __ mov(sender_sp, rsp); |
| 0 | 2943 __ movl(rbx, Address(rdi, |
| 2944 Deoptimization::UnrollBlock:: | |
| 2945 caller_adjustment_offset_in_bytes())); // (int) | |
| 304 | 2946 __ subptr(rsp, rbx); |
| 0 | 2947 |
| 2948 // Push interpreter frames in a loop | |
| 2949 Label loop; | |
| 2950 __ bind(loop); | |
| 304 | 2951 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
| 2952 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand | |
| 2953 __ pushptr(Address(rcx, 0)); // Save return address | |
| 2954 __ enter(); // Save old & set new rbp | |
| 2955 __ subptr(rsp, rbx); // Prolog | |
|
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2956 #ifdef CC_INTERP |
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2957 __ movptr(Address(rbp, |
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2958 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
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2959 sender_sp); // Make it walkable |
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2960 #else // CC_INTERP |
| 304 | 2961 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), |
| 2962 sender_sp); // Make it walkable | |
| 0 | 2963 // This value is corrected by layout_activation_impl |
| 304 | 2964 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
|
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2965 #endif // CC_INTERP |
| 304 | 2966 __ mov(sender_sp, rsp); // Pass sender_sp to next frame |
| 2967 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
| 2968 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
| 2969 __ decrementl(rdx); // Decrement counter | |
| 0 | 2970 __ jcc(Assembler::notZero, loop); |
| 304 | 2971 __ pushptr(Address(rcx, 0)); // Save final return address |
| 0 | 2972 |
| 2973 // Re-push self-frame | |
| 2974 __ enter(); // Save old & set new rbp | |
| 304 | 2975 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt); |
| 0 | 2976 // Prolog |
| 2977 | |
| 2978 // Use rbp because the frames look interpreted now | |
|
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2979 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
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2980 // Don't need the precise return PC here, just precise enough to point into this code blob. |
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2981 address the_pc = __ pc(); |
|
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2982 __ set_last_Java_frame(noreg, rbp, the_pc); |
| 0 | 2983 |
| 2984 // Call C code. Need thread but NOT official VM entry | |
| 2985 // crud. We cannot block on this call, no GC can happen. Call should | |
| 2986 // restore return values to their stack-slots with the new SP. | |
| 2987 // Thread is in rdi already. | |
| 2988 // | |
| 2989 // BasicType unpack_frames(JavaThread* thread, int exec_mode); | |
| 2990 | |
|
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2991 __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI |
| 304 | 2992 __ mov(c_rarg0, r15_thread); |
| 0 | 2993 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap); |
| 2994 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
| 2995 | |
| 2996 // Set an oopmap for the call site | |
|
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2997 // Use the same PC we used for the last java frame |
|
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2998 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
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2999 |
|
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3000 // Clear fp AND pc |
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|
3001 __ reset_last_Java_frame(true, true); |
| 0 | 3002 |
| 3003 // Pop self-frame. | |
| 3004 __ leave(); // Epilog | |
| 3005 | |
| 3006 // Jump to interpreter | |
| 3007 __ ret(0); | |
| 3008 | |
| 3009 // Make sure all code is generated | |
| 3010 masm->flush(); | |
| 3011 | |
| 3012 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, | |
| 3013 SimpleRuntimeFrame::framesize >> 1); | |
| 3014 } | |
| 3015 #endif // COMPILER2 | |
| 3016 | |
| 3017 | |
| 3018 //------------------------------generate_handler_blob------ | |
| 3019 // | |
| 3020 // Generate a special Compile2Runtime blob that saves all registers, | |
| 3021 // and setup oopmap. | |
| 3022 // | |
|
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3023 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, bool cause_return) { |
| 0 | 3024 assert(StubRoutines::forward_exception_entry() != NULL, |
| 3025 "must be generated before"); | |
| 3026 | |
| 3027 ResourceMark rm; | |
| 3028 OopMapSet *oop_maps = new OopMapSet(); | |
| 3029 OopMap* map; | |
| 3030 | |
| 3031 // Allocate space for the code. Setup code generation tools. | |
| 3032 CodeBuffer buffer("handler_blob", 2048, 1024); | |
| 3033 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3034 | |
| 3035 address start = __ pc(); | |
| 3036 address call_pc = NULL; | |
| 3037 int frame_size_in_words; | |
| 3038 | |
| 3039 // Make room for return address (or push it again) | |
| 3040 if (!cause_return) { | |
| 304 | 3041 __ push(rbx); |
| 0 | 3042 } |
| 3043 | |
| 3044 // Save registers, fpu state, and flags | |
| 3045 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
| 3046 | |
| 3047 // The following is basically a call_VM. However, we need the precise | |
| 3048 // address of the call in order to generate an oopmap. Hence, we do all the | |
| 3049 // work outselves. | |
| 3050 | |
| 3051 __ set_last_Java_frame(noreg, noreg, NULL); | |
| 3052 | |
| 3053 // The return address must always be correct so that frame constructor never | |
| 3054 // sees an invalid pc. | |
| 3055 | |
| 3056 if (!cause_return) { | |
| 3057 // overwrite the dummy value we pushed on entry | |
| 304 | 3058 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset())); |
| 3059 __ movptr(Address(rbp, wordSize), c_rarg0); | |
| 0 | 3060 } |
| 3061 | |
| 3062 // Do the call | |
| 304 | 3063 __ mov(c_rarg0, r15_thread); |
| 0 | 3064 __ call(RuntimeAddress(call_ptr)); |
| 3065 | |
| 3066 // Set an oopmap for the call site. This oopmap will map all | |
| 3067 // oop-registers and debug-info registers as callee-saved. This | |
| 3068 // will allow deoptimization at this safepoint to find all possible | |
| 3069 // debug-info recordings, as well as let GC find all oops. | |
| 3070 | |
| 3071 oop_maps->add_gc_map( __ pc() - start, map); | |
| 3072 | |
| 3073 Label noException; | |
| 3074 | |
| 3075 __ reset_last_Java_frame(false, false); | |
| 3076 | |
| 304 | 3077 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
| 0 | 3078 __ jcc(Assembler::equal, noException); |
| 3079 | |
| 3080 // Exception pending | |
| 3081 | |
| 3082 RegisterSaver::restore_live_registers(masm); | |
| 3083 | |
| 3084 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
| 3085 | |
| 3086 // No exception case | |
| 3087 __ bind(noException); | |
| 3088 | |
| 3089 // Normal exit, restore registers and exit. | |
| 3090 RegisterSaver::restore_live_registers(masm); | |
| 3091 | |
| 3092 __ ret(0); | |
| 3093 | |
| 3094 // Make sure all code is generated | |
| 3095 masm->flush(); | |
| 3096 | |
| 3097 // Fill-out other meta info | |
| 3098 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); | |
| 3099 } | |
| 3100 | |
| 3101 // | |
| 3102 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
| 3103 // | |
| 3104 // Generate a stub that calls into vm to find out the proper destination | |
| 3105 // of a java call. All the argument registers are live at this point | |
| 3106 // but since this is generic code we don't know what they are and the caller | |
| 3107 // must do any gc of the args. | |
| 3108 // | |
|
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3109 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
| 0 | 3110 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
| 3111 | |
| 3112 // allocate space for the code | |
| 3113 ResourceMark rm; | |
| 3114 | |
| 3115 CodeBuffer buffer(name, 1000, 512); | |
| 3116 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3117 | |
| 3118 int frame_size_in_words; | |
| 3119 | |
| 3120 OopMapSet *oop_maps = new OopMapSet(); | |
| 3121 OopMap* map = NULL; | |
| 3122 | |
| 3123 int start = __ offset(); | |
| 3124 | |
| 3125 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
| 3126 | |
| 3127 int frame_complete = __ offset(); | |
| 3128 | |
| 3129 __ set_last_Java_frame(noreg, noreg, NULL); | |
| 3130 | |
| 304 | 3131 __ mov(c_rarg0, r15_thread); |
| 0 | 3132 |
| 3133 __ call(RuntimeAddress(destination)); | |
| 3134 | |
| 3135 | |
| 3136 // Set an oopmap for the call site. | |
| 3137 // We need this not only for callee-saved registers, but also for volatile | |
| 3138 // registers that the compiler might be keeping live across a safepoint. | |
| 3139 | |
| 3140 oop_maps->add_gc_map( __ offset() - start, map); | |
| 3141 | |
| 3142 // rax contains the address we are going to jump to assuming no exception got installed | |
| 3143 | |
| 3144 // clear last_Java_sp | |
| 3145 __ reset_last_Java_frame(false, false); | |
| 3146 // check for pending exceptions | |
| 3147 Label pending; | |
| 304 | 3148 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
| 0 | 3149 __ jcc(Assembler::notEqual, pending); |
| 3150 | |
| 3151 // get the returned methodOop | |
| 304 | 3152 __ movptr(rbx, Address(r15_thread, JavaThread::vm_result_offset())); |
| 3153 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx); | |
| 3154 | |
| 3155 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
| 0 | 3156 |
| 3157 RegisterSaver::restore_live_registers(masm); | |
| 3158 | |
| 3159 // We are back the the original state on entry and ready to go. | |
| 3160 | |
| 3161 __ jmp(rax); | |
| 3162 | |
| 3163 // Pending exception after the safepoint | |
| 3164 | |
| 3165 __ bind(pending); | |
| 3166 | |
| 3167 RegisterSaver::restore_live_registers(masm); | |
| 3168 | |
| 3169 // exception pending => remove activation and forward to exception handler | |
| 3170 | |
| 3171 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD); | |
| 3172 | |
| 304 | 3173 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); |
| 0 | 3174 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
| 3175 | |
| 3176 // ------------- | |
| 3177 // make sure all code is generated | |
| 3178 masm->flush(); | |
| 3179 | |
| 3180 // return the blob | |
| 3181 // frame_size_words or bytes?? | |
| 3182 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true); | |
| 3183 } | |
| 3184 | |
| 3185 | |
| 3186 #ifdef COMPILER2 | |
| 3187 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame | |
| 3188 // | |
| 3189 //------------------------------generate_exception_blob--------------------------- | |
| 3190 // creates exception blob at the end | |
| 3191 // Using exception blob, this code is jumped from a compiled method. | |
| 3192 // (see emit_exception_handler in x86_64.ad file) | |
| 3193 // | |
| 3194 // Given an exception pc at a call we call into the runtime for the | |
| 3195 // handler in this method. This handler might merely restore state | |
| 3196 // (i.e. callee save registers) unwind the frame and jump to the | |
| 3197 // exception handler for the nmethod if there is no Java level handler | |
| 3198 // for the nmethod. | |
| 3199 // | |
| 3200 // This code is entered with a jmp. | |
| 3201 // | |
| 3202 // Arguments: | |
| 3203 // rax: exception oop | |
| 3204 // rdx: exception pc | |
| 3205 // | |
| 3206 // Results: | |
| 3207 // rax: exception oop | |
| 3208 // rdx: exception pc in caller or ??? | |
| 3209 // destination: exception handler of caller | |
| 3210 // | |
| 3211 // Note: the exception pc MUST be at a call (precise debug information) | |
| 3212 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved. | |
| 3213 // | |
| 3214 | |
| 3215 void OptoRuntime::generate_exception_blob() { | |
| 3216 assert(!OptoRuntime::is_callee_saved_register(RDX_num), ""); | |
| 3217 assert(!OptoRuntime::is_callee_saved_register(RAX_num), ""); | |
| 3218 assert(!OptoRuntime::is_callee_saved_register(RCX_num), ""); | |
| 3219 | |
| 3220 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
| 3221 | |
| 3222 // Allocate space for the code | |
| 3223 ResourceMark rm; | |
| 3224 // Setup code generation tools | |
| 3225 CodeBuffer buffer("exception_blob", 2048, 1024); | |
| 3226 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3227 | |
| 3228 | |
| 3229 address start = __ pc(); | |
| 3230 | |
| 3231 // Exception pc is 'return address' for stack walker | |
| 304 | 3232 __ push(rdx); |
| 3233 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog | |
| 0 | 3234 |
| 3235 // Save callee-saved registers. See x86_64.ad. | |
| 3236 | |
| 3237 // rbp is an implicitly saved callee saved register (i.e. the calling | |
| 3238 // convention will save restore it in prolog/epilog) Other than that | |
| 3239 // there are no callee save registers now that adapter frames are gone. | |
| 3240 | |
| 304 | 3241 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
| 0 | 3242 |
| 3243 // Store exception in Thread object. We cannot pass any arguments to the | |
| 3244 // handle_exception call, since we do not want to make any assumption | |
| 3245 // about the size of the frame where the exception happened in. | |
| 3246 // c_rarg0 is either rdi (Linux) or rcx (Windows). | |
| 304 | 3247 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax); |
| 3248 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
| 0 | 3249 |
| 3250 // This call does all the hard work. It checks if an exception handler | |
| 3251 // exists in the method. | |
| 3252 // If so, it returns the handler address. | |
| 3253 // If not, it prepares for stack-unwinding, restoring the callee-save | |
| 3254 // registers of the frame being removed. | |
| 3255 // | |
| 3256 // address OptoRuntime::handle_exception_C(JavaThread* thread) | |
| 3257 | |
| 3258 __ set_last_Java_frame(noreg, noreg, NULL); | |
| 304 | 3259 __ mov(c_rarg0, r15_thread); |
| 0 | 3260 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C))); |
| 3261 | |
| 3262 // Set an oopmap for the call site. This oopmap will only be used if we | |
| 3263 // are unwinding the stack. Hence, all locations will be dead. | |
| 3264 // Callee-saved registers will be the same as the frame above (i.e., | |
| 3265 // handle_exception_stub), since they were restored when we got the | |
| 3266 // exception. | |
| 3267 | |
| 3268 OopMapSet* oop_maps = new OopMapSet(); | |
| 3269 | |
| 3270 oop_maps->add_gc_map( __ pc()-start, new OopMap(SimpleRuntimeFrame::framesize, 0)); | |
| 3271 | |
| 3272 __ reset_last_Java_frame(false, false); | |
| 3273 | |
| 3274 // Restore callee-saved registers | |
| 3275 | |
| 3276 // rbp is an implicitly saved callee saved register (i.e. the calling | |
| 3277 // convention will save restore it in prolog/epilog) Other than that | |
| 3278 // there are no callee save registers no that adapter frames are gone. | |
| 3279 | |
| 304 | 3280 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt)); |
| 3281 | |
| 3282 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog | |
| 3283 __ pop(rdx); // No need for exception pc anymore | |
| 0 | 3284 |
| 3285 // rax: exception handler | |
| 3286 | |
|
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3287 // Restore SP from BP if the exception PC is a MethodHandle call site. |
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|
3288 __ cmpl(Address(r15_thread, JavaThread::is_method_handle_return_offset()), 0); |
| 1567 | 3289 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
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3290 |
| 0 | 3291 // We have a handler in rax (could be deopt blob). |
| 304 | 3292 __ mov(r8, rax); |
| 0 | 3293 |
| 3294 // Get the exception oop | |
| 304 | 3295 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); |
| 0 | 3296 // Get the exception pc in case we are deoptimized |
| 304 | 3297 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); |
| 0 | 3298 #ifdef ASSERT |
| 3299 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD); | |
| 3300 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD); | |
| 3301 #endif | |
| 3302 // Clear the exception oop so GC no longer processes it as a root. | |
| 3303 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD); | |
| 3304 | |
| 3305 // rax: exception oop | |
| 3306 // r8: exception handler | |
| 3307 // rdx: exception pc | |
| 3308 // Jump to handler | |
| 3309 | |
| 3310 __ jmp(r8); | |
| 3311 | |
| 3312 // Make sure all code is generated | |
| 3313 masm->flush(); | |
| 3314 | |
| 3315 // Set exception blob | |
| 3316 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1); | |
| 3317 } | |
| 3318 #endif // COMPILER2 |