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annotate src/share/vm/asm/assembler.hpp @ 17795:a9becfeecd1b

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Merge
author kvn
date Wed, 22 Jan 2014 17:42:23 -0800
parents 55fb97c4c58d 15120a36272d
children 4ca6dc0799b6
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1 /*
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2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #ifndef SHARE_VM_ASM_ASSEMBLER_HPP
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26 #define SHARE_VM_ASM_ASSEMBLER_HPP
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27
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28 #include "asm/codeBuffer.hpp"
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29 #include "code/oopRecorder.hpp"
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30 #include "code/relocInfo.hpp"
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31 #include "memory/allocation.hpp"
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32 #include "utilities/debug.hpp"
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33 #include "utilities/growableArray.hpp"
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34 #include "utilities/top.hpp"
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35
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36 #ifdef TARGET_ARCH_x86
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37 # include "register_x86.hpp"
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38 # include "vm_version_x86.hpp"
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39 #endif
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40 #ifdef TARGET_ARCH_sparc
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41 # include "register_sparc.hpp"
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42 # include "vm_version_sparc.hpp"
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43 #endif
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44 #ifdef TARGET_ARCH_zero
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45 # include "register_zero.hpp"
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46 # include "vm_version_zero.hpp"
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47 #endif
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48 #ifdef TARGET_ARCH_arm
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49 # include "register_arm.hpp"
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50 # include "vm_version_arm.hpp"
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51 #endif
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52 #ifdef TARGET_ARCH_ppc
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53 # include "register_ppc.hpp"
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54 # include "vm_version_ppc.hpp"
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55 #endif
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56
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57 // This file contains platform-independent assembler declarations.
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58
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59 class MacroAssembler;
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60 class AbstractAssembler;
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61 class Label;
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62
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63 /**
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64 * Labels represent destinations for control transfer instructions. Such
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65 * instructions can accept a Label as their target argument. A Label is
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66 * bound to the current location in the code stream by calling the
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67 * MacroAssembler's 'bind' method, which in turn calls the Label's 'bind'
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68 * method. A Label may be referenced by an instruction before it's bound
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69 * (i.e., 'forward referenced'). 'bind' stores the current code offset
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70 * in the Label object.
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71 *
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72 * If an instruction references a bound Label, the offset field(s) within
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73 * the instruction are immediately filled in based on the Label's code
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74 * offset. If an instruction references an unbound label, that
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75 * instruction is put on a list of instructions that must be patched
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76 * (i.e., 'resolved') when the Label is bound.
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77 *
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78 * 'bind' will call the platform-specific 'patch_instruction' method to
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79 * fill in the offset field(s) for each unresolved instruction (if there
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80 * are any). 'patch_instruction' lives in one of the
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81 * cpu/<arch>/vm/assembler_<arch>* files.
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82 *
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83 * Instead of using a linked list of unresolved instructions, a Label has
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84 * an array of unresolved instruction code offsets. _patch_index
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85 * contains the total number of forward references. If the Label's array
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86 * overflows (i.e., _patch_index grows larger than the array size), a
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87 * GrowableArray is allocated to hold the remaining offsets. (The cache
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88 * size is 4 for now, which handles over 99.5% of the cases)
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89 *
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90 * Labels may only be used within a single CodeSection. If you need
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91 * to create references between code sections, use explicit relocations.
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92 */
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93 class Label VALUE_OBJ_CLASS_SPEC {
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94 private:
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95 enum { PatchCacheSize = 4 };
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96
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97 // _loc encodes both the binding state (via its sign)
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98 // and the binding locator (via its value) of a label.
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99 //
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100 // _loc >= 0 bound label, loc() encodes the target (jump) position
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101 // _loc == -1 unbound label
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102 int _loc;
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103
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104 // References to instructions that jump to this unresolved label.
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105 // These instructions need to be patched when the label is bound
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106 // using the platform-specific patchInstruction() method.
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107 //
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108 // To avoid having to allocate from the C-heap each time, we provide
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109 // a local cache and use the overflow only if we exceed the local cache
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110 int _patches[PatchCacheSize];
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111 int _patch_index;
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112 GrowableArray<int>* _patch_overflow;
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113
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114 Label(const Label&) { ShouldNotReachHere(); }
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115
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116 public:
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117
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118 /**
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119 * After binding, be sure 'patch_instructions' is called later to link
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120 */
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121 void bind_loc(int loc) {
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122 assert(loc >= 0, "illegal locator");
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123 assert(_loc == -1, "already bound");
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124 _loc = loc;
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125 }
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126 void bind_loc(int pos, int sect) { bind_loc(CodeBuffer::locator(pos, sect)); }
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127
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128 #ifndef PRODUCT
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129 // Iterates over all unresolved instructions for printing
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130 void print_instructions(MacroAssembler* masm) const;
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131 #endif // PRODUCT
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132
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133 /**
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134 * Returns the position of the the Label in the code buffer
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135 * The position is a 'locator', which encodes both offset and section.
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136 */
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137 int loc() const {
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138 assert(_loc >= 0, "unbound label");
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139 return _loc;
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140 }
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141 int loc_pos() const { return CodeBuffer::locator_pos(loc()); }
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142 int loc_sect() const { return CodeBuffer::locator_sect(loc()); }
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143
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144 bool is_bound() const { return _loc >= 0; }
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145 bool is_unbound() const { return _loc == -1 && _patch_index > 0; }
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146 bool is_unused() const { return _loc == -1 && _patch_index == 0; }
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147
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148 /**
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149 * Adds a reference to an unresolved displacement instruction to
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150 * this unbound label
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151 *
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152 * @param cb the code buffer being patched
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153 * @param branch_loc the locator of the branch instruction in the code buffer
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154 */
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155 void add_patch_at(CodeBuffer* cb, int branch_loc);
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156
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157 /**
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158 * Iterate over the list of patches, resolving the instructions
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159 * Call patch_instruction on each 'branch_loc' value
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160 */
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161 void patch_instructions(MacroAssembler* masm);
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162
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163 void init() {
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164 _loc = -1;
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165 _patch_index = 0;
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166 _patch_overflow = NULL;
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167 }
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168
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169 Label() {
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170 init();
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171 }
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172 };
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173
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174 // A union type for code which has to assemble both constant and
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175 // non-constant operands, when the distinction cannot be made
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176 // statically.
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177 class RegisterOrConstant VALUE_OBJ_CLASS_SPEC {
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178 private:
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179 Register _r;
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180 intptr_t _c;
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181
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182 public:
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183 RegisterOrConstant(): _r(noreg), _c(0) {}
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184 RegisterOrConstant(Register r): _r(r), _c(0) {}
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185 RegisterOrConstant(intptr_t c): _r(noreg), _c(c) {}
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186
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187 Register as_register() const { assert(is_register(),""); return _r; }
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188 intptr_t as_constant() const { assert(is_constant(),""); return _c; }
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189
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190 Register register_or_noreg() const { return _r; }
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191 intptr_t constant_or_zero() const { return _c; }
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192
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193 bool is_register() const { return _r != noreg; }
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194 bool is_constant() const { return _r == noreg; }
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195 };
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196
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197 // The Abstract Assembler: Pure assembler doing NO optimizations on the
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198 // instruction level; i.e., what you write is what you get.
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199 // The Assembler is generating code into a CodeBuffer.
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200 class AbstractAssembler : public ResourceObj {
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201 friend class Label;
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202
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203 protected:
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204 CodeSection* _code_section; // section within the code buffer
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205 OopRecorder* _oop_recorder; // support for relocInfo::oop_type
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206
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207 public:
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208 // Code emission & accessing
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209 address addr_at(int pos) const { return code_section()->start() + pos; }
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210
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211 protected:
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212 // This routine is called with a label is used for an address.
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213 // Labels and displacements truck in offsets, but target must return a PC.
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214 address target(Label& L) { return code_section()->target(L, pc()); }
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215
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216 bool is8bit(int x) const { return -0x80 <= x && x < 0x80; }
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217 bool isByte(int x) const { return 0 <= x && x < 0x100; }
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218 bool isShiftCount(int x) const { return 0 <= x && x < 32; }
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219
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220 // Instruction boundaries (required when emitting relocatable values).
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221 class InstructionMark: public StackObj {
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222 private:
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223 AbstractAssembler* _assm;
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224
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225 public:
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226 InstructionMark(AbstractAssembler* assm) : _assm(assm) {
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227 assert(assm->inst_mark() == NULL, "overlapping instructions");
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228 _assm->set_inst_mark();
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229 }
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230 ~InstructionMark() {
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231 _assm->clear_inst_mark();
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232 }
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233 };
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234 friend class InstructionMark;
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235 #ifdef ASSERT
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236 // Make it return true on platforms which need to verify
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237 // instruction boundaries for some operations.
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238 static bool pd_check_instruction_mark();
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239
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240 // Add delta to short branch distance to verify that it still fit into imm8.
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241 int _short_branch_delta;
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242
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243 int short_branch_delta() const { return _short_branch_delta; }
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244 void set_short_branch_delta() { _short_branch_delta = 32; }
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245 void clear_short_branch_delta() { _short_branch_delta = 0; }
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246
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247 class ShortBranchVerifier: public StackObj {
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248 private:
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249 AbstractAssembler* _assm;
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250
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251 public:
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252 ShortBranchVerifier(AbstractAssembler* assm) : _assm(assm) {
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253 assert(assm->short_branch_delta() == 0, "overlapping instructions");
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254 _assm->set_short_branch_delta();
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255 }
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256 ~ShortBranchVerifier() {
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257 _assm->clear_short_branch_delta();
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258 }
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259 };
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260 #else
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261 // Dummy in product.
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262 class ShortBranchVerifier: public StackObj {
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263 public:
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264 ShortBranchVerifier(AbstractAssembler* assm) {}
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265 };
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266 #endif
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267
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268 public:
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269
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270 // Creation
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271 AbstractAssembler(CodeBuffer* code);
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272
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273 // ensure buf contains all code (call this before using/copying the code)
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274 void flush();
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275
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276 void emit_int8( int8_t x) { code_section()->emit_int8( x); }
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277 void emit_int16( int16_t x) { code_section()->emit_int16( x); }
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278 void emit_int32( int32_t x) { code_section()->emit_int32( x); }
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279 void emit_int64( int64_t x) { code_section()->emit_int64( x); }
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280
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281 void emit_float( jfloat x) { code_section()->emit_float( x); }
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282 void emit_double( jdouble x) { code_section()->emit_double( x); }
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283 void emit_address(address x) { code_section()->emit_address(x); }
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284
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285 // min and max values for signed immediate ranges
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286 static int min_simm(int nbits) { return -(intptr_t(1) << (nbits - 1)) ; }
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287 static int max_simm(int nbits) { return (intptr_t(1) << (nbits - 1)) - 1; }
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288
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289 // Define some:
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290 static int min_simm10() { return min_simm(10); }
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291 static int min_simm13() { return min_simm(13); }
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292 static int min_simm16() { return min_simm(16); }
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293
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294 // Test if x is within signed immediate range for nbits
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295 static bool is_simm(intptr_t x, int nbits) { return min_simm(nbits) <= x && x <= max_simm(nbits); }
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296
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297 // Define some:
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298 static bool is_simm5( intptr_t x) { return is_simm(x, 5 ); }
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299 static bool is_simm8( intptr_t x) { return is_simm(x, 8 ); }
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300 static bool is_simm10(intptr_t x) { return is_simm(x, 10); }
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301 static bool is_simm11(intptr_t x) { return is_simm(x, 11); }
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302 static bool is_simm12(intptr_t x) { return is_simm(x, 12); }
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303 static bool is_simm13(intptr_t x) { return is_simm(x, 13); }
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304 static bool is_simm16(intptr_t x) { return is_simm(x, 16); }
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305 static bool is_simm26(intptr_t x) { return is_simm(x, 26); }
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306 static bool is_simm32(intptr_t x) { return is_simm(x, 32); }
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307
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308 // Accessors
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309 CodeSection* code_section() const { return _code_section; }
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310 CodeBuffer* code() const { return code_section()->outer(); }
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311 int sect() const { return code_section()->index(); }
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312 address pc() const { return code_section()->end(); }
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313 int offset() const { return code_section()->size(); }
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314 int locator() const { return CodeBuffer::locator(offset(), sect()); }
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315
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316 OopRecorder* oop_recorder() const { return _oop_recorder; }
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317 void set_oop_recorder(OopRecorder* r) { _oop_recorder = r; }
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318
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319 address inst_mark() const { return code_section()->mark(); }
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320 void set_inst_mark() { code_section()->set_mark(); }
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321 void clear_inst_mark() { code_section()->clear_mark(); }
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322
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323 // Constants in code
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324 void relocate(RelocationHolder const& rspec, int format = 0) {
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325 assert(!pd_check_instruction_mark()
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326 || inst_mark() == NULL || inst_mark() == code_section()->end(),
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327 "call relocate() between instructions");
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328 code_section()->relocate(code_section()->end(), rspec, format);
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329 }
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330 void relocate( relocInfo::relocType rtype, int format = 0) {
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331 code_section()->relocate(code_section()->end(), rtype, format);
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332 }
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333
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334 static int code_fill_byte(); // used to pad out odd-sized code buffers
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335
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336 // Associate a comment with the current offset. It will be printed
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337 // along with the disassembly when printing nmethods. Currently
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338 // only supported in the instruction section of the code buffer.
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339 void block_comment(const char* comment);
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340 // Copy str to a buffer that has the same lifetime as the CodeBuffer
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341 const char* code_string(const char* str);
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342
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343 // Label functions
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344 void bind(Label& L); // binds an unbound label L to the current code position
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345
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346 // Move to a different section in the same code buffer.
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347 void set_code_section(CodeSection* cs);
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348
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349 // Inform assembler when generating stub code and relocation info
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350 address start_a_stub(int required_space);
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351 void end_a_stub();
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352 // Ditto for constants.
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353 address start_a_const(int required_space, int required_align = sizeof(double));
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354 void end_a_const(CodeSection* cs); // Pass the codesection to continue in (insts or stubs?).
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355
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356 // constants support
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357 //
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358 // We must remember the code section (insts or stubs) in c1
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359 // so we can reset to the proper section in end_a_const().
2008
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360 address long_constant(jlong c) {
7197
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361 CodeSection* c1 = _code_section;
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362 address ptr = start_a_const(sizeof(c), sizeof(c));
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363 if (ptr != NULL) {
7198
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364 emit_int64(c);
7197
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365 end_a_const(c1);
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366 }
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367 return ptr;
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368 }
0
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369 address double_constant(jdouble c) {
7197
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370 CodeSection* c1 = _code_section;
0
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371 address ptr = start_a_const(sizeof(c), sizeof(c));
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372 if (ptr != NULL) {
7198
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373 emit_double(c);
7197
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374 end_a_const(c1);
0
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375 }
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376 return ptr;
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377 }
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378 address float_constant(jfloat c) {
7197
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379 CodeSection* c1 = _code_section;
0
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380 address ptr = start_a_const(sizeof(c), sizeof(c));
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381 if (ptr != NULL) {
7198
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382 emit_float(c);
7197
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383 end_a_const(c1);
0
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384 }
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385 return ptr;
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386 }
2008
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twisti
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387 address address_constant(address c) {
7197
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388 CodeSection* c1 = _code_section;
2008
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389 address ptr = start_a_const(sizeof(c), sizeof(c));
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390 if (ptr != NULL) {
7198
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twisti
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391 emit_address(c);
7197
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392 end_a_const(c1);
2008
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393 }
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394 return ptr;
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395 }
0
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396 address address_constant(address c, RelocationHolder const& rspec) {
7197
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397 CodeSection* c1 = _code_section;
0
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398 address ptr = start_a_const(sizeof(c), sizeof(c));
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399 if (ptr != NULL) {
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400 relocate(rspec);
7198
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twisti
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diff changeset
401 emit_address(c);
7197
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402 end_a_const(c1);
0
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403 }
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404 return ptr;
a61af66fc99e Initial load
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405 }
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406
622
56aae7be60d4 6812678: macro assembler needs delayed binding of a few constants (for 6655638)
jrose
parents: 605
diff changeset
407 // Bootstrapping aid to cope with delayed determination of constants.
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jrose
parents: 605
diff changeset
408 // Returns a static address which will eventually contain the constant.
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jrose
parents: 605
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409 // The value zero (NULL) stands instead of a constant which is still uncomputed.
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jrose
parents: 605
diff changeset
410 // Thus, the eventual value of the constant must not be zero.
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jrose
parents: 605
diff changeset
411 // This is fine, since this is designed for embedding object field
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jrose
parents: 605
diff changeset
412 // offsets in code which must be generated before the object class is loaded.
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jrose
parents: 605
diff changeset
413 // Field offsets are never zero, since an object's header (mark word)
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jrose
parents: 605
diff changeset
414 // is located at offset zero.
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 4766
diff changeset
415 RegisterOrConstant delayed_value(int(*value_fn)(), Register tmp, int offset = 0);
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
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416 RegisterOrConstant delayed_value(address(*value_fn)(), Register tmp, int offset = 0);
665
c89f86385056 6814659: separable cleanups and subroutines for 6655638
jrose
parents: 622
diff changeset
417 virtual RegisterOrConstant delayed_value_impl(intptr_t* delayed_value_addr, Register tmp, int offset) = 0;
622
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jrose
parents: 605
diff changeset
418 // Last overloading is platform-dependent; look in assembler_<arch>.cpp.
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jrose
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diff changeset
419 static intptr_t* delayed_value_addr(int(*constant_fn)());
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jrose
parents: 605
diff changeset
420 static intptr_t* delayed_value_addr(address(*constant_fn)());
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jrose
parents: 605
diff changeset
421 static void update_delayed_values();
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parents: 605
diff changeset
422
0
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423 // Bang stack to trigger StackOverflowError at a safe location
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parents:
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424 // implementation delegates to machine-specific bang_stack_with_offset
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425 void generate_stack_overflow_check( int frame_size_in_bytes );
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426 virtual void bang_stack_with_offset(int offset) = 0;
a61af66fc99e Initial load
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427
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428
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429 /**
a61af66fc99e Initial load
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430 * A platform-dependent method to patch a jump instruction that refers
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parents:
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431 * to this label.
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432 *
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parents:
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433 * @param branch the location of the instruction to patch
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parents:
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434 * @param masm the assembler which generated the branch
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parents:
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435 */
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436 void pd_patch_instruction(address branch, address target);
a61af66fc99e Initial load
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437
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438 };
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439
1972
f95d63e2154a 6989984: Use standard include model for Hospot
stefank
parents: 1552
diff changeset
440 #ifdef TARGET_ARCH_x86
f95d63e2154a 6989984: Use standard include model for Hospot
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441 # include "assembler_x86.hpp"
f95d63e2154a 6989984: Use standard include model for Hospot
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diff changeset
442 #endif
f95d63e2154a 6989984: Use standard include model for Hospot
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diff changeset
443 #ifdef TARGET_ARCH_sparc
f95d63e2154a 6989984: Use standard include model for Hospot
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444 # include "assembler_sparc.hpp"
f95d63e2154a 6989984: Use standard include model for Hospot
stefank
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diff changeset
445 #endif
f95d63e2154a 6989984: Use standard include model for Hospot
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diff changeset
446 #ifdef TARGET_ARCH_zero
f95d63e2154a 6989984: Use standard include model for Hospot
stefank
parents: 1552
diff changeset
447 # include "assembler_zero.hpp"
f95d63e2154a 6989984: Use standard include model for Hospot
stefank
parents: 1552
diff changeset
448 #endif
2192
b92c45f2bc75 7016023: Enable building ARM and PPC from src/closed repository
bobv
parents: 2008
diff changeset
449 #ifdef TARGET_ARCH_arm
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bobv
parents: 2008
diff changeset
450 # include "assembler_arm.hpp"
b92c45f2bc75 7016023: Enable building ARM and PPC from src/closed repository
bobv
parents: 2008
diff changeset
451 #endif
b92c45f2bc75 7016023: Enable building ARM and PPC from src/closed repository
bobv
parents: 2008
diff changeset
452 #ifdef TARGET_ARCH_ppc
b92c45f2bc75 7016023: Enable building ARM and PPC from src/closed repository
bobv
parents: 2008
diff changeset
453 # include "assembler_ppc.hpp"
b92c45f2bc75 7016023: Enable building ARM and PPC from src/closed repository
bobv
parents: 2008
diff changeset
454 #endif
1972
f95d63e2154a 6989984: Use standard include model for Hospot
stefank
parents: 1552
diff changeset
455
f95d63e2154a 6989984: Use standard include model for Hospot
stefank
parents: 1552
diff changeset
456
f95d63e2154a 6989984: Use standard include model for Hospot
stefank
parents: 1552
diff changeset
457 #endif // SHARE_VM_ASM_ASSEMBLER_HPP