Mercurial > hg > truffle
annotate src/cpu/x86/vm/sharedRuntime_x86_32.cpp @ 612:afa80fa86d22
Merge
| author | dcubed |
|---|---|
| date | Mon, 02 Mar 2009 14:43:36 -0700 |
| parents | c9004fe53695 70998f2e05ef |
| children | 7bb995fbd3c0 |
| rev | line source |
|---|---|
| 0 | 1 /* |
| 196 | 2 * Copyright 2003-2008 Sun Microsystems, Inc. All Rights Reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
| 19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 20 * CA 95054 USA or visit www.sun.com if you need additional information or | |
| 21 * have any questions. | |
| 22 * | |
| 23 */ | |
| 24 | |
| 25 #include "incls/_precompiled.incl" | |
| 26 #include "incls/_sharedRuntime_x86_32.cpp.incl" | |
| 27 | |
| 28 #define __ masm-> | |
| 29 #ifdef COMPILER2 | |
| 30 UncommonTrapBlob *SharedRuntime::_uncommon_trap_blob; | |
| 31 #endif // COMPILER2 | |
| 32 | |
| 33 DeoptimizationBlob *SharedRuntime::_deopt_blob; | |
| 34 SafepointBlob *SharedRuntime::_polling_page_safepoint_handler_blob; | |
| 35 SafepointBlob *SharedRuntime::_polling_page_return_handler_blob; | |
| 36 RuntimeStub* SharedRuntime::_wrong_method_blob; | |
| 37 RuntimeStub* SharedRuntime::_ic_miss_blob; | |
| 38 RuntimeStub* SharedRuntime::_resolve_opt_virtual_call_blob; | |
| 39 RuntimeStub* SharedRuntime::_resolve_virtual_call_blob; | |
| 40 RuntimeStub* SharedRuntime::_resolve_static_call_blob; | |
| 41 | |
|
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42 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; |
|
c9004fe53695
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changeset
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43 |
| 0 | 44 class RegisterSaver { |
| 45 enum { FPU_regs_live = 8 /*for the FPU stack*/+8/*eight more for XMM registers*/ }; | |
| 46 // Capture info about frame layout | |
| 47 enum layout { | |
| 48 fpu_state_off = 0, | |
| 49 fpu_state_end = fpu_state_off+FPUStateSizeInWords-1, | |
| 50 st0_off, st0H_off, | |
| 51 st1_off, st1H_off, | |
| 52 st2_off, st2H_off, | |
| 53 st3_off, st3H_off, | |
| 54 st4_off, st4H_off, | |
| 55 st5_off, st5H_off, | |
| 56 st6_off, st6H_off, | |
| 57 st7_off, st7H_off, | |
| 58 | |
| 59 xmm0_off, xmm0H_off, | |
| 60 xmm1_off, xmm1H_off, | |
| 61 xmm2_off, xmm2H_off, | |
| 62 xmm3_off, xmm3H_off, | |
| 63 xmm4_off, xmm4H_off, | |
| 64 xmm5_off, xmm5H_off, | |
| 65 xmm6_off, xmm6H_off, | |
| 66 xmm7_off, xmm7H_off, | |
| 67 flags_off, | |
| 68 rdi_off, | |
| 69 rsi_off, | |
| 70 ignore_off, // extra copy of rbp, | |
| 71 rsp_off, | |
| 72 rbx_off, | |
| 73 rdx_off, | |
| 74 rcx_off, | |
| 75 rax_off, | |
| 76 // The frame sender code expects that rbp will be in the "natural" place and | |
| 77 // will override any oopMap setting for it. We must therefore force the layout | |
| 78 // so that it agrees with the frame sender code. | |
| 79 rbp_off, | |
| 80 return_off, // slot for return address | |
| 81 reg_save_size }; | |
| 82 | |
| 83 | |
| 84 public: | |
| 85 | |
| 86 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, | |
| 87 int* total_frame_words, bool verify_fpu = true); | |
| 88 static void restore_live_registers(MacroAssembler* masm); | |
| 89 | |
| 90 static int rax_offset() { return rax_off; } | |
| 91 static int rbx_offset() { return rbx_off; } | |
| 92 | |
| 93 // Offsets into the register save area | |
| 94 // Used by deoptimization when it is managing result register | |
| 95 // values on its own | |
| 96 | |
| 97 static int raxOffset(void) { return rax_off; } | |
| 98 static int rdxOffset(void) { return rdx_off; } | |
| 99 static int rbxOffset(void) { return rbx_off; } | |
| 100 static int xmm0Offset(void) { return xmm0_off; } | |
| 101 // This really returns a slot in the fp save area, which one is not important | |
| 102 static int fpResultOffset(void) { return st0_off; } | |
| 103 | |
| 104 // During deoptimization only the result register need to be restored | |
| 105 // all the other values have already been extracted. | |
| 106 | |
| 107 static void restore_result_registers(MacroAssembler* masm); | |
| 108 | |
| 109 }; | |
| 110 | |
| 111 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, | |
| 112 int* total_frame_words, bool verify_fpu) { | |
| 113 | |
| 114 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize; | |
| 115 int frame_words = frame_size_in_bytes / wordSize; | |
| 116 *total_frame_words = frame_words; | |
| 117 | |
| 118 assert(FPUStateSizeInWords == 27, "update stack layout"); | |
| 119 | |
| 120 // save registers, fpu state, and flags | |
| 121 // We assume caller has already has return address slot on the stack | |
| 122 // We push epb twice in this sequence because we want the real rbp, | |
| 304 | 123 // to be under the return like a normal enter and we want to use pusha |
| 0 | 124 // We push by hand instead of pusing push |
| 125 __ enter(); | |
| 304 | 126 __ pusha(); |
| 127 __ pushf(); | |
| 128 __ subptr(rsp,FPU_regs_live*sizeof(jdouble)); // Push FPU registers space | |
| 0 | 129 __ push_FPU_state(); // Save FPU state & init |
| 130 | |
| 131 if (verify_fpu) { | |
| 132 // Some stubs may have non standard FPU control word settings so | |
| 133 // only check and reset the value when it required to be the | |
| 134 // standard value. The safepoint blob in particular can be used | |
| 135 // in methods which are using the 24 bit control word for | |
| 136 // optimized float math. | |
| 137 | |
| 138 #ifdef ASSERT | |
| 139 // Make sure the control word has the expected value | |
| 140 Label ok; | |
| 141 __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std()); | |
| 142 __ jccb(Assembler::equal, ok); | |
| 143 __ stop("corrupted control word detected"); | |
| 144 __ bind(ok); | |
| 145 #endif | |
| 146 | |
| 147 // Reset the control word to guard against exceptions being unmasked | |
| 148 // since fstp_d can cause FPU stack underflow exceptions. Write it | |
| 149 // into the on stack copy and then reload that to make sure that the | |
| 150 // current and future values are correct. | |
| 151 __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std()); | |
| 152 } | |
| 153 | |
| 154 __ frstor(Address(rsp, 0)); | |
| 155 if (!verify_fpu) { | |
| 156 // Set the control word so that exceptions are masked for the | |
| 157 // following code. | |
| 158 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); | |
| 159 } | |
| 160 | |
| 161 // Save the FPU registers in de-opt-able form | |
| 162 | |
| 163 __ fstp_d(Address(rsp, st0_off*wordSize)); // st(0) | |
| 164 __ fstp_d(Address(rsp, st1_off*wordSize)); // st(1) | |
| 165 __ fstp_d(Address(rsp, st2_off*wordSize)); // st(2) | |
| 166 __ fstp_d(Address(rsp, st3_off*wordSize)); // st(3) | |
| 167 __ fstp_d(Address(rsp, st4_off*wordSize)); // st(4) | |
| 168 __ fstp_d(Address(rsp, st5_off*wordSize)); // st(5) | |
| 169 __ fstp_d(Address(rsp, st6_off*wordSize)); // st(6) | |
| 170 __ fstp_d(Address(rsp, st7_off*wordSize)); // st(7) | |
| 171 | |
| 172 if( UseSSE == 1 ) { // Save the XMM state | |
| 173 __ movflt(Address(rsp,xmm0_off*wordSize),xmm0); | |
| 174 __ movflt(Address(rsp,xmm1_off*wordSize),xmm1); | |
| 175 __ movflt(Address(rsp,xmm2_off*wordSize),xmm2); | |
| 176 __ movflt(Address(rsp,xmm3_off*wordSize),xmm3); | |
| 177 __ movflt(Address(rsp,xmm4_off*wordSize),xmm4); | |
| 178 __ movflt(Address(rsp,xmm5_off*wordSize),xmm5); | |
| 179 __ movflt(Address(rsp,xmm6_off*wordSize),xmm6); | |
| 180 __ movflt(Address(rsp,xmm7_off*wordSize),xmm7); | |
| 181 } else if( UseSSE >= 2 ) { | |
| 182 __ movdbl(Address(rsp,xmm0_off*wordSize),xmm0); | |
| 183 __ movdbl(Address(rsp,xmm1_off*wordSize),xmm1); | |
| 184 __ movdbl(Address(rsp,xmm2_off*wordSize),xmm2); | |
| 185 __ movdbl(Address(rsp,xmm3_off*wordSize),xmm3); | |
| 186 __ movdbl(Address(rsp,xmm4_off*wordSize),xmm4); | |
| 187 __ movdbl(Address(rsp,xmm5_off*wordSize),xmm5); | |
| 188 __ movdbl(Address(rsp,xmm6_off*wordSize),xmm6); | |
| 189 __ movdbl(Address(rsp,xmm7_off*wordSize),xmm7); | |
| 190 } | |
| 191 | |
| 192 // Set an oopmap for the call site. This oopmap will map all | |
| 193 // oop-registers and debug-info registers as callee-saved. This | |
| 194 // will allow deoptimization at this safepoint to find all possible | |
| 195 // debug-info recordings, as well as let GC find all oops. | |
| 196 | |
| 197 OopMapSet *oop_maps = new OopMapSet(); | |
| 198 OopMap* map = new OopMap( frame_words, 0 ); | |
| 199 | |
| 200 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words) | |
| 201 | |
| 202 map->set_callee_saved(STACK_OFFSET( rax_off), rax->as_VMReg()); | |
| 203 map->set_callee_saved(STACK_OFFSET( rcx_off), rcx->as_VMReg()); | |
| 204 map->set_callee_saved(STACK_OFFSET( rdx_off), rdx->as_VMReg()); | |
| 205 map->set_callee_saved(STACK_OFFSET( rbx_off), rbx->as_VMReg()); | |
| 206 // rbp, location is known implicitly, no oopMap | |
| 207 map->set_callee_saved(STACK_OFFSET( rsi_off), rsi->as_VMReg()); | |
| 208 map->set_callee_saved(STACK_OFFSET( rdi_off), rdi->as_VMReg()); | |
| 209 map->set_callee_saved(STACK_OFFSET(st0_off), as_FloatRegister(0)->as_VMReg()); | |
| 210 map->set_callee_saved(STACK_OFFSET(st1_off), as_FloatRegister(1)->as_VMReg()); | |
| 211 map->set_callee_saved(STACK_OFFSET(st2_off), as_FloatRegister(2)->as_VMReg()); | |
| 212 map->set_callee_saved(STACK_OFFSET(st3_off), as_FloatRegister(3)->as_VMReg()); | |
| 213 map->set_callee_saved(STACK_OFFSET(st4_off), as_FloatRegister(4)->as_VMReg()); | |
| 214 map->set_callee_saved(STACK_OFFSET(st5_off), as_FloatRegister(5)->as_VMReg()); | |
| 215 map->set_callee_saved(STACK_OFFSET(st6_off), as_FloatRegister(6)->as_VMReg()); | |
| 216 map->set_callee_saved(STACK_OFFSET(st7_off), as_FloatRegister(7)->as_VMReg()); | |
| 217 map->set_callee_saved(STACK_OFFSET(xmm0_off), xmm0->as_VMReg()); | |
| 218 map->set_callee_saved(STACK_OFFSET(xmm1_off), xmm1->as_VMReg()); | |
| 219 map->set_callee_saved(STACK_OFFSET(xmm2_off), xmm2->as_VMReg()); | |
| 220 map->set_callee_saved(STACK_OFFSET(xmm3_off), xmm3->as_VMReg()); | |
| 221 map->set_callee_saved(STACK_OFFSET(xmm4_off), xmm4->as_VMReg()); | |
| 222 map->set_callee_saved(STACK_OFFSET(xmm5_off), xmm5->as_VMReg()); | |
| 223 map->set_callee_saved(STACK_OFFSET(xmm6_off), xmm6->as_VMReg()); | |
| 224 map->set_callee_saved(STACK_OFFSET(xmm7_off), xmm7->as_VMReg()); | |
| 225 // %%% This is really a waste but we'll keep things as they were for now | |
| 226 if (true) { | |
| 227 #define NEXTREG(x) (x)->as_VMReg()->next() | |
| 228 map->set_callee_saved(STACK_OFFSET(st0H_off), NEXTREG(as_FloatRegister(0))); | |
| 229 map->set_callee_saved(STACK_OFFSET(st1H_off), NEXTREG(as_FloatRegister(1))); | |
| 230 map->set_callee_saved(STACK_OFFSET(st2H_off), NEXTREG(as_FloatRegister(2))); | |
| 231 map->set_callee_saved(STACK_OFFSET(st3H_off), NEXTREG(as_FloatRegister(3))); | |
| 232 map->set_callee_saved(STACK_OFFSET(st4H_off), NEXTREG(as_FloatRegister(4))); | |
| 233 map->set_callee_saved(STACK_OFFSET(st5H_off), NEXTREG(as_FloatRegister(5))); | |
| 234 map->set_callee_saved(STACK_OFFSET(st6H_off), NEXTREG(as_FloatRegister(6))); | |
| 235 map->set_callee_saved(STACK_OFFSET(st7H_off), NEXTREG(as_FloatRegister(7))); | |
| 236 map->set_callee_saved(STACK_OFFSET(xmm0H_off), NEXTREG(xmm0)); | |
| 237 map->set_callee_saved(STACK_OFFSET(xmm1H_off), NEXTREG(xmm1)); | |
| 238 map->set_callee_saved(STACK_OFFSET(xmm2H_off), NEXTREG(xmm2)); | |
| 239 map->set_callee_saved(STACK_OFFSET(xmm3H_off), NEXTREG(xmm3)); | |
| 240 map->set_callee_saved(STACK_OFFSET(xmm4H_off), NEXTREG(xmm4)); | |
| 241 map->set_callee_saved(STACK_OFFSET(xmm5H_off), NEXTREG(xmm5)); | |
| 242 map->set_callee_saved(STACK_OFFSET(xmm6H_off), NEXTREG(xmm6)); | |
| 243 map->set_callee_saved(STACK_OFFSET(xmm7H_off), NEXTREG(xmm7)); | |
| 244 #undef NEXTREG | |
| 245 #undef STACK_OFFSET | |
| 246 } | |
| 247 | |
| 248 return map; | |
| 249 | |
| 250 } | |
| 251 | |
| 252 void RegisterSaver::restore_live_registers(MacroAssembler* masm) { | |
| 253 | |
| 254 // Recover XMM & FPU state | |
| 255 if( UseSSE == 1 ) { | |
| 256 __ movflt(xmm0,Address(rsp,xmm0_off*wordSize)); | |
| 257 __ movflt(xmm1,Address(rsp,xmm1_off*wordSize)); | |
| 258 __ movflt(xmm2,Address(rsp,xmm2_off*wordSize)); | |
| 259 __ movflt(xmm3,Address(rsp,xmm3_off*wordSize)); | |
| 260 __ movflt(xmm4,Address(rsp,xmm4_off*wordSize)); | |
| 261 __ movflt(xmm5,Address(rsp,xmm5_off*wordSize)); | |
| 262 __ movflt(xmm6,Address(rsp,xmm6_off*wordSize)); | |
| 263 __ movflt(xmm7,Address(rsp,xmm7_off*wordSize)); | |
| 264 } else if( UseSSE >= 2 ) { | |
| 265 __ movdbl(xmm0,Address(rsp,xmm0_off*wordSize)); | |
| 266 __ movdbl(xmm1,Address(rsp,xmm1_off*wordSize)); | |
| 267 __ movdbl(xmm2,Address(rsp,xmm2_off*wordSize)); | |
| 268 __ movdbl(xmm3,Address(rsp,xmm3_off*wordSize)); | |
| 269 __ movdbl(xmm4,Address(rsp,xmm4_off*wordSize)); | |
| 270 __ movdbl(xmm5,Address(rsp,xmm5_off*wordSize)); | |
| 271 __ movdbl(xmm6,Address(rsp,xmm6_off*wordSize)); | |
| 272 __ movdbl(xmm7,Address(rsp,xmm7_off*wordSize)); | |
| 273 } | |
| 274 __ pop_FPU_state(); | |
| 304 | 275 __ addptr(rsp, FPU_regs_live*sizeof(jdouble)); // Pop FPU registers |
| 276 | |
| 277 __ popf(); | |
| 278 __ popa(); | |
| 0 | 279 // Get the rbp, described implicitly by the frame sender code (no oopMap) |
| 304 | 280 __ pop(rbp); |
| 0 | 281 |
| 282 } | |
| 283 | |
| 284 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
| 285 | |
| 286 // Just restore result register. Only used by deoptimization. By | |
| 287 // now any callee save register that needs to be restore to a c2 | |
| 288 // caller of the deoptee has been extracted into the vframeArray | |
| 289 // and will be stuffed into the c2i adapter we create for later | |
| 290 // restoration so only result registers need to be restored here. | |
| 291 // | |
| 292 | |
| 293 __ frstor(Address(rsp, 0)); // Restore fpu state | |
| 294 | |
| 295 // Recover XMM & FPU state | |
| 296 if( UseSSE == 1 ) { | |
| 297 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize)); | |
| 298 } else if( UseSSE >= 2 ) { | |
| 299 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize)); | |
| 300 } | |
| 304 | 301 __ movptr(rax, Address(rsp, rax_off*wordSize)); |
| 302 __ movptr(rdx, Address(rsp, rdx_off*wordSize)); | |
| 0 | 303 // Pop all of the register save are off the stack except the return address |
| 304 | 304 __ addptr(rsp, return_off * wordSize); |
| 0 | 305 } |
| 306 | |
| 307 // The java_calling_convention describes stack locations as ideal slots on | |
| 308 // a frame with no abi restrictions. Since we must observe abi restrictions | |
| 309 // (like the placement of the register window) the slots must be biased by | |
| 310 // the following value. | |
| 311 static int reg2offset_in(VMReg r) { | |
| 312 // Account for saved rbp, and return address | |
| 313 // This should really be in_preserve_stack_slots | |
| 314 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size; | |
| 315 } | |
| 316 | |
| 317 static int reg2offset_out(VMReg r) { | |
| 318 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
| 319 } | |
| 320 | |
| 321 // --------------------------------------------------------------------------- | |
| 322 // Read the array of BasicTypes from a signature, and compute where the | |
| 323 // arguments should go. Values in the VMRegPair regs array refer to 4-byte | |
| 324 // quantities. Values less than SharedInfo::stack0 are registers, those above | |
| 325 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer | |
| 326 // as framesizes are fixed. | |
| 327 // VMRegImpl::stack0 refers to the first slot 0(sp). | |
| 328 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
| 329 // up to RegisterImpl::number_of_registers) are the 32-bit | |
| 330 // integer registers. | |
| 331 | |
| 332 // Pass first two oop/int args in registers ECX and EDX. | |
| 333 // Pass first two float/double args in registers XMM0 and XMM1. | |
| 334 // Doubles have precedence, so if you pass a mix of floats and doubles | |
| 335 // the doubles will grab the registers before the floats will. | |
| 336 | |
| 337 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
| 338 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
| 339 // units regardless of build. Of course for i486 there is no 64 bit build | |
| 340 | |
| 341 | |
| 342 // --------------------------------------------------------------------------- | |
| 343 // The compiled Java calling convention. | |
| 344 // Pass first two oop/int args in registers ECX and EDX. | |
| 345 // Pass first two float/double args in registers XMM0 and XMM1. | |
| 346 // Doubles have precedence, so if you pass a mix of floats and doubles | |
| 347 // the doubles will grab the registers before the floats will. | |
| 348 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
| 349 VMRegPair *regs, | |
| 350 int total_args_passed, | |
| 351 int is_outgoing) { | |
| 352 uint stack = 0; // Starting stack position for args on stack | |
| 353 | |
| 354 | |
| 355 // Pass first two oop/int args in registers ECX and EDX. | |
| 356 uint reg_arg0 = 9999; | |
| 357 uint reg_arg1 = 9999; | |
| 358 | |
| 359 // Pass first two float/double args in registers XMM0 and XMM1. | |
| 360 // Doubles have precedence, so if you pass a mix of floats and doubles | |
| 361 // the doubles will grab the registers before the floats will. | |
| 362 // CNC - TURNED OFF FOR non-SSE. | |
| 363 // On Intel we have to round all doubles (and most floats) at | |
| 364 // call sites by storing to the stack in any case. | |
| 365 // UseSSE=0 ==> Don't Use ==> 9999+0 | |
| 366 // UseSSE=1 ==> Floats only ==> 9999+1 | |
| 367 // UseSSE>=2 ==> Floats or doubles ==> 9999+2 | |
| 368 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 }; | |
| 369 uint fargs = (UseSSE>=2) ? 2 : UseSSE; | |
| 370 uint freg_arg0 = 9999+fargs; | |
| 371 uint freg_arg1 = 9999+fargs; | |
| 372 | |
| 373 // Pass doubles & longs aligned on the stack. First count stack slots for doubles | |
| 374 int i; | |
| 375 for( i = 0; i < total_args_passed; i++) { | |
| 376 if( sig_bt[i] == T_DOUBLE ) { | |
| 377 // first 2 doubles go in registers | |
| 378 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i; | |
| 379 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i; | |
| 380 else // Else double is passed low on the stack to be aligned. | |
| 381 stack += 2; | |
| 382 } else if( sig_bt[i] == T_LONG ) { | |
| 383 stack += 2; | |
| 384 } | |
| 385 } | |
| 386 int dstack = 0; // Separate counter for placing doubles | |
| 387 | |
| 388 // Now pick where all else goes. | |
| 389 for( i = 0; i < total_args_passed; i++) { | |
| 390 // From the type and the argument number (count) compute the location | |
| 391 switch( sig_bt[i] ) { | |
| 392 case T_SHORT: | |
| 393 case T_CHAR: | |
| 394 case T_BYTE: | |
| 395 case T_BOOLEAN: | |
| 396 case T_INT: | |
| 397 case T_ARRAY: | |
| 398 case T_OBJECT: | |
| 399 case T_ADDRESS: | |
| 400 if( reg_arg0 == 9999 ) { | |
| 401 reg_arg0 = i; | |
| 402 regs[i].set1(rcx->as_VMReg()); | |
| 403 } else if( reg_arg1 == 9999 ) { | |
| 404 reg_arg1 = i; | |
| 405 regs[i].set1(rdx->as_VMReg()); | |
| 406 } else { | |
| 407 regs[i].set1(VMRegImpl::stack2reg(stack++)); | |
| 408 } | |
| 409 break; | |
| 410 case T_FLOAT: | |
| 411 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) { | |
| 412 freg_arg0 = i; | |
| 413 regs[i].set1(xmm0->as_VMReg()); | |
| 414 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) { | |
| 415 freg_arg1 = i; | |
| 416 regs[i].set1(xmm1->as_VMReg()); | |
| 417 } else { | |
| 418 regs[i].set1(VMRegImpl::stack2reg(stack++)); | |
| 419 } | |
| 420 break; | |
| 421 case T_LONG: | |
| 422 assert(sig_bt[i+1] == T_VOID, "missing Half" ); | |
| 423 regs[i].set2(VMRegImpl::stack2reg(dstack)); | |
| 424 dstack += 2; | |
| 425 break; | |
| 426 case T_DOUBLE: | |
| 427 assert(sig_bt[i+1] == T_VOID, "missing Half" ); | |
| 428 if( freg_arg0 == (uint)i ) { | |
| 429 regs[i].set2(xmm0->as_VMReg()); | |
| 430 } else if( freg_arg1 == (uint)i ) { | |
| 431 regs[i].set2(xmm1->as_VMReg()); | |
| 432 } else { | |
| 433 regs[i].set2(VMRegImpl::stack2reg(dstack)); | |
| 434 dstack += 2; | |
| 435 } | |
| 436 break; | |
| 437 case T_VOID: regs[i].set_bad(); break; | |
| 438 break; | |
| 439 default: | |
| 440 ShouldNotReachHere(); | |
| 441 break; | |
| 442 } | |
| 443 } | |
| 444 | |
| 445 // return value can be odd number of VMRegImpl stack slots make multiple of 2 | |
| 446 return round_to(stack, 2); | |
| 447 } | |
| 448 | |
| 449 // Patch the callers callsite with entry to compiled code if it exists. | |
| 450 static void patch_callers_callsite(MacroAssembler *masm) { | |
| 451 Label L; | |
| 452 __ verify_oop(rbx); | |
| 304 | 453 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD); |
| 0 | 454 __ jcc(Assembler::equal, L); |
| 455 // Schedule the branch target address early. | |
| 456 // Call into the VM to patch the caller, then jump to compiled callee | |
| 457 // rax, isn't live so capture return address while we easily can | |
| 304 | 458 __ movptr(rax, Address(rsp, 0)); |
| 459 __ pusha(); | |
| 460 __ pushf(); | |
| 0 | 461 |
| 462 if (UseSSE == 1) { | |
| 304 | 463 __ subptr(rsp, 2*wordSize); |
| 0 | 464 __ movflt(Address(rsp, 0), xmm0); |
| 465 __ movflt(Address(rsp, wordSize), xmm1); | |
| 466 } | |
| 467 if (UseSSE >= 2) { | |
| 304 | 468 __ subptr(rsp, 4*wordSize); |
| 0 | 469 __ movdbl(Address(rsp, 0), xmm0); |
| 470 __ movdbl(Address(rsp, 2*wordSize), xmm1); | |
| 471 } | |
| 472 #ifdef COMPILER2 | |
| 473 // C2 may leave the stack dirty if not in SSE2+ mode | |
| 474 if (UseSSE >= 2) { | |
| 475 __ verify_FPU(0, "c2i transition should have clean FPU stack"); | |
| 476 } else { | |
| 477 __ empty_FPU_stack(); | |
| 478 } | |
| 479 #endif /* COMPILER2 */ | |
| 480 | |
| 481 // VM needs caller's callsite | |
| 304 | 482 __ push(rax); |
| 0 | 483 // VM needs target method |
| 304 | 484 __ push(rbx); |
| 0 | 485 __ verify_oop(rbx); |
| 486 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); | |
| 304 | 487 __ addptr(rsp, 2*wordSize); |
| 0 | 488 |
| 489 if (UseSSE == 1) { | |
| 490 __ movflt(xmm0, Address(rsp, 0)); | |
| 491 __ movflt(xmm1, Address(rsp, wordSize)); | |
| 304 | 492 __ addptr(rsp, 2*wordSize); |
| 0 | 493 } |
| 494 if (UseSSE >= 2) { | |
| 495 __ movdbl(xmm0, Address(rsp, 0)); | |
| 496 __ movdbl(xmm1, Address(rsp, 2*wordSize)); | |
| 304 | 497 __ addptr(rsp, 4*wordSize); |
| 0 | 498 } |
| 499 | |
| 304 | 500 __ popf(); |
| 501 __ popa(); | |
| 0 | 502 __ bind(L); |
| 503 } | |
| 504 | |
| 505 | |
| 506 // Helper function to put tags in interpreter stack. | |
| 507 static void tag_stack(MacroAssembler *masm, const BasicType sig, int st_off) { | |
| 508 if (TaggedStackInterpreter) { | |
| 509 int tag_offset = st_off + Interpreter::expr_tag_offset_in_bytes(0); | |
| 510 if (sig == T_OBJECT || sig == T_ARRAY) { | |
| 304 | 511 __ movptr(Address(rsp, tag_offset), frame::TagReference); |
| 0 | 512 } else if (sig == T_LONG || sig == T_DOUBLE) { |
| 513 int next_tag_offset = st_off + Interpreter::expr_tag_offset_in_bytes(1); | |
| 304 | 514 __ movptr(Address(rsp, next_tag_offset), frame::TagValue); |
| 515 __ movptr(Address(rsp, tag_offset), frame::TagValue); | |
| 0 | 516 } else { |
| 304 | 517 __ movptr(Address(rsp, tag_offset), frame::TagValue); |
| 0 | 518 } |
| 519 } | |
| 520 } | |
| 521 | |
| 522 // Double and long values with Tagged stacks are not contiguous. | |
| 523 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) { | |
| 524 int next_off = st_off - Interpreter::stackElementSize(); | |
| 525 if (TaggedStackInterpreter) { | |
| 526 __ movdbl(Address(rsp, next_off), r); | |
| 527 // Move top half up and put tag in the middle. | |
| 528 __ movl(rdi, Address(rsp, next_off+wordSize)); | |
| 529 __ movl(Address(rsp, st_off), rdi); | |
| 530 tag_stack(masm, T_DOUBLE, next_off); | |
| 531 } else { | |
| 532 __ movdbl(Address(rsp, next_off), r); | |
| 533 } | |
| 534 } | |
| 535 | |
| 536 static void gen_c2i_adapter(MacroAssembler *masm, | |
| 537 int total_args_passed, | |
| 538 int comp_args_on_stack, | |
| 539 const BasicType *sig_bt, | |
| 540 const VMRegPair *regs, | |
| 541 Label& skip_fixup) { | |
| 542 // Before we get into the guts of the C2I adapter, see if we should be here | |
| 543 // at all. We've come from compiled code and are attempting to jump to the | |
| 544 // interpreter, which means the caller made a static call to get here | |
| 545 // (vcalls always get a compiled target if there is one). Check for a | |
| 546 // compiled target. If there is one, we need to patch the caller's call. | |
| 547 patch_callers_callsite(masm); | |
| 548 | |
| 549 __ bind(skip_fixup); | |
| 550 | |
| 551 #ifdef COMPILER2 | |
| 552 // C2 may leave the stack dirty if not in SSE2+ mode | |
| 553 if (UseSSE >= 2) { | |
| 554 __ verify_FPU(0, "c2i transition should have clean FPU stack"); | |
| 555 } else { | |
| 556 __ empty_FPU_stack(); | |
| 557 } | |
| 558 #endif /* COMPILER2 */ | |
| 559 | |
| 560 // Since all args are passed on the stack, total_args_passed * interpreter_ | |
| 561 // stack_element_size is the | |
| 562 // space we need. | |
| 563 int extraspace = total_args_passed * Interpreter::stackElementSize(); | |
| 564 | |
| 565 // Get return address | |
| 304 | 566 __ pop(rax); |
| 0 | 567 |
| 568 // set senderSP value | |
| 304 | 569 __ movptr(rsi, rsp); |
| 570 | |
| 571 __ subptr(rsp, extraspace); | |
| 0 | 572 |
| 573 // Now write the args into the outgoing interpreter space | |
| 574 for (int i = 0; i < total_args_passed; i++) { | |
| 575 if (sig_bt[i] == T_VOID) { | |
| 576 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
| 577 continue; | |
| 578 } | |
| 579 | |
| 580 // st_off points to lowest address on stack. | |
| 581 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize(); | |
| 304 | 582 int next_off = st_off - Interpreter::stackElementSize(); |
| 583 | |
| 0 | 584 // Say 4 args: |
| 585 // i st_off | |
| 586 // 0 12 T_LONG | |
| 587 // 1 8 T_VOID | |
| 588 // 2 4 T_OBJECT | |
| 589 // 3 0 T_BOOL | |
| 590 VMReg r_1 = regs[i].first(); | |
| 591 VMReg r_2 = regs[i].second(); | |
| 592 if (!r_1->is_valid()) { | |
| 593 assert(!r_2->is_valid(), ""); | |
| 594 continue; | |
| 595 } | |
| 596 | |
| 597 if (r_1->is_stack()) { | |
| 598 // memory to memory use fpu stack top | |
| 599 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; | |
| 600 | |
| 601 if (!r_2->is_valid()) { | |
| 602 __ movl(rdi, Address(rsp, ld_off)); | |
| 304 | 603 __ movptr(Address(rsp, st_off), rdi); |
| 0 | 604 tag_stack(masm, sig_bt[i], st_off); |
| 605 } else { | |
| 606 | |
| 607 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW | |
| 608 // st_off == MSW, st_off-wordSize == LSW | |
| 609 | |
| 304 | 610 __ movptr(rdi, Address(rsp, ld_off)); |
| 611 __ movptr(Address(rsp, next_off), rdi); | |
| 612 #ifndef _LP64 | |
| 613 __ movptr(rdi, Address(rsp, ld_off + wordSize)); | |
| 614 __ movptr(Address(rsp, st_off), rdi); | |
| 615 #else | |
| 616 #ifdef ASSERT | |
| 617 // Overwrite the unused slot with known junk | |
| 618 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); | |
| 619 __ movptr(Address(rsp, st_off), rax); | |
| 620 #endif /* ASSERT */ | |
| 621 #endif // _LP64 | |
| 0 | 622 tag_stack(masm, sig_bt[i], next_off); |
| 623 } | |
| 624 } else if (r_1->is_Register()) { | |
| 625 Register r = r_1->as_Register(); | |
| 626 if (!r_2->is_valid()) { | |
| 627 __ movl(Address(rsp, st_off), r); | |
| 628 tag_stack(masm, sig_bt[i], st_off); | |
| 629 } else { | |
| 630 // long/double in gpr | |
| 304 | 631 NOT_LP64(ShouldNotReachHere()); |
| 632 // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
| 633 // T_DOUBLE and T_LONG use two slots in the interpreter | |
| 634 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
| 635 // long/double in gpr | |
| 636 #ifdef ASSERT | |
| 637 // Overwrite the unused slot with known junk | |
| 638 LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab))); | |
| 639 __ movptr(Address(rsp, st_off), rax); | |
| 640 #endif /* ASSERT */ | |
| 641 __ movptr(Address(rsp, next_off), r); | |
| 642 tag_stack(masm, sig_bt[i], next_off); | |
| 643 } else { | |
| 644 __ movptr(Address(rsp, st_off), r); | |
| 645 tag_stack(masm, sig_bt[i], st_off); | |
| 646 } | |
| 0 | 647 } |
| 648 } else { | |
| 649 assert(r_1->is_XMMRegister(), ""); | |
| 650 if (!r_2->is_valid()) { | |
| 651 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); | |
| 652 tag_stack(masm, sig_bt[i], st_off); | |
| 653 } else { | |
| 654 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type"); | |
| 655 move_c2i_double(masm, r_1->as_XMMRegister(), st_off); | |
| 656 } | |
| 657 } | |
| 658 } | |
| 659 | |
| 660 // Schedule the branch target address early. | |
| 304 | 661 __ movptr(rcx, Address(rbx, in_bytes(methodOopDesc::interpreter_entry_offset()))); |
| 0 | 662 // And repush original return address |
| 304 | 663 __ push(rax); |
| 0 | 664 __ jmp(rcx); |
| 665 } | |
| 666 | |
| 667 | |
| 668 // For tagged stacks, double or long value aren't contiguous on the stack | |
| 669 // so get them contiguous for the xmm load | |
| 670 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) { | |
| 671 int next_val_off = ld_off - Interpreter::stackElementSize(); | |
| 672 if (TaggedStackInterpreter) { | |
| 673 // use tag slot temporarily for MSW | |
| 304 | 674 __ movptr(rsi, Address(saved_sp, ld_off)); |
| 675 __ movptr(Address(saved_sp, next_val_off+wordSize), rsi); | |
| 0 | 676 __ movdbl(r, Address(saved_sp, next_val_off)); |
| 677 // restore tag | |
| 304 | 678 __ movptr(Address(saved_sp, next_val_off+wordSize), frame::TagValue); |
| 0 | 679 } else { |
| 680 __ movdbl(r, Address(saved_sp, next_val_off)); | |
| 681 } | |
| 682 } | |
| 683 | |
| 684 static void gen_i2c_adapter(MacroAssembler *masm, | |
| 685 int total_args_passed, | |
| 686 int comp_args_on_stack, | |
| 687 const BasicType *sig_bt, | |
| 688 const VMRegPair *regs) { | |
| 689 // we're being called from the interpreter but need to find the | |
| 690 // compiled return entry point. The return address on the stack | |
| 691 // should point at it and we just need to pull the old value out. | |
| 692 // load up the pointer to the compiled return entry point and | |
| 693 // rewrite our return pc. The code is arranged like so: | |
| 694 // | |
| 695 // .word Interpreter::return_sentinel | |
| 696 // .word address_of_compiled_return_point | |
| 697 // return_entry_point: blah_blah_blah | |
| 698 // | |
| 699 // So we can find the appropriate return point by loading up the word | |
| 700 // just prior to the current return address we have on the stack. | |
| 701 // | |
| 702 // We will only enter here from an interpreted frame and never from after | |
| 703 // passing thru a c2i. Azul allowed this but we do not. If we lose the | |
| 704 // race and use a c2i we will remain interpreted for the race loser(s). | |
| 705 // This removes all sorts of headaches on the x86 side and also eliminates | |
| 706 // the possibility of having c2i -> i2c -> c2i -> ... endless transitions. | |
| 707 | |
| 708 | |
| 709 // Note: rsi contains the senderSP on entry. We must preserve it since | |
| 710 // we may do a i2c -> c2i transition if we lose a race where compiled | |
| 711 // code goes non-entrant while we get args ready. | |
| 712 | |
| 713 // Pick up the return address | |
| 304 | 714 __ movptr(rax, Address(rsp, 0)); |
| 0 | 715 |
| 716 // If UseSSE >= 2 then no cleanup is needed on the return to the | |
| 717 // interpreter so skip fixing up the return entry point unless | |
| 718 // VerifyFPU is enabled. | |
| 719 if (UseSSE < 2 || VerifyFPU) { | |
| 720 Label skip, chk_int; | |
| 721 // If we were called from the call stub we need to do a little bit different | |
| 722 // cleanup than if the interpreter returned to the call stub. | |
| 723 | |
| 724 ExternalAddress stub_return_address(StubRoutines::_call_stub_return_address); | |
| 304 | 725 __ cmpptr(rax, stub_return_address.addr()); |
| 0 | 726 __ jcc(Assembler::notEqual, chk_int); |
| 304 | 727 assert(StubRoutines::x86::get_call_stub_compiled_return() != NULL, "must be set"); |
| 728 __ lea(rax, ExternalAddress(StubRoutines::x86::get_call_stub_compiled_return())); | |
| 0 | 729 __ jmp(skip); |
| 730 | |
| 731 // It must be the interpreter since we never get here via a c2i (unlike Azul) | |
| 732 | |
| 733 __ bind(chk_int); | |
| 734 #ifdef ASSERT | |
| 735 { | |
| 736 Label ok; | |
| 304 | 737 __ cmpl(Address(rax, -2*wordSize), Interpreter::return_sentinel); |
| 0 | 738 __ jcc(Assembler::equal, ok); |
| 739 __ int3(); | |
| 740 __ bind(ok); | |
| 741 } | |
| 742 #endif // ASSERT | |
| 304 | 743 __ movptr(rax, Address(rax, -wordSize)); |
| 0 | 744 __ bind(skip); |
| 745 } | |
| 746 | |
| 747 // rax, now contains the compiled return entry point which will do an | |
| 748 // cleanup needed for the return from compiled to interpreted. | |
| 749 | |
| 750 // Must preserve original SP for loading incoming arguments because | |
| 751 // we need to align the outgoing SP for compiled code. | |
| 304 | 752 __ movptr(rdi, rsp); |
| 0 | 753 |
| 754 // Cut-out for having no stack args. Since up to 2 int/oop args are passed | |
| 755 // in registers, we will occasionally have no stack args. | |
| 756 int comp_words_on_stack = 0; | |
| 757 if (comp_args_on_stack) { | |
| 758 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in | |
| 759 // registers are below. By subtracting stack0, we either get a negative | |
| 760 // number (all values in registers) or the maximum stack slot accessed. | |
| 761 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg); | |
| 762 // Convert 4-byte stack slots to words. | |
| 763 comp_words_on_stack = round_to(comp_args_on_stack*4, wordSize)>>LogBytesPerWord; | |
| 764 // Round up to miminum stack alignment, in wordSize | |
| 765 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
| 304 | 766 __ subptr(rsp, comp_words_on_stack * wordSize); |
| 0 | 767 } |
| 768 | |
| 769 // Align the outgoing SP | |
| 304 | 770 __ andptr(rsp, -(StackAlignmentInBytes)); |
| 0 | 771 |
| 772 // push the return address on the stack (note that pushing, rather | |
| 773 // than storing it, yields the correct frame alignment for the callee) | |
| 304 | 774 __ push(rax); |
| 0 | 775 |
| 776 // Put saved SP in another register | |
| 777 const Register saved_sp = rax; | |
| 304 | 778 __ movptr(saved_sp, rdi); |
| 0 | 779 |
| 780 | |
| 781 // Will jump to the compiled code just as if compiled code was doing it. | |
| 782 // Pre-load the register-jump target early, to schedule it better. | |
| 304 | 783 __ movptr(rdi, Address(rbx, in_bytes(methodOopDesc::from_compiled_offset()))); |
| 0 | 784 |
| 785 // Now generate the shuffle code. Pick up all register args and move the | |
| 786 // rest through the floating point stack top. | |
| 787 for (int i = 0; i < total_args_passed; i++) { | |
| 788 if (sig_bt[i] == T_VOID) { | |
| 789 // Longs and doubles are passed in native word order, but misaligned | |
| 790 // in the 32-bit build. | |
| 791 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
| 792 continue; | |
| 793 } | |
| 794 | |
| 795 // Pick up 0, 1 or 2 words from SP+offset. | |
| 796 | |
| 797 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), | |
| 798 "scrambled load targets?"); | |
| 799 // Load in argument order going down. | |
| 800 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize() + Interpreter::value_offset_in_bytes(); | |
| 801 // Point to interpreter value (vs. tag) | |
| 802 int next_off = ld_off - Interpreter::stackElementSize(); | |
| 803 // | |
| 804 // | |
| 805 // | |
| 806 VMReg r_1 = regs[i].first(); | |
| 807 VMReg r_2 = regs[i].second(); | |
| 808 if (!r_1->is_valid()) { | |
| 809 assert(!r_2->is_valid(), ""); | |
| 810 continue; | |
| 811 } | |
| 812 if (r_1->is_stack()) { | |
| 813 // Convert stack slot to an SP offset (+ wordSize to account for return address ) | |
| 814 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; | |
| 815 | |
| 816 // We can use rsi as a temp here because compiled code doesn't need rsi as an input | |
| 817 // and if we end up going thru a c2i because of a miss a reasonable value of rsi | |
| 818 // we be generated. | |
| 819 if (!r_2->is_valid()) { | |
| 820 // __ fld_s(Address(saved_sp, ld_off)); | |
| 821 // __ fstp_s(Address(rsp, st_off)); | |
| 822 __ movl(rsi, Address(saved_sp, ld_off)); | |
| 304 | 823 __ movptr(Address(rsp, st_off), rsi); |
| 0 | 824 } else { |
| 825 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
| 826 // are accessed as negative so LSW is at LOW address | |
| 827 | |
| 828 // ld_off is MSW so get LSW | |
| 829 // st_off is LSW (i.e. reg.first()) | |
| 830 // __ fld_d(Address(saved_sp, next_off)); | |
| 831 // __ fstp_d(Address(rsp, st_off)); | |
| 304 | 832 // |
| 833 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
| 834 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
| 835 // So we must adjust where to pick up the data to match the interpreter. | |
| 836 // | |
| 837 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
| 838 // are accessed as negative so LSW is at LOW address | |
| 839 | |
| 840 // ld_off is MSW so get LSW | |
| 841 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
| 842 next_off : ld_off; | |
| 843 __ movptr(rsi, Address(saved_sp, offset)); | |
| 844 __ movptr(Address(rsp, st_off), rsi); | |
| 845 #ifndef _LP64 | |
| 846 __ movptr(rsi, Address(saved_sp, ld_off)); | |
| 847 __ movptr(Address(rsp, st_off + wordSize), rsi); | |
| 848 #endif // _LP64 | |
| 0 | 849 } |
| 850 } else if (r_1->is_Register()) { // Register argument | |
| 851 Register r = r_1->as_Register(); | |
| 852 assert(r != rax, "must be different"); | |
| 853 if (r_2->is_valid()) { | |
| 304 | 854 // |
| 855 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
| 856 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
| 857 // So we must adjust where to pick up the data to match the interpreter. | |
| 858 | |
| 859 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
| 860 next_off : ld_off; | |
| 861 | |
| 862 // this can be a misaligned move | |
| 863 __ movptr(r, Address(saved_sp, offset)); | |
| 864 #ifndef _LP64 | |
| 0 | 865 assert(r_2->as_Register() != rax, "need another temporary register"); |
| 866 // Remember r_1 is low address (and LSB on x86) | |
| 867 // So r_2 gets loaded from high address regardless of the platform | |
| 304 | 868 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off)); |
| 869 #endif // _LP64 | |
| 0 | 870 } else { |
| 871 __ movl(r, Address(saved_sp, ld_off)); | |
| 872 } | |
| 873 } else { | |
| 874 assert(r_1->is_XMMRegister(), ""); | |
| 875 if (!r_2->is_valid()) { | |
| 876 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); | |
| 877 } else { | |
| 878 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off); | |
| 879 } | |
| 880 } | |
| 881 } | |
| 882 | |
| 883 // 6243940 We might end up in handle_wrong_method if | |
| 884 // the callee is deoptimized as we race thru here. If that | |
| 885 // happens we don't want to take a safepoint because the | |
| 886 // caller frame will look interpreted and arguments are now | |
| 887 // "compiled" so it is much better to make this transition | |
| 888 // invisible to the stack walking code. Unfortunately if | |
| 889 // we try and find the callee by normal means a safepoint | |
| 890 // is possible. So we stash the desired callee in the thread | |
| 891 // and the vm will find there should this case occur. | |
| 892 | |
| 893 __ get_thread(rax); | |
| 304 | 894 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx); |
| 0 | 895 |
| 896 // move methodOop to rax, in case we end up in an c2i adapter. | |
| 897 // the c2i adapters expect methodOop in rax, (c2) because c2's | |
| 898 // resolve stubs return the result (the method) in rax,. | |
| 899 // I'd love to fix this. | |
| 304 | 900 __ mov(rax, rbx); |
| 0 | 901 |
| 902 __ jmp(rdi); | |
| 903 } | |
| 904 | |
| 905 // --------------------------------------------------------------- | |
| 906 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
| 907 int total_args_passed, | |
| 908 int comp_args_on_stack, | |
| 909 const BasicType *sig_bt, | |
| 910 const VMRegPair *regs) { | |
| 911 address i2c_entry = __ pc(); | |
| 912 | |
| 913 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); | |
| 914 | |
| 915 // ------------------------------------------------------------------------- | |
| 916 // Generate a C2I adapter. On entry we know rbx, holds the methodOop during calls | |
| 917 // to the interpreter. The args start out packed in the compiled layout. They | |
| 918 // need to be unpacked into the interpreter layout. This will almost always | |
| 919 // require some stack space. We grow the current (compiled) stack, then repack | |
| 920 // the args. We finally end in a jump to the generic interpreter entry point. | |
| 921 // On exit from the interpreter, the interpreter will restore our SP (lest the | |
| 922 // compiled code, which relys solely on SP and not EBP, get sick). | |
| 923 | |
| 924 address c2i_unverified_entry = __ pc(); | |
| 925 Label skip_fixup; | |
| 926 | |
| 927 Register holder = rax; | |
| 928 Register receiver = rcx; | |
| 929 Register temp = rbx; | |
| 930 | |
| 931 { | |
| 932 | |
| 933 Label missed; | |
| 934 | |
| 935 __ verify_oop(holder); | |
| 304 | 936 __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes())); |
| 0 | 937 __ verify_oop(temp); |
| 938 | |
| 304 | 939 __ cmpptr(temp, Address(holder, compiledICHolderOopDesc::holder_klass_offset())); |
| 940 __ movptr(rbx, Address(holder, compiledICHolderOopDesc::holder_method_offset())); | |
| 0 | 941 __ jcc(Assembler::notEqual, missed); |
| 942 // Method might have been compiled since the call site was patched to | |
| 943 // interpreted if that is the case treat it as a miss so we can get | |
| 944 // the call site corrected. | |
| 304 | 945 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD); |
| 0 | 946 __ jcc(Assembler::equal, skip_fixup); |
| 947 | |
| 948 __ bind(missed); | |
| 949 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 950 } | |
| 951 | |
| 952 address c2i_entry = __ pc(); | |
| 953 | |
| 954 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); | |
| 955 | |
| 956 __ flush(); | |
| 957 return new AdapterHandlerEntry(i2c_entry, c2i_entry, c2i_unverified_entry); | |
| 958 } | |
| 959 | |
| 960 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
| 961 VMRegPair *regs, | |
| 962 int total_args_passed) { | |
| 963 // We return the amount of VMRegImpl stack slots we need to reserve for all | |
| 964 // the arguments NOT counting out_preserve_stack_slots. | |
| 965 | |
| 966 uint stack = 0; // All arguments on stack | |
| 967 | |
| 968 for( int i = 0; i < total_args_passed; i++) { | |
| 969 // From the type and the argument number (count) compute the location | |
| 970 switch( sig_bt[i] ) { | |
| 971 case T_BOOLEAN: | |
| 972 case T_CHAR: | |
| 973 case T_FLOAT: | |
| 974 case T_BYTE: | |
| 975 case T_SHORT: | |
| 976 case T_INT: | |
| 977 case T_OBJECT: | |
| 978 case T_ARRAY: | |
| 979 case T_ADDRESS: | |
| 980 regs[i].set1(VMRegImpl::stack2reg(stack++)); | |
| 981 break; | |
| 982 case T_LONG: | |
| 983 case T_DOUBLE: // The stack numbering is reversed from Java | |
| 984 // Since C arguments do not get reversed, the ordering for | |
| 985 // doubles on the stack must be opposite the Java convention | |
| 986 assert(sig_bt[i+1] == T_VOID, "missing Half" ); | |
| 987 regs[i].set2(VMRegImpl::stack2reg(stack)); | |
| 988 stack += 2; | |
| 989 break; | |
| 990 case T_VOID: regs[i].set_bad(); break; | |
| 991 default: | |
| 992 ShouldNotReachHere(); | |
| 993 break; | |
| 994 } | |
| 995 } | |
| 996 return stack; | |
| 997 } | |
| 998 | |
| 999 // A simple move of integer like type | |
| 1000 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1001 if (src.first()->is_stack()) { | |
| 1002 if (dst.first()->is_stack()) { | |
| 1003 // stack to stack | |
| 1004 // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); | |
| 1005 // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS); | |
| 304 | 1006 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first()))); |
| 1007 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 0 | 1008 } else { |
| 1009 // stack to reg | |
| 304 | 1010 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); |
| 0 | 1011 } |
| 1012 } else if (dst.first()->is_stack()) { | |
| 1013 // reg to stack | |
| 304 | 1014 // no need to sign extend on 64bit |
| 1015 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
| 0 | 1016 } else { |
| 304 | 1017 if (dst.first() != src.first()) { |
| 1018 __ mov(dst.first()->as_Register(), src.first()->as_Register()); | |
| 1019 } | |
| 0 | 1020 } |
| 1021 } | |
| 1022 | |
| 1023 // An oop arg. Must pass a handle not the oop itself | |
| 1024 static void object_move(MacroAssembler* masm, | |
| 1025 OopMap* map, | |
| 1026 int oop_handle_offset, | |
| 1027 int framesize_in_slots, | |
| 1028 VMRegPair src, | |
| 1029 VMRegPair dst, | |
| 1030 bool is_receiver, | |
| 1031 int* receiver_offset) { | |
| 1032 | |
| 1033 // Because of the calling conventions we know that src can be a | |
| 1034 // register or a stack location. dst can only be a stack location. | |
| 1035 | |
| 1036 assert(dst.first()->is_stack(), "must be stack"); | |
| 1037 // must pass a handle. First figure out the location we use as a handle | |
| 1038 | |
| 1039 if (src.first()->is_stack()) { | |
| 1040 // Oop is already on the stack as an argument | |
| 1041 Register rHandle = rax; | |
| 1042 Label nil; | |
| 304 | 1043 __ xorptr(rHandle, rHandle); |
| 1044 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); | |
| 0 | 1045 __ jcc(Assembler::equal, nil); |
| 304 | 1046 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); |
| 0 | 1047 __ bind(nil); |
| 304 | 1048 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
| 0 | 1049 |
| 1050 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
| 1051 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
| 1052 if (is_receiver) { | |
| 1053 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
| 1054 } | |
| 1055 } else { | |
| 1056 // Oop is in an a register we must store it to the space we reserve | |
| 1057 // on the stack for oop_handles | |
| 1058 const Register rOop = src.first()->as_Register(); | |
| 1059 const Register rHandle = rax; | |
| 1060 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset; | |
| 1061 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
| 1062 Label skip; | |
| 304 | 1063 __ movptr(Address(rsp, offset), rOop); |
| 0 | 1064 map->set_oop(VMRegImpl::stack2reg(oop_slot)); |
| 304 | 1065 __ xorptr(rHandle, rHandle); |
| 1066 __ cmpptr(rOop, (int32_t)NULL_WORD); | |
| 0 | 1067 __ jcc(Assembler::equal, skip); |
| 304 | 1068 __ lea(rHandle, Address(rsp, offset)); |
| 0 | 1069 __ bind(skip); |
| 1070 // Store the handle parameter | |
| 304 | 1071 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
| 0 | 1072 if (is_receiver) { |
| 1073 *receiver_offset = offset; | |
| 1074 } | |
| 1075 } | |
| 1076 } | |
| 1077 | |
| 1078 // A float arg may have to do float reg int reg conversion | |
| 1079 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1080 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
| 1081 | |
| 1082 // Because of the calling convention we know that src is either a stack location | |
| 1083 // or an xmm register. dst can only be a stack location. | |
| 1084 | |
| 1085 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters"); | |
| 1086 | |
| 1087 if (src.first()->is_stack()) { | |
| 1088 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 304 | 1089 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); |
| 0 | 1090 } else { |
| 1091 // reg to stack | |
| 1092 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
| 1093 } | |
| 1094 } | |
| 1095 | |
| 1096 // A long move | |
| 1097 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1098 | |
| 1099 // The only legal possibility for a long_move VMRegPair is: | |
| 1100 // 1: two stack slots (possibly unaligned) | |
| 1101 // as neither the java or C calling convention will use registers | |
| 1102 // for longs. | |
| 1103 | |
| 1104 if (src.first()->is_stack() && dst.first()->is_stack()) { | |
| 1105 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack"); | |
| 304 | 1106 __ movptr(rax, Address(rbp, reg2offset_in(src.first()))); |
| 1107 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second())))); | |
| 1108 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1109 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx)); | |
| 0 | 1110 } else { |
| 1111 ShouldNotReachHere(); | |
| 1112 } | |
| 1113 } | |
| 1114 | |
| 1115 // A double move | |
| 1116 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1117 | |
| 1118 // The only legal possibilities for a double_move VMRegPair are: | |
| 1119 // The painful thing here is that like long_move a VMRegPair might be | |
| 1120 | |
| 1121 // Because of the calling convention we know that src is either | |
| 1122 // 1: a single physical register (xmm registers only) | |
| 1123 // 2: two stack slots (possibly unaligned) | |
| 1124 // dst can only be a pair of stack slots. | |
| 1125 | |
| 1126 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args"); | |
| 1127 | |
| 1128 if (src.first()->is_stack()) { | |
| 1129 // source is all stack | |
| 304 | 1130 __ movptr(rax, Address(rbp, reg2offset_in(src.first()))); |
| 1131 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second())))); | |
| 1132 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1133 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx)); | |
| 0 | 1134 } else { |
| 1135 // reg to stack | |
| 1136 // No worries about stack alignment | |
| 1137 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
| 1138 } | |
| 1139 } | |
| 1140 | |
| 1141 | |
| 1142 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
| 1143 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
| 1144 // which by this time is free to use | |
| 1145 switch (ret_type) { | |
| 1146 case T_FLOAT: | |
| 1147 __ fstp_s(Address(rbp, -wordSize)); | |
| 1148 break; | |
| 1149 case T_DOUBLE: | |
| 1150 __ fstp_d(Address(rbp, -2*wordSize)); | |
| 1151 break; | |
| 1152 case T_VOID: break; | |
| 1153 case T_LONG: | |
| 304 | 1154 __ movptr(Address(rbp, -wordSize), rax); |
| 1155 NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx)); | |
| 0 | 1156 break; |
| 1157 default: { | |
| 304 | 1158 __ movptr(Address(rbp, -wordSize), rax); |
| 0 | 1159 } |
| 1160 } | |
| 1161 } | |
| 1162 | |
| 1163 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
| 1164 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
| 1165 // which by this time is free to use | |
| 1166 switch (ret_type) { | |
| 1167 case T_FLOAT: | |
| 1168 __ fld_s(Address(rbp, -wordSize)); | |
| 1169 break; | |
| 1170 case T_DOUBLE: | |
| 1171 __ fld_d(Address(rbp, -2*wordSize)); | |
| 1172 break; | |
| 1173 case T_LONG: | |
| 304 | 1174 __ movptr(rax, Address(rbp, -wordSize)); |
| 1175 NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize))); | |
| 0 | 1176 break; |
| 1177 case T_VOID: break; | |
| 1178 default: { | |
| 304 | 1179 __ movptr(rax, Address(rbp, -wordSize)); |
| 0 | 1180 } |
| 1181 } | |
| 1182 } | |
| 1183 | |
| 1184 // --------------------------------------------------------------------------- | |
| 1185 // Generate a native wrapper for a given method. The method takes arguments | |
| 1186 // in the Java compiled code convention, marshals them to the native | |
| 1187 // convention (handlizes oops, etc), transitions to native, makes the call, | |
| 1188 // returns to java state (possibly blocking), unhandlizes any result and | |
| 1189 // returns. | |
| 1190 nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm, | |
| 1191 methodHandle method, | |
| 1192 int total_in_args, | |
| 1193 int comp_args_on_stack, | |
| 1194 BasicType *in_sig_bt, | |
| 1195 VMRegPair *in_regs, | |
| 1196 BasicType ret_type) { | |
| 1197 | |
| 1198 // An OopMap for lock (and class if static) | |
| 1199 OopMapSet *oop_maps = new OopMapSet(); | |
| 1200 | |
| 1201 // We have received a description of where all the java arg are located | |
| 1202 // on entry to the wrapper. We need to convert these args to where | |
| 1203 // the jni function will expect them. To figure out where they go | |
| 1204 // we convert the java signature to a C signature by inserting | |
| 1205 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
| 1206 | |
| 1207 int total_c_args = total_in_args + 1; | |
| 1208 if (method->is_static()) { | |
| 1209 total_c_args++; | |
| 1210 } | |
| 1211 | |
| 1212 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
| 1213 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); | |
| 1214 | |
| 1215 int argc = 0; | |
| 1216 out_sig_bt[argc++] = T_ADDRESS; | |
| 1217 if (method->is_static()) { | |
| 1218 out_sig_bt[argc++] = T_OBJECT; | |
| 1219 } | |
| 1220 | |
| 1221 int i; | |
| 1222 for (i = 0; i < total_in_args ; i++ ) { | |
| 1223 out_sig_bt[argc++] = in_sig_bt[i]; | |
| 1224 } | |
| 1225 | |
| 1226 | |
| 1227 // Now figure out where the args must be stored and how much stack space | |
| 1228 // they require (neglecting out_preserve_stack_slots but space for storing | |
| 1229 // the 1st six register arguments). It's weird see int_stk_helper. | |
| 1230 // | |
| 1231 int out_arg_slots; | |
| 1232 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); | |
| 1233 | |
| 1234 // Compute framesize for the wrapper. We need to handlize all oops in | |
| 1235 // registers a max of 2 on x86. | |
| 1236 | |
| 1237 // Calculate the total number of stack slots we will need. | |
| 1238 | |
| 1239 // First count the abi requirement plus all of the outgoing args | |
| 1240 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
| 1241 | |
| 1242 // Now the space for the inbound oop handle area | |
| 1243 | |
| 1244 int oop_handle_offset = stack_slots; | |
| 1245 stack_slots += 2*VMRegImpl::slots_per_word; | |
| 1246 | |
| 1247 // Now any space we need for handlizing a klass if static method | |
| 1248 | |
| 1249 int klass_slot_offset = 0; | |
| 1250 int klass_offset = -1; | |
| 1251 int lock_slot_offset = 0; | |
| 1252 bool is_static = false; | |
| 1253 int oop_temp_slot_offset = 0; | |
| 1254 | |
| 1255 if (method->is_static()) { | |
| 1256 klass_slot_offset = stack_slots; | |
| 1257 stack_slots += VMRegImpl::slots_per_word; | |
| 1258 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
| 1259 is_static = true; | |
| 1260 } | |
| 1261 | |
| 1262 // Plus a lock if needed | |
| 1263 | |
| 1264 if (method->is_synchronized()) { | |
| 1265 lock_slot_offset = stack_slots; | |
| 1266 stack_slots += VMRegImpl::slots_per_word; | |
| 1267 } | |
| 1268 | |
| 1269 // Now a place (+2) to save return values or temp during shuffling | |
| 1270 // + 2 for return address (which we own) and saved rbp, | |
| 1271 stack_slots += 4; | |
| 1272 | |
| 1273 // Ok The space we have allocated will look like: | |
| 1274 // | |
| 1275 // | |
| 1276 // FP-> | | | |
| 1277 // |---------------------| | |
| 1278 // | 2 slots for moves | | |
| 1279 // |---------------------| | |
| 1280 // | lock box (if sync) | | |
| 1281 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset) | |
| 1282 // | klass (if static) | | |
| 1283 // |---------------------| <- klass_slot_offset | |
| 1284 // | oopHandle area | | |
| 1285 // |---------------------| <- oop_handle_offset (a max of 2 registers) | |
| 1286 // | outbound memory | | |
| 1287 // | based arguments | | |
| 1288 // | | | |
| 1289 // |---------------------| | |
| 1290 // | | | |
| 1291 // SP-> | out_preserved_slots | | |
| 1292 // | |
| 1293 // | |
| 1294 // **************************************************************************** | |
| 1295 // WARNING - on Windows Java Natives use pascal calling convention and pop the | |
| 1296 // arguments off of the stack after the jni call. Before the call we can use | |
| 1297 // instructions that are SP relative. After the jni call we switch to FP | |
| 1298 // relative instructions instead of re-adjusting the stack on windows. | |
| 1299 // **************************************************************************** | |
| 1300 | |
| 1301 | |
| 1302 // Now compute actual number of stack words we need rounding to make | |
| 1303 // stack properly aligned. | |
|
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1304 stack_slots = round_to(stack_slots, StackAlignmentInSlots); |
| 0 | 1305 |
| 1306 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
| 1307 | |
| 1308 intptr_t start = (intptr_t)__ pc(); | |
| 1309 | |
| 1310 // First thing make an ic check to see if we should even be here | |
| 1311 | |
| 1312 // We are free to use all registers as temps without saving them and | |
| 1313 // restoring them except rbp,. rbp, is the only callee save register | |
| 1314 // as far as the interpreter and the compiler(s) are concerned. | |
| 1315 | |
| 1316 | |
| 1317 const Register ic_reg = rax; | |
| 1318 const Register receiver = rcx; | |
| 1319 Label hit; | |
| 1320 Label exception_pending; | |
| 1321 | |
| 1322 | |
| 1323 __ verify_oop(receiver); | |
| 304 | 1324 __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
| 0 | 1325 __ jcc(Assembler::equal, hit); |
| 1326 | |
| 1327 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 1328 | |
| 1329 // verified entry must be aligned for code patching. | |
| 1330 // and the first 5 bytes must be in the same cache line | |
| 1331 // if we align at 8 then we will be sure 5 bytes are in the same line | |
| 1332 __ align(8); | |
| 1333 | |
| 1334 __ bind(hit); | |
| 1335 | |
| 1336 int vep_offset = ((intptr_t)__ pc()) - start; | |
| 1337 | |
| 1338 #ifdef COMPILER1 | |
| 1339 if (InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) { | |
| 1340 // Object.hashCode can pull the hashCode from the header word | |
| 1341 // instead of doing a full VM transition once it's been computed. | |
| 1342 // Since hashCode is usually polymorphic at call sites we can't do | |
| 1343 // this optimization at the call site without a lot of work. | |
| 1344 Label slowCase; | |
| 1345 Register receiver = rcx; | |
| 1346 Register result = rax; | |
| 304 | 1347 __ movptr(result, Address(receiver, oopDesc::mark_offset_in_bytes())); |
| 0 | 1348 |
| 1349 // check if locked | |
| 304 | 1350 __ testptr(result, markOopDesc::unlocked_value); |
| 0 | 1351 __ jcc (Assembler::zero, slowCase); |
| 1352 | |
| 1353 if (UseBiasedLocking) { | |
| 1354 // Check if biased and fall through to runtime if so | |
| 304 | 1355 __ testptr(result, markOopDesc::biased_lock_bit_in_place); |
| 0 | 1356 __ jcc (Assembler::notZero, slowCase); |
| 1357 } | |
| 1358 | |
| 1359 // get hash | |
| 304 | 1360 __ andptr(result, markOopDesc::hash_mask_in_place); |
| 0 | 1361 // test if hashCode exists |
| 1362 __ jcc (Assembler::zero, slowCase); | |
| 304 | 1363 __ shrptr(result, markOopDesc::hash_shift); |
| 0 | 1364 __ ret(0); |
| 1365 __ bind (slowCase); | |
| 1366 } | |
| 1367 #endif // COMPILER1 | |
| 1368 | |
| 1369 // The instruction at the verified entry point must be 5 bytes or longer | |
| 1370 // because it can be patched on the fly by make_non_entrant. The stack bang | |
| 1371 // instruction fits that requirement. | |
| 1372 | |
| 1373 // Generate stack overflow check | |
| 1374 | |
| 1375 if (UseStackBanging) { | |
| 1376 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); | |
| 1377 } else { | |
| 1378 // need a 5 byte instruction to allow MT safe patching to non-entrant | |
| 1379 __ fat_nop(); | |
| 1380 } | |
| 1381 | |
| 1382 // Generate a new frame for the wrapper. | |
| 1383 __ enter(); | |
| 1384 // -2 because return address is already present and so is saved rbp, | |
| 304 | 1385 __ subptr(rsp, stack_size - 2*wordSize); |
| 0 | 1386 |
| 1387 // Frame is now completed as far a size and linkage. | |
| 1388 | |
| 1389 int frame_complete = ((intptr_t)__ pc()) - start; | |
| 1390 | |
| 1391 // Calculate the difference between rsp and rbp,. We need to know it | |
| 1392 // after the native call because on windows Java Natives will pop | |
| 1393 // the arguments and it is painful to do rsp relative addressing | |
| 1394 // in a platform independent way. So after the call we switch to | |
| 1395 // rbp, relative addressing. | |
| 1396 | |
| 1397 int fp_adjustment = stack_size - 2*wordSize; | |
| 1398 | |
| 1399 #ifdef COMPILER2 | |
| 1400 // C2 may leave the stack dirty if not in SSE2+ mode | |
| 1401 if (UseSSE >= 2) { | |
| 1402 __ verify_FPU(0, "c2i transition should have clean FPU stack"); | |
| 1403 } else { | |
| 1404 __ empty_FPU_stack(); | |
| 1405 } | |
| 1406 #endif /* COMPILER2 */ | |
| 1407 | |
| 1408 // Compute the rbp, offset for any slots used after the jni call | |
| 1409 | |
| 1410 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment; | |
| 1411 int oop_temp_slot_rbp_offset = (oop_temp_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment; | |
| 1412 | |
| 1413 // We use rdi as a thread pointer because it is callee save and | |
| 1414 // if we load it once it is usable thru the entire wrapper | |
| 1415 const Register thread = rdi; | |
| 1416 | |
| 1417 // We use rsi as the oop handle for the receiver/klass | |
| 1418 // It is callee save so it survives the call to native | |
| 1419 | |
| 1420 const Register oop_handle_reg = rsi; | |
| 1421 | |
| 1422 __ get_thread(thread); | |
| 1423 | |
| 1424 | |
| 1425 // | |
| 1426 // We immediately shuffle the arguments so that any vm call we have to | |
| 1427 // make from here on out (sync slow path, jvmti, etc.) we will have | |
| 1428 // captured the oops from our caller and have a valid oopMap for | |
| 1429 // them. | |
| 1430 | |
| 1431 // ----------------- | |
| 1432 // The Grand Shuffle | |
| 1433 // | |
| 1434 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv* | |
| 1435 // and, if static, the class mirror instead of a receiver. This pretty much | |
| 1436 // guarantees that register layout will not match (and x86 doesn't use reg | |
| 1437 // parms though amd does). Since the native abi doesn't use register args | |
| 1438 // and the java conventions does we don't have to worry about collisions. | |
| 1439 // All of our moved are reg->stack or stack->stack. | |
| 1440 // We ignore the extra arguments during the shuffle and handle them at the | |
| 1441 // last moment. The shuffle is described by the two calling convention | |
| 1442 // vectors we have in our possession. We simply walk the java vector to | |
| 1443 // get the source locations and the c vector to get the destinations. | |
| 1444 | |
| 1445 int c_arg = method->is_static() ? 2 : 1 ; | |
| 1446 | |
| 1447 // Record rsp-based slot for receiver on stack for non-static methods | |
| 1448 int receiver_offset = -1; | |
| 1449 | |
| 1450 // This is a trick. We double the stack slots so we can claim | |
| 1451 // the oops in the caller's frame. Since we are sure to have | |
| 1452 // more args than the caller doubling is enough to make | |
| 1453 // sure we can capture all the incoming oop args from the | |
| 1454 // caller. | |
| 1455 // | |
| 1456 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
| 1457 | |
| 1458 // Mark location of rbp, | |
| 1459 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg()); | |
| 1460 | |
| 1461 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx | |
| 1462 // Are free to temporaries if we have to do stack to steck moves. | |
| 1463 // All inbound args are referenced based on rbp, and all outbound args via rsp. | |
| 1464 | |
| 1465 for (i = 0; i < total_in_args ; i++, c_arg++ ) { | |
| 1466 switch (in_sig_bt[i]) { | |
| 1467 case T_ARRAY: | |
| 1468 case T_OBJECT: | |
| 1469 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], | |
| 1470 ((i == 0) && (!is_static)), | |
| 1471 &receiver_offset); | |
| 1472 break; | |
| 1473 case T_VOID: | |
| 1474 break; | |
| 1475 | |
| 1476 case T_FLOAT: | |
| 1477 float_move(masm, in_regs[i], out_regs[c_arg]); | |
| 1478 break; | |
| 1479 | |
| 1480 case T_DOUBLE: | |
| 1481 assert( i + 1 < total_in_args && | |
| 1482 in_sig_bt[i + 1] == T_VOID && | |
| 1483 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
| 1484 double_move(masm, in_regs[i], out_regs[c_arg]); | |
| 1485 break; | |
| 1486 | |
| 1487 case T_LONG : | |
| 1488 long_move(masm, in_regs[i], out_regs[c_arg]); | |
| 1489 break; | |
| 1490 | |
| 1491 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
| 1492 | |
| 1493 default: | |
| 1494 simple_move32(masm, in_regs[i], out_regs[c_arg]); | |
| 1495 } | |
| 1496 } | |
| 1497 | |
| 1498 // Pre-load a static method's oop into rsi. Used both by locking code and | |
| 1499 // the normal JNI call code. | |
| 1500 if (method->is_static()) { | |
| 1501 | |
| 1502 // load opp into a register | |
| 1503 __ movoop(oop_handle_reg, JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror())); | |
| 1504 | |
| 1505 // Now handlize the static class mirror it's known not-null. | |
| 304 | 1506 __ movptr(Address(rsp, klass_offset), oop_handle_reg); |
| 0 | 1507 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
| 1508 | |
| 1509 // Now get the handle | |
| 304 | 1510 __ lea(oop_handle_reg, Address(rsp, klass_offset)); |
| 0 | 1511 // store the klass handle as second argument |
| 304 | 1512 __ movptr(Address(rsp, wordSize), oop_handle_reg); |
| 0 | 1513 } |
| 1514 | |
| 1515 // Change state to native (we save the return address in the thread, since it might not | |
| 1516 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() | |
| 1517 // points into the right code segment. It does not have to be the correct return pc. | |
| 1518 // We use the same pc/oopMap repeatedly when we call out | |
| 1519 | |
| 1520 intptr_t the_pc = (intptr_t) __ pc(); | |
| 1521 oop_maps->add_gc_map(the_pc - start, map); | |
| 1522 | |
| 1523 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc); | |
| 1524 | |
| 1525 | |
| 1526 // We have all of the arguments setup at this point. We must not touch any register | |
| 1527 // argument registers at this point (what if we save/restore them there are no oop? | |
| 1528 | |
| 1529 { | |
| 1530 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0); | |
| 1531 __ movoop(rax, JNIHandles::make_local(method())); | |
| 1532 __ call_VM_leaf( | |
| 1533 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
| 1534 thread, rax); | |
| 1535 } | |
| 1536 | |
|
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1537 // RedefineClasses() tracing support for obsolete method entry |
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1538 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
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1539 __ movoop(rax, JNIHandles::make_local(method())); |
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1540 __ call_VM_leaf( |
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1542 thread, rax); |
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1543 } |
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1544 |
| 0 | 1545 // These are register definitions we need for locking/unlocking |
| 1546 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction | |
| 1547 const Register obj_reg = rcx; // Will contain the oop | |
| 1548 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock) | |
| 1549 | |
| 1550 Label slow_path_lock; | |
| 1551 Label lock_done; | |
| 1552 | |
| 1553 // Lock a synchronized method | |
| 1554 if (method->is_synchronized()) { | |
| 1555 | |
| 1556 | |
| 1557 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); | |
| 1558 | |
| 1559 // Get the handle (the 2nd argument) | |
| 304 | 1560 __ movptr(oop_handle_reg, Address(rsp, wordSize)); |
| 0 | 1561 |
| 1562 // Get address of the box | |
| 1563 | |
| 304 | 1564 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset)); |
| 0 | 1565 |
| 1566 // Load the oop from the handle | |
| 304 | 1567 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
| 0 | 1568 |
| 1569 if (UseBiasedLocking) { | |
| 1570 // Note that oop_handle_reg is trashed during this call | |
| 1571 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock); | |
| 1572 } | |
| 1573 | |
| 1574 // Load immediate 1 into swap_reg %rax, | |
| 304 | 1575 __ movptr(swap_reg, 1); |
| 0 | 1576 |
| 1577 // Load (object->mark() | 1) into swap_reg %rax, | |
| 304 | 1578 __ orptr(swap_reg, Address(obj_reg, 0)); |
| 0 | 1579 |
| 1580 // Save (object->mark() | 1) into BasicLock's displaced header | |
| 304 | 1581 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
| 0 | 1582 |
| 1583 if (os::is_MP()) { | |
| 1584 __ lock(); | |
| 1585 } | |
| 1586 | |
| 1587 // src -> dest iff dest == rax, else rax, <- dest | |
| 1588 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg) | |
| 304 | 1589 __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); |
| 0 | 1590 __ jcc(Assembler::equal, lock_done); |
| 1591 | |
| 1592 // Test if the oopMark is an obvious stack pointer, i.e., | |
| 1593 // 1) (mark & 3) == 0, and | |
| 1594 // 2) rsp <= mark < mark + os::pagesize() | |
| 1595 // These 3 tests can be done by evaluating the following | |
| 1596 // expression: ((mark - rsp) & (3 - os::vm_page_size())), | |
| 1597 // assuming both stack pointer and pagesize have their | |
| 1598 // least significant 2 bits clear. | |
| 1599 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg | |
| 1600 | |
| 304 | 1601 __ subptr(swap_reg, rsp); |
| 1602 __ andptr(swap_reg, 3 - os::vm_page_size()); | |
| 0 | 1603 |
| 1604 // Save the test result, for recursive case, the result is zero | |
| 304 | 1605 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
| 0 | 1606 __ jcc(Assembler::notEqual, slow_path_lock); |
| 1607 // Slow path will re-enter here | |
| 1608 __ bind(lock_done); | |
| 1609 | |
| 1610 if (UseBiasedLocking) { | |
| 1611 // Re-fetch oop_handle_reg as we trashed it above | |
| 304 | 1612 __ movptr(oop_handle_reg, Address(rsp, wordSize)); |
| 0 | 1613 } |
| 1614 } | |
| 1615 | |
| 1616 | |
| 1617 // Finally just about ready to make the JNI call | |
| 1618 | |
| 1619 | |
| 1620 // get JNIEnv* which is first argument to native | |
| 1621 | |
| 304 | 1622 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset()))); |
| 1623 __ movptr(Address(rsp, 0), rdx); | |
| 0 | 1624 |
| 1625 // Now set thread in native | |
| 1626 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native); | |
| 1627 | |
| 1628 __ call(RuntimeAddress(method->native_function())); | |
| 1629 | |
| 1630 // WARNING - on Windows Java Natives use pascal calling convention and pop the | |
| 1631 // arguments off of the stack. We could just re-adjust the stack pointer here | |
| 1632 // and continue to do SP relative addressing but we instead switch to FP | |
| 1633 // relative addressing. | |
| 1634 | |
| 1635 // Unpack native results. | |
| 1636 switch (ret_type) { | |
| 1637 case T_BOOLEAN: __ c2bool(rax); break; | |
| 304 | 1638 case T_CHAR : __ andptr(rax, 0xFFFF); break; |
| 0 | 1639 case T_BYTE : __ sign_extend_byte (rax); break; |
| 1640 case T_SHORT : __ sign_extend_short(rax); break; | |
| 1641 case T_INT : /* nothing to do */ break; | |
| 1642 case T_DOUBLE : | |
| 1643 case T_FLOAT : | |
| 1644 // Result is in st0 we'll save as needed | |
| 1645 break; | |
| 1646 case T_ARRAY: // Really a handle | |
| 1647 case T_OBJECT: // Really a handle | |
| 1648 break; // can't de-handlize until after safepoint check | |
| 1649 case T_VOID: break; | |
| 1650 case T_LONG: break; | |
| 1651 default : ShouldNotReachHere(); | |
| 1652 } | |
| 1653 | |
| 1654 // Switch thread to "native transition" state before reading the synchronization state. | |
| 1655 // This additional state is necessary because reading and testing the synchronization | |
| 1656 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
| 1657 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
| 1658 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
| 1659 // Thread A is resumed to finish this native method, but doesn't block here since it | |
| 1660 // didn't see any synchronization is progress, and escapes. | |
| 1661 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans); | |
| 1662 | |
| 1663 if(os::is_MP()) { | |
| 1664 if (UseMembar) { | |
| 304 | 1665 // Force this write out before the read below |
| 1666 __ membar(Assembler::Membar_mask_bits( | |
| 1667 Assembler::LoadLoad | Assembler::LoadStore | | |
| 1668 Assembler::StoreLoad | Assembler::StoreStore)); | |
| 0 | 1669 } else { |
| 1670 // Write serialization page so VM thread can do a pseudo remote membar. | |
| 1671 // We use the current thread pointer to calculate a thread specific | |
| 1672 // offset to write to within the page. This minimizes bus traffic | |
| 1673 // due to cache line collision. | |
| 1674 __ serialize_memory(thread, rcx); | |
| 1675 } | |
| 1676 } | |
| 1677 | |
| 1678 if (AlwaysRestoreFPU) { | |
| 1679 // Make sure the control word is correct. | |
| 1680 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); | |
| 1681 } | |
| 1682 | |
| 1683 // check for safepoint operation in progress and/or pending suspend requests | |
| 1684 { Label Continue; | |
| 1685 | |
| 1686 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), | |
| 1687 SafepointSynchronize::_not_synchronized); | |
| 1688 | |
| 1689 Label L; | |
| 1690 __ jcc(Assembler::notEqual, L); | |
| 1691 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0); | |
| 1692 __ jcc(Assembler::equal, Continue); | |
| 1693 __ bind(L); | |
| 1694 | |
| 1695 // Don't use call_VM as it will see a possible pending exception and forward it | |
| 1696 // and never return here preventing us from clearing _last_native_pc down below. | |
| 1697 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are | |
| 1698 // preserved and correspond to the bcp/locals pointers. So we do a runtime call | |
| 1699 // by hand. | |
| 1700 // | |
| 1701 save_native_result(masm, ret_type, stack_slots); | |
| 304 | 1702 __ push(thread); |
| 0 | 1703 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, |
| 1704 JavaThread::check_special_condition_for_native_trans))); | |
| 1705 __ increment(rsp, wordSize); | |
| 1706 // Restore any method result value | |
| 1707 restore_native_result(masm, ret_type, stack_slots); | |
| 1708 | |
| 1709 __ bind(Continue); | |
| 1710 } | |
| 1711 | |
| 1712 // change thread state | |
| 1713 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java); | |
| 1714 | |
| 1715 Label reguard; | |
| 1716 Label reguard_done; | |
| 1717 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); | |
| 1718 __ jcc(Assembler::equal, reguard); | |
| 1719 | |
| 1720 // slow path reguard re-enters here | |
| 1721 __ bind(reguard_done); | |
| 1722 | |
| 1723 // Handle possible exception (will unlock if necessary) | |
| 1724 | |
| 1725 // native result if any is live | |
| 1726 | |
| 1727 // Unlock | |
| 1728 Label slow_path_unlock; | |
| 1729 Label unlock_done; | |
| 1730 if (method->is_synchronized()) { | |
| 1731 | |
| 1732 Label done; | |
| 1733 | |
| 1734 // Get locked oop from the handle we passed to jni | |
| 304 | 1735 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
| 0 | 1736 |
| 1737 if (UseBiasedLocking) { | |
| 1738 __ biased_locking_exit(obj_reg, rbx, done); | |
| 1739 } | |
| 1740 | |
| 1741 // Simple recursive lock? | |
| 1742 | |
| 304 | 1743 __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD); |
| 0 | 1744 __ jcc(Assembler::equal, done); |
| 1745 | |
| 1746 // Must save rax, if if it is live now because cmpxchg must use it | |
| 1747 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
| 1748 save_native_result(masm, ret_type, stack_slots); | |
| 1749 } | |
| 1750 | |
| 1751 // get old displaced header | |
| 304 | 1752 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset)); |
| 0 | 1753 |
| 1754 // get address of the stack lock | |
| 304 | 1755 __ lea(rax, Address(rbp, lock_slot_rbp_offset)); |
| 0 | 1756 |
| 1757 // Atomic swap old header if oop still contains the stack lock | |
| 1758 if (os::is_MP()) { | |
| 1759 __ lock(); | |
| 1760 } | |
| 1761 | |
| 1762 // src -> dest iff dest == rax, else rax, <- dest | |
| 1763 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg) | |
| 304 | 1764 __ cmpxchgptr(rbx, Address(obj_reg, 0)); |
| 0 | 1765 __ jcc(Assembler::notEqual, slow_path_unlock); |
| 1766 | |
| 1767 // slow path re-enters here | |
| 1768 __ bind(unlock_done); | |
| 1769 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
| 1770 restore_native_result(masm, ret_type, stack_slots); | |
| 1771 } | |
| 1772 | |
| 1773 __ bind(done); | |
| 1774 | |
| 1775 } | |
| 1776 | |
| 1777 { | |
| 1778 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0); | |
| 1779 // Tell dtrace about this method exit | |
| 1780 save_native_result(masm, ret_type, stack_slots); | |
| 1781 __ movoop(rax, JNIHandles::make_local(method())); | |
| 1782 __ call_VM_leaf( | |
| 1783 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
| 1784 thread, rax); | |
| 1785 restore_native_result(masm, ret_type, stack_slots); | |
| 1786 } | |
| 1787 | |
| 1788 // We can finally stop using that last_Java_frame we setup ages ago | |
| 1789 | |
| 1790 __ reset_last_Java_frame(thread, false, true); | |
| 1791 | |
| 1792 // Unpack oop result | |
| 1793 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
| 1794 Label L; | |
| 304 | 1795 __ cmpptr(rax, (int32_t)NULL_WORD); |
| 0 | 1796 __ jcc(Assembler::equal, L); |
| 304 | 1797 __ movptr(rax, Address(rax, 0)); |
| 0 | 1798 __ bind(L); |
| 1799 __ verify_oop(rax); | |
| 1800 } | |
| 1801 | |
| 1802 // reset handle block | |
| 304 | 1803 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset())); |
| 1804 | |
|
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1805 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD); |
| 0 | 1806 |
| 1807 // Any exception pending? | |
| 304 | 1808 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
| 0 | 1809 __ jcc(Assembler::notEqual, exception_pending); |
| 1810 | |
| 1811 | |
| 1812 // no exception, we're almost done | |
| 1813 | |
| 1814 // check that only result value is on FPU stack | |
| 1815 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit"); | |
| 1816 | |
| 1817 // Fixup floating pointer results so that result looks like a return from a compiled method | |
| 1818 if (ret_type == T_FLOAT) { | |
| 1819 if (UseSSE >= 1) { | |
| 1820 // Pop st0 and store as float and reload into xmm register | |
| 1821 __ fstp_s(Address(rbp, -4)); | |
| 1822 __ movflt(xmm0, Address(rbp, -4)); | |
| 1823 } | |
| 1824 } else if (ret_type == T_DOUBLE) { | |
| 1825 if (UseSSE >= 2) { | |
| 1826 // Pop st0 and store as double and reload into xmm register | |
| 1827 __ fstp_d(Address(rbp, -8)); | |
| 1828 __ movdbl(xmm0, Address(rbp, -8)); | |
| 1829 } | |
| 1830 } | |
| 1831 | |
| 1832 // Return | |
| 1833 | |
| 1834 __ leave(); | |
| 1835 __ ret(0); | |
| 1836 | |
| 1837 // Unexpected paths are out of line and go here | |
| 1838 | |
| 1839 // Slow path locking & unlocking | |
| 1840 if (method->is_synchronized()) { | |
| 1841 | |
| 1842 // BEGIN Slow path lock | |
| 1843 | |
| 1844 __ bind(slow_path_lock); | |
| 1845 | |
| 1846 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM | |
| 1847 // args are (oop obj, BasicLock* lock, JavaThread* thread) | |
| 304 | 1848 __ push(thread); |
| 1849 __ push(lock_reg); | |
| 1850 __ push(obj_reg); | |
| 0 | 1851 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C))); |
| 304 | 1852 __ addptr(rsp, 3*wordSize); |
| 0 | 1853 |
| 1854 #ifdef ASSERT | |
| 1855 { Label L; | |
| 304 | 1856 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); |
| 0 | 1857 __ jcc(Assembler::equal, L); |
| 1858 __ stop("no pending exception allowed on exit from monitorenter"); | |
| 1859 __ bind(L); | |
| 1860 } | |
| 1861 #endif | |
| 1862 __ jmp(lock_done); | |
| 1863 | |
| 1864 // END Slow path lock | |
| 1865 | |
| 1866 // BEGIN Slow path unlock | |
| 1867 __ bind(slow_path_unlock); | |
| 1868 | |
| 1869 // Slow path unlock | |
| 1870 | |
| 1871 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
| 1872 save_native_result(masm, ret_type, stack_slots); | |
| 1873 } | |
| 1874 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) | |
| 1875 | |
| 304 | 1876 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset()))); |
|
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1877 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD); |
| 0 | 1878 |
| 1879 | |
| 1880 // should be a peal | |
| 1881 // +wordSize because of the push above | |
| 304 | 1882 __ lea(rax, Address(rbp, lock_slot_rbp_offset)); |
| 1883 __ push(rax); | |
| 1884 | |
| 1885 __ push(obj_reg); | |
| 0 | 1886 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); |
| 304 | 1887 __ addptr(rsp, 2*wordSize); |
| 0 | 1888 #ifdef ASSERT |
| 1889 { | |
| 1890 Label L; | |
| 304 | 1891 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
| 0 | 1892 __ jcc(Assembler::equal, L); |
| 1893 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); | |
| 1894 __ bind(L); | |
| 1895 } | |
| 1896 #endif /* ASSERT */ | |
| 1897 | |
| 304 | 1898 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset()))); |
| 0 | 1899 |
| 1900 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
| 1901 restore_native_result(masm, ret_type, stack_slots); | |
| 1902 } | |
| 1903 __ jmp(unlock_done); | |
| 1904 // END Slow path unlock | |
| 1905 | |
| 1906 } | |
| 1907 | |
| 1908 // SLOW PATH Reguard the stack if needed | |
| 1909 | |
| 1910 __ bind(reguard); | |
| 1911 save_native_result(masm, ret_type, stack_slots); | |
| 1912 { | |
| 1913 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); | |
| 1914 } | |
| 1915 restore_native_result(masm, ret_type, stack_slots); | |
| 1916 __ jmp(reguard_done); | |
| 1917 | |
| 1918 | |
| 1919 // BEGIN EXCEPTION PROCESSING | |
| 1920 | |
| 1921 // Forward the exception | |
| 1922 __ bind(exception_pending); | |
| 1923 | |
| 1924 // remove possible return value from FPU register stack | |
| 1925 __ empty_FPU_stack(); | |
| 1926 | |
| 1927 // pop our frame | |
| 1928 __ leave(); | |
| 1929 // and forward the exception | |
| 1930 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
| 1931 | |
| 1932 __ flush(); | |
| 1933 | |
| 1934 nmethod *nm = nmethod::new_native_nmethod(method, | |
| 1935 masm->code(), | |
| 1936 vep_offset, | |
| 1937 frame_complete, | |
| 1938 stack_slots / VMRegImpl::slots_per_word, | |
| 1939 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
| 1940 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), | |
| 1941 oop_maps); | |
| 1942 return nm; | |
| 1943 | |
| 1944 } | |
| 1945 | |
|
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1946 #ifdef HAVE_DTRACE_H |
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1947 // --------------------------------------------------------------------------- |
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1948 // Generate a dtrace nmethod for a given signature. The method takes arguments |
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1949 // in the Java compiled code convention, marshals them to the native |
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1950 // abi and then leaves nops at the position you would expect to call a native |
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1951 // function. When the probe is enabled the nops are replaced with a trap |
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1952 // instruction that dtrace inserts and the trace will cause a notification |
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1953 // to dtrace. |
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1954 // |
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1955 // The probes are only able to take primitive types and java/lang/String as |
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1956 // arguments. No other java types are allowed. Strings are converted to utf8 |
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1957 // strings so that from dtrace point of view java strings are converted to C |
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1958 // strings. There is an arbitrary fixed limit on the total space that a method |
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1959 // can use for converting the strings. (256 chars per string in the signature). |
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1960 // So any java string larger then this is truncated. |
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1961 |
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1962 nmethod *SharedRuntime::generate_dtrace_nmethod( |
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1963 MacroAssembler *masm, methodHandle method) { |
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1964 |
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1965 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
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1966 // be single threaded in this method. |
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1967 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
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1968 |
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1969 // Fill in the signature array, for the calling-convention call. |
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1970 int total_args_passed = method->size_of_parameters(); |
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1971 |
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1972 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
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1973 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
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1974 |
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1975 // The signature we are going to use for the trap that dtrace will see |
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1976 // java/lang/String is converted. We drop "this" and any other object |
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1977 // is converted to NULL. (A one-slot java/lang/Long object reference |
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1978 // is converted to a two-slot long, which is why we double the allocation). |
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1979 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
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1980 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
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1981 |
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1982 int i=0; |
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1983 int total_strings = 0; |
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1984 int first_arg_to_pass = 0; |
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1985 int total_c_args = 0; |
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1986 |
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1987 if( !method->is_static() ) { // Pass in receiver first |
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1988 in_sig_bt[i++] = T_OBJECT; |
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1989 first_arg_to_pass = 1; |
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1990 } |
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1991 |
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1992 // We need to convert the java args to where a native (non-jni) function |
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1993 // would expect them. To figure out where they go we convert the java |
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1994 // signature to a C signature. |
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1995 |
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1996 SignatureStream ss(method->signature()); |
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1997 for ( ; !ss.at_return_type(); ss.next()) { |
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1998 BasicType bt = ss.type(); |
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1999 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
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2000 out_sig_bt[total_c_args++] = bt; |
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2001 if( bt == T_OBJECT) { |
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2002 symbolOop s = ss.as_symbol_or_null(); |
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2003 if (s == vmSymbols::java_lang_String()) { |
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2004 total_strings++; |
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2005 out_sig_bt[total_c_args-1] = T_ADDRESS; |
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2006 } else if (s == vmSymbols::java_lang_Boolean() || |
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2007 s == vmSymbols::java_lang_Character() || |
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2008 s == vmSymbols::java_lang_Byte() || |
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2009 s == vmSymbols::java_lang_Short() || |
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2010 s == vmSymbols::java_lang_Integer() || |
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2011 s == vmSymbols::java_lang_Float()) { |
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2012 out_sig_bt[total_c_args-1] = T_INT; |
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2013 } else if (s == vmSymbols::java_lang_Long() || |
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2014 s == vmSymbols::java_lang_Double()) { |
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2015 out_sig_bt[total_c_args-1] = T_LONG; |
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2016 out_sig_bt[total_c_args++] = T_VOID; |
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2017 } |
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2018 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
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2019 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
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2020 out_sig_bt[total_c_args++] = T_VOID; |
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2021 } |
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2022 } |
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2023 |
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2024 assert(i==total_args_passed, "validly parsed signature"); |
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2025 |
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2026 // Now get the compiled-Java layout as input arguments |
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2027 int comp_args_on_stack; |
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2028 comp_args_on_stack = SharedRuntime::java_calling_convention( |
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2029 in_sig_bt, in_regs, total_args_passed, false); |
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2030 |
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2031 // Now figure out where the args must be stored and how much stack space |
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2032 // they require (neglecting out_preserve_stack_slots). |
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2033 |
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2034 int out_arg_slots; |
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2035 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); |
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2036 |
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2037 // Calculate the total number of stack slots we will need. |
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2038 |
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2039 // First count the abi requirement plus all of the outgoing args |
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2040 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
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2041 |
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2042 // Now space for the string(s) we must convert |
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2043 |
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2044 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1); |
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2045 for (i = 0; i < total_strings ; i++) { |
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2046 string_locs[i] = stack_slots; |
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2047 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size; |
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2048 } |
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2049 |
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2050 // + 2 for return address (which we own) and saved rbp, |
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2051 |
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2052 stack_slots += 2; |
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2053 |
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2054 // Ok The space we have allocated will look like: |
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2055 // |
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2056 // |
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2057 // FP-> | | |
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2058 // |---------------------| |
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2059 // | string[n] | |
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2060 // |---------------------| <- string_locs[n] |
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2061 // | string[n-1] | |
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2062 // |---------------------| <- string_locs[n-1] |
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2063 // | ... | |
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2064 // | ... | |
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2065 // |---------------------| <- string_locs[1] |
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2066 // | string[0] | |
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2067 // |---------------------| <- string_locs[0] |
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2068 // | outbound memory | |
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2069 // | based arguments | |
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2070 // | | |
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2071 // |---------------------| |
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2072 // | | |
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2073 // SP-> | out_preserved_slots | |
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2074 // |
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2075 // |
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2076 |
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2077 // Now compute actual number of stack words we need rounding to make |
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2078 // stack properly aligned. |
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2079 stack_slots = round_to(stack_slots, 2 * VMRegImpl::slots_per_word); |
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2080 |
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2081 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
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2082 |
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2083 intptr_t start = (intptr_t)__ pc(); |
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2084 |
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2085 // First thing make an ic check to see if we should even be here |
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2086 |
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2087 // We are free to use all registers as temps without saving them and |
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2088 // restoring them except rbp. rbp, is the only callee save register |
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2089 // as far as the interpreter and the compiler(s) are concerned. |
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2090 |
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2091 const Register ic_reg = rax; |
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2092 const Register receiver = rcx; |
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2093 Label hit; |
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2094 Label exception_pending; |
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2095 |
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2096 |
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2097 __ verify_oop(receiver); |
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2098 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
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2099 __ jcc(Assembler::equal, hit); |
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2100 |
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2101 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); |
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2102 |
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2103 // verified entry must be aligned for code patching. |
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2104 // and the first 5 bytes must be in the same cache line |
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2105 // if we align at 8 then we will be sure 5 bytes are in the same line |
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2106 __ align(8); |
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2107 |
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2108 __ bind(hit); |
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2109 |
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2110 int vep_offset = ((intptr_t)__ pc()) - start; |
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2111 |
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2112 |
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2113 // The instruction at the verified entry point must be 5 bytes or longer |
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2114 // because it can be patched on the fly by make_non_entrant. The stack bang |
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2115 // instruction fits that requirement. |
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2116 |
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2117 // Generate stack overflow check |
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2118 |
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2119 |
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2120 if (UseStackBanging) { |
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2121 if (stack_size <= StackShadowPages*os::vm_page_size()) { |
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2122 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); |
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2123 } else { |
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2124 __ movl(rax, stack_size); |
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2125 __ bang_stack_size(rax, rbx); |
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2126 } |
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2127 } else { |
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2128 // need a 5 byte instruction to allow MT safe patching to non-entrant |
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2129 __ fat_nop(); |
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2130 } |
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2131 |
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2132 assert(((int)__ pc() - start - vep_offset) >= 5, |
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2133 "valid size for make_non_entrant"); |
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2134 |
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2135 // Generate a new frame for the wrapper. |
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2136 __ enter(); |
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2137 |
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2138 // -2 because return address is already present and so is saved rbp, |
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2139 if (stack_size - 2*wordSize != 0) { |
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2140 __ subl(rsp, stack_size - 2*wordSize); |
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2141 } |
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2142 |
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2143 // Frame is now completed as far a size and linkage. |
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2144 |
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2145 int frame_complete = ((intptr_t)__ pc()) - start; |
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2146 |
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|
2147 // First thing we do store all the args as if we are doing the call. |
|
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
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|
2148 // Since the C calling convention is stack based that ensures that |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
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|
2149 // all the Java register args are stored before we need to convert any |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2150 // string we might have. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
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|
2151 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
changeset
|
2152 int sid = 0; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
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|
2153 int c_arg, j_arg; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2154 int string_reg = 0; |
|
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
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|
2155 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
changeset
|
2156 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2157 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2158 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
changeset
|
2159 VMRegPair src = in_regs[j_arg]; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2160 VMRegPair dst = out_regs[c_arg]; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2161 assert(dst.first()->is_stack() || in_sig_bt[j_arg] == T_VOID, |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
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|
2162 "stack based abi assumed"); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2163 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
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|
2164 switch (in_sig_bt[j_arg]) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
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|
2165 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2166 case T_ARRAY: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2167 case T_OBJECT: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2168 if (out_sig_bt[c_arg] == T_ADDRESS) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2169 // Any register based arg for a java string after the first |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2170 // will be destroyed by the call to get_utf so we store |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2171 // the original value in the location the utf string address |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2172 // will eventually be stored. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
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|
2173 if (src.first()->is_reg()) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2174 if (string_reg++ != 0) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2175 simple_move32(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2176 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2177 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2178 } else if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2179 // need to unbox a one-word value |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2180 Register in_reg = rax; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2181 if ( src.first()->is_reg() ) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2182 in_reg = src.first()->as_Register(); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2183 } else { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2184 simple_move32(masm, src, in_reg->as_VMReg()); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2185 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2186 Label skipUnbox; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2187 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2188 if ( out_sig_bt[c_arg] == T_LONG ) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2189 __ movl(Address(rsp, reg2offset_out(dst.second())), NULL_WORD); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2190 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2191 __ testl(in_reg, in_reg); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2192 __ jcc(Assembler::zero, skipUnbox); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2193 assert(dst.first()->is_stack() && |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2194 (!dst.second()->is_valid() || dst.second()->is_stack()), |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2195 "value(s) must go into stack slots"); |
|
165
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2196 |
|
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2197 BasicType bt = out_sig_bt[c_arg]; |
|
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2198 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
|
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
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|
2199 if ( bt == T_LONG ) { |
|
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2200 __ movl(rbx, Address(in_reg, |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2201 box_offset + VMRegImpl::stack_slot_size)); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2202 __ movl(Address(rsp, reg2offset_out(dst.second())), rbx); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2203 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2204 __ movl(in_reg, Address(in_reg, box_offset)); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2205 __ movl(Address(rsp, reg2offset_out(dst.first())), in_reg); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
changeset
|
2206 __ bind(skipUnbox); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2207 } else { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
changeset
|
2208 // Convert the arg to NULL |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2209 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2210 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2211 if (out_sig_bt[c_arg] == T_LONG) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2212 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2213 ++c_arg; // Move over the T_VOID To keep the loop indices in sync |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2214 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2215 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2216 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2217 case T_VOID: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2218 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2219 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2220 case T_FLOAT: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2221 float_move(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2222 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2223 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2224 case T_DOUBLE: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2225 assert( j_arg + 1 < total_args_passed && |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2226 in_sig_bt[j_arg + 1] == T_VOID, "bad arg list"); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2227 double_move(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2228 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2229 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2230 case T_LONG : |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2231 long_move(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2232 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2233 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2234 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2235 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2236 default: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2237 simple_move32(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2238 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2239 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2240 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2241 // Now we must convert any string we have to utf8 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2242 // |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2243 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2244 for (sid = 0, j_arg = first_arg_to_pass, c_arg = 0 ; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2245 sid < total_strings ; j_arg++, c_arg++ ) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2246 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2247 if (out_sig_bt[c_arg] == T_ADDRESS) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2248 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2249 Address utf8_addr = Address( |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2250 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2251 __ leal(rax, utf8_addr); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2252 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2253 // The first string we find might still be in the original java arg |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2254 // register |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2255 VMReg orig_loc = in_regs[j_arg].first(); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2256 Register string_oop; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2257 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2258 // This is where the argument will eventually reside |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2259 Address dest = Address(rsp, reg2offset_out(out_regs[c_arg].first())); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2260 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2261 if (sid == 1 && orig_loc->is_reg()) { |
|
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2262 string_oop = orig_loc->as_Register(); |
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2263 assert(string_oop != rax, "smashed arg"); |
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2264 } else { |
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2265 |
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2266 if (orig_loc->is_reg()) { |
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2267 // Get the copy of the jls object |
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2268 __ movl(rcx, dest); |
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2269 } else { |
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2270 // arg is still in the original location |
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2271 __ movl(rcx, Address(rbp, reg2offset_in(orig_loc))); |
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2272 } |
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2273 string_oop = rcx; |
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2274 |
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2275 } |
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2276 Label nullString; |
|
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2277 __ movl(dest, NULL_WORD); |
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2278 __ testl(string_oop, string_oop); |
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2279 __ jcc(Assembler::zero, nullString); |
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2280 |
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2281 // Now we can store the address of the utf string as the argument |
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2282 __ movl(dest, rax); |
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2283 |
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2284 // And do the conversion |
|
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2285 __ call_VM_leaf(CAST_FROM_FN_PTR( |
|
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2286 address, SharedRuntime::get_utf), string_oop, rax); |
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2287 __ bind(nullString); |
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2288 } |
|
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2289 |
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2290 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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2291 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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2292 ++c_arg; // Move over the T_VOID To keep the loop indices in sync |
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2293 } |
|
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2294 } |
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2295 |
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2296 |
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2297 // Ok now we are done. Need to place the nop that dtrace wants in order to |
|
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2298 // patch in the trap |
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2299 |
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2300 int patch_offset = ((intptr_t)__ pc()) - start; |
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2301 |
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2302 __ nop(); |
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2303 |
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2304 |
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2305 // Return |
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2306 |
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2307 __ leave(); |
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2308 __ ret(0); |
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2309 |
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2310 __ flush(); |
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2311 |
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2312 nmethod *nm = nmethod::new_dtrace_nmethod( |
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2313 method, masm->code(), vep_offset, patch_offset, frame_complete, |
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2314 stack_slots / VMRegImpl::slots_per_word); |
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2315 return nm; |
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2316 |
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2317 } |
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2318 |
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2319 #endif // HAVE_DTRACE_H |
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2320 |
| 0 | 2321 // this function returns the adjust size (in number of words) to a c2i adapter |
| 2322 // activation for use during deoptimization | |
| 2323 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { | |
| 2324 return (callee_locals - callee_parameters) * Interpreter::stackElementWords(); | |
| 2325 } | |
| 2326 | |
| 2327 | |
| 2328 uint SharedRuntime::out_preserve_stack_slots() { | |
| 2329 return 0; | |
| 2330 } | |
| 2331 | |
| 2332 | |
| 2333 //------------------------------generate_deopt_blob---------------------------- | |
| 2334 void SharedRuntime::generate_deopt_blob() { | |
| 2335 // allocate space for the code | |
| 2336 ResourceMark rm; | |
| 2337 // setup code generation tools | |
| 2338 CodeBuffer buffer("deopt_blob", 1024, 1024); | |
| 2339 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 2340 int frame_size_in_words; | |
| 2341 OopMap* map = NULL; | |
| 2342 // Account for the extra args we place on the stack | |
| 2343 // by the time we call fetch_unroll_info | |
| 2344 const int additional_words = 2; // deopt kind, thread | |
| 2345 | |
| 2346 OopMapSet *oop_maps = new OopMapSet(); | |
| 2347 | |
| 2348 // ------------- | |
| 2349 // This code enters when returning to a de-optimized nmethod. A return | |
| 2350 // address has been pushed on the the stack, and return values are in | |
| 2351 // registers. | |
| 2352 // If we are doing a normal deopt then we were called from the patched | |
| 2353 // nmethod from the point we returned to the nmethod. So the return | |
| 2354 // address on the stack is wrong by NativeCall::instruction_size | |
| 2355 // We will adjust the value to it looks like we have the original return | |
| 2356 // address on the stack (like when we eagerly deoptimized). | |
| 2357 // In the case of an exception pending with deoptimized then we enter | |
| 2358 // with a return address on the stack that points after the call we patched | |
| 2359 // into the exception handler. We have the following register state: | |
| 2360 // rax,: exception | |
| 2361 // rbx,: exception handler | |
| 2362 // rdx: throwing pc | |
| 2363 // So in this case we simply jam rdx into the useless return address and | |
| 2364 // the stack looks just like we want. | |
| 2365 // | |
| 2366 // At this point we need to de-opt. We save the argument return | |
| 2367 // registers. We call the first C routine, fetch_unroll_info(). This | |
| 2368 // routine captures the return values and returns a structure which | |
| 2369 // describes the current frame size and the sizes of all replacement frames. | |
| 2370 // The current frame is compiled code and may contain many inlined | |
| 2371 // functions, each with their own JVM state. We pop the current frame, then | |
| 2372 // push all the new frames. Then we call the C routine unpack_frames() to | |
| 2373 // populate these frames. Finally unpack_frames() returns us the new target | |
| 2374 // address. Notice that callee-save registers are BLOWN here; they have | |
| 2375 // already been captured in the vframeArray at the time the return PC was | |
| 2376 // patched. | |
| 2377 address start = __ pc(); | |
| 2378 Label cont; | |
| 2379 | |
| 2380 // Prolog for non exception case! | |
| 2381 | |
| 2382 // Save everything in sight. | |
| 2383 | |
| 2384 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words); | |
| 2385 // Normal deoptimization | |
| 304 | 2386 __ push(Deoptimization::Unpack_deopt); |
| 0 | 2387 __ jmp(cont); |
| 2388 | |
| 2389 int reexecute_offset = __ pc() - start; | |
| 2390 | |
| 2391 // Reexecute case | |
| 2392 // return address is the pc describes what bci to do re-execute at | |
| 2393 | |
| 2394 // No need to update map as each call to save_live_registers will produce identical oopmap | |
| 2395 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words); | |
| 2396 | |
| 304 | 2397 __ push(Deoptimization::Unpack_reexecute); |
| 0 | 2398 __ jmp(cont); |
| 2399 | |
| 2400 int exception_offset = __ pc() - start; | |
| 2401 | |
| 2402 // Prolog for exception case | |
| 2403 | |
| 2404 // all registers are dead at this entry point, except for rax, and | |
| 2405 // rdx which contain the exception oop and exception pc | |
| 2406 // respectively. Set them in TLS and fall thru to the | |
| 2407 // unpack_with_exception_in_tls entry point. | |
| 2408 | |
| 2409 __ get_thread(rdi); | |
| 304 | 2410 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx); |
| 2411 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax); | |
| 0 | 2412 |
| 2413 int exception_in_tls_offset = __ pc() - start; | |
| 2414 | |
| 2415 // new implementation because exception oop is now passed in JavaThread | |
| 2416 | |
| 2417 // Prolog for exception case | |
| 2418 // All registers must be preserved because they might be used by LinearScan | |
| 2419 // Exceptiop oop and throwing PC are passed in JavaThread | |
| 2420 // tos: stack at point of call to method that threw the exception (i.e. only | |
| 2421 // args are on the stack, no return address) | |
| 2422 | |
| 2423 // make room on stack for the return address | |
| 2424 // It will be patched later with the throwing pc. The correct value is not | |
| 2425 // available now because loading it from memory would destroy registers. | |
| 304 | 2426 __ push(0); |
| 0 | 2427 |
| 2428 // Save everything in sight. | |
| 2429 | |
| 2430 // No need to update map as each call to save_live_registers will produce identical oopmap | |
| 2431 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words); | |
| 2432 | |
| 2433 // Now it is safe to overwrite any register | |
| 2434 | |
| 2435 // store the correct deoptimization type | |
| 304 | 2436 __ push(Deoptimization::Unpack_exception); |
| 0 | 2437 |
| 2438 // load throwing pc from JavaThread and patch it as the return address | |
| 2439 // of the current frame. Then clear the field in JavaThread | |
| 2440 __ get_thread(rdi); | |
| 304 | 2441 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset())); |
| 2442 __ movptr(Address(rbp, wordSize), rdx); | |
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2443 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD); |
| 0 | 2444 |
| 2445 #ifdef ASSERT | |
| 2446 // verify that there is really an exception oop in JavaThread | |
| 304 | 2447 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset())); |
| 0 | 2448 __ verify_oop(rax); |
| 2449 | |
| 2450 // verify that there is no pending exception | |
| 2451 Label no_pending_exception; | |
| 304 | 2452 __ movptr(rax, Address(rdi, Thread::pending_exception_offset())); |
| 2453 __ testptr(rax, rax); | |
| 0 | 2454 __ jcc(Assembler::zero, no_pending_exception); |
| 2455 __ stop("must not have pending exception here"); | |
| 2456 __ bind(no_pending_exception); | |
| 2457 #endif | |
| 2458 | |
| 2459 __ bind(cont); | |
| 2460 | |
| 2461 // Compiled code leaves the floating point stack dirty, empty it. | |
| 2462 __ empty_FPU_stack(); | |
| 2463 | |
| 2464 | |
| 2465 // Call C code. Need thread and this frame, but NOT official VM entry | |
| 2466 // crud. We cannot block on this call, no GC can happen. | |
| 2467 __ get_thread(rcx); | |
| 304 | 2468 __ push(rcx); |
| 0 | 2469 // fetch_unroll_info needs to call last_java_frame() |
| 2470 __ set_last_Java_frame(rcx, noreg, noreg, NULL); | |
| 2471 | |
| 2472 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); | |
| 2473 | |
| 2474 // Need to have an oopmap that tells fetch_unroll_info where to | |
| 2475 // find any register it might need. | |
| 2476 | |
| 2477 oop_maps->add_gc_map( __ pc()-start, map); | |
| 2478 | |
| 2479 // Discard arg to fetch_unroll_info | |
| 304 | 2480 __ pop(rcx); |
| 0 | 2481 |
| 2482 __ get_thread(rcx); | |
| 2483 __ reset_last_Java_frame(rcx, false, false); | |
| 2484 | |
| 2485 // Load UnrollBlock into EDI | |
| 304 | 2486 __ mov(rdi, rax); |
| 0 | 2487 |
| 2488 // Move the unpack kind to a safe place in the UnrollBlock because | |
| 2489 // we are very short of registers | |
| 2490 | |
| 2491 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()); | |
| 2492 // retrieve the deopt kind from where we left it. | |
| 304 | 2493 __ pop(rax); |
| 0 | 2494 __ movl(unpack_kind, rax); // save the unpack_kind value |
| 2495 | |
| 2496 Label noException; | |
| 2497 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending? | |
| 2498 __ jcc(Assembler::notEqual, noException); | |
| 304 | 2499 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset())); |
| 2500 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset())); | |
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2501 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD); |
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2502 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD); |
| 0 | 2503 |
| 2504 __ verify_oop(rax); | |
| 2505 | |
| 2506 // Overwrite the result registers with the exception results. | |
| 304 | 2507 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax); |
| 2508 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx); | |
| 0 | 2509 |
| 2510 __ bind(noException); | |
| 2511 | |
| 2512 // Stack is back to only having register save data on the stack. | |
| 2513 // Now restore the result registers. Everything else is either dead or captured | |
| 2514 // in the vframeArray. | |
| 2515 | |
| 2516 RegisterSaver::restore_result_registers(masm); | |
| 2517 | |
| 2518 // All of the register save area has been popped of the stack. Only the | |
| 2519 // return address remains. | |
| 2520 | |
| 2521 // Pop all the frames we must move/replace. | |
| 2522 // | |
| 2523 // Frame picture (youngest to oldest) | |
| 2524 // 1: self-frame (no frame link) | |
| 2525 // 2: deopting frame (no frame link) | |
| 2526 // 3: caller of deopting frame (could be compiled/interpreted). | |
| 2527 // | |
| 2528 // Note: by leaving the return address of self-frame on the stack | |
| 2529 // and using the size of frame 2 to adjust the stack | |
| 2530 // when we are done the return to frame 3 will still be on the stack. | |
| 2531 | |
| 2532 // Pop deoptimized frame | |
| 304 | 2533 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); |
| 0 | 2534 |
| 2535 // sp should be pointing at the return address to the caller (3) | |
| 2536 | |
| 2537 // Stack bang to make sure there's enough room for these interpreter frames. | |
| 2538 if (UseStackBanging) { | |
| 2539 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
| 2540 __ bang_stack_size(rbx, rcx); | |
| 2541 } | |
| 2542 | |
| 2543 // Load array of frame pcs into ECX | |
| 304 | 2544 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
| 2545 | |
| 2546 __ pop(rsi); // trash the old pc | |
| 0 | 2547 |
| 2548 // Load array of frame sizes into ESI | |
| 304 | 2549 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
| 0 | 2550 |
| 2551 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes()); | |
| 2552 | |
| 2553 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
| 2554 __ movl(counter, rbx); | |
| 2555 | |
| 2556 // Pick up the initial fp we should save | |
| 304 | 2557 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_fp_offset_in_bytes())); |
| 0 | 2558 |
| 2559 // Now adjust the caller's stack to make up for the extra locals | |
| 2560 // but record the original sp so that we can save it in the skeletal interpreter | |
| 2561 // frame and the stack walking of interpreter_sender will get the unextended sp | |
| 2562 // value and not the "real" sp value. | |
| 2563 | |
| 2564 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes()); | |
| 304 | 2565 __ movptr(sp_temp, rsp); |
| 2566 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes())); | |
| 2567 __ subptr(rsp, rbx); | |
| 0 | 2568 |
| 2569 // Push interpreter frames in a loop | |
| 2570 Label loop; | |
| 2571 __ bind(loop); | |
| 304 | 2572 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
| 0 | 2573 #ifdef CC_INTERP |
| 304 | 2574 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and |
| 0 | 2575 #ifdef ASSERT |
| 304 | 2576 __ push(0xDEADDEAD); // Make a recognizable pattern |
| 2577 __ push(0xDEADDEAD); | |
| 0 | 2578 #else /* ASSERT */ |
| 304 | 2579 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" |
| 0 | 2580 #endif /* ASSERT */ |
| 2581 #else /* CC_INTERP */ | |
| 304 | 2582 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand |
| 0 | 2583 #endif /* CC_INTERP */ |
| 304 | 2584 __ pushptr(Address(rcx, 0)); // save return address |
| 0 | 2585 __ enter(); // save old & set new rbp, |
| 304 | 2586 __ subptr(rsp, rbx); // Prolog! |
| 2587 __ movptr(rbx, sp_temp); // sender's sp | |
| 0 | 2588 #ifdef CC_INTERP |
| 304 | 2589 __ movptr(Address(rbp, |
| 0 | 2590 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
| 2591 rbx); // Make it walkable | |
| 2592 #else /* CC_INTERP */ | |
| 2593 // This value is corrected by layout_activation_impl | |
|
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2594 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD); |
| 304 | 2595 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable |
| 0 | 2596 #endif /* CC_INTERP */ |
| 304 | 2597 __ movptr(sp_temp, rsp); // pass to next frame |
| 2598 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
| 2599 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
| 2600 __ decrementl(counter); // decrement counter | |
| 0 | 2601 __ jcc(Assembler::notZero, loop); |
| 304 | 2602 __ pushptr(Address(rcx, 0)); // save final return address |
| 0 | 2603 |
| 2604 // Re-push self-frame | |
| 2605 __ enter(); // save old & set new rbp, | |
| 2606 | |
| 2607 // Return address and rbp, are in place | |
| 2608 // We'll push additional args later. Just allocate a full sized | |
| 2609 // register save area | |
| 304 | 2610 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize); |
| 0 | 2611 |
| 2612 // Restore frame locals after moving the frame | |
| 304 | 2613 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax); |
| 2614 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx); | |
| 0 | 2615 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local |
| 2616 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0); | |
| 2617 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0); | |
| 2618 | |
| 2619 // Set up the args to unpack_frame | |
| 2620 | |
| 2621 __ pushl(unpack_kind); // get the unpack_kind value | |
| 2622 __ get_thread(rcx); | |
| 304 | 2623 __ push(rcx); |
| 0 | 2624 |
| 2625 // set last_Java_sp, last_Java_fp | |
| 2626 __ set_last_Java_frame(rcx, noreg, rbp, NULL); | |
| 2627 | |
| 2628 // Call C code. Need thread but NOT official VM entry | |
| 2629 // crud. We cannot block on this call, no GC can happen. Call should | |
| 2630 // restore return values to their stack-slots with the new SP. | |
| 2631 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
| 2632 // Set an oopmap for the call site | |
| 2633 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 )); | |
| 2634 | |
| 2635 // rax, contains the return result type | |
| 304 | 2636 __ push(rax); |
| 0 | 2637 |
| 2638 __ get_thread(rcx); | |
| 2639 __ reset_last_Java_frame(rcx, false, false); | |
| 2640 | |
| 2641 // Collect return values | |
| 304 | 2642 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize)); |
| 2643 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize)); | |
| 0 | 2644 |
| 2645 // Clear floating point stack before returning to interpreter | |
| 2646 __ empty_FPU_stack(); | |
| 2647 | |
| 2648 // Check if we should push the float or double return value. | |
| 2649 Label results_done, yes_double_value; | |
| 2650 __ cmpl(Address(rsp, 0), T_DOUBLE); | |
| 2651 __ jcc (Assembler::zero, yes_double_value); | |
| 2652 __ cmpl(Address(rsp, 0), T_FLOAT); | |
| 2653 __ jcc (Assembler::notZero, results_done); | |
| 2654 | |
| 2655 // return float value as expected by interpreter | |
| 2656 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize)); | |
| 2657 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize)); | |
| 2658 __ jmp(results_done); | |
| 2659 | |
| 2660 // return double value as expected by interpreter | |
| 2661 __ bind(yes_double_value); | |
| 2662 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize)); | |
| 2663 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize)); | |
| 2664 | |
| 2665 __ bind(results_done); | |
| 2666 | |
| 2667 // Pop self-frame. | |
| 2668 __ leave(); // Epilog! | |
| 2669 | |
| 2670 // Jump to interpreter | |
| 2671 __ ret(0); | |
| 2672 | |
| 2673 // ------------- | |
| 2674 // make sure all code is generated | |
| 2675 masm->flush(); | |
| 2676 | |
| 2677 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); | |
| 2678 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
| 2679 } | |
| 2680 | |
| 2681 | |
| 2682 #ifdef COMPILER2 | |
| 2683 //------------------------------generate_uncommon_trap_blob-------------------- | |
| 2684 void SharedRuntime::generate_uncommon_trap_blob() { | |
| 2685 // allocate space for the code | |
| 2686 ResourceMark rm; | |
| 2687 // setup code generation tools | |
| 2688 CodeBuffer buffer("uncommon_trap_blob", 512, 512); | |
| 2689 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 2690 | |
| 2691 enum frame_layout { | |
| 2692 arg0_off, // thread sp + 0 // Arg location for | |
| 2693 arg1_off, // unloaded_class_index sp + 1 // calling C | |
| 2694 // The frame sender code expects that rbp will be in the "natural" place and | |
| 2695 // will override any oopMap setting for it. We must therefore force the layout | |
| 2696 // so that it agrees with the frame sender code. | |
| 2697 rbp_off, // callee saved register sp + 2 | |
| 2698 return_off, // slot for return address sp + 3 | |
| 2699 framesize | |
| 2700 }; | |
| 2701 | |
| 2702 address start = __ pc(); | |
| 2703 // Push self-frame. | |
| 304 | 2704 __ subptr(rsp, return_off*wordSize); // Epilog! |
| 0 | 2705 |
| 2706 // rbp, is an implicitly saved callee saved register (i.e. the calling | |
| 2707 // convention will save restore it in prolog/epilog) Other than that | |
| 2708 // there are no callee save registers no that adapter frames are gone. | |
| 304 | 2709 __ movptr(Address(rsp, rbp_off*wordSize), rbp); |
| 0 | 2710 |
| 2711 // Clear the floating point exception stack | |
| 2712 __ empty_FPU_stack(); | |
| 2713 | |
| 2714 // set last_Java_sp | |
| 2715 __ get_thread(rdx); | |
| 2716 __ set_last_Java_frame(rdx, noreg, noreg, NULL); | |
| 2717 | |
| 2718 // Call C code. Need thread but NOT official VM entry | |
| 2719 // crud. We cannot block on this call, no GC can happen. Call should | |
| 2720 // capture callee-saved registers as well as return values. | |
| 304 | 2721 __ movptr(Address(rsp, arg0_off*wordSize), rdx); |
| 0 | 2722 // argument already in ECX |
| 2723 __ movl(Address(rsp, arg1_off*wordSize),rcx); | |
| 2724 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); | |
| 2725 | |
| 2726 // Set an oopmap for the call site | |
| 2727 OopMapSet *oop_maps = new OopMapSet(); | |
| 2728 OopMap* map = new OopMap( framesize, 0 ); | |
| 2729 // No oopMap for rbp, it is known implicitly | |
| 2730 | |
| 2731 oop_maps->add_gc_map( __ pc()-start, map); | |
| 2732 | |
| 2733 __ get_thread(rcx); | |
| 2734 | |
| 2735 __ reset_last_Java_frame(rcx, false, false); | |
| 2736 | |
| 2737 // Load UnrollBlock into EDI | |
| 304 | 2738 __ movptr(rdi, rax); |
| 0 | 2739 |
| 2740 // Pop all the frames we must move/replace. | |
| 2741 // | |
| 2742 // Frame picture (youngest to oldest) | |
| 2743 // 1: self-frame (no frame link) | |
| 2744 // 2: deopting frame (no frame link) | |
| 2745 // 3: caller of deopting frame (could be compiled/interpreted). | |
| 2746 | |
| 2747 // Pop self-frame. We have no frame, and must rely only on EAX and ESP. | |
| 304 | 2748 __ addptr(rsp,(framesize-1)*wordSize); // Epilog! |
| 0 | 2749 |
| 2750 // Pop deoptimized frame | |
| 304 | 2751 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); |
| 2752 __ addptr(rsp, rcx); | |
| 0 | 2753 |
| 2754 // sp should be pointing at the return address to the caller (3) | |
| 2755 | |
| 2756 // Stack bang to make sure there's enough room for these interpreter frames. | |
| 2757 if (UseStackBanging) { | |
| 2758 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
| 2759 __ bang_stack_size(rbx, rcx); | |
| 2760 } | |
| 2761 | |
| 2762 | |
| 2763 // Load array of frame pcs into ECX | |
| 2764 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); | |
| 2765 | |
| 304 | 2766 __ pop(rsi); // trash the pc |
| 0 | 2767 |
| 2768 // Load array of frame sizes into ESI | |
| 304 | 2769 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
| 0 | 2770 |
| 2771 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes()); | |
| 2772 | |
| 2773 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
| 2774 __ movl(counter, rbx); | |
| 2775 | |
| 2776 // Pick up the initial fp we should save | |
| 304 | 2777 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_fp_offset_in_bytes())); |
| 0 | 2778 |
| 2779 // Now adjust the caller's stack to make up for the extra locals | |
| 2780 // but record the original sp so that we can save it in the skeletal interpreter | |
| 2781 // frame and the stack walking of interpreter_sender will get the unextended sp | |
| 2782 // value and not the "real" sp value. | |
| 2783 | |
| 2784 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes()); | |
| 304 | 2785 __ movptr(sp_temp, rsp); |
| 2786 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes())); | |
| 2787 __ subptr(rsp, rbx); | |
| 0 | 2788 |
| 2789 // Push interpreter frames in a loop | |
| 2790 Label loop; | |
| 2791 __ bind(loop); | |
| 304 | 2792 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
| 0 | 2793 #ifdef CC_INTERP |
| 304 | 2794 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and |
| 0 | 2795 #ifdef ASSERT |
| 304 | 2796 __ push(0xDEADDEAD); // Make a recognizable pattern |
| 2797 __ push(0xDEADDEAD); // (parm to RecursiveInterpreter...) | |
| 0 | 2798 #else /* ASSERT */ |
| 304 | 2799 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" |
| 0 | 2800 #endif /* ASSERT */ |
| 2801 #else /* CC_INTERP */ | |
| 304 | 2802 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand |
| 0 | 2803 #endif /* CC_INTERP */ |
| 304 | 2804 __ pushptr(Address(rcx, 0)); // save return address |
| 0 | 2805 __ enter(); // save old & set new rbp, |
| 304 | 2806 __ subptr(rsp, rbx); // Prolog! |
| 2807 __ movptr(rbx, sp_temp); // sender's sp | |
| 0 | 2808 #ifdef CC_INTERP |
| 304 | 2809 __ movptr(Address(rbp, |
| 0 | 2810 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
| 2811 rbx); // Make it walkable | |
| 2812 #else /* CC_INTERP */ | |
| 2813 // This value is corrected by layout_activation_impl | |
|
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2814 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD ); |
| 304 | 2815 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable |
| 0 | 2816 #endif /* CC_INTERP */ |
| 304 | 2817 __ movptr(sp_temp, rsp); // pass to next frame |
| 2818 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
| 2819 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
| 2820 __ decrementl(counter); // decrement counter | |
| 0 | 2821 __ jcc(Assembler::notZero, loop); |
| 304 | 2822 __ pushptr(Address(rcx, 0)); // save final return address |
| 0 | 2823 |
| 2824 // Re-push self-frame | |
| 2825 __ enter(); // save old & set new rbp, | |
| 304 | 2826 __ subptr(rsp, (framesize-2) * wordSize); // Prolog! |
| 0 | 2827 |
| 2828 | |
| 2829 // set last_Java_sp, last_Java_fp | |
| 2830 __ get_thread(rdi); | |
| 2831 __ set_last_Java_frame(rdi, noreg, rbp, NULL); | |
| 2832 | |
| 2833 // Call C code. Need thread but NOT official VM entry | |
| 2834 // crud. We cannot block on this call, no GC can happen. Call should | |
| 2835 // restore return values to their stack-slots with the new SP. | |
| 304 | 2836 __ movptr(Address(rsp,arg0_off*wordSize),rdi); |
| 0 | 2837 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap); |
| 2838 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
| 2839 // Set an oopmap for the call site | |
| 2840 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) ); | |
| 2841 | |
| 2842 __ get_thread(rdi); | |
| 2843 __ reset_last_Java_frame(rdi, true, false); | |
| 2844 | |
| 2845 // Pop self-frame. | |
| 2846 __ leave(); // Epilog! | |
| 2847 | |
| 2848 // Jump to interpreter | |
| 2849 __ ret(0); | |
| 2850 | |
| 2851 // ------------- | |
| 2852 // make sure all code is generated | |
| 2853 masm->flush(); | |
| 2854 | |
| 2855 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize); | |
| 2856 } | |
| 2857 #endif // COMPILER2 | |
| 2858 | |
| 2859 //------------------------------generate_handler_blob------ | |
| 2860 // | |
| 2861 // Generate a special Compile2Runtime blob that saves all registers, | |
| 2862 // setup oopmap, and calls safepoint code to stop the compiled code for | |
| 2863 // a safepoint. | |
| 2864 // | |
| 2865 static SafepointBlob* generate_handler_blob(address call_ptr, bool cause_return) { | |
| 2866 | |
| 2867 // Account for thread arg in our frame | |
| 2868 const int additional_words = 1; | |
| 2869 int frame_size_in_words; | |
| 2870 | |
| 2871 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); | |
| 2872 | |
| 2873 ResourceMark rm; | |
| 2874 OopMapSet *oop_maps = new OopMapSet(); | |
| 2875 OopMap* map; | |
| 2876 | |
| 2877 // allocate space for the code | |
| 2878 // setup code generation tools | |
| 2879 CodeBuffer buffer("handler_blob", 1024, 512); | |
| 2880 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 2881 | |
| 2882 const Register java_thread = rdi; // callee-saved for VC++ | |
| 2883 address start = __ pc(); | |
| 2884 address call_pc = NULL; | |
| 2885 | |
| 2886 // If cause_return is true we are at a poll_return and there is | |
| 2887 // the return address on the stack to the caller on the nmethod | |
| 2888 // that is safepoint. We can leave this return on the stack and | |
| 2889 // effectively complete the return and safepoint in the caller. | |
| 2890 // Otherwise we push space for a return address that the safepoint | |
| 2891 // handler will install later to make the stack walking sensible. | |
| 2892 if( !cause_return ) | |
| 304 | 2893 __ push(rbx); // Make room for return address (or push it again) |
| 0 | 2894 |
| 2895 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); | |
| 2896 | |
| 2897 // The following is basically a call_VM. However, we need the precise | |
| 2898 // address of the call in order to generate an oopmap. Hence, we do all the | |
| 2899 // work ourselves. | |
| 2900 | |
| 2901 // Push thread argument and setup last_Java_sp | |
| 2902 __ get_thread(java_thread); | |
| 304 | 2903 __ push(java_thread); |
| 0 | 2904 __ set_last_Java_frame(java_thread, noreg, noreg, NULL); |
| 2905 | |
| 2906 // if this was not a poll_return then we need to correct the return address now. | |
| 2907 if( !cause_return ) { | |
| 304 | 2908 __ movptr(rax, Address(java_thread, JavaThread::saved_exception_pc_offset())); |
| 2909 __ movptr(Address(rbp, wordSize), rax); | |
| 0 | 2910 } |
| 2911 | |
| 2912 // do the call | |
| 2913 __ call(RuntimeAddress(call_ptr)); | |
| 2914 | |
| 2915 // Set an oopmap for the call site. This oopmap will map all | |
| 2916 // oop-registers and debug-info registers as callee-saved. This | |
| 2917 // will allow deoptimization at this safepoint to find all possible | |
| 2918 // debug-info recordings, as well as let GC find all oops. | |
| 2919 | |
| 2920 oop_maps->add_gc_map( __ pc() - start, map); | |
| 2921 | |
| 2922 // Discard arg | |
| 304 | 2923 __ pop(rcx); |
| 0 | 2924 |
| 2925 Label noException; | |
| 2926 | |
| 2927 // Clear last_Java_sp again | |
| 2928 __ get_thread(java_thread); | |
| 2929 __ reset_last_Java_frame(java_thread, false, false); | |
| 2930 | |
| 304 | 2931 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
| 0 | 2932 __ jcc(Assembler::equal, noException); |
| 2933 | |
| 2934 // Exception pending | |
| 2935 | |
| 2936 RegisterSaver::restore_live_registers(masm); | |
| 2937 | |
| 2938 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
| 2939 | |
| 2940 __ bind(noException); | |
| 2941 | |
| 2942 // Normal exit, register restoring and exit | |
| 2943 RegisterSaver::restore_live_registers(masm); | |
| 2944 | |
| 2945 __ ret(0); | |
| 2946 | |
| 2947 // make sure all code is generated | |
| 2948 masm->flush(); | |
| 2949 | |
| 2950 // Fill-out other meta info | |
| 2951 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); | |
| 2952 } | |
| 2953 | |
| 2954 // | |
| 2955 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
| 2956 // | |
| 2957 // Generate a stub that calls into vm to find out the proper destination | |
| 2958 // of a java call. All the argument registers are live at this point | |
| 2959 // but since this is generic code we don't know what they are and the caller | |
| 2960 // must do any gc of the args. | |
| 2961 // | |
| 2962 static RuntimeStub* generate_resolve_blob(address destination, const char* name) { | |
| 2963 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); | |
| 2964 | |
| 2965 // allocate space for the code | |
| 2966 ResourceMark rm; | |
| 2967 | |
| 2968 CodeBuffer buffer(name, 1000, 512); | |
| 2969 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 2970 | |
| 2971 int frame_size_words; | |
| 2972 enum frame_layout { | |
| 2973 thread_off, | |
| 2974 extra_words }; | |
| 2975 | |
| 2976 OopMapSet *oop_maps = new OopMapSet(); | |
| 2977 OopMap* map = NULL; | |
| 2978 | |
| 2979 int start = __ offset(); | |
| 2980 | |
| 2981 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words); | |
| 2982 | |
| 2983 int frame_complete = __ offset(); | |
| 2984 | |
| 2985 const Register thread = rdi; | |
| 2986 __ get_thread(rdi); | |
| 2987 | |
| 304 | 2988 __ push(thread); |
| 0 | 2989 __ set_last_Java_frame(thread, noreg, rbp, NULL); |
| 2990 | |
| 2991 __ call(RuntimeAddress(destination)); | |
| 2992 | |
| 2993 | |
| 2994 // Set an oopmap for the call site. | |
| 2995 // We need this not only for callee-saved registers, but also for volatile | |
| 2996 // registers that the compiler might be keeping live across a safepoint. | |
| 2997 | |
| 2998 oop_maps->add_gc_map( __ offset() - start, map); | |
| 2999 | |
| 3000 // rax, contains the address we are going to jump to assuming no exception got installed | |
| 3001 | |
| 304 | 3002 __ addptr(rsp, wordSize); |
| 0 | 3003 |
| 3004 // clear last_Java_sp | |
| 3005 __ reset_last_Java_frame(thread, true, false); | |
| 3006 // check for pending exceptions | |
| 3007 Label pending; | |
| 304 | 3008 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
| 0 | 3009 __ jcc(Assembler::notEqual, pending); |
| 3010 | |
| 3011 // get the returned methodOop | |
| 304 | 3012 __ movptr(rbx, Address(thread, JavaThread::vm_result_offset())); |
| 3013 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx); | |
| 3014 | |
| 3015 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax); | |
| 0 | 3016 |
| 3017 RegisterSaver::restore_live_registers(masm); | |
| 3018 | |
| 3019 // We are back the the original state on entry and ready to go. | |
| 3020 | |
| 3021 __ jmp(rax); | |
| 3022 | |
| 3023 // Pending exception after the safepoint | |
| 3024 | |
| 3025 __ bind(pending); | |
| 3026 | |
| 3027 RegisterSaver::restore_live_registers(masm); | |
| 3028 | |
| 3029 // exception pending => remove activation and forward to exception handler | |
| 3030 | |
| 3031 __ get_thread(thread); | |
|
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|
3032 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
| 304 | 3033 __ movptr(rax, Address(thread, Thread::pending_exception_offset())); |
| 0 | 3034 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
| 3035 | |
| 3036 // ------------- | |
| 3037 // make sure all code is generated | |
| 3038 masm->flush(); | |
| 3039 | |
| 3040 // return the blob | |
| 3041 // frame_size_words or bytes?? | |
| 3042 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true); | |
| 3043 } | |
| 3044 | |
| 3045 void SharedRuntime::generate_stubs() { | |
| 3046 | |
| 3047 _wrong_method_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::handle_wrong_method), | |
| 3048 "wrong_method_stub"); | |
| 3049 | |
| 3050 _ic_miss_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::handle_wrong_method_ic_miss), | |
| 3051 "ic_miss_stub"); | |
| 3052 | |
| 3053 _resolve_opt_virtual_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_opt_virtual_call_C), | |
| 3054 "resolve_opt_virtual_call"); | |
| 3055 | |
| 3056 _resolve_virtual_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_virtual_call_C), | |
| 3057 "resolve_virtual_call"); | |
| 3058 | |
| 3059 _resolve_static_call_blob = generate_resolve_blob(CAST_FROM_FN_PTR(address, SharedRuntime::resolve_static_call_C), | |
| 3060 "resolve_static_call"); | |
| 3061 | |
| 3062 _polling_page_safepoint_handler_blob = | |
| 3063 generate_handler_blob(CAST_FROM_FN_PTR(address, | |
| 3064 SafepointSynchronize::handle_polling_page_exception), false); | |
| 3065 | |
| 3066 _polling_page_return_handler_blob = | |
| 3067 generate_handler_blob(CAST_FROM_FN_PTR(address, | |
| 3068 SafepointSynchronize::handle_polling_page_exception), true); | |
| 3069 | |
| 3070 generate_deopt_blob(); | |
| 3071 #ifdef COMPILER2 | |
| 3072 generate_uncommon_trap_blob(); | |
| 3073 #endif // COMPILER2 | |
| 3074 } |