Mercurial > hg > truffle
annotate src/cpu/x86/vm/c1_Runtime1_x86.cpp @ 4582:b24386206122
Made all vm builds go into subdirectories, even product builds to simplify building the various types of VMs (server, client and graal).
Made HotSpot build jobs use the number of CPUs on the host machine.
author | Doug Simon <doug.simon@oracle.com> |
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date | Mon, 13 Feb 2012 23:13:37 +0100 |
parents | 723df37192d6 |
children | e29339f342de |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 1999, 2011, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
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26 #include "asm/assembler.hpp" |
1972 | 27 #include "c1/c1_Defs.hpp" |
28 #include "c1/c1_MacroAssembler.hpp" | |
29 #include "c1/c1_Runtime1.hpp" | |
30 #include "interpreter/interpreter.hpp" | |
31 #include "nativeInst_x86.hpp" | |
32 #include "oops/compiledICHolderOop.hpp" | |
33 #include "oops/oop.inline.hpp" | |
34 #include "prims/jvmtiExport.hpp" | |
35 #include "register_x86.hpp" | |
36 #include "runtime/sharedRuntime.hpp" | |
37 #include "runtime/signature.hpp" | |
38 #include "runtime/vframeArray.hpp" | |
39 #include "vmreg_x86.inline.hpp" | |
0 | 40 |
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41 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true); |
0 | 42 |
43 // Implementation of StubAssembler | |
44 | |
45 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, int args_size) { | |
46 // setup registers | |
304 | 47 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions) |
0 | 48 assert(!(oop_result1->is_valid() || oop_result2->is_valid()) || oop_result1 != oop_result2, "registers must be different"); |
49 assert(oop_result1 != thread && oop_result2 != thread, "registers must be different"); | |
50 assert(args_size >= 0, "illegal args_size"); | |
51 | |
304 | 52 #ifdef _LP64 |
53 mov(c_rarg0, thread); | |
54 set_num_rt_args(0); // Nothing on stack | |
55 #else | |
0 | 56 set_num_rt_args(1 + args_size); |
57 | |
58 // push java thread (becomes first argument of C function) | |
59 get_thread(thread); | |
304 | 60 push(thread); |
61 #endif // _LP64 | |
0 | 62 |
63 set_last_Java_frame(thread, noreg, rbp, NULL); | |
304 | 64 |
0 | 65 // do the call |
66 call(RuntimeAddress(entry)); | |
67 int call_offset = offset(); | |
68 // verify callee-saved register | |
69 #ifdef ASSERT | |
70 guarantee(thread != rax, "change this code"); | |
304 | 71 push(rax); |
0 | 72 { Label L; |
73 get_thread(rax); | |
304 | 74 cmpptr(thread, rax); |
0 | 75 jcc(Assembler::equal, L); |
76 int3(); | |
77 stop("StubAssembler::call_RT: rdi not callee saved?"); | |
78 bind(L); | |
79 } | |
304 | 80 pop(rax); |
0 | 81 #endif |
82 reset_last_Java_frame(thread, true, false); | |
83 | |
84 // discard thread and arguments | |
304 | 85 NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord)); |
0 | 86 |
87 // check for pending exceptions | |
88 { Label L; | |
304 | 89 cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 90 jcc(Assembler::equal, L); |
91 // exception pending => remove activation and forward to exception handler | |
304 | 92 movptr(rax, Address(thread, Thread::pending_exception_offset())); |
0 | 93 // make sure that the vm_results are cleared |
94 if (oop_result1->is_valid()) { | |
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95 movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
0 | 96 } |
97 if (oop_result2->is_valid()) { | |
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98 movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); |
0 | 99 } |
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100 // (tw) Deoptimize in case of an exception. |
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101 restore_live_registers(this, false); |
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102 movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); |
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103 leave(); |
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104 movl(rscratch1, 2); // InvalidateRecompile |
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105 jump(RuntimeAddress(SharedRuntime::deopt_blob()->uncommon_trap())); |
0 | 106 bind(L); |
107 } | |
108 // get oop results if there are any and reset the values in the thread | |
109 if (oop_result1->is_valid()) { | |
304 | 110 movptr(oop_result1, Address(thread, JavaThread::vm_result_offset())); |
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111 movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
0 | 112 verify_oop(oop_result1); |
113 } | |
114 if (oop_result2->is_valid()) { | |
304 | 115 movptr(oop_result2, Address(thread, JavaThread::vm_result_2_offset())); |
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116 movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); |
0 | 117 verify_oop(oop_result2); |
118 } | |
119 return call_offset; | |
120 } | |
121 | |
122 | |
123 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1) { | |
304 | 124 #ifdef _LP64 |
125 mov(c_rarg1, arg1); | |
126 #else | |
127 push(arg1); | |
128 #endif // _LP64 | |
0 | 129 return call_RT(oop_result1, oop_result2, entry, 1); |
130 } | |
131 | |
132 | |
133 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2) { | |
304 | 134 #ifdef _LP64 |
135 if (c_rarg1 == arg2) { | |
136 if (c_rarg2 == arg1) { | |
137 xchgq(arg1, arg2); | |
138 } else { | |
139 mov(c_rarg2, arg2); | |
140 mov(c_rarg1, arg1); | |
141 } | |
142 } else { | |
143 mov(c_rarg1, arg1); | |
144 mov(c_rarg2, arg2); | |
145 } | |
146 #else | |
147 push(arg2); | |
148 push(arg1); | |
149 #endif // _LP64 | |
0 | 150 return call_RT(oop_result1, oop_result2, entry, 2); |
151 } | |
152 | |
153 | |
154 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2, Register arg3) { | |
304 | 155 #ifdef _LP64 |
156 // if there is any conflict use the stack | |
157 if (arg1 == c_rarg2 || arg1 == c_rarg3 || | |
158 arg2 == c_rarg1 || arg1 == c_rarg3 || | |
159 arg3 == c_rarg1 || arg1 == c_rarg2) { | |
160 push(arg3); | |
161 push(arg2); | |
162 push(arg1); | |
163 pop(c_rarg1); | |
164 pop(c_rarg2); | |
165 pop(c_rarg3); | |
166 } else { | |
167 mov(c_rarg1, arg1); | |
168 mov(c_rarg2, arg2); | |
169 mov(c_rarg3, arg3); | |
170 } | |
171 #else | |
172 push(arg3); | |
173 push(arg2); | |
174 push(arg1); | |
175 #endif // _LP64 | |
0 | 176 return call_RT(oop_result1, oop_result2, entry, 3); |
177 } | |
178 | |
179 | |
180 // Implementation of StubFrame | |
181 | |
182 class StubFrame: public StackObj { | |
183 private: | |
184 StubAssembler* _sasm; | |
185 | |
186 public: | |
187 StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments); | |
188 void load_argument(int offset_in_words, Register reg); | |
189 | |
190 ~StubFrame(); | |
191 }; | |
192 | |
193 | |
194 #define __ _sasm-> | |
195 | |
196 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) { | |
197 _sasm = sasm; | |
198 __ set_info(name, must_gc_arguments); | |
199 __ enter(); | |
200 } | |
201 | |
202 // load parameters that were stored with LIR_Assembler::store_parameter | |
203 // Note: offsets for store_parameter and load_argument must match | |
204 void StubFrame::load_argument(int offset_in_words, Register reg) { | |
205 // rbp, + 0: link | |
206 // + 1: return address | |
207 // + 2: argument with offset 0 | |
208 // + 3: argument with offset 1 | |
209 // + 4: ... | |
210 | |
304 | 211 __ movptr(reg, Address(rbp, (offset_in_words + 2) * BytesPerWord)); |
0 | 212 } |
213 | |
214 | |
215 StubFrame::~StubFrame() { | |
216 __ leave(); | |
217 __ ret(0); | |
218 } | |
219 | |
220 #undef __ | |
221 | |
222 | |
223 // Implementation of Runtime1 | |
224 | |
225 #define __ sasm-> | |
226 | |
304 | 227 const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2; |
228 const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2; | |
0 | 229 |
230 // Stack layout for saving/restoring all the registers needed during a runtime | |
231 // call (this includes deoptimization) | |
232 // Note: note that users of this frame may well have arguments to some runtime | |
233 // while these values are on the stack. These positions neglect those arguments | |
234 // but the code in save_live_registers will take the argument count into | |
235 // account. | |
236 // | |
304 | 237 #ifdef _LP64 |
238 #define SLOT2(x) x, | |
239 #define SLOT_PER_WORD 2 | |
240 #else | |
241 #define SLOT2(x) | |
242 #define SLOT_PER_WORD 1 | |
243 #endif // _LP64 | |
244 | |
0 | 245 enum reg_save_layout { |
304 | 246 // 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that |
247 // happen and will assert if the stack size we create is misaligned | |
248 #ifdef _LP64 | |
249 align_dummy_0, align_dummy_1, | |
250 #endif // _LP64 | |
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251 #ifdef _WIN64 |
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252 // Windows always allocates space for it's argument registers (see |
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253 // frame::arg_reg_save_area_bytes). |
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254 arg_reg_save_1, arg_reg_save_1H, // 0, 4 |
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255 arg_reg_save_2, arg_reg_save_2H, // 8, 12 |
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256 arg_reg_save_3, arg_reg_save_3H, // 16, 20 |
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257 arg_reg_save_4, arg_reg_save_4H, // 24, 28 |
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258 #endif // _WIN64 |
304 | 259 xmm_regs_as_doubles_off, // 32 |
260 float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots, // 160 | |
261 fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots, // 224 | |
262 // fpu_state_end_off is exclusive | |
263 fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD), // 352 | |
264 marker = fpu_state_end_off, SLOT2(markerH) // 352, 356 | |
265 extra_space_offset, // 360 | |
266 #ifdef _LP64 | |
267 r15_off = extra_space_offset, r15H_off, // 360, 364 | |
268 r14_off, r14H_off, // 368, 372 | |
269 r13_off, r13H_off, // 376, 380 | |
270 r12_off, r12H_off, // 384, 388 | |
271 r11_off, r11H_off, // 392, 396 | |
272 r10_off, r10H_off, // 400, 404 | |
273 r9_off, r9H_off, // 408, 412 | |
274 r8_off, r8H_off, // 416, 420 | |
275 rdi_off, rdiH_off, // 424, 428 | |
276 #else | |
0 | 277 rdi_off = extra_space_offset, |
304 | 278 #endif // _LP64 |
279 rsi_off, SLOT2(rsiH_off) // 432, 436 | |
280 rbp_off, SLOT2(rbpH_off) // 440, 444 | |
281 rsp_off, SLOT2(rspH_off) // 448, 452 | |
282 rbx_off, SLOT2(rbxH_off) // 456, 460 | |
283 rdx_off, SLOT2(rdxH_off) // 464, 468 | |
284 rcx_off, SLOT2(rcxH_off) // 472, 476 | |
285 rax_off, SLOT2(raxH_off) // 480, 484 | |
286 saved_rbp_off, SLOT2(saved_rbpH_off) // 488, 492 | |
287 return_off, SLOT2(returnH_off) // 496, 500 | |
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288 reg_save_frame_size // As noted: neglects any parameters to runtime // 504 |
0 | 289 }; |
290 | |
291 | |
292 | |
293 // Save off registers which might be killed by calls into the runtime. | |
294 // Tries to smart of about FP registers. In particular we separate | |
295 // saving and describing the FPU registers for deoptimization since we | |
296 // have to save the FPU registers twice if we describe them and on P4 | |
297 // saving FPU registers which don't contain anything appears | |
298 // expensive. The deopt blob is the only thing which needs to | |
299 // describe FPU registers. In all other cases it should be sufficient | |
300 // to simply save their current value. | |
301 | |
302 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args, | |
303 bool save_fpu_registers = true) { | |
304 | 304 |
305 // In 64bit all the args are in regs so there are no additional stack slots | |
306 LP64_ONLY(num_rt_args = 0); | |
307 LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");) | |
308 int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread | |
309 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word ); | |
0 | 310 |
311 // record saved value locations in an OopMap | |
312 // locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread | |
304 | 313 OopMap* map = new OopMap(frame_size_in_slots, 0); |
0 | 314 map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg()); |
315 map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg()); | |
316 map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg()); | |
317 map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg()); | |
318 map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg()); | |
319 map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg()); | |
304 | 320 #ifdef _LP64 |
321 map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args), r8->as_VMReg()); | |
322 map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args), r9->as_VMReg()); | |
323 map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg()); | |
324 map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg()); | |
325 map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg()); | |
326 map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg()); | |
327 map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg()); | |
328 map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg()); | |
329 | |
330 // This is stupid but needed. | |
331 map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next()); | |
332 map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next()); | |
333 map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next()); | |
334 map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next()); | |
335 map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next()); | |
336 map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next()); | |
337 | |
338 map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args), r8->as_VMReg()->next()); | |
339 map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args), r9->as_VMReg()->next()); | |
340 map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next()); | |
341 map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next()); | |
342 map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next()); | |
343 map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next()); | |
344 map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next()); | |
345 map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next()); | |
346 #endif // _LP64 | |
0 | 347 |
348 if (save_fpu_registers) { | |
349 if (UseSSE < 2) { | |
350 int fpu_off = float_regs_as_doubles_off; | |
351 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) { | |
352 VMReg fpu_name_0 = FrameMap::fpu_regname(n); | |
353 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + num_rt_args), fpu_name_0); | |
354 // %%% This is really a waste but we'll keep things as they were for now | |
355 if (true) { | |
356 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next()); | |
357 } | |
358 fpu_off += 2; | |
359 } | |
360 assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots"); | |
361 } | |
362 | |
363 if (UseSSE >= 2) { | |
364 int xmm_off = xmm_regs_as_doubles_off; | |
365 for (int n = 0; n < FrameMap::nof_xmm_regs; n++) { | |
366 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg(); | |
367 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0); | |
368 // %%% This is really a waste but we'll keep things as they were for now | |
369 if (true) { | |
370 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next()); | |
371 } | |
372 xmm_off += 2; | |
373 } | |
374 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers"); | |
375 | |
376 } else if (UseSSE == 1) { | |
377 int xmm_off = xmm_regs_as_doubles_off; | |
378 for (int n = 0; n < FrameMap::nof_xmm_regs; n++) { | |
379 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg(); | |
380 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0); | |
381 xmm_off += 2; | |
382 } | |
383 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers"); | |
384 } | |
385 } | |
386 | |
387 return map; | |
388 } | |
389 | |
390 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args, | |
391 bool save_fpu_registers = true) { | |
392 __ block_comment("save_live_registers"); | |
393 | |
304 | 394 __ pusha(); // integer registers |
0 | 395 |
396 // assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset"); | |
397 // assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset"); | |
398 | |
304 | 399 __ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size); |
0 | 400 |
401 #ifdef ASSERT | |
304 | 402 __ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef); |
0 | 403 #endif |
404 | |
405 if (save_fpu_registers) { | |
406 if (UseSSE < 2) { | |
407 // save FPU stack | |
304 | 408 __ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); |
0 | 409 __ fwait(); |
410 | |
411 #ifdef ASSERT | |
412 Label ok; | |
304 | 413 __ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std()); |
0 | 414 __ jccb(Assembler::equal, ok); |
415 __ stop("corrupted control word detected"); | |
416 __ bind(ok); | |
417 #endif | |
418 | |
419 // Reset the control word to guard against exceptions being unmasked | |
420 // since fstp_d can cause FPU stack underflow exceptions. Write it | |
421 // into the on stack copy and then reload that to make sure that the | |
422 // current and future values are correct. | |
304 | 423 __ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std()); |
424 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); | |
0 | 425 |
426 // Save the FPU registers in de-opt-able form | |
304 | 427 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); |
428 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); | |
429 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); | |
430 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); | |
431 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); | |
432 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); | |
433 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); | |
434 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); | |
0 | 435 } |
436 | |
437 if (UseSSE >= 2) { | |
438 // save XMM registers | |
439 // XMM registers can contain float or double values, but this is not known here, | |
440 // so always save them as doubles. | |
441 // note that float values are _not_ converted automatically, so for float values | |
442 // the second word contains only garbage data. | |
304 | 443 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0); |
444 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1); | |
445 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2); | |
446 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3); | |
447 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4); | |
448 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5); | |
449 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6); | |
450 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7); | |
451 #ifdef _LP64 | |
452 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64), xmm8); | |
453 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72), xmm9); | |
454 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80), xmm10); | |
455 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88), xmm11); | |
456 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96), xmm12); | |
457 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104), xmm13); | |
458 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112), xmm14); | |
459 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120), xmm15); | |
460 #endif // _LP64 | |
0 | 461 } else if (UseSSE == 1) { |
462 // save XMM registers as float because double not supported without SSE2 | |
304 | 463 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0); |
464 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1); | |
465 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2); | |
466 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3); | |
467 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4); | |
468 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5); | |
469 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6); | |
470 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7); | |
0 | 471 } |
472 } | |
473 | |
474 // FPU stack must be empty now | |
475 __ verify_FPU(0, "save_live_registers"); | |
476 | |
477 return generate_oop_map(sasm, num_rt_args, save_fpu_registers); | |
478 } | |
479 | |
480 | |
481 static void restore_fpu(StubAssembler* sasm, bool restore_fpu_registers = true) { | |
482 if (restore_fpu_registers) { | |
483 if (UseSSE >= 2) { | |
484 // restore XMM registers | |
304 | 485 __ movdbl(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); |
486 __ movdbl(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); | |
487 __ movdbl(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); | |
488 __ movdbl(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); | |
489 __ movdbl(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); | |
490 __ movdbl(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); | |
491 __ movdbl(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); | |
492 __ movdbl(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); | |
493 #ifdef _LP64 | |
494 __ movdbl(xmm8, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64)); | |
495 __ movdbl(xmm9, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72)); | |
496 __ movdbl(xmm10, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80)); | |
497 __ movdbl(xmm11, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88)); | |
498 __ movdbl(xmm12, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96)); | |
499 __ movdbl(xmm13, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104)); | |
500 __ movdbl(xmm14, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112)); | |
501 __ movdbl(xmm15, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120)); | |
502 #endif // _LP64 | |
0 | 503 } else if (UseSSE == 1) { |
504 // restore XMM registers | |
304 | 505 __ movflt(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); |
506 __ movflt(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); | |
507 __ movflt(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); | |
508 __ movflt(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); | |
509 __ movflt(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); | |
510 __ movflt(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); | |
511 __ movflt(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); | |
512 __ movflt(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); | |
0 | 513 } |
514 | |
515 if (UseSSE < 2) { | |
304 | 516 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); |
0 | 517 } else { |
518 // check that FPU stack is really empty | |
519 __ verify_FPU(0, "restore_live_registers"); | |
520 } | |
521 | |
522 } else { | |
523 // check that FPU stack is really empty | |
524 __ verify_FPU(0, "restore_live_registers"); | |
525 } | |
526 | |
527 #ifdef ASSERT | |
528 { | |
529 Label ok; | |
304 | 530 __ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef); |
0 | 531 __ jcc(Assembler::equal, ok); |
532 __ stop("bad offsets in frame"); | |
533 __ bind(ok); | |
534 } | |
304 | 535 #endif // ASSERT |
0 | 536 |
304 | 537 __ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size); |
0 | 538 } |
539 | |
540 | |
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541 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers/* = true*/) { |
0 | 542 __ block_comment("restore_live_registers"); |
543 | |
544 restore_fpu(sasm, restore_fpu_registers); | |
304 | 545 __ popa(); |
0 | 546 } |
547 | |
548 | |
549 static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) { | |
550 __ block_comment("restore_live_registers_except_rax"); | |
551 | |
552 restore_fpu(sasm, restore_fpu_registers); | |
553 | |
304 | 554 #ifdef _LP64 |
555 __ movptr(r15, Address(rsp, 0)); | |
556 __ movptr(r14, Address(rsp, wordSize)); | |
557 __ movptr(r13, Address(rsp, 2 * wordSize)); | |
558 __ movptr(r12, Address(rsp, 3 * wordSize)); | |
559 __ movptr(r11, Address(rsp, 4 * wordSize)); | |
560 __ movptr(r10, Address(rsp, 5 * wordSize)); | |
561 __ movptr(r9, Address(rsp, 6 * wordSize)); | |
562 __ movptr(r8, Address(rsp, 7 * wordSize)); | |
563 __ movptr(rdi, Address(rsp, 8 * wordSize)); | |
564 __ movptr(rsi, Address(rsp, 9 * wordSize)); | |
565 __ movptr(rbp, Address(rsp, 10 * wordSize)); | |
566 // skip rsp | |
567 __ movptr(rbx, Address(rsp, 12 * wordSize)); | |
568 __ movptr(rdx, Address(rsp, 13 * wordSize)); | |
569 __ movptr(rcx, Address(rsp, 14 * wordSize)); | |
570 | |
571 __ addptr(rsp, 16 * wordSize); | |
572 #else | |
573 | |
574 __ pop(rdi); | |
575 __ pop(rsi); | |
576 __ pop(rbp); | |
577 __ pop(rbx); // skip this value | |
578 __ pop(rbx); | |
579 __ pop(rdx); | |
580 __ pop(rcx); | |
581 __ addptr(rsp, BytesPerWord); | |
582 #endif // _LP64 | |
0 | 583 } |
584 | |
585 | |
586 void Runtime1::initialize_pd() { | |
587 // nothing to do | |
588 } | |
589 | |
590 | |
591 // target: the entry point of the method that creates and posts the exception oop | |
592 // has_argument: true if the exception needs an argument (passed on stack because registers must be preserved) | |
593 | |
594 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) { | |
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595 OopMapSet* oop_maps = new OopMapSet(); |
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596 #ifdef GRAAL |
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597 // graal passes the argument in r10 |
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598 OopMap* oop_map = save_live_registers(sasm, 1); |
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599 |
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600 // now all registers are saved and can be used freely |
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601 // verify that no old value is used accidentally |
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602 __ invalidate_registers(true, true, true, true, true, true); |
0 | 603 |
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604 // registers used by this stub |
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605 const Register temp_reg = rbx; |
0 | 606 |
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607 // load argument for exception that is passed as an argument into the stub |
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608 if (has_argument) { |
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609 __ movptr(c_rarg1, r10); |
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610 } |
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611 int call_offset = __ call_RT(noreg, noreg, target, has_argument ? 1 : 0); |
0 | 612 |
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613 oop_maps->add_gc_map(call_offset, oop_map); |
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614 #else |
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615 // preserve all registers |
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616 int num_rt_args = has_argument ? 2 : 1; |
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617 OopMap* oop_map = save_live_registers(sasm, num_rt_args); |
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618 |
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619 // now all registers are saved and can be used freely |
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620 // verify that no old value is used accidentally |
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621 __ invalidate_registers(true, true, true, true, true, true); |
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622 |
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623 // registers used by this stub |
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624 const Register temp_reg = rbx; |
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625 |
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626 // load argument for exception that is passed as an argument into the stub |
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627 if (has_argument) { |
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628 #ifdef _LP64 |
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629 __ movptr(c_rarg1, Address(rbp, 2*BytesPerWord)); |
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630 #else |
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631 __ movptr(temp_reg, Address(rbp, 2*BytesPerWord)); |
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632 __ push(temp_reg); |
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633 #endif // _LP64 |
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634 } |
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635 int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1); |
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636 |
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637 oop_maps->add_gc_map(call_offset, oop_map); |
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638 #endif |
0 | 639 |
640 __ stop("should not reach here"); | |
641 | |
642 return oop_maps; | |
643 } | |
644 | |
645 | |
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646 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) { |
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647 __ block_comment("generate_handle_exception"); |
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648 |
0 | 649 // incoming parameters |
650 const Register exception_oop = rax; | |
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651 const Register exception_pc = rdx; |
0 | 652 // other registers used in this stub |
304 | 653 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); |
0 | 654 |
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655 // Save registers, if required. |
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656 OopMapSet* oop_maps = new OopMapSet(); |
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657 OopMap* oop_map = NULL; |
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658 switch (id) { |
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659 case forward_exception_id: |
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660 // We're handling an exception in the context of a compiled frame. |
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661 // The registers have been saved in the standard places. Perform |
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662 // an exception lookup in the caller and dispatch to the handler |
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663 // if found. Otherwise unwind and dispatch to the callers |
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664 // exception handler. |
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665 oop_map = generate_oop_map(sasm, 1 /*thread*/); |
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666 |
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667 // load and clear pending exception oop into RAX |
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668 __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset())); |
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669 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); |
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670 |
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671 // load issuing PC (the return address for this stub) into rdx |
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672 __ movptr(exception_pc, Address(rbp, 1*BytesPerWord)); |
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673 |
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674 // make sure that the vm_results are cleared (may be unnecessary) |
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675 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
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676 __ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); |
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677 break; |
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678 case handle_exception_nofpu_id: |
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679 case handle_exception_id: |
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680 // At this point all registers MAY be live. |
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681 oop_map = save_live_registers(sasm, 1 /*thread*/, id == handle_exception_nofpu_id); |
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682 break; |
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683 case handle_exception_from_callee_id: { |
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684 // At this point all registers except exception oop (RAX) and |
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685 // exception pc (RDX) are dead. |
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686 const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/) WIN64_ONLY(+ frame::arg_reg_save_area_bytes / BytesPerWord); |
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687 oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0); |
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688 sasm->set_frame_size(frame_size); |
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689 WIN64_ONLY(__ subq(rsp, frame::arg_reg_save_area_bytes)); |
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690 break; |
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691 } |
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692 default: ShouldNotReachHere(); |
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693 } |
0 | 694 |
695 #ifdef TIERED | |
696 // C2 can leave the fpu stack dirty | |
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697 if (UseSSE < 2) { |
0 | 698 __ empty_FPU_stack(); |
699 } | |
700 #endif // TIERED | |
701 | |
702 // verify that only rax, and rdx is valid at this time | |
703 __ invalidate_registers(false, true, true, false, true, true); | |
704 // verify that rax, contains a valid exception | |
705 __ verify_not_null_oop(exception_oop); | |
706 | |
707 // load address of JavaThread object for thread-local data | |
304 | 708 NOT_LP64(__ get_thread(thread);) |
0 | 709 |
710 #ifdef ASSERT | |
711 // check that fields in JavaThread for exception oop and issuing pc are | |
712 // empty before writing to them | |
713 Label oop_empty; | |
304 | 714 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD); |
0 | 715 __ jcc(Assembler::equal, oop_empty); |
716 __ stop("exception oop already set"); | |
717 __ bind(oop_empty); | |
718 | |
719 Label pc_empty; | |
304 | 720 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); |
0 | 721 __ jcc(Assembler::equal, pc_empty); |
722 __ stop("exception pc already set"); | |
723 __ bind(pc_empty); | |
724 #endif | |
725 | |
726 // save exception oop and issuing pc into JavaThread | |
727 // (exception handler will load it from here) | |
304 | 728 __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop); |
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729 __ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc); |
0 | 730 |
731 // patch throwing pc into return address (has bci & oop map) | |
304 | 732 __ movptr(Address(rbp, 1*BytesPerWord), exception_pc); |
0 | 733 |
734 // compute the exception handler. | |
735 // the exception oop and the throwing pc are read from the fields in JavaThread | |
736 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc)); | |
737 oop_maps->add_gc_map(call_offset, oop_map); | |
738 | |
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739 // rax: handler address |
0 | 740 // will be the deopt blob if nmethod was deoptimized while we looked up |
741 // handler regardless of whether handler existed in the nmethod. | |
742 | |
743 // only rax, is valid at this time, all other registers have been destroyed by the runtime call | |
744 __ invalidate_registers(false, true, true, true, true, true); | |
745 | |
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746 // patch the return address, this stub will directly return to the exception handler |
304 | 747 __ movptr(Address(rbp, 1*BytesPerWord), rax); |
0 | 748 |
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749 switch (id) { |
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750 case forward_exception_id: |
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751 case handle_exception_nofpu_id: |
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752 case handle_exception_id: |
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753 // Restore the registers that were saved at the beginning. |
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754 restore_live_registers(sasm, id == handle_exception_nofpu_id); |
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755 break; |
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756 case handle_exception_from_callee_id: |
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757 // WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP |
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758 // since we do a leave anyway. |
0 | 759 |
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760 // Pop the return address since we are possibly changing SP (restoring from BP). |
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761 __ leave(); |
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762 __ pop(rcx); |
0 | 763 |
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764 // Restore SP from BP if the exception PC is a method handle call site. |
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765 NOT_LP64(__ get_thread(thread);) |
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766 __ cmpl(Address(thread, JavaThread::is_method_handle_return_offset()), 0); |
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767 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
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768 __ jmp(rcx); // jump to exception handler |
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769 break; |
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770 default: ShouldNotReachHere(); |
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771 } |
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772 |
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773 return oop_maps; |
0 | 774 } |
775 | |
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776 void Runtime1::graal_generate_handle_exception(StubAssembler *sasm, OopMapSet* oop_maps, OopMap* oop_map) { |
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777 NOT_LP64(fatal("64 bit only")); |
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778 // incoming parameters |
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779 const Register exception_oop = j_rarg0; |
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780 // other registers used in this stub |
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781 const Register exception_pc = j_rarg1; |
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782 const Register thread = r15_thread; |
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783 |
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784 __ block_comment("graal_generate_handle_exception"); |
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785 |
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786 // verify that rax, contains a valid exception |
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787 __ verify_not_null_oop(exception_oop); |
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788 |
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789 #ifdef ASSERT |
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790 // check that fields in JavaThread for exception oop and issuing pc are |
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791 // empty before writing to them |
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792 Label oop_empty; |
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793 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD); |
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794 __ jcc(Assembler::equal, oop_empty); |
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795 __ stop("exception oop already set"); |
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796 __ bind(oop_empty); |
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797 |
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798 Label pc_empty; |
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799 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); |
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800 __ jcc(Assembler::equal, pc_empty); |
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801 __ stop("exception pc already set"); |
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802 __ bind(pc_empty); |
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803 #endif |
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804 |
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805 // save exception oop and issuing pc into JavaThread |
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806 // (exception handler will load it from here) |
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807 __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop); |
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808 __ movptr(exception_pc, Address(rbp, 1*BytesPerWord)); |
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809 __ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc); |
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810 |
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811 // compute the exception handler. |
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812 // the exception oop and the throwing pc are read from the fields in JavaThread |
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813 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc)); |
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814 oop_maps->add_gc_map(call_offset, oop_map); |
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815 |
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816 // rax,: handler address |
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817 // will be the deopt blob if nmethod was deoptimized while we looked up |
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818 // handler regardless of whether handler existed in the nmethod. |
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819 |
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820 // only rax, is valid at this time, all other registers have been destroyed by the runtime call |
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821 __ invalidate_registers(false, true, true, true, true, true); |
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822 |
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823 #ifdef ASSERT |
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824 // Do we have an exception handler in the nmethod? |
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825 Label done; |
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826 __ testptr(rax, rax); |
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827 __ jcc(Assembler::notZero, done); |
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828 __ stop("no handler found"); |
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829 __ bind(done); |
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830 #endif |
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831 |
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832 // exception handler found |
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833 // patch the return address -> the stub will directly return to the exception handler |
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834 __ movptr(Address(rbp, 1*BytesPerWord), rax); |
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835 |
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836 // restore registers |
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837 restore_live_registers(sasm, false); |
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838 |
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839 // return to exception handler |
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840 __ leave(); |
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841 __ ret(0); |
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842 } |
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843 |
0 | 844 |
845 void Runtime1::generate_unwind_exception(StubAssembler *sasm) { | |
846 // incoming parameters | |
847 const Register exception_oop = rax; | |
1295 | 848 // callee-saved copy of exception_oop during runtime call |
849 const Register exception_oop_callee_saved = NOT_LP64(rsi) LP64_ONLY(r14); | |
0 | 850 // other registers used in this stub |
851 const Register exception_pc = rdx; | |
852 const Register handler_addr = rbx; | |
304 | 853 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); |
0 | 854 |
855 // verify that only rax, is valid at this time | |
856 __ invalidate_registers(false, true, true, true, true, true); | |
857 | |
858 #ifdef ASSERT | |
859 // check that fields in JavaThread for exception oop and issuing pc are empty | |
304 | 860 NOT_LP64(__ get_thread(thread);) |
0 | 861 Label oop_empty; |
304 | 862 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0); |
0 | 863 __ jcc(Assembler::equal, oop_empty); |
864 __ stop("exception oop must be empty"); | |
865 __ bind(oop_empty); | |
866 | |
867 Label pc_empty; | |
304 | 868 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); |
0 | 869 __ jcc(Assembler::equal, pc_empty); |
870 __ stop("exception pc must be empty"); | |
871 __ bind(pc_empty); | |
872 #endif | |
873 | |
874 // clear the FPU stack in case any FPU results are left behind | |
875 __ empty_FPU_stack(); | |
876 | |
1295 | 877 // save exception_oop in callee-saved register to preserve it during runtime calls |
878 __ verify_not_null_oop(exception_oop); | |
879 __ movptr(exception_oop_callee_saved, exception_oop); | |
880 | |
881 NOT_LP64(__ get_thread(thread);) | |
882 // Get return address (is on top of stack after leave). | |
304 | 883 __ movptr(exception_pc, Address(rsp, 0)); |
0 | 884 |
1295 | 885 // search the exception handler address of the caller (using the return address) |
886 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc); | |
887 // rax: exception handler address of the caller | |
0 | 888 |
1295 | 889 // Only RAX and RSI are valid at this time, all other registers have been destroyed by the call. |
890 __ invalidate_registers(false, true, true, true, false, true); | |
0 | 891 |
892 // move result of call into correct register | |
304 | 893 __ movptr(handler_addr, rax); |
0 | 894 |
1295 | 895 // Restore exception oop to RAX (required convention of exception handler). |
896 __ movptr(exception_oop, exception_oop_callee_saved); | |
0 | 897 |
1295 | 898 // verify that there is really a valid exception in rax |
899 __ verify_not_null_oop(exception_oop); | |
0 | 900 |
901 // get throwing pc (= return address). | |
902 // rdx has been destroyed by the call, so it must be set again | |
903 // the pop is also necessary to simulate the effect of a ret(0) | |
304 | 904 __ pop(exception_pc); |
0 | 905 |
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906 // Restore SP from BP if the exception PC is a method handle call site. |
1295 | 907 NOT_LP64(__ get_thread(thread);) |
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908 __ cmpl(Address(thread, JavaThread::is_method_handle_return_offset()), 0); |
1564 | 909 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
0 | 910 |
911 // continue at exception handler (return address removed) | |
912 // note: do *not* remove arguments when unwinding the | |
913 // activation since the caller assumes having | |
914 // all arguments on the stack when entering the | |
915 // runtime to determine the exception handler | |
916 // (GC happens at call site with arguments!) | |
1295 | 917 // rax: exception oop |
0 | 918 // rdx: throwing pc |
1295 | 919 // rbx: exception handler |
0 | 920 __ jmp(handler_addr); |
921 } | |
922 | |
923 | |
924 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) { | |
925 // use the maximum number of runtime-arguments here because it is difficult to | |
926 // distinguish each RT-Call. | |
927 // Note: This number affects also the RT-Call in generate_handle_exception because | |
928 // the oop-map is shared for all calls. | |
929 const int num_rt_args = 2; // thread + dummy | |
930 | |
931 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob(); | |
932 assert(deopt_blob != NULL, "deoptimization blob must have been created"); | |
933 | |
934 OopMap* oop_map = save_live_registers(sasm, num_rt_args); | |
935 | |
304 | 936 #ifdef _LP64 |
937 const Register thread = r15_thread; | |
938 // No need to worry about dummy | |
939 __ mov(c_rarg0, thread); | |
940 #else | |
941 __ push(rax); // push dummy | |
0 | 942 |
943 const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions) | |
944 // push java thread (becomes first argument of C function) | |
945 __ get_thread(thread); | |
304 | 946 __ push(thread); |
947 #endif // _LP64 | |
0 | 948 __ set_last_Java_frame(thread, noreg, rbp, NULL); |
949 // do the call | |
950 __ call(RuntimeAddress(target)); | |
951 OopMapSet* oop_maps = new OopMapSet(); | |
952 oop_maps->add_gc_map(__ offset(), oop_map); | |
953 // verify callee-saved register | |
954 #ifdef ASSERT | |
955 guarantee(thread != rax, "change this code"); | |
304 | 956 __ push(rax); |
0 | 957 { Label L; |
958 __ get_thread(rax); | |
304 | 959 __ cmpptr(thread, rax); |
0 | 960 __ jcc(Assembler::equal, L); |
304 | 961 __ stop("StubAssembler::call_RT: rdi/r15 not callee saved?"); |
0 | 962 __ bind(L); |
963 } | |
304 | 964 __ pop(rax); |
0 | 965 #endif |
966 __ reset_last_Java_frame(thread, true, false); | |
304 | 967 #ifndef _LP64 |
968 __ pop(rcx); // discard thread arg | |
969 __ pop(rcx); // discard dummy | |
970 #endif // _LP64 | |
0 | 971 |
972 // check for pending exceptions | |
973 { Label L; | |
304 | 974 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 975 __ jcc(Assembler::equal, L); |
976 // exception pending => remove activation and forward to exception handler | |
977 | |
304 | 978 __ testptr(rax, rax); // have we deoptimized? |
0 | 979 __ jump_cc(Assembler::equal, |
980 RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id))); | |
981 | |
982 // the deopt blob expects exceptions in the special fields of | |
983 // JavaThread, so copy and clear pending exception. | |
984 | |
985 // load and clear pending exception | |
304 | 986 __ movptr(rax, Address(thread, Thread::pending_exception_offset())); |
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987 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); |
0 | 988 |
989 // check that there is really a valid exception | |
990 __ verify_not_null_oop(rax); | |
991 | |
992 // load throwing pc: this is the return address of the stub | |
304 | 993 __ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size)); |
0 | 994 |
995 #ifdef ASSERT | |
996 // check that fields in JavaThread for exception oop and issuing pc are empty | |
997 Label oop_empty; | |
304 | 998 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); |
0 | 999 __ jcc(Assembler::equal, oop_empty); |
1000 __ stop("exception oop must be empty"); | |
1001 __ bind(oop_empty); | |
1002 | |
1003 Label pc_empty; | |
304 | 1004 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); |
0 | 1005 __ jcc(Assembler::equal, pc_empty); |
1006 __ stop("exception pc must be empty"); | |
1007 __ bind(pc_empty); | |
1008 #endif | |
1009 | |
1010 // store exception oop and throwing pc to JavaThread | |
304 | 1011 __ movptr(Address(thread, JavaThread::exception_oop_offset()), rax); |
1012 __ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx); | |
0 | 1013 |
1014 restore_live_registers(sasm); | |
1015 | |
1016 __ leave(); | |
304 | 1017 __ addptr(rsp, BytesPerWord); // remove return address from stack |
0 | 1018 |
1019 // Forward the exception directly to deopt blob. We can blow no | |
1020 // registers and must leave throwing pc on the stack. A patch may | |
1021 // have values live in registers so the entry point with the | |
1022 // exception in tls. | |
1023 __ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls())); | |
1024 | |
1025 __ bind(L); | |
1026 } | |
1027 | |
1028 | |
1029 // Runtime will return true if the nmethod has been deoptimized during | |
1030 // the patching process. In that case we must do a deopt reexecute instead. | |
1031 | |
1032 Label reexecuteEntry, cont; | |
1033 | |
304 | 1034 __ testptr(rax, rax); // have we deoptimized? |
0 | 1035 __ jcc(Assembler::equal, cont); // no |
1036 | |
1037 // Will reexecute. Proper return address is already on the stack we just restore | |
1038 // registers, pop all of our frame but the return address and jump to the deopt blob | |
1039 restore_live_registers(sasm); | |
1040 __ leave(); | |
1041 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution())); | |
1042 | |
1043 __ bind(cont); | |
1044 restore_live_registers(sasm); | |
1045 __ leave(); | |
1046 __ ret(0); | |
1047 | |
1048 return oop_maps; | |
1049 } | |
1050 | |
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1051 JRT_ENTRY(void, graal_create_null_exception(JavaThread* thread)) |
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1052 thread->set_vm_result(Exceptions::new_exception(thread, vmSymbols::java_lang_NullPointerException(), NULL)()); |
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1053 JRT_END |
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1054 |
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1055 JRT_ENTRY(void, graal_create_out_of_bounds_exception(JavaThread* thread, jint index)) |
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1056 char message[jintAsStringSize]; |
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1057 sprintf(message, "%d", index); |
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1058 thread->set_vm_result(Exceptions::new_exception(thread, vmSymbols::java_lang_ArrayIndexOutOfBoundsException(), message)()); |
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1059 JRT_END |
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1060 |
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1061 JRT_ENTRY(void, graal_generic_callback(JavaThread* thread, oop _callback, oop _argument)) |
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1062 HandleMark hm; |
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1063 Handle callback(_callback); |
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|
1064 Handle argument(_argument); |
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1065 |
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1066 KlassHandle klass = SystemDictionary::resolve_or_null(vmSymbols::com_oracle_max_cri_ci_CiGenericCallback(), SystemDictionary::java_system_loader(), NULL, thread); |
3682
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1067 if (klass.is_null()) { |
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1068 tty->print_cr("couldn't resolve com_oracle_max_cri_ci_CiGenericCallback"); |
3682
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1069 } |
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1070 |
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|
1071 JavaValue result(T_OBJECT); |
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1072 JavaCallArguments args; |
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1073 args.push_oop(Handle(callback)); |
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1074 args.push_oop(Handle(argument)); |
3705
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1075 JavaCalls::call_virtual(&result, klass, vmSymbols::callbackInternal_name(), vmSymbols::callback_signature(), &args, thread); |
3682
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1076 |
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1077 thread->set_vm_result((oop) result.get_jobject()); |
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1078 JRT_END |
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1079 |
1429
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1080 |
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1081 |
0 | 1082 |
1083 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) { | |
1084 | |
1085 // for better readability | |
1086 const bool must_gc_arguments = true; | |
1087 const bool dont_gc_arguments = false; | |
1088 | |
1089 // default value; overwritten for some optimized stubs that are called from methods that do not use the fpu | |
1090 bool save_fpu_registers = true; | |
1091 | |
1092 // stub code & info for the different stubs | |
1093 OopMapSet* oop_maps = NULL; | |
1094 switch (id) { | |
1095 case forward_exception_id: | |
1096 { | |
2321
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1097 oop_maps = generate_handle_exception(id, sasm); |
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1098 __ leave(); |
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1099 __ ret(0); |
0 | 1100 } |
1101 break; | |
1102 | |
1103 case new_instance_id: | |
1104 case fast_new_instance_id: | |
1105 case fast_new_instance_init_check_id: | |
1106 { | |
1107 Register klass = rdx; // Incoming | |
1108 Register obj = rax; // Result | |
1109 | |
1110 if (id == new_instance_id) { | |
1111 __ set_info("new_instance", dont_gc_arguments); | |
1112 } else if (id == fast_new_instance_id) { | |
1113 __ set_info("fast new_instance", dont_gc_arguments); | |
1114 } else { | |
1115 assert(id == fast_new_instance_init_check_id, "bad StubID"); | |
1116 __ set_info("fast new_instance init check", dont_gc_arguments); | |
1117 } | |
1118 | |
1119 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) && | |
1120 UseTLAB && FastTLABRefill) { | |
1121 Label slow_path; | |
1122 Register obj_size = rcx; | |
1123 Register t1 = rbx; | |
1124 Register t2 = rsi; | |
1125 assert_different_registers(klass, obj, obj_size, t1, t2); | |
1126 | |
304 | 1127 __ push(rdi); |
1128 __ push(rbx); | |
0 | 1129 |
1130 if (id == fast_new_instance_init_check_id) { | |
1131 // make sure the klass is initialized | |
1132 __ cmpl(Address(klass, instanceKlass::init_state_offset_in_bytes() + sizeof(oopDesc)), instanceKlass::fully_initialized); | |
1133 __ jcc(Assembler::notEqual, slow_path); | |
1134 } | |
1135 | |
1136 #ifdef ASSERT | |
1137 // assert object can be fast path allocated | |
1138 { | |
1139 Label ok, not_ok; | |
1140 __ movl(obj_size, Address(klass, Klass::layout_helper_offset_in_bytes() + sizeof(oopDesc))); | |
1141 __ cmpl(obj_size, 0); // make sure it's an instance (LH > 0) | |
1142 __ jcc(Assembler::lessEqual, not_ok); | |
1143 __ testl(obj_size, Klass::_lh_instance_slow_path_bit); | |
1144 __ jcc(Assembler::zero, ok); | |
1145 __ bind(not_ok); | |
1146 __ stop("assert(can be fast path allocated)"); | |
1147 __ should_not_reach_here(); | |
1148 __ bind(ok); | |
1149 } | |
1150 #endif // ASSERT | |
1151 | |
1152 // if we got here then the TLAB allocation failed, so try | |
1153 // refilling the TLAB or allocating directly from eden. | |
1154 Label retry_tlab, try_eden; | |
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1155 const Register thread = |
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1156 __ tlab_refill(retry_tlab, try_eden, slow_path); // does not destroy rdx (klass), returns rdi |
0 | 1157 |
1158 __ bind(retry_tlab); | |
1159 | |
304 | 1160 // get the instance size (size is postive so movl is fine for 64bit) |
0 | 1161 __ movl(obj_size, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); |
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1162 |
0 | 1163 __ tlab_allocate(obj, obj_size, 0, t1, t2, slow_path); |
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1164 |
0 | 1165 __ initialize_object(obj, klass, obj_size, 0, t1, t2); |
1166 __ verify_oop(obj); | |
304 | 1167 __ pop(rbx); |
1168 __ pop(rdi); | |
0 | 1169 __ ret(0); |
1170 | |
1171 __ bind(try_eden); | |
304 | 1172 // get the instance size (size is postive so movl is fine for 64bit) |
0 | 1173 __ movl(obj_size, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); |
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|
1174 |
0 | 1175 __ eden_allocate(obj, obj_size, 0, t1, slow_path); |
2100
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1176 __ incr_allocated_bytes(thread, obj_size, 0); |
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|
1177 |
0 | 1178 __ initialize_object(obj, klass, obj_size, 0, t1, t2); |
1179 __ verify_oop(obj); | |
304 | 1180 __ pop(rbx); |
1181 __ pop(rdi); | |
0 | 1182 __ ret(0); |
1183 | |
1184 __ bind(slow_path); | |
304 | 1185 __ pop(rbx); |
1186 __ pop(rdi); | |
0 | 1187 } |
1188 | |
1189 __ enter(); | |
1190 OopMap* map = save_live_registers(sasm, 2); | |
1191 int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass); | |
1192 oop_maps = new OopMapSet(); | |
1193 oop_maps->add_gc_map(call_offset, map); | |
1194 restore_live_registers_except_rax(sasm); | |
1195 __ verify_oop(obj); | |
1196 __ leave(); | |
1197 __ ret(0); | |
1198 | |
1199 // rax,: new instance | |
1200 } | |
1201 | |
1202 break; | |
1203 | |
1204 case counter_overflow_id: | |
1205 { | |
1783 | 1206 Register bci = rax, method = rbx; |
0 | 1207 __ enter(); |
1783 | 1208 OopMap* map = save_live_registers(sasm, 3); |
0 | 1209 // Retrieve bci |
1210 __ movl(bci, Address(rbp, 2*BytesPerWord)); | |
1783 | 1211 // And a pointer to the methodOop |
1212 __ movptr(method, Address(rbp, 3*BytesPerWord)); | |
1213 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method); | |
0 | 1214 oop_maps = new OopMapSet(); |
1215 oop_maps->add_gc_map(call_offset, map); | |
1216 restore_live_registers(sasm); | |
1217 __ leave(); | |
1218 __ ret(0); | |
1219 } | |
1220 break; | |
1221 | |
1222 case new_type_array_id: | |
1223 case new_object_array_id: | |
1224 { | |
1225 Register length = rbx; // Incoming | |
1226 Register klass = rdx; // Incoming | |
1227 Register obj = rax; // Result | |
1228 | |
1229 if (id == new_type_array_id) { | |
1230 __ set_info("new_type_array", dont_gc_arguments); | |
1231 } else { | |
1232 __ set_info("new_object_array", dont_gc_arguments); | |
1233 } | |
1234 | |
1235 #ifdef ASSERT | |
1236 // assert object type is really an array of the proper kind | |
1237 { | |
1238 Label ok; | |
1239 Register t0 = obj; | |
1240 __ movl(t0, Address(klass, Klass::layout_helper_offset_in_bytes() + sizeof(oopDesc))); | |
1241 __ sarl(t0, Klass::_lh_array_tag_shift); | |
1242 int tag = ((id == new_type_array_id) | |
1243 ? Klass::_lh_array_tag_type_value | |
1244 : Klass::_lh_array_tag_obj_value); | |
1245 __ cmpl(t0, tag); | |
1246 __ jcc(Assembler::equal, ok); | |
1247 __ stop("assert(is an array klass)"); | |
1248 __ should_not_reach_here(); | |
1249 __ bind(ok); | |
1250 } | |
1251 #endif // ASSERT | |
1252 | |
1253 if (UseTLAB && FastTLABRefill) { | |
1254 Register arr_size = rsi; | |
1255 Register t1 = rcx; // must be rcx for use as shift count | |
1256 Register t2 = rdi; | |
1257 Label slow_path; | |
1258 assert_different_registers(length, klass, obj, arr_size, t1, t2); | |
1259 | |
1260 // check that array length is small enough for fast path. | |
1261 __ cmpl(length, C1_MacroAssembler::max_array_allocation_length); | |
1262 __ jcc(Assembler::above, slow_path); | |
1263 | |
1264 // if we got here then the TLAB allocation failed, so try | |
1265 // refilling the TLAB or allocating directly from eden. | |
1266 Label retry_tlab, try_eden; | |
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1267 const Register thread = |
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1268 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves rbx & rdx, returns rdi |
0 | 1269 |
1270 __ bind(retry_tlab); | |
1271 | |
1272 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) | |
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1273 // since size is positive movl does right thing on 64bit |
0 | 1274 __ movl(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); |
304 | 1275 // since size is postive movl does right thing on 64bit |
0 | 1276 __ movl(arr_size, length); |
1277 assert(t1 == rcx, "fixed register usage"); | |
304 | 1278 __ shlptr(arr_size /* by t1=rcx, mod 32 */); |
1279 __ shrptr(t1, Klass::_lh_header_size_shift); | |
1280 __ andptr(t1, Klass::_lh_header_size_mask); | |
1281 __ addptr(arr_size, t1); | |
1282 __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up | |
1283 __ andptr(arr_size, ~MinObjAlignmentInBytesMask); | |
0 | 1284 |
1285 __ tlab_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size | |
1286 | |
1287 __ initialize_header(obj, klass, length, t1, t2); | |
1288 __ movb(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() + (Klass::_lh_header_size_shift / BitsPerByte))); | |
1289 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); | |
1290 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); | |
304 | 1291 __ andptr(t1, Klass::_lh_header_size_mask); |
1292 __ subptr(arr_size, t1); // body length | |
1293 __ addptr(t1, obj); // body start | |
0 | 1294 __ initialize_body(t1, arr_size, 0, t2); |
1295 __ verify_oop(obj); | |
1296 __ ret(0); | |
1297 | |
1298 __ bind(try_eden); | |
1299 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) | |
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1300 // since size is positive movl does right thing on 64bit |
0 | 1301 __ movl(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); |
304 | 1302 // since size is postive movl does right thing on 64bit |
0 | 1303 __ movl(arr_size, length); |
1304 assert(t1 == rcx, "fixed register usage"); | |
304 | 1305 __ shlptr(arr_size /* by t1=rcx, mod 32 */); |
1306 __ shrptr(t1, Klass::_lh_header_size_shift); | |
1307 __ andptr(t1, Klass::_lh_header_size_mask); | |
1308 __ addptr(arr_size, t1); | |
1309 __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up | |
1310 __ andptr(arr_size, ~MinObjAlignmentInBytesMask); | |
0 | 1311 |
1312 __ eden_allocate(obj, arr_size, 0, t1, slow_path); // preserves arr_size | |
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1313 __ incr_allocated_bytes(thread, arr_size, 0); |
0 | 1314 |
1315 __ initialize_header(obj, klass, length, t1, t2); | |
1316 __ movb(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() + (Klass::_lh_header_size_shift / BitsPerByte))); | |
1317 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); | |
1318 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); | |
304 | 1319 __ andptr(t1, Klass::_lh_header_size_mask); |
1320 __ subptr(arr_size, t1); // body length | |
1321 __ addptr(t1, obj); // body start | |
0 | 1322 __ initialize_body(t1, arr_size, 0, t2); |
1323 __ verify_oop(obj); | |
1324 __ ret(0); | |
1325 | |
1326 __ bind(slow_path); | |
1327 } | |
1328 | |
1329 __ enter(); | |
1330 OopMap* map = save_live_registers(sasm, 3); | |
1331 int call_offset; | |
1332 if (id == new_type_array_id) { | |
1333 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length); | |
1334 } else { | |
1335 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length); | |
1336 } | |
1337 | |
1338 oop_maps = new OopMapSet(); | |
1339 oop_maps->add_gc_map(call_offset, map); | |
1340 restore_live_registers_except_rax(sasm); | |
1341 | |
1342 __ verify_oop(obj); | |
1343 __ leave(); | |
1344 __ ret(0); | |
1345 | |
1346 // rax,: new array | |
1347 } | |
1348 break; | |
1349 | |
1350 case new_multi_array_id: | |
1351 { StubFrame f(sasm, "new_multi_array", dont_gc_arguments); | |
1352 // rax,: klass | |
1353 // rbx,: rank | |
1354 // rcx: address of 1st dimension | |
1355 OopMap* map = save_live_registers(sasm, 4); | |
1356 int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx); | |
1357 | |
1358 oop_maps = new OopMapSet(); | |
1359 oop_maps->add_gc_map(call_offset, map); | |
1360 restore_live_registers_except_rax(sasm); | |
1361 | |
1362 // rax,: new multi array | |
1363 __ verify_oop(rax); | |
1364 } | |
1365 break; | |
1366 | |
1367 case register_finalizer_id: | |
1368 { | |
1369 __ set_info("register_finalizer", dont_gc_arguments); | |
1370 | |
304 | 1371 // This is called via call_runtime so the arguments |
1372 // will be place in C abi locations | |
1373 | |
1374 #ifdef _LP64 | |
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1375 #ifdef GRAAL |
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1376 __ verify_oop(j_rarg0); |
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1377 __ mov(rax, j_rarg0); |
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1378 #else |
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1379 __ verify_oop(c_rarg0); |
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1380 __ mov(rax, c_rarg0); |
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1381 #endif |
304 | 1382 #else |
0 | 1383 // The object is passed on the stack and we haven't pushed a |
1384 // frame yet so it's one work away from top of stack. | |
304 | 1385 __ movptr(rax, Address(rsp, 1 * BytesPerWord)); |
0 | 1386 __ verify_oop(rax); |
304 | 1387 #endif // _LP64 |
0 | 1388 |
1389 // load the klass and check the has finalizer flag | |
1390 Label register_finalizer; | |
1391 Register t = rsi; | |
2002 | 1392 __ load_klass(t, rax); |
0 | 1393 __ movl(t, Address(t, Klass::access_flags_offset_in_bytes() + sizeof(oopDesc))); |
1394 __ testl(t, JVM_ACC_HAS_FINALIZER); | |
1395 __ jcc(Assembler::notZero, register_finalizer); | |
1396 __ ret(0); | |
1397 | |
1398 __ bind(register_finalizer); | |
1399 __ enter(); | |
1400 OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */); | |
1401 int call_offset = __ call_RT(noreg, noreg, | |
1402 CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax); | |
1403 oop_maps = new OopMapSet(); | |
1404 oop_maps->add_gc_map(call_offset, oop_map); | |
1405 | |
1406 // Now restore all the live registers | |
1407 restore_live_registers(sasm); | |
1408 | |
1409 __ leave(); | |
1410 __ ret(0); | |
1411 } | |
1412 break; | |
1413 | |
1414 case throw_range_check_failed_id: | |
1415 { StubFrame f(sasm, "range_check_failed", dont_gc_arguments); | |
1416 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true); | |
1417 } | |
1418 break; | |
1419 | |
1420 case throw_index_exception_id: | |
1421 { StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments); | |
1422 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true); | |
1423 } | |
1424 break; | |
1425 | |
1426 case throw_div0_exception_id: | |
1427 { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments); | |
1428 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false); | |
1429 } | |
1430 break; | |
1431 | |
1432 case throw_null_pointer_exception_id: | |
1433 { StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments); | |
1434 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false); | |
1435 } | |
1436 break; | |
1437 | |
1438 case handle_exception_nofpu_id: | |
1439 case handle_exception_id: | |
1440 { StubFrame f(sasm, "handle_exception", dont_gc_arguments); | |
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1441 oop_maps = generate_handle_exception(id, sasm); |
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1442 } |
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1443 break; |
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1444 |
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1445 case handle_exception_from_callee_id: |
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1446 { StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments); |
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1447 oop_maps = generate_handle_exception(id, sasm); |
0 | 1448 } |
1449 break; | |
1450 | |
1451 case unwind_exception_id: | |
1429
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1452 { |
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1453 __ set_info("unwind_exception", dont_gc_arguments); |
0 | 1454 // note: no stubframe since we are about to leave the current |
1455 // activation and we are calling a leaf VM function only. | |
1456 generate_unwind_exception(sasm); | |
1457 } | |
1458 break; | |
1459 | |
1460 case throw_array_store_exception_id: | |
1461 { StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments); | |
1462 // tos + 0: link | |
1463 // + 1: return address | |
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1464 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true); |
0 | 1465 } |
1466 break; | |
1467 | |
1468 case throw_class_cast_exception_id: | |
1469 { StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments); | |
1470 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true); | |
1471 } | |
1472 break; | |
1473 | |
1474 case throw_incompatible_class_change_error_id: | |
1475 { StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments); | |
1476 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false); | |
1477 } | |
1478 break; | |
1479 | |
1480 case slow_subtype_check_id: | |
1481 { | |
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1482 // Typical calling sequence: |
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1483 // __ push(klass_RInfo); // object klass or other subclass |
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1484 // __ push(sup_k_RInfo); // array element klass or other superclass |
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1485 // __ call(slow_subtype_check); |
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1486 // Note that the subclass is pushed first, and is therefore deepest. |
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1487 // Previous versions of this code reversed the names 'sub' and 'super'. |
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1488 // This was operationally harmless but made the code unreadable. |
0 | 1489 enum layout { |
304 | 1490 rax_off, SLOT2(raxH_off) |
1491 rcx_off, SLOT2(rcxH_off) | |
1492 rsi_off, SLOT2(rsiH_off) | |
1493 rdi_off, SLOT2(rdiH_off) | |
1494 // saved_rbp_off, SLOT2(saved_rbpH_off) | |
1495 return_off, SLOT2(returnH_off) | |
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1496 sup_k_off, SLOT2(sup_kH_off) |
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1497 klass_off, SLOT2(superH_off) |
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1498 framesize, |
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1499 result_off = klass_off // deepest argument is also the return value |
0 | 1500 }; |
1501 | |
1502 __ set_info("slow_subtype_check", dont_gc_arguments); | |
304 | 1503 __ push(rdi); |
1504 __ push(rsi); | |
1505 __ push(rcx); | |
1506 __ push(rax); | |
0 | 1507 |
304 | 1508 // This is called by pushing args and not with C abi |
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1509 __ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass |
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1510 __ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass |
0 | 1511 |
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1512 Label success; |
0 | 1513 Label miss; |
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1514 #ifdef GRAAL |
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1515 // TODO this should really be within the XirSnippets |
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1516 __ check_klass_subtype_fast_path(rsi, rax, rcx, &success, &miss, NULL); |
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1517 #endif |
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1518 |
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1519 __ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, NULL, &miss); |
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1520 |
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1521 // fallthrough on success: |
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1522 __ bind(success); |
644
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1523 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result |
304 | 1524 __ pop(rax); |
1525 __ pop(rcx); | |
1526 __ pop(rsi); | |
1527 __ pop(rdi); | |
0 | 1528 __ ret(0); |
1529 | |
1530 __ bind(miss); | |
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1531 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result |
304 | 1532 __ pop(rax); |
1533 __ pop(rcx); | |
1534 __ pop(rsi); | |
1535 __ pop(rdi); | |
0 | 1536 __ ret(0); |
1537 } | |
1538 break; | |
1539 | |
1540 case monitorenter_nofpu_id: | |
1541 save_fpu_registers = false; | |
1542 // fall through | |
1543 case monitorenter_id: | |
1544 { | |
1545 StubFrame f(sasm, "monitorenter", dont_gc_arguments); | |
1546 OopMap* map = save_live_registers(sasm, 3, save_fpu_registers); | |
1547 | |
304 | 1548 // Called with store_parameter and not C abi |
1549 | |
0 | 1550 f.load_argument(1, rax); // rax,: object |
1551 f.load_argument(0, rbx); // rbx,: lock address | |
1552 | |
1553 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx); | |
1554 | |
1555 oop_maps = new OopMapSet(); | |
1556 oop_maps->add_gc_map(call_offset, map); | |
1557 restore_live_registers(sasm, save_fpu_registers); | |
1558 } | |
1559 break; | |
1560 | |
1561 case monitorexit_nofpu_id: | |
1562 save_fpu_registers = false; | |
1563 // fall through | |
1564 case monitorexit_id: | |
1565 { | |
1566 StubFrame f(sasm, "monitorexit", dont_gc_arguments); | |
1567 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers); | |
1568 | |
304 | 1569 // Called with store_parameter and not C abi |
1570 | |
0 | 1571 f.load_argument(0, rax); // rax,: lock address |
1572 | |
1573 // note: really a leaf routine but must setup last java sp | |
1574 // => use call_RT for now (speed can be improved by | |
1575 // doing last java sp setup manually) | |
1576 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax); | |
1577 | |
1578 oop_maps = new OopMapSet(); | |
1579 oop_maps->add_gc_map(call_offset, map); | |
1580 restore_live_registers(sasm, save_fpu_registers); | |
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1581 } |
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|
1582 break; |
0 | 1583 |
4048
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1584 case deoptimize_id: |
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1585 { |
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1586 StubFrame f(sasm, "deoptimize", dont_gc_arguments); |
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1587 const int num_rt_args = 1; // thread |
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1588 OopMap* oop_map = save_live_registers(sasm, num_rt_args); |
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1589 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize)); |
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1590 oop_maps = new OopMapSet(); |
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1591 oop_maps->add_gc_map(call_offset, oop_map); |
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1592 restore_live_registers(sasm); |
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1593 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob(); |
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1594 assert(deopt_blob != NULL, "deoptimization blob must have been created"); |
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1595 __ leave(); |
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1596 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution())); |
0 | 1597 } |
1598 break; | |
1599 | |
1600 case access_field_patching_id: | |
1601 { StubFrame f(sasm, "access_field_patching", dont_gc_arguments); | |
1602 // we should set up register map | |
1603 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching)); | |
1604 } | |
1605 break; | |
1606 | |
1607 case load_klass_patching_id: | |
1608 { StubFrame f(sasm, "load_klass_patching", dont_gc_arguments); | |
1609 // we should set up register map | |
1610 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching)); | |
1611 } | |
1612 break; | |
1613 | |
1614 case dtrace_object_alloc_id: | |
1615 { // rax,: object | |
1616 StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments); | |
1617 // we can't gc here so skip the oopmap but make sure that all | |
1618 // the live registers get saved. | |
1619 save_live_registers(sasm, 1); | |
1620 | |
304 | 1621 __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax)); |
0 | 1622 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc))); |
304 | 1623 NOT_LP64(__ pop(rax)); |
0 | 1624 |
1625 restore_live_registers(sasm); | |
1626 } | |
1627 break; | |
1628 | |
1629 case fpu2long_stub_id: | |
1630 { | |
1631 // rax, and rdx are destroyed, but should be free since the result is returned there | |
1632 // preserve rsi,ecx | |
304 | 1633 __ push(rsi); |
1634 __ push(rcx); | |
1635 LP64_ONLY(__ push(rdx);) | |
0 | 1636 |
1637 // check for NaN | |
1638 Label return0, do_return, return_min_jlong, do_convert; | |
1639 | |
304 | 1640 Address value_high_word(rsp, wordSize + 4); |
1641 Address value_low_word(rsp, wordSize); | |
1642 Address result_high_word(rsp, 3*wordSize + 4); | |
1643 Address result_low_word(rsp, 3*wordSize); | |
0 | 1644 |
304 | 1645 __ subptr(rsp, 32); // more than enough on 32bit |
0 | 1646 __ fst_d(value_low_word); |
1647 __ movl(rax, value_high_word); | |
1648 __ andl(rax, 0x7ff00000); | |
1649 __ cmpl(rax, 0x7ff00000); | |
1650 __ jcc(Assembler::notEqual, do_convert); | |
1651 __ movl(rax, value_high_word); | |
1652 __ andl(rax, 0xfffff); | |
1653 __ orl(rax, value_low_word); | |
1654 __ jcc(Assembler::notZero, return0); | |
1655 | |
1656 __ bind(do_convert); | |
1657 __ fnstcw(Address(rsp, 0)); | |
304 | 1658 __ movzwl(rax, Address(rsp, 0)); |
0 | 1659 __ orl(rax, 0xc00); |
1660 __ movw(Address(rsp, 2), rax); | |
1661 __ fldcw(Address(rsp, 2)); | |
1662 __ fwait(); | |
1663 __ fistp_d(result_low_word); | |
1664 __ fldcw(Address(rsp, 0)); | |
1665 __ fwait(); | |
304 | 1666 // This gets the entire long in rax on 64bit |
1667 __ movptr(rax, result_low_word); | |
1668 // testing of high bits | |
0 | 1669 __ movl(rdx, result_high_word); |
304 | 1670 __ mov(rcx, rax); |
0 | 1671 // What the heck is the point of the next instruction??? |
1672 __ xorl(rcx, 0x0); | |
1673 __ movl(rsi, 0x80000000); | |
1674 __ xorl(rsi, rdx); | |
1675 __ orl(rcx, rsi); | |
1676 __ jcc(Assembler::notEqual, do_return); | |
1677 __ fldz(); | |
1678 __ fcomp_d(value_low_word); | |
1679 __ fnstsw_ax(); | |
304 | 1680 #ifdef _LP64 |
1681 __ testl(rax, 0x4100); // ZF & CF == 0 | |
1682 __ jcc(Assembler::equal, return_min_jlong); | |
1683 #else | |
0 | 1684 __ sahf(); |
1685 __ jcc(Assembler::above, return_min_jlong); | |
304 | 1686 #endif // _LP64 |
0 | 1687 // return max_jlong |
304 | 1688 #ifndef _LP64 |
0 | 1689 __ movl(rdx, 0x7fffffff); |
1690 __ movl(rax, 0xffffffff); | |
304 | 1691 #else |
1692 __ mov64(rax, CONST64(0x7fffffffffffffff)); | |
1693 #endif // _LP64 | |
0 | 1694 __ jmp(do_return); |
1695 | |
1696 __ bind(return_min_jlong); | |
304 | 1697 #ifndef _LP64 |
0 | 1698 __ movl(rdx, 0x80000000); |
1699 __ xorl(rax, rax); | |
304 | 1700 #else |
1701 __ mov64(rax, CONST64(0x8000000000000000)); | |
1702 #endif // _LP64 | |
0 | 1703 __ jmp(do_return); |
1704 | |
1705 __ bind(return0); | |
1706 __ fpop(); | |
304 | 1707 #ifndef _LP64 |
1708 __ xorptr(rdx,rdx); | |
1709 __ xorptr(rax,rax); | |
1710 #else | |
1711 __ xorptr(rax, rax); | |
1712 #endif // _LP64 | |
0 | 1713 |
1714 __ bind(do_return); | |
304 | 1715 __ addptr(rsp, 32); |
1716 LP64_ONLY(__ pop(rdx);) | |
1717 __ pop(rcx); | |
1718 __ pop(rsi); | |
0 | 1719 __ ret(0); |
1720 } | |
1721 break; | |
1722 | |
342 | 1723 #ifndef SERIALGC |
1724 case g1_pre_barrier_slow_id: | |
1725 { | |
1726 StubFrame f(sasm, "g1_pre_barrier", dont_gc_arguments); | |
1727 // arg0 : previous value of memory | |
1728 | |
1729 BarrierSet* bs = Universe::heap()->barrier_set(); | |
1730 if (bs->kind() != BarrierSet::G1SATBCTLogging) { | |
362 | 1731 __ movptr(rax, (int)id); |
342 | 1732 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax); |
1733 __ should_not_reach_here(); | |
1734 break; | |
1735 } | |
362 | 1736 __ push(rax); |
1737 __ push(rdx); | |
342 | 1738 |
1739 const Register pre_val = rax; | |
362 | 1740 const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread); |
342 | 1741 const Register tmp = rdx; |
1742 | |
362 | 1743 NOT_LP64(__ get_thread(thread);) |
342 | 1744 |
1745 Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() + | |
1746 PtrQueue::byte_offset_of_active())); | |
1747 | |
1748 Address queue_index(thread, in_bytes(JavaThread::satb_mark_queue_offset() + | |
1749 PtrQueue::byte_offset_of_index())); | |
1750 Address buffer(thread, in_bytes(JavaThread::satb_mark_queue_offset() + | |
1751 PtrQueue::byte_offset_of_buf())); | |
1752 | |
1753 | |
1754 Label done; | |
1755 Label runtime; | |
1756 | |
1757 // Can we store original value in the thread's buffer? | |
1758 | |
362 | 1759 #ifdef _LP64 |
1572 | 1760 __ movslq(tmp, queue_index); |
362 | 1761 __ cmpq(tmp, 0); |
1762 #else | |
342 | 1763 __ cmpl(queue_index, 0); |
362 | 1764 #endif |
342 | 1765 __ jcc(Assembler::equal, runtime); |
362 | 1766 #ifdef _LP64 |
1767 __ subq(tmp, wordSize); | |
1768 __ movl(queue_index, tmp); | |
1769 __ addq(tmp, buffer); | |
1770 #else | |
342 | 1771 __ subl(queue_index, wordSize); |
1772 __ movl(tmp, buffer); | |
1773 __ addl(tmp, queue_index); | |
362 | 1774 #endif |
1775 | |
342 | 1776 // prev_val (rax) |
1777 f.load_argument(0, pre_val); | |
362 | 1778 __ movptr(Address(tmp, 0), pre_val); |
342 | 1779 __ jmp(done); |
1780 | |
1781 __ bind(runtime); | |
1572 | 1782 __ push(rcx); |
1783 #ifdef _LP64 | |
1784 __ push(r8); | |
1785 __ push(r9); | |
1786 __ push(r10); | |
1787 __ push(r11); | |
1788 # ifndef _WIN64 | |
1789 __ push(rdi); | |
1790 __ push(rsi); | |
1791 # endif | |
1792 #endif | |
342 | 1793 // load the pre-value |
1794 f.load_argument(0, rcx); | |
1795 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), rcx, thread); | |
1572 | 1796 #ifdef _LP64 |
1797 # ifndef _WIN64 | |
1798 __ pop(rsi); | |
1799 __ pop(rdi); | |
1800 # endif | |
1801 __ pop(r11); | |
1802 __ pop(r10); | |
1803 __ pop(r9); | |
1804 __ pop(r8); | |
1805 #endif | |
362 | 1806 __ pop(rcx); |
1572 | 1807 __ bind(done); |
342 | 1808 |
362 | 1809 __ pop(rdx); |
1810 __ pop(rax); | |
342 | 1811 } |
1812 break; | |
1813 | |
1814 case g1_post_barrier_slow_id: | |
1815 { | |
1816 StubFrame f(sasm, "g1_post_barrier", dont_gc_arguments); | |
1817 | |
1818 | |
1819 // arg0: store_address | |
1820 Address store_addr(rbp, 2*BytesPerWord); | |
1821 | |
1822 BarrierSet* bs = Universe::heap()->barrier_set(); | |
1823 CardTableModRefBS* ct = (CardTableModRefBS*)bs; | |
1824 Label done; | |
1825 Label runtime; | |
1826 | |
1827 // At this point we know new_value is non-NULL and the new_value crosses regsion. | |
1828 // Must check to see if card is already dirty | |
1829 | |
362 | 1830 const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread); |
342 | 1831 |
1832 Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() + | |
1833 PtrQueue::byte_offset_of_index())); | |
1834 Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() + | |
1835 PtrQueue::byte_offset_of_buf())); | |
1836 | |
362 | 1837 __ push(rax); |
1572 | 1838 __ push(rcx); |
342 | 1839 |
362 | 1840 NOT_LP64(__ get_thread(thread);) |
1841 ExternalAddress cardtable((address)ct->byte_map_base); | |
342 | 1842 assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); |
1843 | |
1572 | 1844 const Register card_addr = rcx; |
362 | 1845 #ifdef _LP64 |
1846 const Register tmp = rscratch1; | |
1847 f.load_argument(0, card_addr); | |
1848 __ shrq(card_addr, CardTableModRefBS::card_shift); | |
1849 __ lea(tmp, cardtable); | |
1850 // get the address of the card | |
1851 __ addq(card_addr, tmp); | |
1852 #else | |
1572 | 1853 const Register card_index = rcx; |
362 | 1854 f.load_argument(0, card_index); |
1855 __ shrl(card_index, CardTableModRefBS::card_shift); | |
1856 | |
342 | 1857 Address index(noreg, card_index, Address::times_1); |
1858 __ leal(card_addr, __ as_Address(ArrayAddress(cardtable, index))); | |
362 | 1859 #endif |
1860 | |
342 | 1861 __ cmpb(Address(card_addr, 0), 0); |
1862 __ jcc(Assembler::equal, done); | |
1863 | |
1864 // storing region crossing non-NULL, card is clean. | |
1865 // dirty card and log. | |
1866 | |
1867 __ movb(Address(card_addr, 0), 0); | |
1868 | |
1869 __ cmpl(queue_index, 0); | |
1870 __ jcc(Assembler::equal, runtime); | |
1871 __ subl(queue_index, wordSize); | |
1872 | |
1873 const Register buffer_addr = rbx; | |
362 | 1874 __ push(rbx); |
1875 | |
1876 __ movptr(buffer_addr, buffer); | |
342 | 1877 |
362 | 1878 #ifdef _LP64 |
1879 __ movslq(rscratch1, queue_index); | |
1880 __ addptr(buffer_addr, rscratch1); | |
1881 #else | |
1882 __ addptr(buffer_addr, queue_index); | |
1883 #endif | |
1884 __ movptr(Address(buffer_addr, 0), card_addr); | |
1885 | |
1886 __ pop(rbx); | |
342 | 1887 __ jmp(done); |
1888 | |
1889 __ bind(runtime); | |
1572 | 1890 __ push(rdx); |
1891 #ifdef _LP64 | |
1892 __ push(r8); | |
1893 __ push(r9); | |
1894 __ push(r10); | |
1895 __ push(r11); | |
1896 # ifndef _WIN64 | |
1897 __ push(rdi); | |
1898 __ push(rsi); | |
1899 # endif | |
1900 #endif | |
342 | 1901 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread); |
1572 | 1902 #ifdef _LP64 |
1903 # ifndef _WIN64 | |
1904 __ pop(rsi); | |
1905 __ pop(rdi); | |
1906 # endif | |
1907 __ pop(r11); | |
1908 __ pop(r10); | |
1909 __ pop(r9); | |
1910 __ pop(r8); | |
1911 #endif | |
1912 __ pop(rdx); | |
1913 __ bind(done); | |
342 | 1914 |
1572 | 1915 __ pop(rcx); |
362 | 1916 __ pop(rax); |
342 | 1917 |
1918 } | |
1919 break; | |
1920 #endif // !SERIALGC | |
1921 | |
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1922 case graal_unwind_exception_call_id: { |
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1923 // remove the frame from the stack |
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1924 __ movptr(rsp, rbp); |
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1925 __ pop(rbp); |
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1926 // exception_oop is passed using ordinary java calling conventions |
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1927 __ movptr(rax, j_rarg0); |
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1928 |
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1929 Label nonNullExceptionOop; |
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1930 __ testptr(rax, rax); |
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1931 __ jcc(Assembler::notZero, nonNullExceptionOop); |
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1932 { |
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1933 __ enter(); |
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1934 oop_maps = new OopMapSet(); |
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1935 OopMap* oop_map = save_live_registers(sasm, 0); |
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1936 int call_offset = __ call_RT(rax, noreg, (address)graal_create_null_exception, 0); |
1434
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1937 oop_maps->add_gc_map(call_offset, oop_map); |
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1938 __ leave(); |
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1939 } |
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1940 __ bind(nonNullExceptionOop); |
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1941 |
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1942 __ set_info("unwind_exception", dont_gc_arguments); |
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1943 // note: no stubframe since we are about to leave the current |
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1944 // activation and we are calling a leaf VM function only. |
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1945 generate_unwind_exception(sasm); |
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1946 __ should_not_reach_here(); |
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1947 break; |
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1948 } |
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1949 |
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1950 case graal_set_deopt_info_id: { |
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1951 __ movptr(Address(r15_thread, JavaThread::graal_deopt_info_offset()), rscratch1); |
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1952 __ ret(0); |
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1953 break; |
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1954 } |
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1955 |
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1956 case graal_create_null_pointer_exception_id: { |
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1957 __ enter(); |
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1958 oop_maps = new OopMapSet(); |
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1959 OopMap* oop_map = save_live_registers(sasm, 0); |
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1960 int call_offset = __ call_RT(rax, noreg, (address)graal_create_null_exception, 0); |
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1961 oop_maps->add_gc_map(call_offset, oop_map); |
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1962 __ leave(); |
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1963 __ ret(0); |
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1964 break; |
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1965 } |
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1966 |
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1967 case graal_create_out_of_bounds_exception_id: { |
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1968 __ enter(); |
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1969 oop_maps = new OopMapSet(); |
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1970 OopMap* oop_map = save_live_registers(sasm, 0); |
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1971 int call_offset = __ call_RT(rax, noreg, (address)graal_create_out_of_bounds_exception, c_rarg0); |
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1972 oop_maps->add_gc_map(call_offset, oop_map); |
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1973 __ leave(); |
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1974 __ ret(0); |
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1975 break; |
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1976 } |
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1977 |
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1978 case graal_generic_callback_id: { |
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1979 __ enter(); |
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1980 oop_maps = new OopMapSet(); |
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|
1981 OopMap* oop_map = save_live_registers(sasm, 0); |
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1982 int call_offset = __ call_RT(rax, noreg, (address)graal_generic_callback, j_rarg0, j_rarg1); |
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changeset
|
1983 oop_maps->add_gc_map(call_offset, oop_map); |
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
Lukas Stadler <lukas.stadler@jku.at>
parents:
3558
diff
changeset
|
1984 __ leave(); |
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
Lukas Stadler <lukas.stadler@jku.at>
parents:
3558
diff
changeset
|
1985 __ ret(0); |
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
Lukas Stadler <lukas.stadler@jku.at>
parents:
3558
diff
changeset
|
1986 break; |
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
Lukas Stadler <lukas.stadler@jku.at>
parents:
3558
diff
changeset
|
1987 } |
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
Lukas Stadler <lukas.stadler@jku.at>
parents:
3558
diff
changeset
|
1988 |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
1989 case graal_handle_exception_id: { |
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
1990 StubFrame f(sasm, "graal_handle_exception", dont_gc_arguments); |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1991 oop_maps = new OopMapSet(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1992 OopMap* oop_map = save_live_registers(sasm, 1, false); |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
1993 graal_generate_handle_exception(sasm, oop_maps, oop_map); |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1994 break; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1995 } |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1996 |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
1997 case graal_slow_subtype_check_id: { |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1998 Label success; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1999 Label miss; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2000 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2001 // TODO this should really be within the XirSnippets |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2002 __ check_klass_subtype_fast_path(j_rarg0, j_rarg1, j_rarg2, &success, &miss, NULL); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2003 __ check_klass_subtype_slow_path(j_rarg0, j_rarg1, j_rarg2, j_rarg3, NULL, &miss); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2004 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2005 // fallthrough on success: |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2006 __ bind(success); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2007 __ movptr(rax, 1); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2008 __ ret(0); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2009 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2010 __ bind(miss); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2011 __ movptr(rax, NULL_WORD); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2012 __ ret(0); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2013 break; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2014 } |
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
2015 |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
2016 case graal_verify_pointer_id: { |
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
2017 __ verify_oop(r13, "graal verify pointer"); |
1449
8cfe3537a0d3
Pointer verification stub. Two loose oop fixes in C1X C++ part. Logging which methods have been compiled.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1434
diff
changeset
|
2018 __ ret(0); |
8cfe3537a0d3
Pointer verification stub. Two loose oop fixes in C1X C++ part. Logging which methods have been compiled.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1434
diff
changeset
|
2019 break; |
8cfe3537a0d3
Pointer verification stub. Two loose oop fixes in C1X C++ part. Logging which methods have been compiled.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1434
diff
changeset
|
2020 } |
8cfe3537a0d3
Pointer verification stub. Two loose oop fixes in C1X C++ part. Logging which methods have been compiled.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1434
diff
changeset
|
2021 |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
2022 case graal_arithmetic_frem_id: { |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2023 __ subptr(rsp, 8); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2024 __ movflt(Address(rsp, 0), xmm1); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2025 __ fld_s(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2026 __ movflt(Address(rsp, 0), xmm0); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2027 __ fld_s(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2028 Label L; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2029 __ bind(L); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2030 __ fprem(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2031 __ fwait(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2032 __ fnstsw_ax(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2033 __ testl(rax, 0x400); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2034 __ jcc(Assembler::notZero, L); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2035 __ fxch(1); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2036 __ fpop(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2037 __ fstp_s(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2038 __ movflt(xmm0, Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2039 __ addptr(rsp, 8); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2040 __ ret(0); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2041 break; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2042 } |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
2043 case graal_arithmetic_drem_id: { |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2044 __ subptr(rsp, 8); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2045 __ movdbl(Address(rsp, 0), xmm1); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2046 __ fld_d(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2047 __ movdbl(Address(rsp, 0), xmm0); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2048 __ fld_d(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2049 Label L; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2050 __ bind(L); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2051 __ fprem(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2052 __ fwait(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2053 __ fnstsw_ax(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2054 __ testl(rax, 0x400); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2055 __ jcc(Assembler::notZero, L); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2056 __ fxch(1); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2057 __ fpop(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2058 __ fstp_d(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2059 __ movdbl(xmm0, Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2060 __ addptr(rsp, 8); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2061 __ ret(0); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2062 break; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2063 } |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
2064 case graal_monitorenter_id: { |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2065 Label slow_case; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2066 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2067 Register obj = j_rarg0; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2068 Register lock = j_rarg1; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2069 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2070 Register scratch1 = rax; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2071 Register scratch2 = rbx; |
1942
00bc9eaf0e24
Support for -XX:+UseFastLocking flag. Fixed monitor enter XIR template for correct debug info at the runtime call.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1930
diff
changeset
|
2072 assert_different_registers(obj, lock, scratch1, scratch2); |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2073 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2074 // copied from LIR_Assembler::emit_lock |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2075 if (UseFastLocking) { |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2076 assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header"); |
3714
b648304ba4ff
Change Graal monitor enter and exit from BasicObjectLock to BasicLock
Christian Wimmer <christian.wimmer@oracle.com>
parents:
3705
diff
changeset
|
2077 __ lock_object(scratch1, obj, lock, scratch2, slow_case, false); |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2078 __ ret(0); |
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
2079 } |
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
2080 |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2081 __ bind(slow_case); |
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
2082 { |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
2083 StubFrame f(sasm, "graal_monitorenter", dont_gc_arguments); |
3714
b648304ba4ff
Change Graal monitor enter and exit from BasicObjectLock to BasicLock
Christian Wimmer <christian.wimmer@oracle.com>
parents:
3705
diff
changeset
|
2084 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers); |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2085 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2086 // Called with store_parameter and not C abi |
3714
b648304ba4ff
Change Graal monitor enter and exit from BasicObjectLock to BasicLock
Christian Wimmer <christian.wimmer@oracle.com>
parents:
3705
diff
changeset
|
2087 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, graal_monitorenter), obj, lock); |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2088 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2089 oop_maps = new OopMapSet(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2090 oop_maps->add_gc_map(call_offset, map); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2091 restore_live_registers(sasm, save_fpu_registers); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2092 } |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2093 __ ret(0); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2094 break; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
2095 } |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
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2096 case graal_monitorexit_id: { |
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2097 Label slow_case; |
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2098 |
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2099 Register obj = j_rarg0; |
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2100 Register lock = j_rarg1; |
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2101 |
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2102 // needed in rax later on... |
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2103 Register lock2 = rax; |
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2104 __ mov(lock2, lock); |
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2105 Register scratch1 = rbx; |
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Support for -XX:+UseFastLocking flag. Fixed monitor enter XIR template for correct debug info at the runtime call.
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2106 assert_different_registers(obj, lock, scratch1, lock2); |
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2107 |
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2108 // copied from LIR_Assembler::emit_lock |
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2109 if (UseFastLocking) { |
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2110 assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header"); |
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2111 __ unlock_object(scratch1, obj, lock2, slow_case, false); |
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2112 __ ret(0); |
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2113 } |
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2114 |
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2115 __ bind(slow_case); |
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2116 { |
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2117 StubFrame f(sasm, "graal_monitorexit", dont_gc_arguments); |
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2118 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers); |
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2119 |
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2120 // note: really a leaf routine but must setup last java sp |
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2121 // => use call_RT for now (speed can be improved by |
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2122 // doing last java sp setup manually) |
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2123 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, graal_monitorexit), obj, lock); |
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2124 |
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2125 oop_maps = new OopMapSet(); |
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2126 oop_maps->add_gc_map(call_offset, map); |
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2127 restore_live_registers(sasm, save_fpu_registers); |
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2128 } |
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2129 __ ret(0); |
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2130 break; |
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2131 } |
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2132 |
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2133 |
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2134 |
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2135 |
0 | 2136 default: |
2137 { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments); | |
304 | 2138 __ movptr(rax, (int)id); |
0 | 2139 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax); |
2140 __ should_not_reach_here(); | |
2141 } | |
2142 break; | |
2143 } | |
2144 return oop_maps; | |
2145 } | |
2146 | |
2147 #undef __ | |
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2148 |
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2149 const char *Runtime1::pd_name_for_address(address entry) { |
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2150 return "<unknown function>"; |
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2151 } |