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3960
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1 /*
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2 * Copyright (c) 2003, 2011, Oracle and/or its affiliates. All rights reserved.
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3 * Copyright 2007, 2008, 2011 Red Hat, Inc.
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4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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5 *
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6 * This code is free software; you can redistribute it and/or modify it
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7 * under the terms of the GNU General Public License version 2 only, as
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8 * published by the Free Software Foundation.
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9 *
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10 * This code is distributed in the hope that it will be useful, but WITHOUT
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11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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13 * version 2 for more details (a copy is included in the LICENSE file that
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14 * accompanied this code).
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15 *
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16 * You should have received a copy of the GNU General Public License version
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17 * 2 along with this work; if not, write to the Free Software Foundation,
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18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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19 *
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20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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21 * or visit www.oracle.com if you need additional information or have any
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22 * questions.
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23 *
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24 */
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25
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26 #ifndef OS_CPU_BSD_ZERO_VM_ATOMIC_BSD_ZERO_INLINE_HPP
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27 #define OS_CPU_BSD_ZERO_VM_ATOMIC_BSD_ZERO_INLINE_HPP
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28
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29 #include "orderAccess_bsd_zero.inline.hpp"
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30 #include "runtime/atomic.hpp"
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31 #include "runtime/os.hpp"
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32 #include "vm_version_zero.hpp"
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33
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34 // Implementation of class atomic
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35
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36 #ifdef M68K
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37
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38 /*
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39 * __m68k_cmpxchg
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40 *
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41 * Atomically store newval in *ptr if *ptr is equal to oldval for user space.
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42 * Returns newval on success and oldval if no exchange happened.
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43 * This implementation is processor specific and works on
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44 * 68020 68030 68040 and 68060.
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45 *
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46 * It will not work on ColdFire, 68000 and 68010 since they lack the CAS
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47 * instruction.
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48 * Using a kernelhelper would be better for arch complete implementation.
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49 *
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50 */
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51
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52 static inline int __m68k_cmpxchg(int oldval, int newval, volatile int *ptr) {
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53 int ret;
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54 __asm __volatile ("cas%.l %0,%2,%1"
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55 : "=d" (ret), "+m" (*(ptr))
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56 : "d" (newval), "0" (oldval));
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57 return ret;
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58 }
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59
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60 /* Perform an atomic compare and swap: if the current value of `*PTR'
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61 is OLDVAL, then write NEWVAL into `*PTR'. Return the contents of
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62 `*PTR' before the operation.*/
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63 static inline int m68k_compare_and_swap(volatile int *ptr,
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64 int oldval,
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65 int newval) {
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66 for (;;) {
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67 int prev = *ptr;
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68 if (prev != oldval)
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69 return prev;
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70
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71 if (__m68k_cmpxchg (prev, newval, ptr) == newval)
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72 // Success.
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73 return prev;
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74
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75 // We failed even though prev == oldval. Try again.
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76 }
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77 }
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78
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79 /* Atomically add an int to memory. */
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80 static inline int m68k_add_and_fetch(volatile int *ptr, int add_value) {
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81 for (;;) {
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82 // Loop until success.
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83
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84 int prev = *ptr;
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85
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86 if (__m68k_cmpxchg (prev, prev + add_value, ptr) == prev + add_value)
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87 return prev + add_value;
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88 }
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89 }
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90
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91 /* Atomically write VALUE into `*PTR' and returns the previous
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92 contents of `*PTR'. */
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93 static inline int m68k_lock_test_and_set(volatile int *ptr, int newval) {
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94 for (;;) {
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95 // Loop until success.
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96 int prev = *ptr;
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97
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98 if (__m68k_cmpxchg (prev, newval, ptr) == prev)
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99 return prev;
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100 }
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101 }
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102 #endif // M68K
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103
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104 #ifdef ARM
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105
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106 /*
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107 * __kernel_cmpxchg
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108 *
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109 * Atomically store newval in *ptr if *ptr is equal to oldval for user space.
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110 * Return zero if *ptr was changed or non-zero if no exchange happened.
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111 * The C flag is also set if *ptr was changed to allow for assembly
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112 * optimization in the calling code.
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113 *
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114 */
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115
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116 typedef int (__kernel_cmpxchg_t)(int oldval, int newval, volatile int *ptr);
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117 #define __kernel_cmpxchg (*(__kernel_cmpxchg_t *) 0xffff0fc0)
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118
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119
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120
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121 /* Perform an atomic compare and swap: if the current value of `*PTR'
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122 is OLDVAL, then write NEWVAL into `*PTR'. Return the contents of
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123 `*PTR' before the operation.*/
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124 static inline int arm_compare_and_swap(volatile int *ptr,
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125 int oldval,
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126 int newval) {
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127 for (;;) {
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128 int prev = *ptr;
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129 if (prev != oldval)
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130 return prev;
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131
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132 if (__kernel_cmpxchg (prev, newval, ptr) == 0)
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133 // Success.
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134 return prev;
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135
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136 // We failed even though prev == oldval. Try again.
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137 }
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138 }
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139
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140 /* Atomically add an int to memory. */
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141 static inline int arm_add_and_fetch(volatile int *ptr, int add_value) {
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142 for (;;) {
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143 // Loop until a __kernel_cmpxchg succeeds.
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144
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145 int prev = *ptr;
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146
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147 if (__kernel_cmpxchg (prev, prev + add_value, ptr) == 0)
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148 return prev + add_value;
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149 }
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150 }
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151
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152 /* Atomically write VALUE into `*PTR' and returns the previous
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153 contents of `*PTR'. */
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154 static inline int arm_lock_test_and_set(volatile int *ptr, int newval) {
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155 for (;;) {
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156 // Loop until a __kernel_cmpxchg succeeds.
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157 int prev = *ptr;
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158
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159 if (__kernel_cmpxchg (prev, newval, ptr) == 0)
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160 return prev;
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161 }
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162 }
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163 #endif // ARM
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164
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165 inline void Atomic::store(jint store_value, volatile jint* dest) {
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166 #if !defined(ARM) && !defined(M68K)
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167 __sync_synchronize();
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168 #endif
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169 *dest = store_value;
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170 }
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171
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172 inline void Atomic::store_ptr(intptr_t store_value, intptr_t* dest) {
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173 #if !defined(ARM) && !defined(M68K)
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174 __sync_synchronize();
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175 #endif
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176 *dest = store_value;
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177 }
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178
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179 inline jint Atomic::add(jint add_value, volatile jint* dest) {
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180 #ifdef ARM
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181 return arm_add_and_fetch(dest, add_value);
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182 #else
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183 #ifdef M68K
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184 return m68k_add_and_fetch(dest, add_value);
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185 #else
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186 return __sync_add_and_fetch(dest, add_value);
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187 #endif // M68K
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188 #endif // ARM
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189 }
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190
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191 inline intptr_t Atomic::add_ptr(intptr_t add_value, volatile intptr_t* dest) {
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192 #ifdef ARM
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193 return arm_add_and_fetch(dest, add_value);
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194 #else
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195 #ifdef M68K
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196 return m68k_add_and_fetch(dest, add_value);
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197 #else
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198 return __sync_add_and_fetch(dest, add_value);
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199 #endif // M68K
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200 #endif // ARM
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201 }
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202
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203 inline void* Atomic::add_ptr(intptr_t add_value, volatile void* dest) {
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204 return (void *) add_ptr(add_value, (volatile intptr_t *) dest);
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205 }
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206
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207 inline void Atomic::inc(volatile jint* dest) {
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208 add(1, dest);
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209 }
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210
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211 inline void Atomic::inc_ptr(volatile intptr_t* dest) {
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212 add_ptr(1, dest);
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213 }
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214
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215 inline void Atomic::inc_ptr(volatile void* dest) {
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216 add_ptr(1, dest);
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217 }
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218
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219 inline void Atomic::dec(volatile jint* dest) {
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220 add(-1, dest);
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221 }
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222
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223 inline void Atomic::dec_ptr(volatile intptr_t* dest) {
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224 add_ptr(-1, dest);
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225 }
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226
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227 inline void Atomic::dec_ptr(volatile void* dest) {
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228 add_ptr(-1, dest);
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229 }
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230
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231 inline jint Atomic::xchg(jint exchange_value, volatile jint* dest) {
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232 #ifdef ARM
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233 return arm_lock_test_and_set(dest, exchange_value);
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234 #else
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235 #ifdef M68K
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236 return m68k_lock_test_and_set(dest, exchange_value);
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237 #else
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238 // __sync_lock_test_and_set is a bizarrely named atomic exchange
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239 // operation. Note that some platforms only support this with the
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240 // limitation that the only valid value to store is the immediate
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241 // constant 1. There is a test for this in JNI_CreateJavaVM().
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242 return __sync_lock_test_and_set (dest, exchange_value);
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243 #endif // M68K
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244 #endif // ARM
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245 }
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246
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247 inline intptr_t Atomic::xchg_ptr(intptr_t exchange_value,
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248 volatile intptr_t* dest) {
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249 #ifdef ARM
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250 return arm_lock_test_and_set(dest, exchange_value);
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251 #else
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252 #ifdef M68K
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253 return m68k_lock_test_and_set(dest, exchange_value);
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254 #else
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255 return __sync_lock_test_and_set (dest, exchange_value);
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256 #endif // M68K
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257 #endif // ARM
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258 }
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259
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260 inline void* Atomic::xchg_ptr(void* exchange_value, volatile void* dest) {
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261 return (void *) xchg_ptr((intptr_t) exchange_value,
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262 (volatile intptr_t*) dest);
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263 }
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264
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265 inline jint Atomic::cmpxchg(jint exchange_value,
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266 volatile jint* dest,
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267 jint compare_value) {
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268 #ifdef ARM
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269 return arm_compare_and_swap(dest, compare_value, exchange_value);
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270 #else
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271 #ifdef M68K
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272 return m68k_compare_and_swap(dest, compare_value, exchange_value);
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273 #else
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274 return __sync_val_compare_and_swap(dest, compare_value, exchange_value);
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275 #endif // M68K
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276 #endif // ARM
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277 }
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278
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279 inline jlong Atomic::cmpxchg(jlong exchange_value,
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280 volatile jlong* dest,
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281 jlong compare_value) {
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282
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283 return __sync_val_compare_and_swap(dest, compare_value, exchange_value);
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284 }
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285
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286 inline intptr_t Atomic::cmpxchg_ptr(intptr_t exchange_value,
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287 volatile intptr_t* dest,
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288 intptr_t compare_value) {
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289 #ifdef ARM
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290 return arm_compare_and_swap(dest, compare_value, exchange_value);
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291 #else
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292 #ifdef M68K
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293 return m68k_compare_and_swap(dest, compare_value, exchange_value);
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294 #else
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295 return __sync_val_compare_and_swap(dest, compare_value, exchange_value);
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296 #endif // M68K
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297 #endif // ARM
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298 }
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299
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300 inline void* Atomic::cmpxchg_ptr(void* exchange_value,
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301 volatile void* dest,
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302 void* compare_value) {
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303
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304 return (void *) cmpxchg_ptr((intptr_t) exchange_value,
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305 (volatile intptr_t*) dest,
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306 (intptr_t) compare_value);
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307 }
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308
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309 inline jlong Atomic::load(volatile jlong* src) {
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310 volatile jlong dest;
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311 os::atomic_copy64(src, &dest);
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312 return dest;
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313 }
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314
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315 inline void Atomic::store(jlong store_value, jlong* dest) {
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316 os::atomic_copy64((volatile jlong*)&store_value, (volatile jlong*)dest);
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317 }
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318
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319 inline void Atomic::store(jlong store_value, volatile jlong* dest) {
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320 os::atomic_copy64((volatile jlong*)&store_value, dest);
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321 }
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322
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323 #endif // OS_CPU_BSD_ZERO_VM_ATOMIC_BSD_ZERO_INLINE_HPP
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