Mercurial > hg > truffle
annotate src/share/vm/adlc/output_c.cpp @ 17891:b6a2ba7d3ea7 hs25.20-b11
Merge
author | amurillo |
---|---|
date | Thu, 17 Apr 2014 16:09:07 -0700 |
parents | 62c54fcc0a35 |
children | 52b4284cb496 |
rev | line source |
---|---|
0 | 1 /* |
17467
55fb97c4c58d
8029233: Update copyright year to match last edit in jdk8 hotspot repository for 2013
mikael
parents:
12167
diff
changeset
|
2 * Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
1552
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1541
diff
changeset
|
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1541
diff
changeset
|
20 * or visit www.oracle.com if you need additional information or have any |
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1541
diff
changeset
|
21 * questions. |
0 | 22 * |
23 */ | |
24 | |
25 // output_c.cpp - Class CPP file output routines for architecture definition | |
26 | |
27 #include "adlc.hpp" | |
28 | |
29 // Utilities to characterize effect statements | |
30 static bool is_def(int usedef) { | |
31 switch(usedef) { | |
32 case Component::DEF: | |
33 case Component::USE_DEF: return true; break; | |
34 } | |
35 return false; | |
36 } | |
37 | |
38 static bool is_use(int usedef) { | |
39 switch(usedef) { | |
40 case Component::USE: | |
41 case Component::USE_DEF: | |
42 case Component::USE_KILL: return true; break; | |
43 } | |
44 return false; | |
45 } | |
46 | |
47 static bool is_kill(int usedef) { | |
48 switch(usedef) { | |
49 case Component::KILL: | |
50 case Component::USE_KILL: return true; break; | |
51 } | |
52 return false; | |
53 } | |
54 | |
55 // Define an array containing the machine register names, strings. | |
56 static void defineRegNames(FILE *fp, RegisterForm *registers) { | |
57 if (registers) { | |
58 fprintf(fp,"\n"); | |
59 fprintf(fp,"// An array of character pointers to machine register names.\n"); | |
60 fprintf(fp,"const char *Matcher::regName[REG_COUNT] = {\n"); | |
61 | |
62 // Output the register name for each register in the allocation classes | |
63 RegDef *reg_def = NULL; | |
64 RegDef *next = NULL; | |
65 registers->reset_RegDefs(); | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
66 for (reg_def = registers->iter_RegDefs(); reg_def != NULL; reg_def = next) { |
0 | 67 next = registers->iter_RegDefs(); |
68 const char *comma = (next != NULL) ? "," : " // no trailing comma"; | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
69 fprintf(fp," \"%s\"%s\n", reg_def->_regname, comma); |
0 | 70 } |
71 | |
72 // Finish defining enumeration | |
73 fprintf(fp,"};\n"); | |
74 | |
75 fprintf(fp,"\n"); | |
76 fprintf(fp,"// An array of character pointers to machine register names.\n"); | |
77 fprintf(fp,"const VMReg OptoReg::opto2vm[REG_COUNT] = {\n"); | |
78 reg_def = NULL; | |
79 next = NULL; | |
80 registers->reset_RegDefs(); | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
81 for (reg_def = registers->iter_RegDefs(); reg_def != NULL; reg_def = next) { |
0 | 82 next = registers->iter_RegDefs(); |
83 const char *comma = (next != NULL) ? "," : " // no trailing comma"; | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
84 fprintf(fp,"\t%s%s\n", reg_def->_concrete, comma); |
0 | 85 } |
86 // Finish defining array | |
87 fprintf(fp,"\t};\n"); | |
88 fprintf(fp,"\n"); | |
89 | |
90 fprintf(fp," OptoReg::Name OptoReg::vm2opto[ConcreteRegisterImpl::number_of_registers];\n"); | |
91 | |
92 } | |
93 } | |
94 | |
95 // Define an array containing the machine register encoding values | |
96 static void defineRegEncodes(FILE *fp, RegisterForm *registers) { | |
97 if (registers) { | |
98 fprintf(fp,"\n"); | |
99 fprintf(fp,"// An array of the machine register encode values\n"); | |
100 fprintf(fp,"const unsigned char Matcher::_regEncode[REG_COUNT] = {\n"); | |
101 | |
102 // Output the register encoding for each register in the allocation classes | |
103 RegDef *reg_def = NULL; | |
104 RegDef *next = NULL; | |
105 registers->reset_RegDefs(); | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
106 for (reg_def = registers->iter_RegDefs(); reg_def != NULL; reg_def = next) { |
0 | 107 next = registers->iter_RegDefs(); |
108 const char* register_encode = reg_def->register_encode(); | |
109 const char *comma = (next != NULL) ? "," : " // no trailing comma"; | |
110 int encval; | |
111 if (!ADLParser::is_int_token(register_encode, encval)) { | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
112 fprintf(fp," %s%s // %s\n", register_encode, comma, reg_def->_regname); |
0 | 113 } else { |
114 // Output known constants in hex char format (backward compatibility). | |
115 assert(encval < 256, "Exceeded supported width for register encoding"); | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
116 fprintf(fp," (unsigned char)'\\x%X'%s // %s\n", encval, comma, reg_def->_regname); |
0 | 117 } |
118 } | |
119 // Finish defining enumeration | |
120 fprintf(fp,"};\n"); | |
121 | |
122 } // Done defining array | |
123 } | |
124 | |
125 // Output an enumeration of register class names | |
126 static void defineRegClassEnum(FILE *fp, RegisterForm *registers) { | |
127 if (registers) { | |
128 // Output an enumeration of register class names | |
129 fprintf(fp,"\n"); | |
130 fprintf(fp,"// Enumeration of register class names\n"); | |
131 fprintf(fp, "enum machRegisterClass {\n"); | |
132 registers->_rclasses.reset(); | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
133 for (const char *class_name = NULL; (class_name = registers->_rclasses.iter()) != NULL;) { |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
134 const char * class_name_to_upper = toUpper(class_name); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
135 fprintf(fp," %s,\n", class_name_to_upper); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
136 delete[] class_name_to_upper; |
0 | 137 } |
138 // Finish defining enumeration | |
139 fprintf(fp, " _last_Mach_Reg_Class\n"); | |
140 fprintf(fp, "};\n"); | |
141 } | |
142 } | |
143 | |
144 // Declare an enumeration of user-defined register classes | |
145 // and a list of register masks, one for each class. | |
146 void ArchDesc::declare_register_masks(FILE *fp_hpp) { | |
147 const char *rc_name; | |
148 | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
149 if (_register) { |
0 | 150 // Build enumeration of user-defined register classes. |
151 defineRegClassEnum(fp_hpp, _register); | |
152 | |
153 // Generate a list of register masks, one for each class. | |
154 fprintf(fp_hpp,"\n"); | |
155 fprintf(fp_hpp,"// Register masks, one for each register class.\n"); | |
156 _register->_rclasses.reset(); | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
157 for (rc_name = NULL; (rc_name = _register->_rclasses.iter()) != NULL;) { |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
158 const char *prefix = ""; |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
159 RegClass *reg_class = _register->getRegClass(rc_name); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
160 assert(reg_class, "Using an undefined register class"); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
161 |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
162 const char* rc_name_to_upper = toUpper(rc_name); |
0 | 163 |
4121
db2e64ca2d5a
7090968: Allow adlc register class to depend on runtime conditions
roland
parents:
4114
diff
changeset
|
164 if (reg_class->_user_defined == NULL) { |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
165 fprintf(fp_hpp, "extern const RegMask _%s%s_mask;\n", prefix, rc_name_to_upper); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
166 fprintf(fp_hpp, "inline const RegMask &%s%s_mask() { return _%s%s_mask; }\n", prefix, rc_name_to_upper, prefix, rc_name_to_upper); |
4121
db2e64ca2d5a
7090968: Allow adlc register class to depend on runtime conditions
roland
parents:
4114
diff
changeset
|
167 } else { |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
168 fprintf(fp_hpp, "inline const RegMask &%s%s_mask() { %s }\n", prefix, rc_name_to_upper, reg_class->_user_defined); |
4121
db2e64ca2d5a
7090968: Allow adlc register class to depend on runtime conditions
roland
parents:
4114
diff
changeset
|
169 } |
0 | 170 |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
171 if (reg_class->_stack_or_reg) { |
4121
db2e64ca2d5a
7090968: Allow adlc register class to depend on runtime conditions
roland
parents:
4114
diff
changeset
|
172 assert(reg_class->_user_defined == NULL, "no user defined reg class here"); |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
173 fprintf(fp_hpp, "extern const RegMask _%sSTACK_OR_%s_mask;\n", prefix, rc_name_to_upper); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
174 fprintf(fp_hpp, "inline const RegMask &%sSTACK_OR_%s_mask() { return _%sSTACK_OR_%s_mask; }\n", prefix, rc_name_to_upper, prefix, rc_name_to_upper); |
0 | 175 } |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
176 delete[] rc_name_to_upper; |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
177 |
0 | 178 } |
179 } | |
180 } | |
181 | |
182 // Generate an enumeration of user-defined register classes | |
183 // and a list of register masks, one for each class. | |
184 void ArchDesc::build_register_masks(FILE *fp_cpp) { | |
185 const char *rc_name; | |
186 | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
187 if (_register) { |
0 | 188 // Generate a list of register masks, one for each class. |
189 fprintf(fp_cpp,"\n"); | |
190 fprintf(fp_cpp,"// Register masks, one for each register class.\n"); | |
191 _register->_rclasses.reset(); | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
192 for (rc_name = NULL; (rc_name = _register->_rclasses.iter()) != NULL;) { |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
193 const char *prefix = ""; |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
194 RegClass *reg_class = _register->getRegClass(rc_name); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
195 assert(reg_class, "Using an undefined register class"); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
196 |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
197 if (reg_class->_user_defined != NULL) { |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
198 continue; |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
199 } |
4121
db2e64ca2d5a
7090968: Allow adlc register class to depend on runtime conditions
roland
parents:
4114
diff
changeset
|
200 |
0 | 201 int len = RegisterForm::RegMask_Size(); |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
202 const char* rc_name_to_upper = toUpper(rc_name); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
203 fprintf(fp_cpp, "const RegMask _%s%s_mask(", prefix, rc_name_to_upper); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
204 |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
205 { |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
206 int i; |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
207 for(i = 0; i < len - 1; i++) { |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
208 fprintf(fp_cpp," 0x%x,", reg_class->regs_in_word(i, false)); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
209 } |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
210 fprintf(fp_cpp," 0x%x );\n", reg_class->regs_in_word(i, false)); |
0 | 211 } |
212 | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
213 if (reg_class->_stack_or_reg) { |
0 | 214 int i; |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
215 fprintf(fp_cpp, "const RegMask _%sSTACK_OR_%s_mask(", prefix, rc_name_to_upper); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
216 for(i = 0; i < len - 1; i++) { |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
217 fprintf(fp_cpp," 0x%x,",reg_class->regs_in_word(i, true)); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
218 } |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
219 fprintf(fp_cpp," 0x%x );\n",reg_class->regs_in_word(i, true)); |
0 | 220 } |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
221 delete[] rc_name_to_upper; |
0 | 222 } |
223 } | |
224 } | |
225 | |
226 // Compute an index for an array in the pipeline_reads_NNN arrays | |
227 static int pipeline_reads_initializer(FILE *fp_cpp, NameList &pipeline_reads, PipeClassForm *pipeclass) | |
228 { | |
229 int templen = 1; | |
230 int paramcount = 0; | |
231 const char *paramname; | |
232 | |
233 if (pipeclass->_parameters.count() == 0) | |
234 return -1; | |
235 | |
236 pipeclass->_parameters.reset(); | |
237 paramname = pipeclass->_parameters.iter(); | |
238 const PipeClassOperandForm *pipeopnd = | |
239 (const PipeClassOperandForm *)pipeclass->_localUsage[paramname]; | |
240 if (pipeopnd && !pipeopnd->isWrite() && strcmp(pipeopnd->_stage, "Universal")) | |
241 pipeclass->_parameters.reset(); | |
242 | |
243 while ( (paramname = pipeclass->_parameters.iter()) != NULL ) { | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
244 const PipeClassOperandForm *tmppipeopnd = |
0 | 245 (const PipeClassOperandForm *)pipeclass->_localUsage[paramname]; |
246 | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
247 if (tmppipeopnd) |
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
248 templen += 10 + (int)strlen(tmppipeopnd->_stage); |
0 | 249 else |
250 templen += 19; | |
251 | |
252 paramcount++; | |
253 } | |
254 | |
255 // See if the count is zero | |
256 if (paramcount == 0) { | |
257 return -1; | |
258 } | |
259 | |
260 char *operand_stages = new char [templen]; | |
261 operand_stages[0] = 0; | |
262 int i = 0; | |
263 templen = 0; | |
264 | |
265 pipeclass->_parameters.reset(); | |
266 paramname = pipeclass->_parameters.iter(); | |
267 pipeopnd = (const PipeClassOperandForm *)pipeclass->_localUsage[paramname]; | |
268 if (pipeopnd && !pipeopnd->isWrite() && strcmp(pipeopnd->_stage, "Universal")) | |
269 pipeclass->_parameters.reset(); | |
270 | |
271 while ( (paramname = pipeclass->_parameters.iter()) != NULL ) { | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
272 const PipeClassOperandForm *tmppipeopnd = |
0 | 273 (const PipeClassOperandForm *)pipeclass->_localUsage[paramname]; |
274 templen += sprintf(&operand_stages[templen], " stage_%s%c\n", | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
275 tmppipeopnd ? tmppipeopnd->_stage : "undefined", |
0 | 276 (++i < paramcount ? ',' : ' ') ); |
277 } | |
278 | |
279 // See if the same string is in the table | |
280 int ndx = pipeline_reads.index(operand_stages); | |
281 | |
282 // No, add it to the table | |
283 if (ndx < 0) { | |
284 pipeline_reads.addName(operand_stages); | |
285 ndx = pipeline_reads.index(operand_stages); | |
286 | |
287 fprintf(fp_cpp, "static const enum machPipelineStages pipeline_reads_%03d[%d] = {\n%s};\n\n", | |
288 ndx+1, paramcount, operand_stages); | |
289 } | |
290 else | |
291 delete [] operand_stages; | |
292 | |
293 return (ndx); | |
294 } | |
295 | |
296 // Compute an index for an array in the pipeline_res_stages_NNN arrays | |
297 static int pipeline_res_stages_initializer( | |
298 FILE *fp_cpp, | |
299 PipelineForm *pipeline, | |
300 NameList &pipeline_res_stages, | |
301 PipeClassForm *pipeclass) | |
302 { | |
303 const PipeClassResourceForm *piperesource; | |
304 int * res_stages = new int [pipeline->_rescount]; | |
305 int i; | |
306 | |
307 for (i = 0; i < pipeline->_rescount; i++) | |
308 res_stages[i] = 0; | |
309 | |
310 for (pipeclass->_resUsage.reset(); | |
311 (piperesource = (const PipeClassResourceForm *)pipeclass->_resUsage.iter()) != NULL; ) { | |
312 int used_mask = pipeline->_resdict[piperesource->_resource]->is_resource()->mask(); | |
313 for (i = 0; i < pipeline->_rescount; i++) | |
314 if ((1 << i) & used_mask) { | |
315 int stage = pipeline->_stages.index(piperesource->_stage); | |
316 if (res_stages[i] < stage+1) | |
317 res_stages[i] = stage+1; | |
318 } | |
319 } | |
320 | |
321 // Compute the length needed for the resource list | |
322 int commentlen = 0; | |
323 int max_stage = 0; | |
324 for (i = 0; i < pipeline->_rescount; i++) { | |
325 if (res_stages[i] == 0) { | |
326 if (max_stage < 9) | |
327 max_stage = 9; | |
328 } | |
329 else { | |
330 int stagelen = (int)strlen(pipeline->_stages.name(res_stages[i]-1)); | |
331 if (max_stage < stagelen) | |
332 max_stage = stagelen; | |
333 } | |
334 | |
335 commentlen += (int)strlen(pipeline->_reslist.name(i)); | |
336 } | |
337 | |
338 int templen = 1 + commentlen + pipeline->_rescount * (max_stage + 14); | |
339 | |
340 // Allocate space for the resource list | |
341 char * resource_stages = new char [templen]; | |
342 | |
343 templen = 0; | |
344 for (i = 0; i < pipeline->_rescount; i++) { | |
345 const char * const resname = | |
346 res_stages[i] == 0 ? "undefined" : pipeline->_stages.name(res_stages[i]-1); | |
347 | |
348 templen += sprintf(&resource_stages[templen], " stage_%s%-*s // %s\n", | |
349 resname, max_stage - (int)strlen(resname) + 1, | |
350 (i < pipeline->_rescount-1) ? "," : "", | |
351 pipeline->_reslist.name(i)); | |
352 } | |
353 | |
354 // See if the same string is in the table | |
355 int ndx = pipeline_res_stages.index(resource_stages); | |
356 | |
357 // No, add it to the table | |
358 if (ndx < 0) { | |
359 pipeline_res_stages.addName(resource_stages); | |
360 ndx = pipeline_res_stages.index(resource_stages); | |
361 | |
362 fprintf(fp_cpp, "static const enum machPipelineStages pipeline_res_stages_%03d[%d] = {\n%s};\n\n", | |
363 ndx+1, pipeline->_rescount, resource_stages); | |
364 } | |
365 else | |
366 delete [] resource_stages; | |
367 | |
368 delete [] res_stages; | |
369 | |
370 return (ndx); | |
371 } | |
372 | |
373 // Compute an index for an array in the pipeline_res_cycles_NNN arrays | |
374 static int pipeline_res_cycles_initializer( | |
375 FILE *fp_cpp, | |
376 PipelineForm *pipeline, | |
377 NameList &pipeline_res_cycles, | |
378 PipeClassForm *pipeclass) | |
379 { | |
380 const PipeClassResourceForm *piperesource; | |
381 int * res_cycles = new int [pipeline->_rescount]; | |
382 int i; | |
383 | |
384 for (i = 0; i < pipeline->_rescount; i++) | |
385 res_cycles[i] = 0; | |
386 | |
387 for (pipeclass->_resUsage.reset(); | |
388 (piperesource = (const PipeClassResourceForm *)pipeclass->_resUsage.iter()) != NULL; ) { | |
389 int used_mask = pipeline->_resdict[piperesource->_resource]->is_resource()->mask(); | |
390 for (i = 0; i < pipeline->_rescount; i++) | |
391 if ((1 << i) & used_mask) { | |
392 int cycles = piperesource->_cycles; | |
393 if (res_cycles[i] < cycles) | |
394 res_cycles[i] = cycles; | |
395 } | |
396 } | |
397 | |
398 // Pre-compute the string length | |
399 int templen; | |
400 int cyclelen = 0, commentlen = 0; | |
401 int max_cycles = 0; | |
402 char temp[32]; | |
403 | |
404 for (i = 0; i < pipeline->_rescount; i++) { | |
405 if (max_cycles < res_cycles[i]) | |
406 max_cycles = res_cycles[i]; | |
407 templen = sprintf(temp, "%d", res_cycles[i]); | |
408 if (cyclelen < templen) | |
409 cyclelen = templen; | |
410 commentlen += (int)strlen(pipeline->_reslist.name(i)); | |
411 } | |
412 | |
413 templen = 1 + commentlen + (cyclelen + 8) * pipeline->_rescount; | |
414 | |
415 // Allocate space for the resource list | |
416 char * resource_cycles = new char [templen]; | |
417 | |
418 templen = 0; | |
419 | |
420 for (i = 0; i < pipeline->_rescount; i++) { | |
421 templen += sprintf(&resource_cycles[templen], " %*d%c // %s\n", | |
422 cyclelen, res_cycles[i], (i < pipeline->_rescount-1) ? ',' : ' ', pipeline->_reslist.name(i)); | |
423 } | |
424 | |
425 // See if the same string is in the table | |
426 int ndx = pipeline_res_cycles.index(resource_cycles); | |
427 | |
428 // No, add it to the table | |
429 if (ndx < 0) { | |
430 pipeline_res_cycles.addName(resource_cycles); | |
431 ndx = pipeline_res_cycles.index(resource_cycles); | |
432 | |
433 fprintf(fp_cpp, "static const uint pipeline_res_cycles_%03d[%d] = {\n%s};\n\n", | |
434 ndx+1, pipeline->_rescount, resource_cycles); | |
435 } | |
436 else | |
437 delete [] resource_cycles; | |
438 | |
439 delete [] res_cycles; | |
440 | |
441 return (ndx); | |
442 } | |
443 | |
444 //typedef unsigned long long uint64_t; | |
445 | |
446 // Compute an index for an array in the pipeline_res_mask_NNN arrays | |
447 static int pipeline_res_mask_initializer( | |
448 FILE *fp_cpp, | |
449 PipelineForm *pipeline, | |
450 NameList &pipeline_res_mask, | |
451 NameList &pipeline_res_args, | |
452 PipeClassForm *pipeclass) | |
453 { | |
454 const PipeClassResourceForm *piperesource; | |
455 const uint rescount = pipeline->_rescount; | |
456 const uint maxcycleused = pipeline->_maxcycleused; | |
457 const uint cyclemasksize = (maxcycleused + 31) >> 5; | |
458 | |
459 int i, j; | |
460 int element_count = 0; | |
461 uint *res_mask = new uint [cyclemasksize]; | |
462 uint resources_used = 0; | |
463 uint resources_used_exclusively = 0; | |
464 | |
465 for (pipeclass->_resUsage.reset(); | |
10389 | 466 (piperesource = (const PipeClassResourceForm*)pipeclass->_resUsage.iter()) != NULL; ) { |
0 | 467 element_count++; |
10389 | 468 } |
0 | 469 |
470 // Pre-compute the string length | |
471 int templen; | |
472 int commentlen = 0; | |
473 int max_cycles = 0; | |
474 | |
475 int cyclelen = ((maxcycleused + 3) >> 2); | |
476 int masklen = (rescount + 3) >> 2; | |
477 | |
478 int cycledigit = 0; | |
479 for (i = maxcycleused; i > 0; i /= 10) | |
480 cycledigit++; | |
481 | |
482 int maskdigit = 0; | |
483 for (i = rescount; i > 0; i /= 10) | |
484 maskdigit++; | |
485 | |
10389 | 486 static const char* pipeline_use_cycle_mask = "Pipeline_Use_Cycle_Mask"; |
487 static const char* pipeline_use_element = "Pipeline_Use_Element"; | |
0 | 488 |
489 templen = 1 + | |
490 (int)(strlen(pipeline_use_cycle_mask) + (int)strlen(pipeline_use_element) + | |
491 (cyclemasksize * 12) + masklen + (cycledigit * 2) + 30) * element_count; | |
492 | |
493 // Allocate space for the resource list | |
494 char * resource_mask = new char [templen]; | |
495 char * last_comma = NULL; | |
496 | |
497 templen = 0; | |
498 | |
499 for (pipeclass->_resUsage.reset(); | |
10389 | 500 (piperesource = (const PipeClassResourceForm*)pipeclass->_resUsage.iter()) != NULL; ) { |
0 | 501 int used_mask = pipeline->_resdict[piperesource->_resource]->is_resource()->mask(); |
502 | |
10389 | 503 if (!used_mask) { |
0 | 504 fprintf(stderr, "*** used_mask is 0 ***\n"); |
10389 | 505 } |
0 | 506 |
507 resources_used |= used_mask; | |
508 | |
509 uint lb, ub; | |
510 | |
511 for (lb = 0; (used_mask & (1 << lb)) == 0; lb++); | |
512 for (ub = 31; (used_mask & (1 << ub)) == 0; ub--); | |
513 | |
10389 | 514 if (lb == ub) { |
0 | 515 resources_used_exclusively |= used_mask; |
10389 | 516 } |
0 | 517 |
518 int formatlen = | |
519 sprintf(&resource_mask[templen], " %s(0x%0*x, %*d, %*d, %s %s(", | |
520 pipeline_use_element, | |
521 masklen, used_mask, | |
522 cycledigit, lb, cycledigit, ub, | |
523 ((used_mask & (used_mask-1)) != 0) ? "true, " : "false,", | |
524 pipeline_use_cycle_mask); | |
525 | |
526 templen += formatlen; | |
527 | |
528 memset(res_mask, 0, cyclemasksize * sizeof(uint)); | |
529 | |
530 int cycles = piperesource->_cycles; | |
531 uint stage = pipeline->_stages.index(piperesource->_stage); | |
10389 | 532 if ((uint)NameList::Not_in_list == stage) { |
6850 | 533 fprintf(stderr, |
534 "pipeline_res_mask_initializer: " | |
535 "semantic error: " | |
536 "pipeline stage undeclared: %s\n", | |
537 piperesource->_stage); | |
538 exit(1); | |
539 } | |
10389 | 540 uint upper_limit = stage + cycles - 1; |
541 uint lower_limit = stage - 1; | |
0 | 542 uint upper_idx = upper_limit >> 5; |
543 uint lower_idx = lower_limit >> 5; | |
544 uint upper_position = upper_limit & 0x1f; | |
545 uint lower_position = lower_limit & 0x1f; | |
546 | |
547 uint mask = (((uint)1) << upper_position) - 1; | |
548 | |
10389 | 549 while (upper_idx > lower_idx) { |
0 | 550 res_mask[upper_idx--] |= mask; |
551 mask = (uint)-1; | |
552 } | |
553 | |
554 mask -= (((uint)1) << lower_position) - 1; | |
555 res_mask[upper_idx] |= mask; | |
556 | |
557 for (j = cyclemasksize-1; j >= 0; j--) { | |
558 formatlen = | |
559 sprintf(&resource_mask[templen], "0x%08x%s", res_mask[j], j > 0 ? ", " : ""); | |
560 templen += formatlen; | |
561 } | |
562 | |
563 resource_mask[templen++] = ')'; | |
564 resource_mask[templen++] = ')'; | |
565 last_comma = &resource_mask[templen]; | |
566 resource_mask[templen++] = ','; | |
567 resource_mask[templen++] = '\n'; | |
568 } | |
569 | |
570 resource_mask[templen] = 0; | |
10389 | 571 if (last_comma) { |
0 | 572 last_comma[0] = ' '; |
10389 | 573 } |
0 | 574 |
575 // See if the same string is in the table | |
576 int ndx = pipeline_res_mask.index(resource_mask); | |
577 | |
578 // No, add it to the table | |
579 if (ndx < 0) { | |
580 pipeline_res_mask.addName(resource_mask); | |
581 ndx = pipeline_res_mask.index(resource_mask); | |
582 | |
583 if (strlen(resource_mask) > 0) | |
584 fprintf(fp_cpp, "static const Pipeline_Use_Element pipeline_res_mask_%03d[%d] = {\n%s};\n\n", | |
585 ndx+1, element_count, resource_mask); | |
586 | |
10389 | 587 char* args = new char [9 + 2*masklen + maskdigit]; |
0 | 588 |
589 sprintf(args, "0x%0*x, 0x%0*x, %*d", | |
590 masklen, resources_used, | |
591 masklen, resources_used_exclusively, | |
592 maskdigit, element_count); | |
593 | |
594 pipeline_res_args.addName(args); | |
595 } | |
10389 | 596 else { |
0 | 597 delete [] resource_mask; |
10389 | 598 } |
0 | 599 |
600 delete [] res_mask; | |
601 //delete [] res_masks; | |
602 | |
603 return (ndx); | |
604 } | |
605 | |
606 void ArchDesc::build_pipe_classes(FILE *fp_cpp) { | |
607 const char *classname; | |
608 const char *resourcename; | |
609 int resourcenamelen = 0; | |
610 NameList pipeline_reads; | |
611 NameList pipeline_res_stages; | |
612 NameList pipeline_res_cycles; | |
613 NameList pipeline_res_masks; | |
614 NameList pipeline_res_args; | |
615 const int default_latency = 1; | |
616 const int non_operand_latency = 0; | |
617 const int node_latency = 0; | |
618 | |
619 if (!_pipeline) { | |
620 fprintf(fp_cpp, "uint Node::latency(uint i) const {\n"); | |
621 fprintf(fp_cpp, " // assert(false, \"pipeline functionality is not defined\");\n"); | |
622 fprintf(fp_cpp, " return %d;\n", non_operand_latency); | |
623 fprintf(fp_cpp, "}\n"); | |
624 return; | |
625 } | |
626 | |
627 fprintf(fp_cpp, "\n"); | |
628 fprintf(fp_cpp, "//------------------Pipeline Methods-----------------------------------------\n"); | |
629 fprintf(fp_cpp, "#ifndef PRODUCT\n"); | |
630 fprintf(fp_cpp, "const char * Pipeline::stageName(uint s) {\n"); | |
631 fprintf(fp_cpp, " static const char * const _stage_names[] = {\n"); | |
632 fprintf(fp_cpp, " \"undefined\""); | |
633 | |
634 for (int s = 0; s < _pipeline->_stagecnt; s++) | |
635 fprintf(fp_cpp, ", \"%s\"", _pipeline->_stages.name(s)); | |
636 | |
637 fprintf(fp_cpp, "\n };\n\n"); | |
638 fprintf(fp_cpp, " return (s <= %d ? _stage_names[s] : \"???\");\n", | |
639 _pipeline->_stagecnt); | |
640 fprintf(fp_cpp, "}\n"); | |
641 fprintf(fp_cpp, "#endif\n\n"); | |
642 | |
643 fprintf(fp_cpp, "uint Pipeline::functional_unit_latency(uint start, const Pipeline *pred) const {\n"); | |
644 fprintf(fp_cpp, " // See if the functional units overlap\n"); | |
645 #if 0 | |
646 fprintf(fp_cpp, "\n#ifndef PRODUCT\n"); | |
647 fprintf(fp_cpp, " if (TraceOptoOutput) {\n"); | |
648 fprintf(fp_cpp, " tty->print(\"# functional_unit_latency: start == %%d, this->exclusively == 0x%%03x, pred->exclusively == 0x%%03x\\n\", start, resourcesUsedExclusively(), pred->resourcesUsedExclusively());\n"); | |
649 fprintf(fp_cpp, " }\n"); | |
650 fprintf(fp_cpp, "#endif\n\n"); | |
651 #endif | |
652 fprintf(fp_cpp, " uint mask = resourcesUsedExclusively() & pred->resourcesUsedExclusively();\n"); | |
653 fprintf(fp_cpp, " if (mask == 0)\n return (start);\n\n"); | |
654 #if 0 | |
655 fprintf(fp_cpp, "\n#ifndef PRODUCT\n"); | |
656 fprintf(fp_cpp, " if (TraceOptoOutput) {\n"); | |
657 fprintf(fp_cpp, " tty->print(\"# functional_unit_latency: mask == 0x%%x\\n\", mask);\n"); | |
658 fprintf(fp_cpp, " }\n"); | |
659 fprintf(fp_cpp, "#endif\n\n"); | |
660 #endif | |
661 fprintf(fp_cpp, " for (uint i = 0; i < pred->resourceUseCount(); i++) {\n"); | |
662 fprintf(fp_cpp, " const Pipeline_Use_Element *predUse = pred->resourceUseElement(i);\n"); | |
663 fprintf(fp_cpp, " if (predUse->multiple())\n"); | |
664 fprintf(fp_cpp, " continue;\n\n"); | |
665 fprintf(fp_cpp, " for (uint j = 0; j < resourceUseCount(); j++) {\n"); | |
666 fprintf(fp_cpp, " const Pipeline_Use_Element *currUse = resourceUseElement(j);\n"); | |
667 fprintf(fp_cpp, " if (currUse->multiple())\n"); | |
668 fprintf(fp_cpp, " continue;\n\n"); | |
669 fprintf(fp_cpp, " if (predUse->used() & currUse->used()) {\n"); | |
670 fprintf(fp_cpp, " Pipeline_Use_Cycle_Mask x = predUse->mask();\n"); | |
671 fprintf(fp_cpp, " Pipeline_Use_Cycle_Mask y = currUse->mask();\n\n"); | |
672 fprintf(fp_cpp, " for ( y <<= start; x.overlaps(y); start++ )\n"); | |
673 fprintf(fp_cpp, " y <<= 1;\n"); | |
674 fprintf(fp_cpp, " }\n"); | |
675 fprintf(fp_cpp, " }\n"); | |
676 fprintf(fp_cpp, " }\n\n"); | |
677 fprintf(fp_cpp, " // There is the potential for overlap\n"); | |
678 fprintf(fp_cpp, " return (start);\n"); | |
679 fprintf(fp_cpp, "}\n\n"); | |
680 fprintf(fp_cpp, "// The following two routines assume that the root Pipeline_Use entity\n"); | |
681 fprintf(fp_cpp, "// consists of exactly 1 element for each functional unit\n"); | |
682 fprintf(fp_cpp, "// start is relative to the current cycle; used for latency-based info\n"); | |
683 fprintf(fp_cpp, "uint Pipeline_Use::full_latency(uint delay, const Pipeline_Use &pred) const {\n"); | |
684 fprintf(fp_cpp, " for (uint i = 0; i < pred._count; i++) {\n"); | |
685 fprintf(fp_cpp, " const Pipeline_Use_Element *predUse = pred.element(i);\n"); | |
686 fprintf(fp_cpp, " if (predUse->_multiple) {\n"); | |
687 fprintf(fp_cpp, " uint min_delay = %d;\n", | |
688 _pipeline->_maxcycleused+1); | |
689 fprintf(fp_cpp, " // Multiple possible functional units, choose first unused one\n"); | |
690 fprintf(fp_cpp, " for (uint j = predUse->_lb; j <= predUse->_ub; j++) {\n"); | |
691 fprintf(fp_cpp, " const Pipeline_Use_Element *currUse = element(j);\n"); | |
692 fprintf(fp_cpp, " uint curr_delay = delay;\n"); | |
693 fprintf(fp_cpp, " if (predUse->_used & currUse->_used) {\n"); | |
694 fprintf(fp_cpp, " Pipeline_Use_Cycle_Mask x = predUse->_mask;\n"); | |
695 fprintf(fp_cpp, " Pipeline_Use_Cycle_Mask y = currUse->_mask;\n\n"); | |
696 fprintf(fp_cpp, " for ( y <<= curr_delay; x.overlaps(y); curr_delay++ )\n"); | |
697 fprintf(fp_cpp, " y <<= 1;\n"); | |
698 fprintf(fp_cpp, " }\n"); | |
699 fprintf(fp_cpp, " if (min_delay > curr_delay)\n min_delay = curr_delay;\n"); | |
700 fprintf(fp_cpp, " }\n"); | |
701 fprintf(fp_cpp, " if (delay < min_delay)\n delay = min_delay;\n"); | |
702 fprintf(fp_cpp, " }\n"); | |
703 fprintf(fp_cpp, " else {\n"); | |
704 fprintf(fp_cpp, " for (uint j = predUse->_lb; j <= predUse->_ub; j++) {\n"); | |
705 fprintf(fp_cpp, " const Pipeline_Use_Element *currUse = element(j);\n"); | |
706 fprintf(fp_cpp, " if (predUse->_used & currUse->_used) {\n"); | |
707 fprintf(fp_cpp, " Pipeline_Use_Cycle_Mask x = predUse->_mask;\n"); | |
708 fprintf(fp_cpp, " Pipeline_Use_Cycle_Mask y = currUse->_mask;\n\n"); | |
709 fprintf(fp_cpp, " for ( y <<= delay; x.overlaps(y); delay++ )\n"); | |
710 fprintf(fp_cpp, " y <<= 1;\n"); | |
711 fprintf(fp_cpp, " }\n"); | |
712 fprintf(fp_cpp, " }\n"); | |
713 fprintf(fp_cpp, " }\n"); | |
714 fprintf(fp_cpp, " }\n\n"); | |
715 fprintf(fp_cpp, " return (delay);\n"); | |
716 fprintf(fp_cpp, "}\n\n"); | |
717 fprintf(fp_cpp, "void Pipeline_Use::add_usage(const Pipeline_Use &pred) {\n"); | |
718 fprintf(fp_cpp, " for (uint i = 0; i < pred._count; i++) {\n"); | |
719 fprintf(fp_cpp, " const Pipeline_Use_Element *predUse = pred.element(i);\n"); | |
720 fprintf(fp_cpp, " if (predUse->_multiple) {\n"); | |
721 fprintf(fp_cpp, " // Multiple possible functional units, choose first unused one\n"); | |
722 fprintf(fp_cpp, " for (uint j = predUse->_lb; j <= predUse->_ub; j++) {\n"); | |
723 fprintf(fp_cpp, " Pipeline_Use_Element *currUse = element(j);\n"); | |
724 fprintf(fp_cpp, " if ( !predUse->_mask.overlaps(currUse->_mask) ) {\n"); | |
725 fprintf(fp_cpp, " currUse->_used |= (1 << j);\n"); | |
726 fprintf(fp_cpp, " _resources_used |= (1 << j);\n"); | |
727 fprintf(fp_cpp, " currUse->_mask.Or(predUse->_mask);\n"); | |
728 fprintf(fp_cpp, " break;\n"); | |
729 fprintf(fp_cpp, " }\n"); | |
730 fprintf(fp_cpp, " }\n"); | |
731 fprintf(fp_cpp, " }\n"); | |
732 fprintf(fp_cpp, " else {\n"); | |
733 fprintf(fp_cpp, " for (uint j = predUse->_lb; j <= predUse->_ub; j++) {\n"); | |
734 fprintf(fp_cpp, " Pipeline_Use_Element *currUse = element(j);\n"); | |
735 fprintf(fp_cpp, " currUse->_used |= (1 << j);\n"); | |
736 fprintf(fp_cpp, " _resources_used |= (1 << j);\n"); | |
737 fprintf(fp_cpp, " currUse->_mask.Or(predUse->_mask);\n"); | |
738 fprintf(fp_cpp, " }\n"); | |
739 fprintf(fp_cpp, " }\n"); | |
740 fprintf(fp_cpp, " }\n"); | |
741 fprintf(fp_cpp, "}\n\n"); | |
742 | |
743 fprintf(fp_cpp, "uint Pipeline::operand_latency(uint opnd, const Pipeline *pred) const {\n"); | |
744 fprintf(fp_cpp, " int const default_latency = 1;\n"); | |
745 fprintf(fp_cpp, "\n"); | |
746 #if 0 | |
747 fprintf(fp_cpp, "#ifndef PRODUCT\n"); | |
748 fprintf(fp_cpp, " if (TraceOptoOutput) {\n"); | |
749 fprintf(fp_cpp, " tty->print(\"# operand_latency(%%d), _read_stage_count = %%d\\n\", opnd, _read_stage_count);\n"); | |
750 fprintf(fp_cpp, " }\n"); | |
751 fprintf(fp_cpp, "#endif\n\n"); | |
752 #endif | |
1489
cff162798819
6888953: some calls to function-like macros are missing semicolons
jcoomes
parents:
1203
diff
changeset
|
753 fprintf(fp_cpp, " assert(this, \"NULL pipeline info\");\n"); |
cff162798819
6888953: some calls to function-like macros are missing semicolons
jcoomes
parents:
1203
diff
changeset
|
754 fprintf(fp_cpp, " assert(pred, \"NULL predecessor pipline info\");\n\n"); |
0 | 755 fprintf(fp_cpp, " if (pred->hasFixedLatency())\n return (pred->fixedLatency());\n\n"); |
756 fprintf(fp_cpp, " // If this is not an operand, then assume a dependence with 0 latency\n"); | |
757 fprintf(fp_cpp, " if (opnd > _read_stage_count)\n return (0);\n\n"); | |
758 fprintf(fp_cpp, " uint writeStage = pred->_write_stage;\n"); | |
759 fprintf(fp_cpp, " uint readStage = _read_stages[opnd-1];\n"); | |
760 #if 0 | |
761 fprintf(fp_cpp, "\n#ifndef PRODUCT\n"); | |
762 fprintf(fp_cpp, " if (TraceOptoOutput) {\n"); | |
763 fprintf(fp_cpp, " tty->print(\"# operand_latency: writeStage=%%s readStage=%%s, opnd=%%d\\n\", stageName(writeStage), stageName(readStage), opnd);\n"); | |
764 fprintf(fp_cpp, " }\n"); | |
765 fprintf(fp_cpp, "#endif\n\n"); | |
766 #endif | |
767 fprintf(fp_cpp, "\n"); | |
768 fprintf(fp_cpp, " if (writeStage == stage_undefined || readStage == stage_undefined)\n"); | |
769 fprintf(fp_cpp, " return (default_latency);\n"); | |
770 fprintf(fp_cpp, "\n"); | |
771 fprintf(fp_cpp, " int delta = writeStage - readStage;\n"); | |
772 fprintf(fp_cpp, " if (delta < 0) delta = 0;\n\n"); | |
773 #if 0 | |
774 fprintf(fp_cpp, "\n#ifndef PRODUCT\n"); | |
775 fprintf(fp_cpp, " if (TraceOptoOutput) {\n"); | |
776 fprintf(fp_cpp, " tty->print(\"# operand_latency: delta=%%d\\n\", delta);\n"); | |
777 fprintf(fp_cpp, " }\n"); | |
778 fprintf(fp_cpp, "#endif\n\n"); | |
779 #endif | |
780 fprintf(fp_cpp, " return (delta);\n"); | |
781 fprintf(fp_cpp, "}\n\n"); | |
782 | |
783 if (!_pipeline) | |
784 /* Do Nothing */; | |
785 | |
786 else if (_pipeline->_maxcycleused <= | |
787 #ifdef SPARC | |
788 64 | |
789 #else | |
790 32 | |
791 #endif | |
792 ) { | |
793 fprintf(fp_cpp, "Pipeline_Use_Cycle_Mask operator&(const Pipeline_Use_Cycle_Mask &in1, const Pipeline_Use_Cycle_Mask &in2) {\n"); | |
794 fprintf(fp_cpp, " return Pipeline_Use_Cycle_Mask(in1._mask & in2._mask);\n"); | |
795 fprintf(fp_cpp, "}\n\n"); | |
796 fprintf(fp_cpp, "Pipeline_Use_Cycle_Mask operator|(const Pipeline_Use_Cycle_Mask &in1, const Pipeline_Use_Cycle_Mask &in2) {\n"); | |
797 fprintf(fp_cpp, " return Pipeline_Use_Cycle_Mask(in1._mask | in2._mask);\n"); | |
798 fprintf(fp_cpp, "}\n\n"); | |
799 } | |
800 else { | |
801 uint l; | |
802 uint masklen = (_pipeline->_maxcycleused + 31) >> 5; | |
803 fprintf(fp_cpp, "Pipeline_Use_Cycle_Mask operator&(const Pipeline_Use_Cycle_Mask &in1, const Pipeline_Use_Cycle_Mask &in2) {\n"); | |
804 fprintf(fp_cpp, " return Pipeline_Use_Cycle_Mask("); | |
805 for (l = 1; l <= masklen; l++) | |
806 fprintf(fp_cpp, "in1._mask%d & in2._mask%d%s\n", l, l, l < masklen ? ", " : ""); | |
807 fprintf(fp_cpp, ");\n"); | |
808 fprintf(fp_cpp, "}\n\n"); | |
809 fprintf(fp_cpp, "Pipeline_Use_Cycle_Mask operator|(const Pipeline_Use_Cycle_Mask &in1, const Pipeline_Use_Cycle_Mask &in2) {\n"); | |
810 fprintf(fp_cpp, " return Pipeline_Use_Cycle_Mask("); | |
811 for (l = 1; l <= masklen; l++) | |
812 fprintf(fp_cpp, "in1._mask%d | in2._mask%d%s", l, l, l < masklen ? ", " : ""); | |
813 fprintf(fp_cpp, ");\n"); | |
814 fprintf(fp_cpp, "}\n\n"); | |
815 fprintf(fp_cpp, "void Pipeline_Use_Cycle_Mask::Or(const Pipeline_Use_Cycle_Mask &in2) {\n "); | |
816 for (l = 1; l <= masklen; l++) | |
817 fprintf(fp_cpp, " _mask%d |= in2._mask%d;", l, l); | |
818 fprintf(fp_cpp, "\n}\n\n"); | |
819 } | |
820 | |
821 /* Get the length of all the resource names */ | |
822 for (_pipeline->_reslist.reset(), resourcenamelen = 0; | |
823 (resourcename = _pipeline->_reslist.iter()) != NULL; | |
824 resourcenamelen += (int)strlen(resourcename)); | |
825 | |
826 // Create the pipeline class description | |
827 | |
828 fprintf(fp_cpp, "static const Pipeline pipeline_class_Zero_Instructions(0, 0, true, 0, 0, false, false, false, false, NULL, NULL, NULL, Pipeline_Use(0, 0, 0, NULL));\n\n"); | |
829 fprintf(fp_cpp, "static const Pipeline pipeline_class_Unknown_Instructions(0, 0, true, 0, 0, false, true, true, false, NULL, NULL, NULL, Pipeline_Use(0, 0, 0, NULL));\n\n"); | |
830 | |
831 fprintf(fp_cpp, "const Pipeline_Use_Element Pipeline_Use::elaborated_elements[%d] = {\n", _pipeline->_rescount); | |
832 for (int i1 = 0; i1 < _pipeline->_rescount; i1++) { | |
833 fprintf(fp_cpp, " Pipeline_Use_Element(0, %d, %d, false, Pipeline_Use_Cycle_Mask(", i1, i1); | |
834 uint masklen = (_pipeline->_maxcycleused + 31) >> 5; | |
835 for (int i2 = masklen-1; i2 >= 0; i2--) | |
836 fprintf(fp_cpp, "0%s", i2 > 0 ? ", " : ""); | |
837 fprintf(fp_cpp, "))%s\n", i1 < (_pipeline->_rescount-1) ? "," : ""); | |
838 } | |
839 fprintf(fp_cpp, "};\n\n"); | |
840 | |
841 fprintf(fp_cpp, "const Pipeline_Use Pipeline_Use::elaborated_use(0, 0, %d, (Pipeline_Use_Element *)&elaborated_elements[0]);\n\n", | |
842 _pipeline->_rescount); | |
843 | |
844 for (_pipeline->_classlist.reset(); (classname = _pipeline->_classlist.iter()) != NULL; ) { | |
845 fprintf(fp_cpp, "\n"); | |
846 fprintf(fp_cpp, "// Pipeline Class \"%s\"\n", classname); | |
847 PipeClassForm *pipeclass = _pipeline->_classdict[classname]->is_pipeclass(); | |
848 int maxWriteStage = -1; | |
849 int maxMoreInstrs = 0; | |
850 int paramcount = 0; | |
851 int i = 0; | |
852 const char *paramname; | |
853 int resource_count = (_pipeline->_rescount + 3) >> 2; | |
854 | |
855 // Scan the operands, looking for last output stage and number of inputs | |
856 for (pipeclass->_parameters.reset(); (paramname = pipeclass->_parameters.iter()) != NULL; ) { | |
857 const PipeClassOperandForm *pipeopnd = | |
858 (const PipeClassOperandForm *)pipeclass->_localUsage[paramname]; | |
859 if (pipeopnd) { | |
860 if (pipeopnd->_iswrite) { | |
861 int stagenum = _pipeline->_stages.index(pipeopnd->_stage); | |
862 int moreinsts = pipeopnd->_more_instrs; | |
863 if ((maxWriteStage+maxMoreInstrs) < (stagenum+moreinsts)) { | |
864 maxWriteStage = stagenum; | |
865 maxMoreInstrs = moreinsts; | |
866 } | |
867 } | |
868 } | |
869 | |
870 if (i++ > 0 || (pipeopnd && !pipeopnd->isWrite())) | |
871 paramcount++; | |
872 } | |
873 | |
874 // Create the list of stages for the operands that are read | |
875 // Note that we will build a NameList to reduce the number of copies | |
876 | |
877 int pipeline_reads_index = pipeline_reads_initializer(fp_cpp, pipeline_reads, pipeclass); | |
878 | |
879 int pipeline_res_stages_index = pipeline_res_stages_initializer( | |
880 fp_cpp, _pipeline, pipeline_res_stages, pipeclass); | |
881 | |
882 int pipeline_res_cycles_index = pipeline_res_cycles_initializer( | |
883 fp_cpp, _pipeline, pipeline_res_cycles, pipeclass); | |
884 | |
885 int pipeline_res_mask_index = pipeline_res_mask_initializer( | |
886 fp_cpp, _pipeline, pipeline_res_masks, pipeline_res_args, pipeclass); | |
887 | |
888 #if 0 | |
889 // Process the Resources | |
890 const PipeClassResourceForm *piperesource; | |
891 | |
892 unsigned resources_used = 0; | |
893 unsigned exclusive_resources_used = 0; | |
894 unsigned resource_groups = 0; | |
895 for (pipeclass->_resUsage.reset(); | |
896 (piperesource = (const PipeClassResourceForm *)pipeclass->_resUsage.iter()) != NULL; ) { | |
897 int used_mask = _pipeline->_resdict[piperesource->_resource]->is_resource()->mask(); | |
898 if (used_mask) | |
899 resource_groups++; | |
900 resources_used |= used_mask; | |
901 if ((used_mask & (used_mask-1)) == 0) | |
902 exclusive_resources_used |= used_mask; | |
903 } | |
904 | |
905 if (resource_groups > 0) { | |
906 fprintf(fp_cpp, "static const uint pipeline_res_or_masks_%03d[%d] = {", | |
907 pipeclass->_num, resource_groups); | |
908 for (pipeclass->_resUsage.reset(), i = 1; | |
909 (piperesource = (const PipeClassResourceForm *)pipeclass->_resUsage.iter()) != NULL; | |
910 i++ ) { | |
911 int used_mask = _pipeline->_resdict[piperesource->_resource]->is_resource()->mask(); | |
912 if (used_mask) { | |
913 fprintf(fp_cpp, " 0x%0*x%c", resource_count, used_mask, i < (int)resource_groups ? ',' : ' '); | |
914 } | |
915 } | |
916 fprintf(fp_cpp, "};\n\n"); | |
917 } | |
918 #endif | |
919 | |
920 // Create the pipeline class description | |
921 fprintf(fp_cpp, "static const Pipeline pipeline_class_%03d(", | |
922 pipeclass->_num); | |
923 if (maxWriteStage < 0) | |
924 fprintf(fp_cpp, "(uint)stage_undefined"); | |
925 else if (maxMoreInstrs == 0) | |
926 fprintf(fp_cpp, "(uint)stage_%s", _pipeline->_stages.name(maxWriteStage)); | |
927 else | |
928 fprintf(fp_cpp, "((uint)stage_%s)+%d", _pipeline->_stages.name(maxWriteStage), maxMoreInstrs); | |
929 fprintf(fp_cpp, ", %d, %s, %d, %d, %s, %s, %s, %s,\n", | |
930 paramcount, | |
931 pipeclass->hasFixedLatency() ? "true" : "false", | |
932 pipeclass->fixedLatency(), | |
933 pipeclass->InstructionCount(), | |
934 pipeclass->hasBranchDelay() ? "true" : "false", | |
935 pipeclass->hasMultipleBundles() ? "true" : "false", | |
936 pipeclass->forceSerialization() ? "true" : "false", | |
937 pipeclass->mayHaveNoCode() ? "true" : "false" ); | |
938 if (paramcount > 0) { | |
939 fprintf(fp_cpp, "\n (enum machPipelineStages * const) pipeline_reads_%03d,\n ", | |
940 pipeline_reads_index+1); | |
941 } | |
942 else | |
943 fprintf(fp_cpp, " NULL,"); | |
944 fprintf(fp_cpp, " (enum machPipelineStages * const) pipeline_res_stages_%03d,\n", | |
945 pipeline_res_stages_index+1); | |
946 fprintf(fp_cpp, " (uint * const) pipeline_res_cycles_%03d,\n", | |
947 pipeline_res_cycles_index+1); | |
948 fprintf(fp_cpp, " Pipeline_Use(%s, (Pipeline_Use_Element *)", | |
949 pipeline_res_args.name(pipeline_res_mask_index)); | |
950 if (strlen(pipeline_res_masks.name(pipeline_res_mask_index)) > 0) | |
951 fprintf(fp_cpp, "&pipeline_res_mask_%03d[0]", | |
952 pipeline_res_mask_index+1); | |
953 else | |
954 fprintf(fp_cpp, "NULL"); | |
955 fprintf(fp_cpp, "));\n"); | |
956 } | |
957 | |
958 // Generate the Node::latency method if _pipeline defined | |
959 fprintf(fp_cpp, "\n"); | |
960 fprintf(fp_cpp, "//------------------Inter-Instruction Latency--------------------------------\n"); | |
961 fprintf(fp_cpp, "uint Node::latency(uint i) {\n"); | |
962 if (_pipeline) { | |
963 #if 0 | |
964 fprintf(fp_cpp, "#ifndef PRODUCT\n"); | |
965 fprintf(fp_cpp, " if (TraceOptoOutput) {\n"); | |
966 fprintf(fp_cpp, " tty->print(\"# %%4d->latency(%%d)\\n\", _idx, i);\n"); | |
967 fprintf(fp_cpp, " }\n"); | |
968 fprintf(fp_cpp, "#endif\n"); | |
969 #endif | |
970 fprintf(fp_cpp, " uint j;\n"); | |
971 fprintf(fp_cpp, " // verify in legal range for inputs\n"); | |
972 fprintf(fp_cpp, " assert(i < len(), \"index not in range\");\n\n"); | |
973 fprintf(fp_cpp, " // verify input is not null\n"); | |
974 fprintf(fp_cpp, " Node *pred = in(i);\n"); | |
975 fprintf(fp_cpp, " if (!pred)\n return %d;\n\n", | |
976 non_operand_latency); | |
977 fprintf(fp_cpp, " if (pred->is_Proj())\n pred = pred->in(0);\n\n"); | |
978 fprintf(fp_cpp, " // if either node does not have pipeline info, use default\n"); | |
979 fprintf(fp_cpp, " const Pipeline *predpipe = pred->pipeline();\n"); | |
980 fprintf(fp_cpp, " assert(predpipe, \"no predecessor pipeline info\");\n\n"); | |
981 fprintf(fp_cpp, " if (predpipe->hasFixedLatency())\n return predpipe->fixedLatency();\n\n"); | |
982 fprintf(fp_cpp, " const Pipeline *currpipe = pipeline();\n"); | |
983 fprintf(fp_cpp, " assert(currpipe, \"no pipeline info\");\n\n"); | |
984 fprintf(fp_cpp, " if (!is_Mach())\n return %d;\n\n", | |
985 node_latency); | |
986 fprintf(fp_cpp, " const MachNode *m = as_Mach();\n"); | |
987 fprintf(fp_cpp, " j = m->oper_input_base();\n"); | |
988 fprintf(fp_cpp, " if (i < j)\n return currpipe->functional_unit_latency(%d, predpipe);\n\n", | |
989 non_operand_latency); | |
990 fprintf(fp_cpp, " // determine which operand this is in\n"); | |
991 fprintf(fp_cpp, " uint n = m->num_opnds();\n"); | |
992 fprintf(fp_cpp, " int delta = %d;\n\n", | |
993 non_operand_latency); | |
994 fprintf(fp_cpp, " uint k;\n"); | |
995 fprintf(fp_cpp, " for (k = 1; k < n; k++) {\n"); | |
996 fprintf(fp_cpp, " j += m->_opnds[k]->num_edges();\n"); | |
997 fprintf(fp_cpp, " if (i < j)\n"); | |
998 fprintf(fp_cpp, " break;\n"); | |
999 fprintf(fp_cpp, " }\n"); | |
1000 fprintf(fp_cpp, " if (k < n)\n"); | |
1001 fprintf(fp_cpp, " delta = currpipe->operand_latency(k,predpipe);\n\n"); | |
1002 fprintf(fp_cpp, " return currpipe->functional_unit_latency(delta, predpipe);\n"); | |
1003 } | |
1004 else { | |
1005 fprintf(fp_cpp, " // assert(false, \"pipeline functionality is not defined\");\n"); | |
1006 fprintf(fp_cpp, " return %d;\n", | |
1007 non_operand_latency); | |
1008 } | |
1009 fprintf(fp_cpp, "}\n\n"); | |
1010 | |
1011 // Output the list of nop nodes | |
1012 fprintf(fp_cpp, "// Descriptions for emitting different functional unit nops\n"); | |
1013 const char *nop; | |
1014 int nopcnt = 0; | |
1015 for ( _pipeline->_noplist.reset(); (nop = _pipeline->_noplist.iter()) != NULL; nopcnt++ ); | |
1016 | |
1017 fprintf(fp_cpp, "void Bundle::initialize_nops(MachNode * nop_list[%d], Compile *C) {\n", nopcnt); | |
1018 int i = 0; | |
1019 for ( _pipeline->_noplist.reset(); (nop = _pipeline->_noplist.iter()) != NULL; i++ ) { | |
1020 fprintf(fp_cpp, " nop_list[%d] = (MachNode *) new (C) %sNode();\n", i, nop); | |
1021 } | |
1022 fprintf(fp_cpp, "};\n\n"); | |
1023 fprintf(fp_cpp, "#ifndef PRODUCT\n"); | |
6850 | 1024 fprintf(fp_cpp, "void Bundle::dump(outputStream *st) const {\n"); |
0 | 1025 fprintf(fp_cpp, " static const char * bundle_flags[] = {\n"); |
1026 fprintf(fp_cpp, " \"\",\n"); | |
1027 fprintf(fp_cpp, " \"use nop delay\",\n"); | |
1028 fprintf(fp_cpp, " \"use unconditional delay\",\n"); | |
1029 fprintf(fp_cpp, " \"use conditional delay\",\n"); | |
1030 fprintf(fp_cpp, " \"used in conditional delay\",\n"); | |
1031 fprintf(fp_cpp, " \"used in unconditional delay\",\n"); | |
1032 fprintf(fp_cpp, " \"used in all conditional delays\",\n"); | |
1033 fprintf(fp_cpp, " };\n\n"); | |
1034 | |
1035 fprintf(fp_cpp, " static const char *resource_names[%d] = {", _pipeline->_rescount); | |
1036 for (i = 0; i < _pipeline->_rescount; i++) | |
1037 fprintf(fp_cpp, " \"%s\"%c", _pipeline->_reslist.name(i), i < _pipeline->_rescount-1 ? ',' : ' '); | |
1038 fprintf(fp_cpp, "};\n\n"); | |
1039 | |
1040 // See if the same string is in the table | |
1041 fprintf(fp_cpp, " bool needs_comma = false;\n\n"); | |
1042 fprintf(fp_cpp, " if (_flags) {\n"); | |
6850 | 1043 fprintf(fp_cpp, " st->print(\"%%s\", bundle_flags[_flags]);\n"); |
0 | 1044 fprintf(fp_cpp, " needs_comma = true;\n"); |
1045 fprintf(fp_cpp, " };\n"); | |
1046 fprintf(fp_cpp, " if (instr_count()) {\n"); | |
6850 | 1047 fprintf(fp_cpp, " st->print(\"%%s%%d instr%%s\", needs_comma ? \", \" : \"\", instr_count(), instr_count() != 1 ? \"s\" : \"\");\n"); |
0 | 1048 fprintf(fp_cpp, " needs_comma = true;\n"); |
1049 fprintf(fp_cpp, " };\n"); | |
1050 fprintf(fp_cpp, " uint r = resources_used();\n"); | |
1051 fprintf(fp_cpp, " if (r) {\n"); | |
6850 | 1052 fprintf(fp_cpp, " st->print(\"%%sresource%%s:\", needs_comma ? \", \" : \"\", (r & (r-1)) != 0 ? \"s\" : \"\");\n"); |
0 | 1053 fprintf(fp_cpp, " for (uint i = 0; i < %d; i++)\n", _pipeline->_rescount); |
1054 fprintf(fp_cpp, " if ((r & (1 << i)) != 0)\n"); | |
6850 | 1055 fprintf(fp_cpp, " st->print(\" %%s\", resource_names[i]);\n"); |
0 | 1056 fprintf(fp_cpp, " needs_comma = true;\n"); |
1057 fprintf(fp_cpp, " };\n"); | |
6850 | 1058 fprintf(fp_cpp, " st->print(\"\\n\");\n"); |
0 | 1059 fprintf(fp_cpp, "}\n"); |
1060 fprintf(fp_cpp, "#endif\n"); | |
1061 } | |
1062 | |
1063 // --------------------------------------------------------------------------- | |
1064 //------------------------------Utilities to build Instruction Classes-------- | |
1065 // --------------------------------------------------------------------------- | |
1066 | |
1067 static void defineOut_RegMask(FILE *fp, const char *node, const char *regMask) { | |
1068 fprintf(fp,"const RegMask &%sNode::out_RegMask() const { return (%s); }\n", | |
1069 node, regMask); | |
1070 } | |
1071 | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1072 static void print_block_index(FILE *fp, int inst_position) { |
0 | 1073 assert( inst_position >= 0, "Instruction number less than zero"); |
1074 fprintf(fp, "block_index"); | |
1075 if( inst_position != 0 ) { | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1076 fprintf(fp, " - %d", inst_position); |
0 | 1077 } |
1078 } | |
1079 | |
1080 // Scan the peepmatch and output a test for each instruction | |
1081 static void check_peepmatch_instruction_sequence(FILE *fp, PeepMatch *pmatch, PeepConstraint *pconstraint) { | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1082 int parent = -1; |
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1083 int inst_position = 0; |
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1084 const char* inst_name = NULL; |
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1085 int input = 0; |
0 | 1086 fprintf(fp, " // Check instruction sub-tree\n"); |
1087 pmatch->reset(); | |
1088 for( pmatch->next_instruction( parent, inst_position, inst_name, input ); | |
1089 inst_name != NULL; | |
1090 pmatch->next_instruction( parent, inst_position, inst_name, input ) ) { | |
1091 // If this is not a placeholder | |
1092 if( ! pmatch->is_placeholder() ) { | |
1093 // Define temporaries 'inst#', based on parent and parent's input index | |
1094 if( parent != -1 ) { // root was initialized | |
1095 fprintf(fp, " // Identify previous instruction if inside this block\n"); | |
1096 fprintf(fp, " if( "); | |
1097 print_block_index(fp, inst_position); | |
12167
650868c062a9
8023691: Create interface for nodes in class Block
adlertz
parents:
10389
diff
changeset
|
1098 fprintf(fp, " > 0 ) {\n Node *n = block->get_node("); |
0 | 1099 print_block_index(fp, inst_position); |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1100 fprintf(fp, ");\n inst%d = (n->is_Mach()) ? ", inst_position); |
0 | 1101 fprintf(fp, "n->as_Mach() : NULL;\n }\n"); |
1102 } | |
1103 | |
1104 // When not the root | |
1105 // Test we have the correct instruction by comparing the rule. | |
1106 if( parent != -1 ) { | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1107 fprintf(fp, " matches = matches && (inst%d != NULL) && (inst%d->rule() == %s_rule);\n", |
0 | 1108 inst_position, inst_position, inst_name); |
1109 } | |
1110 } else { | |
1111 // Check that user did not try to constrain a placeholder | |
1112 assert( ! pconstraint->constrains_instruction(inst_position), | |
1113 "fatal(): Can not constrain a placeholder instruction"); | |
1114 } | |
1115 } | |
1116 } | |
1117 | |
1118 // Build mapping for register indices, num_edges to input | |
1119 static void build_instruction_index_mapping( FILE *fp, FormDict &globals, PeepMatch *pmatch ) { | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1120 int parent = -1; |
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1121 int inst_position = 0; |
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1122 const char* inst_name = NULL; |
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1123 int input = 0; |
0 | 1124 fprintf(fp, " // Build map to register info\n"); |
1125 pmatch->reset(); | |
1126 for( pmatch->next_instruction( parent, inst_position, inst_name, input ); | |
1127 inst_name != NULL; | |
1128 pmatch->next_instruction( parent, inst_position, inst_name, input ) ) { | |
1129 // If this is not a placeholder | |
1130 if( ! pmatch->is_placeholder() ) { | |
1131 // Define temporaries 'inst#', based on self's inst_position | |
1132 InstructForm *inst = globals[inst_name]->is_instruction(); | |
1133 if( inst != NULL ) { | |
1134 char inst_prefix[] = "instXXXX_"; | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1135 sprintf(inst_prefix, "inst%d_", inst_position); |
0 | 1136 char receiver[] = "instXXXX->"; |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1137 sprintf(receiver, "inst%d->", inst_position); |
0 | 1138 inst->index_temps( fp, globals, inst_prefix, receiver ); |
1139 } | |
1140 } | |
1141 } | |
1142 } | |
1143 | |
1144 // Generate tests for the constraints | |
1145 static void check_peepconstraints(FILE *fp, FormDict &globals, PeepMatch *pmatch, PeepConstraint *pconstraint) { | |
1146 fprintf(fp, "\n"); | |
1147 fprintf(fp, " // Check constraints on sub-tree-leaves\n"); | |
1148 | |
1149 // Build mapping from num_edges to local variables | |
1150 build_instruction_index_mapping( fp, globals, pmatch ); | |
1151 | |
1152 // Build constraint tests | |
1153 if( pconstraint != NULL ) { | |
1154 fprintf(fp, " matches = matches &&"); | |
1155 bool first_constraint = true; | |
1156 while( pconstraint != NULL ) { | |
1157 // indentation and connecting '&&' | |
1158 const char *indentation = " "; | |
1159 fprintf(fp, "\n%s%s", indentation, (!first_constraint ? "&& " : " ")); | |
1160 | |
1161 // Only have '==' relation implemented | |
1162 if( strcmp(pconstraint->_relation,"==") != 0 ) { | |
1163 assert( false, "Unimplemented()" ); | |
1164 } | |
1165 | |
1166 // LEFT | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1167 int left_index = pconstraint->_left_inst; |
0 | 1168 const char *left_op = pconstraint->_left_op; |
1169 // Access info on the instructions whose operands are compared | |
1170 InstructForm *inst_left = globals[pmatch->instruction_name(left_index)]->is_instruction(); | |
1171 assert( inst_left, "Parser should guaranty this is an instruction"); | |
1172 int left_op_base = inst_left->oper_input_base(globals); | |
1173 // Access info on the operands being compared | |
1174 int left_op_index = inst_left->operand_position(left_op, Component::USE); | |
1175 if( left_op_index == -1 ) { | |
1176 left_op_index = inst_left->operand_position(left_op, Component::DEF); | |
1177 if( left_op_index == -1 ) { | |
1178 left_op_index = inst_left->operand_position(left_op, Component::USE_DEF); | |
1179 } | |
1180 } | |
1181 assert( left_op_index != NameList::Not_in_list, "Did not find operand in instruction"); | |
1182 ComponentList components_left = inst_left->_components; | |
1183 const char *left_comp_type = components_left.at(left_op_index)->_type; | |
1184 OpClassForm *left_opclass = globals[left_comp_type]->is_opclass(); | |
1185 Form::InterfaceType left_interface_type = left_opclass->interface_type(globals); | |
1186 | |
1187 | |
1188 // RIGHT | |
1189 int right_op_index = -1; | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1190 int right_index = pconstraint->_right_inst; |
0 | 1191 const char *right_op = pconstraint->_right_op; |
1192 if( right_index != -1 ) { // Match operand | |
1193 // Access info on the instructions whose operands are compared | |
1194 InstructForm *inst_right = globals[pmatch->instruction_name(right_index)]->is_instruction(); | |
1195 assert( inst_right, "Parser should guaranty this is an instruction"); | |
1196 int right_op_base = inst_right->oper_input_base(globals); | |
1197 // Access info on the operands being compared | |
1198 right_op_index = inst_right->operand_position(right_op, Component::USE); | |
1199 if( right_op_index == -1 ) { | |
1200 right_op_index = inst_right->operand_position(right_op, Component::DEF); | |
1201 if( right_op_index == -1 ) { | |
1202 right_op_index = inst_right->operand_position(right_op, Component::USE_DEF); | |
1203 } | |
1204 } | |
1205 assert( right_op_index != NameList::Not_in_list, "Did not find operand in instruction"); | |
1206 ComponentList components_right = inst_right->_components; | |
1207 const char *right_comp_type = components_right.at(right_op_index)->_type; | |
1208 OpClassForm *right_opclass = globals[right_comp_type]->is_opclass(); | |
1209 Form::InterfaceType right_interface_type = right_opclass->interface_type(globals); | |
1210 assert( right_interface_type == left_interface_type, "Both must be same interface"); | |
1211 | |
1212 } else { // Else match register | |
1213 // assert( false, "should be a register" ); | |
1214 } | |
1215 | |
1216 // | |
1217 // Check for equivalence | |
1218 // | |
1219 // fprintf(fp, "phase->eqv( "); | |
1220 // fprintf(fp, "inst%d->in(%d+%d) /* %s */, inst%d->in(%d+%d) /* %s */", | |
1221 // left_index, left_op_base, left_op_index, left_op, | |
1222 // right_index, right_op_base, right_op_index, right_op ); | |
1223 // fprintf(fp, ")"); | |
1224 // | |
1225 switch( left_interface_type ) { | |
1226 case Form::register_interface: { | |
1227 // Check that they are allocated to the same register | |
1228 // Need parameter for index position if not result operand | |
1229 char left_reg_index[] = ",instXXXX_idxXXXX"; | |
1230 if( left_op_index != 0 ) { | |
1231 assert( (left_index <= 9999) && (left_op_index <= 9999), "exceed string size"); | |
1232 // Must have index into operands | |
6850 | 1233 sprintf(left_reg_index,",inst%d_idx%d", (int)left_index, left_op_index); |
0 | 1234 } else { |
1235 strcpy(left_reg_index, ""); | |
1236 } | |
1237 fprintf(fp, "(inst%d->_opnds[%d]->reg(ra_,inst%d%s) /* %d.%s */", | |
1238 left_index, left_op_index, left_index, left_reg_index, left_index, left_op ); | |
1239 fprintf(fp, " == "); | |
1240 | |
1241 if( right_index != -1 ) { | |
1242 char right_reg_index[18] = ",instXXXX_idxXXXX"; | |
1243 if( right_op_index != 0 ) { | |
1244 assert( (right_index <= 9999) && (right_op_index <= 9999), "exceed string size"); | |
1245 // Must have index into operands | |
6850 | 1246 sprintf(right_reg_index,",inst%d_idx%d", (int)right_index, right_op_index); |
0 | 1247 } else { |
1248 strcpy(right_reg_index, ""); | |
1249 } | |
1250 fprintf(fp, "/* %d.%s */ inst%d->_opnds[%d]->reg(ra_,inst%d%s)", | |
1251 right_index, right_op, right_index, right_op_index, right_index, right_reg_index ); | |
1252 } else { | |
1253 fprintf(fp, "%s_enc", right_op ); | |
1254 } | |
1255 fprintf(fp,")"); | |
1256 break; | |
1257 } | |
1258 case Form::constant_interface: { | |
1259 // Compare the '->constant()' values | |
1260 fprintf(fp, "(inst%d->_opnds[%d]->constant() /* %d.%s */", | |
1261 left_index, left_op_index, left_index, left_op ); | |
1262 fprintf(fp, " == "); | |
1263 fprintf(fp, "/* %d.%s */ inst%d->_opnds[%d]->constant())", | |
1264 right_index, right_op, right_index, right_op_index ); | |
1265 break; | |
1266 } | |
1267 case Form::memory_interface: { | |
1268 // Compare 'base', 'index', 'scale', and 'disp' | |
1269 // base | |
1270 fprintf(fp, "( \n"); | |
1271 fprintf(fp, " (inst%d->_opnds[%d]->base(ra_,inst%d,inst%d_idx%d) /* %d.%s$$base */", | |
1272 left_index, left_op_index, left_index, left_index, left_op_index, left_index, left_op ); | |
1273 fprintf(fp, " == "); | |
1274 fprintf(fp, "/* %d.%s$$base */ inst%d->_opnds[%d]->base(ra_,inst%d,inst%d_idx%d)) &&\n", | |
1275 right_index, right_op, right_index, right_op_index, right_index, right_index, right_op_index ); | |
1276 // index | |
1277 fprintf(fp, " (inst%d->_opnds[%d]->index(ra_,inst%d,inst%d_idx%d) /* %d.%s$$index */", | |
1278 left_index, left_op_index, left_index, left_index, left_op_index, left_index, left_op ); | |
1279 fprintf(fp, " == "); | |
1280 fprintf(fp, "/* %d.%s$$index */ inst%d->_opnds[%d]->index(ra_,inst%d,inst%d_idx%d)) &&\n", | |
1281 right_index, right_op, right_index, right_op_index, right_index, right_index, right_op_index ); | |
1282 // scale | |
1283 fprintf(fp, " (inst%d->_opnds[%d]->scale() /* %d.%s$$scale */", | |
1284 left_index, left_op_index, left_index, left_op ); | |
1285 fprintf(fp, " == "); | |
1286 fprintf(fp, "/* %d.%s$$scale */ inst%d->_opnds[%d]->scale()) &&\n", | |
1287 right_index, right_op, right_index, right_op_index ); | |
1288 // disp | |
1289 fprintf(fp, " (inst%d->_opnds[%d]->disp(ra_,inst%d,inst%d_idx%d) /* %d.%s$$disp */", | |
1290 left_index, left_op_index, left_index, left_index, left_op_index, left_index, left_op ); | |
1291 fprintf(fp, " == "); | |
1292 fprintf(fp, "/* %d.%s$$disp */ inst%d->_opnds[%d]->disp(ra_,inst%d,inst%d_idx%d))\n", | |
1293 right_index, right_op, right_index, right_op_index, right_index, right_index, right_op_index ); | |
1294 fprintf(fp, ") \n"); | |
1295 break; | |
1296 } | |
1297 case Form::conditional_interface: { | |
1298 // Compare the condition code being tested | |
1299 assert( false, "Unimplemented()" ); | |
1300 break; | |
1301 } | |
1302 default: { | |
1303 assert( false, "ShouldNotReachHere()" ); | |
1304 break; | |
1305 } | |
1306 } | |
1307 | |
1308 // Advance to next constraint | |
1309 pconstraint = pconstraint->next(); | |
1310 first_constraint = false; | |
1311 } | |
1312 | |
1313 fprintf(fp, ";\n"); | |
1314 } | |
1315 } | |
1316 | |
1317 // // EXPERIMENTAL -- TEMPORARY code | |
1318 // static Form::DataType get_operand_type(FormDict &globals, InstructForm *instr, const char *op_name ) { | |
1319 // int op_index = instr->operand_position(op_name, Component::USE); | |
1320 // if( op_index == -1 ) { | |
1321 // op_index = instr->operand_position(op_name, Component::DEF); | |
1322 // if( op_index == -1 ) { | |
1323 // op_index = instr->operand_position(op_name, Component::USE_DEF); | |
1324 // } | |
1325 // } | |
1326 // assert( op_index != NameList::Not_in_list, "Did not find operand in instruction"); | |
1327 // | |
1328 // ComponentList components_right = instr->_components; | |
1329 // char *right_comp_type = components_right.at(op_index)->_type; | |
1330 // OpClassForm *right_opclass = globals[right_comp_type]->is_opclass(); | |
1331 // Form::InterfaceType right_interface_type = right_opclass->interface_type(globals); | |
1332 // | |
1333 // return; | |
1334 // } | |
1335 | |
1336 // Construct the new sub-tree | |
1337 static void generate_peepreplace( FILE *fp, FormDict &globals, PeepMatch *pmatch, PeepConstraint *pconstraint, PeepReplace *preplace, int max_position ) { | |
1338 fprintf(fp, " // IF instructions and constraints matched\n"); | |
1339 fprintf(fp, " if( matches ) {\n"); | |
1340 fprintf(fp, " // generate the new sub-tree\n"); | |
1341 fprintf(fp, " assert( true, \"Debug stopping point\");\n"); | |
1342 if( preplace != NULL ) { | |
1343 // Get the root of the new sub-tree | |
1344 const char *root_inst = NULL; | |
1345 preplace->next_instruction(root_inst); | |
1346 InstructForm *root_form = globals[root_inst]->is_instruction(); | |
1347 assert( root_form != NULL, "Replacement instruction was not previously defined"); | |
1348 fprintf(fp, " %sNode *root = new (C) %sNode();\n", root_inst, root_inst); | |
1349 | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1350 int inst_num; |
0 | 1351 const char *op_name; |
1352 int opnds_index = 0; // define result operand | |
1353 // Then install the use-operands for the new sub-tree | |
1354 // preplace->reset(); // reset breaks iteration | |
1355 for( preplace->next_operand( inst_num, op_name ); | |
1356 op_name != NULL; | |
1357 preplace->next_operand( inst_num, op_name ) ) { | |
1358 InstructForm *inst_form; | |
1359 inst_form = globals[pmatch->instruction_name(inst_num)]->is_instruction(); | |
1360 assert( inst_form, "Parser should guaranty this is an instruction"); | |
1361 int inst_op_num = inst_form->operand_position(op_name, Component::USE); | |
1362 if( inst_op_num == NameList::Not_in_list ) | |
1363 inst_op_num = inst_form->operand_position(op_name, Component::USE_DEF); | |
1364 assert( inst_op_num != NameList::Not_in_list, "Did not find operand as USE"); | |
1365 // find the name of the OperandForm from the local name | |
1366 const Form *form = inst_form->_localNames[op_name]; | |
1367 OperandForm *op_form = form->is_operand(); | |
1368 if( opnds_index == 0 ) { | |
1369 // Initial setup of new instruction | |
1370 fprintf(fp, " // ----- Initial setup -----\n"); | |
1371 // | |
1372 // Add control edge for this node | |
1373 fprintf(fp, " root->add_req(_in[0]); // control edge\n"); | |
1374 // Add unmatched edges from root of match tree | |
1375 int op_base = root_form->oper_input_base(globals); | |
1376 for( int unmatched_edge = 1; unmatched_edge < op_base; ++unmatched_edge ) { | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1377 fprintf(fp, " root->add_req(inst%d->in(%d)); // unmatched ideal edge\n", |
0 | 1378 inst_num, unmatched_edge); |
1379 } | |
1380 // If new instruction captures bottom type | |
1541
b5fdf39b9749
6953576: bottom_type for matched AddPNodes doesn't always agree with ideal
never
parents:
1489
diff
changeset
|
1381 if( root_form->captures_bottom_type(globals) ) { |
0 | 1382 // Get bottom type from instruction whose result we are replacing |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1383 fprintf(fp, " root->_bottom_type = inst%d->bottom_type();\n", inst_num); |
0 | 1384 } |
1385 // Define result register and result operand | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1386 fprintf(fp, " ra_->add_reference(root, inst%d);\n", inst_num); |
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1387 fprintf(fp, " ra_->set_oop (root, ra_->is_oop(inst%d));\n", inst_num); |
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1388 fprintf(fp, " ra_->set_pair(root->_idx, ra_->get_reg_second(inst%d), ra_->get_reg_first(inst%d));\n", inst_num, inst_num); |
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1389 fprintf(fp, " root->_opnds[0] = inst%d->_opnds[0]->clone(C); // result\n", inst_num); |
0 | 1390 fprintf(fp, " // ----- Done with initial setup -----\n"); |
1391 } else { | |
1392 if( (op_form == NULL) || (op_form->is_base_constant(globals) == Form::none) ) { | |
1393 // Do not have ideal edges for constants after matching | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1394 fprintf(fp, " for( unsigned x%d = inst%d_idx%d; x%d < inst%d_idx%d; x%d++ )\n", |
0 | 1395 inst_op_num, inst_num, inst_op_num, |
1396 inst_op_num, inst_num, inst_op_num+1, inst_op_num ); | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1397 fprintf(fp, " root->add_req( inst%d->in(x%d) );\n", |
0 | 1398 inst_num, inst_op_num ); |
1399 } else { | |
1400 fprintf(fp, " // no ideal edge for constants after matching\n"); | |
1401 } | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1402 fprintf(fp, " root->_opnds[%d] = inst%d->_opnds[%d]->clone(C);\n", |
0 | 1403 opnds_index, inst_num, inst_op_num ); |
1404 } | |
1405 ++opnds_index; | |
1406 } | |
1407 }else { | |
1408 // Replacing subtree with empty-tree | |
1409 assert( false, "ShouldNotReachHere();"); | |
1410 } | |
1411 | |
1412 // Return the new sub-tree | |
1413 fprintf(fp, " deleted = %d;\n", max_position+1 /*zero to one based*/); | |
1414 fprintf(fp, " return root; // return new root;\n"); | |
1415 fprintf(fp, " }\n"); | |
1416 } | |
1417 | |
1418 | |
1419 // Define the Peephole method for an instruction node | |
1420 void ArchDesc::definePeephole(FILE *fp, InstructForm *node) { | |
1421 // Generate Peephole function header | |
1422 fprintf(fp, "MachNode *%sNode::peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ) {\n", node->_ident); | |
1423 fprintf(fp, " bool matches = true;\n"); | |
1424 | |
1425 // Identify the maximum instruction position, | |
1426 // generate temporaries that hold current instruction | |
1427 // | |
1428 // MachNode *inst0 = NULL; | |
1429 // ... | |
1430 // MachNode *instMAX = NULL; | |
1431 // | |
1432 int max_position = 0; | |
1433 Peephole *peep; | |
1434 for( peep = node->peepholes(); peep != NULL; peep = peep->next() ) { | |
1435 PeepMatch *pmatch = peep->match(); | |
1436 assert( pmatch != NULL, "fatal(), missing peepmatch rule"); | |
1437 if( max_position < pmatch->max_position() ) max_position = pmatch->max_position(); | |
1438 } | |
1439 for( int i = 0; i <= max_position; ++i ) { | |
1440 if( i == 0 ) { | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1441 fprintf(fp, " MachNode *inst0 = this;\n"); |
0 | 1442 } else { |
1443 fprintf(fp, " MachNode *inst%d = NULL;\n", i); | |
1444 } | |
1445 } | |
1446 | |
1447 // For each peephole rule in architecture description | |
1448 // Construct a test for the desired instruction sub-tree | |
1449 // then check the constraints | |
1450 // If these match, Generate the new subtree | |
1451 for( peep = node->peepholes(); peep != NULL; peep = peep->next() ) { | |
1452 int peephole_number = peep->peephole_number(); | |
1453 PeepMatch *pmatch = peep->match(); | |
1454 PeepConstraint *pconstraint = peep->constraints(); | |
1455 PeepReplace *preplace = peep->replacement(); | |
1456 | |
1457 // Root of this peephole is the current MachNode | |
1458 assert( true, // %%name?%% strcmp( node->_ident, pmatch->name(0) ) == 0, | |
1459 "root of PeepMatch does not match instruction"); | |
1460 | |
1461 // Make each peephole rule individually selectable | |
1462 fprintf(fp, " if( (OptoPeepholeAt == -1) || (OptoPeepholeAt==%d) ) {\n", peephole_number); | |
1463 fprintf(fp, " matches = true;\n"); | |
1464 // Scan the peepmatch and output a test for each instruction | |
1465 check_peepmatch_instruction_sequence( fp, pmatch, pconstraint ); | |
1466 | |
1467 // Check constraints and build replacement inside scope | |
1468 fprintf(fp, " // If instruction subtree matches\n"); | |
1469 fprintf(fp, " if( matches ) {\n"); | |
1470 | |
1471 // Generate tests for the constraints | |
1472 check_peepconstraints( fp, _globalNames, pmatch, pconstraint ); | |
1473 | |
1474 // Construct the new sub-tree | |
1475 generate_peepreplace( fp, _globalNames, pmatch, pconstraint, preplace, max_position ); | |
1476 | |
1477 // End of scope for this peephole's constraints | |
1478 fprintf(fp, " }\n"); | |
1479 // Closing brace '}' to make each peephole rule individually selectable | |
1480 fprintf(fp, " } // end of peephole rule #%d\n", peephole_number); | |
1481 fprintf(fp, "\n"); | |
1482 } | |
1483 | |
1484 fprintf(fp, " return NULL; // No peephole rules matched\n"); | |
1485 fprintf(fp, "}\n"); | |
1486 fprintf(fp, "\n"); | |
1487 } | |
1488 | |
1489 // Define the Expand method for an instruction node | |
1490 void ArchDesc::defineExpand(FILE *fp, InstructForm *node) { | |
1491 unsigned cnt = 0; // Count nodes we have expand into | |
1492 unsigned i; | |
1493 | |
1494 // Generate Expand function header | |
2008 | 1495 fprintf(fp, "MachNode* %sNode::Expand(State* state, Node_List& proj_list, Node* mem) {\n", node->_ident); |
1496 fprintf(fp, " Compile* C = Compile::current();\n"); | |
0 | 1497 // Generate expand code |
1498 if( node->expands() ) { | |
1499 const char *opid; | |
1500 int new_pos, exp_pos; | |
1501 const char *new_id = NULL; | |
1502 const Form *frm = NULL; | |
1503 InstructForm *new_inst = NULL; | |
1504 OperandForm *new_oper = NULL; | |
1505 unsigned numo = node->num_opnds() + | |
1506 node->_exprule->_newopers.count(); | |
1507 | |
1508 // If necessary, generate any operands created in expand rule | |
1509 if (node->_exprule->_newopers.count()) { | |
1510 for(node->_exprule->_newopers.reset(); | |
1511 (new_id = node->_exprule->_newopers.iter()) != NULL; cnt++) { | |
1512 frm = node->_localNames[new_id]; | |
1513 assert(frm, "Invalid entry in new operands list of expand rule"); | |
1514 new_oper = frm->is_operand(); | |
1515 char *tmp = (char *)node->_exprule->_newopconst[new_id]; | |
1516 if (tmp == NULL) { | |
1517 fprintf(fp," MachOper *op%d = new (C) %sOper();\n", | |
1518 cnt, new_oper->_ident); | |
1519 } | |
1520 else { | |
1521 fprintf(fp," MachOper *op%d = new (C) %sOper(%s);\n", | |
1522 cnt, new_oper->_ident, tmp); | |
1523 } | |
1524 } | |
1525 } | |
1526 cnt = 0; | |
1527 // Generate the temps to use for DAG building | |
1528 for(i = 0; i < numo; i++) { | |
1529 if (i < node->num_opnds()) { | |
1530 fprintf(fp," MachNode *tmp%d = this;\n", i); | |
1531 } | |
1532 else { | |
1533 fprintf(fp," MachNode *tmp%d = NULL;\n", i); | |
1534 } | |
1535 } | |
1536 // Build mapping from num_edges to local variables | |
1537 fprintf(fp," unsigned num0 = 0;\n"); | |
1538 for( i = 1; i < node->num_opnds(); i++ ) { | |
1539 fprintf(fp," unsigned num%d = opnd_array(%d)->num_edges();\n",i,i); | |
1540 } | |
1541 | |
1542 // Build a mapping from operand index to input edges | |
1543 fprintf(fp," unsigned idx0 = oper_input_base();\n"); | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
1544 |
1203 | 1545 // The order in which the memory input is added to a node is very |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
1546 // strange. Store nodes get a memory input before Expand is |
1203 | 1547 // called and other nodes get it afterwards or before depending on |
1548 // match order so oper_input_base is wrong during expansion. This | |
1549 // code adjusts it so that expansion will work correctly. | |
1550 int has_memory_edge = node->_matrule->needs_ideal_memory_edge(_globalNames); | |
1551 if (has_memory_edge) { | |
1552 fprintf(fp," if (mem == (Node*)1) {\n"); | |
1553 fprintf(fp," idx0--; // Adjust base because memory edge hasn't been inserted yet\n"); | |
1554 fprintf(fp," }\n"); | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
1555 } |
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
1556 |
0 | 1557 for( i = 0; i < node->num_opnds(); i++ ) { |
1558 fprintf(fp," unsigned idx%d = idx%d + num%d;\n", | |
1559 i+1,i,i); | |
1560 } | |
1561 | |
1562 // Declare variable to hold root of expansion | |
1563 fprintf(fp," MachNode *result = NULL;\n"); | |
1564 | |
1565 // Iterate over the instructions 'node' expands into | |
1566 ExpandRule *expand = node->_exprule; | |
1567 NameAndList *expand_instr = NULL; | |
1568 for(expand->reset_instructions(); | |
1569 (expand_instr = expand->iter_instructions()) != NULL; cnt++) { | |
1570 new_id = expand_instr->name(); | |
1571 | |
1572 InstructForm* expand_instruction = (InstructForm*)globalAD->globalNames()[new_id]; | |
14431
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
1573 |
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
1574 if (!expand_instruction) { |
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
1575 globalAD->syntax_err(node->_linenum, "In %s: instruction %s used in expand not declared\n", |
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
1576 node->_ident, new_id); |
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
1577 continue; |
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
1578 } |
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
1579 |
0 | 1580 if (expand_instruction->has_temps()) { |
1581 globalAD->syntax_err(node->_linenum, "In %s: expand rules using instructs with TEMPs aren't supported: %s", | |
1582 node->_ident, new_id); | |
1583 } | |
1584 | |
1585 // Build the node for the instruction | |
1586 fprintf(fp,"\n %sNode *n%d = new (C) %sNode();\n", new_id, cnt, new_id); | |
1587 // Add control edge for this node | |
1588 fprintf(fp," n%d->add_req(_in[0]);\n", cnt); | |
1589 // Build the operand for the value this node defines. | |
1590 Form *form = (Form*)_globalNames[new_id]; | |
1591 assert( form, "'new_id' must be a defined form name"); | |
1592 // Grab the InstructForm for the new instruction | |
1593 new_inst = form->is_instruction(); | |
1594 assert( new_inst, "'new_id' must be an instruction name"); | |
1595 if( node->is_ideal_if() && new_inst->is_ideal_if() ) { | |
1596 fprintf(fp, " ((MachIfNode*)n%d)->_prob = _prob;\n",cnt); | |
1597 fprintf(fp, " ((MachIfNode*)n%d)->_fcnt = _fcnt;\n",cnt); | |
1598 } | |
1599 | |
1600 if( node->is_ideal_fastlock() && new_inst->is_ideal_fastlock() ) { | |
1601 fprintf(fp, " ((MachFastLockNode*)n%d)->_counters = _counters;\n",cnt); | |
17780 | 1602 fprintf(fp, " ((MachFastLockNode*)n%d)->_rtm_counters = _rtm_counters;\n",cnt); |
1603 fprintf(fp, " ((MachFastLockNode*)n%d)->_stack_rtm_counters = _stack_rtm_counters;\n",cnt); | |
0 | 1604 } |
1605 | |
6802
0702f188baeb
7200233: C2: can't use expand rules for vector instruction rules
kvn
parents:
6725
diff
changeset
|
1606 // Fill in the bottom_type where requested |
0702f188baeb
7200233: C2: can't use expand rules for vector instruction rules
kvn
parents:
6725
diff
changeset
|
1607 if (node->captures_bottom_type(_globalNames) && |
0702f188baeb
7200233: C2: can't use expand rules for vector instruction rules
kvn
parents:
6725
diff
changeset
|
1608 new_inst->captures_bottom_type(_globalNames)) { |
0702f188baeb
7200233: C2: can't use expand rules for vector instruction rules
kvn
parents:
6725
diff
changeset
|
1609 fprintf(fp, " ((MachTypeNode*)n%d)->_bottom_type = bottom_type();\n", cnt); |
0702f188baeb
7200233: C2: can't use expand rules for vector instruction rules
kvn
parents:
6725
diff
changeset
|
1610 } |
0702f188baeb
7200233: C2: can't use expand rules for vector instruction rules
kvn
parents:
6725
diff
changeset
|
1611 |
0 | 1612 const char *resultOper = new_inst->reduce_result(); |
1613 fprintf(fp," n%d->set_opnd_array(0, state->MachOperGenerator( %s, C ));\n", | |
1614 cnt, machOperEnum(resultOper)); | |
1615 | |
1616 // get the formal operand NameList | |
1617 NameList *formal_lst = &new_inst->_parameters; | |
1618 formal_lst->reset(); | |
1619 | |
1620 // Handle any memory operand | |
1621 int memory_operand = new_inst->memory_operand(_globalNames); | |
1622 if( memory_operand != InstructForm::NO_MEMORY_OPERAND ) { | |
1623 int node_mem_op = node->memory_operand(_globalNames); | |
1624 assert( node_mem_op != InstructForm::NO_MEMORY_OPERAND, | |
1625 "expand rule member needs memory but top-level inst doesn't have any" ); | |
1203 | 1626 if (has_memory_edge) { |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
1627 // Copy memory edge |
1203 | 1628 fprintf(fp," if (mem != (Node*)1) {\n"); |
1629 fprintf(fp," n%d->add_req(_in[1]);\t// Add memory edge\n", cnt); | |
1630 fprintf(fp," }\n"); | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
1631 } |
0 | 1632 } |
1633 | |
1634 // Iterate over the new instruction's operands | |
415
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1635 int prev_pos = -1; |
0 | 1636 for( expand_instr->reset(); (opid = expand_instr->iter()) != NULL; ) { |
1637 // Use 'parameter' at current position in list of new instruction's formals | |
1638 // instead of 'opid' when looking up info internal to new_inst | |
1639 const char *parameter = formal_lst->iter(); | |
14431
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
1640 if (!parameter) { |
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
1641 globalAD->syntax_err(node->_linenum, "Operand %s of expand instruction %s has" |
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
1642 " no equivalent in new instruction %s.", |
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
1643 opid, node->_ident, new_inst->_ident); |
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
1644 assert(0, "Wrong expand"); |
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
1645 } |
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
1646 |
0 | 1647 // Check for an operand which is created in the expand rule |
1648 if ((exp_pos = node->_exprule->_newopers.index(opid)) != -1) { | |
1649 new_pos = new_inst->operand_position(parameter,Component::USE); | |
1650 exp_pos += node->num_opnds(); | |
1651 // If there is no use of the created operand, just skip it | |
6850 | 1652 if (new_pos != NameList::Not_in_list) { |
0 | 1653 //Copy the operand from the original made above |
1654 fprintf(fp," n%d->set_opnd_array(%d, op%d->clone(C)); // %s\n", | |
1655 cnt, new_pos, exp_pos-node->num_opnds(), opid); | |
1656 // Check for who defines this operand & add edge if needed | |
1657 fprintf(fp," if(tmp%d != NULL)\n", exp_pos); | |
1658 fprintf(fp," n%d->add_req(tmp%d);\n", cnt, exp_pos); | |
1659 } | |
1660 } | |
1661 else { | |
1662 // Use operand name to get an index into instruction component list | |
1663 // ins = (InstructForm *) _globalNames[new_id]; | |
1664 exp_pos = node->operand_position_format(opid); | |
1665 assert(exp_pos != -1, "Bad expand rule"); | |
415
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1666 if (prev_pos > exp_pos && expand_instruction->_matrule != NULL) { |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1667 // For the add_req calls below to work correctly they need |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1668 // to added in the same order that a match would add them. |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1669 // This means that they would need to be in the order of |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1670 // the components list instead of the formal parameters. |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1671 // This is a sort of hidden invariant that previously |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1672 // wasn't checked and could lead to incorrectly |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1673 // constructed nodes. |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1674 syntax_err(node->_linenum, "For expand in %s to work, parameter declaration order in %s must follow matchrule\n", |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1675 node->_ident, new_inst->_ident); |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1676 } |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
1677 prev_pos = exp_pos; |
0 | 1678 |
1679 new_pos = new_inst->operand_position(parameter,Component::USE); | |
1680 if (new_pos != -1) { | |
1681 // Copy the operand from the ExpandNode to the new node | |
1682 fprintf(fp," n%d->set_opnd_array(%d, opnd_array(%d)->clone(C)); // %s\n", | |
1683 cnt, new_pos, exp_pos, opid); | |
1684 // For each operand add appropriate input edges by looking at tmp's | |
1685 fprintf(fp," if(tmp%d == this) {\n", exp_pos); | |
1686 // Grab corresponding edges from ExpandNode and insert them here | |
1687 fprintf(fp," for(unsigned i = 0; i < num%d; i++) {\n", exp_pos); | |
1688 fprintf(fp," n%d->add_req(_in[i + idx%d]);\n", cnt, exp_pos); | |
1689 fprintf(fp," }\n"); | |
1690 fprintf(fp," }\n"); | |
1691 // This value is generated by one of the new instructions | |
1692 fprintf(fp," else n%d->add_req(tmp%d);\n", cnt, exp_pos); | |
1693 } | |
1694 } | |
1695 | |
1696 // Update the DAG tmp's for values defined by this instruction | |
1697 int new_def_pos = new_inst->operand_position(parameter,Component::DEF); | |
1698 Effect *eform = (Effect *)new_inst->_effects[parameter]; | |
1699 // If this operand is a definition in either an effects rule | |
1700 // or a match rule | |
1701 if((eform) && (is_def(eform->_use_def))) { | |
1702 // Update the temp associated with this operand | |
1703 fprintf(fp," tmp%d = n%d;\n", exp_pos, cnt); | |
1704 } | |
1705 else if( new_def_pos != -1 ) { | |
1706 // Instruction defines a value but user did not declare it | |
1707 // in the 'effect' clause | |
1708 fprintf(fp," tmp%d = n%d;\n", exp_pos, cnt); | |
1709 } | |
1710 } // done iterating over a new instruction's operands | |
1711 | |
1712 // Invoke Expand() for the newly created instruction. | |
1203 | 1713 fprintf(fp," result = n%d->Expand( state, proj_list, mem );\n", cnt); |
0 | 1714 assert( !new_inst->expands(), "Do not have complete support for recursive expansion"); |
1715 } // done iterating over new instructions | |
1716 fprintf(fp,"\n"); | |
1717 } // done generating expand rule | |
1718 | |
2254
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1719 // Generate projections for instruction's additional DEFs and KILLs |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1720 if( ! node->expands() && (node->needs_projections() || node->has_temps())) { |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1721 // Get string representing the MachNode that projections point at |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1722 const char *machNode = "this"; |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1723 // Generate the projections |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1724 fprintf(fp," // Add projection edges for additional defs or kills\n"); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1725 |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1726 // Examine each component to see if it is a DEF or KILL |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1727 node->_components.reset(); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1728 // Skip the first component, if already handled as (SET dst (...)) |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1729 Component *comp = NULL; |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1730 // For kills, the choice of projection numbers is arbitrary |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1731 int proj_no = 1; |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1732 bool declared_def = false; |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1733 bool declared_kill = false; |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1734 |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1735 while( (comp = node->_components.iter()) != NULL ) { |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1736 // Lookup register class associated with operand type |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1737 Form *form = (Form*)_globalNames[comp->_type]; |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1738 assert( form, "component type must be a defined form"); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1739 OperandForm *op = form->is_operand(); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1740 |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1741 if (comp->is(Component::TEMP)) { |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1742 fprintf(fp, " // TEMP %s\n", comp->_name); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1743 if (!declared_def) { |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1744 // Define the variable "def" to hold new MachProjNodes |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1745 fprintf(fp, " MachTempNode *def;\n"); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1746 declared_def = true; |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1747 } |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1748 if (op && op->_interface && op->_interface->is_RegInterface()) { |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1749 fprintf(fp," def = new (C) MachTempNode(state->MachOperGenerator( %s, C ));\n", |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1750 machOperEnum(op->_ident)); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1751 fprintf(fp," add_req(def);\n"); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1752 // The operand for TEMP is already constructed during |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1753 // this mach node construction, see buildMachNode(). |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1754 // |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1755 // int idx = node->operand_position_format(comp->_name); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1756 // fprintf(fp," set_opnd_array(%d, state->MachOperGenerator( %s, C ));\n", |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1757 // idx, machOperEnum(op->_ident)); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1758 } else { |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1759 assert(false, "can't have temps which aren't registers"); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1760 } |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1761 } else if (comp->isa(Component::KILL)) { |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1762 fprintf(fp, " // DEF/KILL %s\n", comp->_name); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1763 |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1764 if (!declared_kill) { |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1765 // Define the variable "kill" to hold new MachProjNodes |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1766 fprintf(fp, " MachProjNode *kill;\n"); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1767 declared_kill = true; |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1768 } |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1769 |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1770 assert( op, "Support additional KILLS for base operands"); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1771 const char *regmask = reg_mask(*op); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1772 const char *ideal_type = op->ideal_type(_globalNames, _register); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1773 |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1774 if (!op->is_bound_register()) { |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1775 syntax_err(node->_linenum, "In %s only bound registers can be killed: %s %s\n", |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1776 node->_ident, comp->_type, comp->_name); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1777 } |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1778 |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1779 fprintf(fp," kill = "); |
6804
e626685e9f6c
7193318: C2: remove number of inputs requirement from Node's new operator
kvn
parents:
6802
diff
changeset
|
1780 fprintf(fp,"new (C) MachProjNode( %s, %d, (%s), Op_%s );\n", |
2254
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1781 machNode, proj_no++, regmask, ideal_type); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1782 fprintf(fp," proj_list.push(kill);\n"); |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1783 } |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1784 } |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1785 } |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1786 |
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
1787 if( !node->expands() && node->_matrule != NULL ) { |
0 | 1788 // Remove duplicated operands and inputs which use the same name. |
1789 // Seach through match operands for the same name usage. | |
1790 uint cur_num_opnds = node->num_opnds(); | |
1791 if( cur_num_opnds > 1 && cur_num_opnds != node->num_unique_opnds() ) { | |
1792 Component *comp = NULL; | |
1793 // Build mapping from num_edges to local variables | |
1794 fprintf(fp," unsigned num0 = 0;\n"); | |
1795 for( i = 1; i < cur_num_opnds; i++ ) { | |
6850 | 1796 fprintf(fp," unsigned num%d = opnd_array(%d)->num_edges();",i,i); |
1797 fprintf(fp, " \t// %s\n", node->opnd_ident(i)); | |
0 | 1798 } |
1799 // Build a mapping from operand index to input edges | |
1800 fprintf(fp," unsigned idx0 = oper_input_base();\n"); | |
1801 for( i = 0; i < cur_num_opnds; i++ ) { | |
1802 fprintf(fp," unsigned idx%d = idx%d + num%d;\n", | |
1803 i+1,i,i); | |
1804 } | |
1805 | |
1806 uint new_num_opnds = 1; | |
1807 node->_components.reset(); | |
1808 // Skip first unique operands. | |
1809 for( i = 1; i < cur_num_opnds; i++ ) { | |
1810 comp = node->_components.iter(); | |
10389 | 1811 if (i != node->unique_opnds_idx(i)) { |
0 | 1812 break; |
1813 } | |
1814 new_num_opnds++; | |
1815 } | |
1816 // Replace not unique operands with next unique operands. | |
1817 for( ; i < cur_num_opnds; i++ ) { | |
1818 comp = node->_components.iter(); | |
10389 | 1819 uint j = node->unique_opnds_idx(i); |
0 | 1820 // unique_opnds_idx(i) is unique if unique_opnds_idx(j) is not unique. |
1821 if( j != node->unique_opnds_idx(j) ) { | |
1822 fprintf(fp," set_opnd_array(%d, opnd_array(%d)->clone(C)); // %s\n", | |
1823 new_num_opnds, i, comp->_name); | |
1824 // delete not unique edges here | |
1825 fprintf(fp," for(unsigned i = 0; i < num%d; i++) {\n", i); | |
1826 fprintf(fp," set_req(i + idx%d, _in[i + idx%d]);\n", new_num_opnds, i); | |
1827 fprintf(fp," }\n"); | |
1828 fprintf(fp," num%d = num%d;\n", new_num_opnds, i); | |
1829 fprintf(fp," idx%d = idx%d + num%d;\n", new_num_opnds+1, new_num_opnds, new_num_opnds); | |
1830 new_num_opnds++; | |
1831 } | |
1832 } | |
1833 // delete the rest of edges | |
1834 fprintf(fp," for(int i = idx%d - 1; i >= (int)idx%d; i--) {\n", cur_num_opnds, new_num_opnds); | |
603
dbbe28fc66b5
6778669: Patch from Red Hat -- fixes compilation errors
twisti
parents:
415
diff
changeset
|
1835 fprintf(fp," del_req(i);\n"); |
0 | 1836 fprintf(fp," }\n"); |
1837 fprintf(fp," _num_opnds = %d;\n", new_num_opnds); | |
785 | 1838 assert(new_num_opnds == node->num_unique_opnds(), "what?"); |
0 | 1839 } |
1840 } | |
1841 | |
2008 | 1842 // If the node is a MachConstantNode, insert the MachConstantBaseNode edge. |
1843 // NOTE: this edge must be the last input (see MachConstantNode::mach_constant_base_node_input). | |
14434
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
1844 // There are nodes that don't use $constantablebase, but still require that it |
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
1845 // is an input to the node. Example: divF_reg_immN, Repl32B_imm on x86_64. |
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
1846 if (node->is_mach_constant() || node->needs_constant_base()) { |
17791
ad3b94907eed
8030863: PPC64: (part 220): ConstantTableBase for calls between args and jvms
goetz
parents:
14444
diff
changeset
|
1847 if (node->is_ideal_call() != Form::invalid_type && |
ad3b94907eed
8030863: PPC64: (part 220): ConstantTableBase for calls between args and jvms
goetz
parents:
14444
diff
changeset
|
1848 node->is_ideal_call() != Form::JAVA_LEAF) { |
ad3b94907eed
8030863: PPC64: (part 220): ConstantTableBase for calls between args and jvms
goetz
parents:
14444
diff
changeset
|
1849 fprintf(fp, " // MachConstantBaseNode added in matcher.\n"); |
ad3b94907eed
8030863: PPC64: (part 220): ConstantTableBase for calls between args and jvms
goetz
parents:
14444
diff
changeset
|
1850 _needs_clone_jvms = true; |
ad3b94907eed
8030863: PPC64: (part 220): ConstantTableBase for calls between args and jvms
goetz
parents:
14444
diff
changeset
|
1851 } else { |
ad3b94907eed
8030863: PPC64: (part 220): ConstantTableBase for calls between args and jvms
goetz
parents:
14444
diff
changeset
|
1852 fprintf(fp, " add_req(C->mach_constant_base_node());\n"); |
ad3b94907eed
8030863: PPC64: (part 220): ConstantTableBase for calls between args and jvms
goetz
parents:
14444
diff
changeset
|
1853 } |
2008 | 1854 } |
1855 | |
17791
ad3b94907eed
8030863: PPC64: (part 220): ConstantTableBase for calls between args and jvms
goetz
parents:
14444
diff
changeset
|
1856 fprintf(fp, "\n"); |
ad3b94907eed
8030863: PPC64: (part 220): ConstantTableBase for calls between args and jvms
goetz
parents:
14444
diff
changeset
|
1857 if (node->expands()) { |
ad3b94907eed
8030863: PPC64: (part 220): ConstantTableBase for calls between args and jvms
goetz
parents:
14444
diff
changeset
|
1858 fprintf(fp, " return result;\n"); |
0 | 1859 } else { |
17791
ad3b94907eed
8030863: PPC64: (part 220): ConstantTableBase for calls between args and jvms
goetz
parents:
14444
diff
changeset
|
1860 fprintf(fp, " return this;\n"); |
0 | 1861 } |
17791
ad3b94907eed
8030863: PPC64: (part 220): ConstantTableBase for calls between args and jvms
goetz
parents:
14444
diff
changeset
|
1862 fprintf(fp, "}\n"); |
ad3b94907eed
8030863: PPC64: (part 220): ConstantTableBase for calls between args and jvms
goetz
parents:
14444
diff
changeset
|
1863 fprintf(fp, "\n"); |
0 | 1864 } |
1865 | |
1866 | |
1867 //------------------------------Emit Routines---------------------------------- | |
1868 // Special classes and routines for defining node emit routines which output | |
1869 // target specific instruction object encodings. | |
1870 // Define the ___Node::emit() routine | |
1871 // | |
1872 // (1) void ___Node::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { | |
1873 // (2) // ... encoding defined by user | |
1874 // (3) | |
1875 // (4) } | |
1876 // | |
1877 | |
1878 class DefineEmitState { | |
1879 private: | |
1880 enum reloc_format { RELOC_NONE = -1, | |
1881 RELOC_IMMEDIATE = 0, | |
1882 RELOC_DISP = 1, | |
1883 RELOC_CALL_DISP = 2 }; | |
1884 enum literal_status{ LITERAL_NOT_SEEN = 0, | |
1885 LITERAL_SEEN = 1, | |
1886 LITERAL_ACCESSED = 2, | |
1887 LITERAL_OUTPUT = 3 }; | |
1888 // Temporaries that describe current operand | |
1889 bool _cleared; | |
1890 OpClassForm *_opclass; | |
1891 OperandForm *_operand; | |
1892 int _operand_idx; | |
1893 const char *_local_name; | |
1894 const char *_operand_name; | |
1895 bool _doing_disp; | |
1896 bool _doing_constant; | |
1897 Form::DataType _constant_type; | |
1898 DefineEmitState::literal_status _constant_status; | |
1899 DefineEmitState::literal_status _reg_status; | |
1900 bool _doing_emit8; | |
1901 bool _doing_emit_d32; | |
1902 bool _doing_emit_d16; | |
1903 bool _doing_emit_hi; | |
1904 bool _doing_emit_lo; | |
1905 bool _may_reloc; | |
1906 reloc_format _reloc_form; | |
1907 const char * _reloc_type; | |
1908 bool _processing_noninput; | |
1909 | |
1910 NameList _strings_to_emit; | |
1911 | |
1912 // Stable state, set by constructor | |
1913 ArchDesc &_AD; | |
1914 FILE *_fp; | |
1915 EncClass &_encoding; | |
1916 InsEncode &_ins_encode; | |
1917 InstructForm &_inst; | |
1918 | |
1919 public: | |
1920 DefineEmitState(FILE *fp, ArchDesc &AD, EncClass &encoding, | |
1921 InsEncode &ins_encode, InstructForm &inst) | |
1922 : _AD(AD), _fp(fp), _encoding(encoding), _ins_encode(ins_encode), _inst(inst) { | |
1923 clear(); | |
1924 } | |
1925 | |
1926 void clear() { | |
1927 _cleared = true; | |
1928 _opclass = NULL; | |
1929 _operand = NULL; | |
1930 _operand_idx = 0; | |
1931 _local_name = ""; | |
1932 _operand_name = ""; | |
1933 _doing_disp = false; | |
1934 _doing_constant= false; | |
1935 _constant_type = Form::none; | |
1936 _constant_status = LITERAL_NOT_SEEN; | |
1937 _reg_status = LITERAL_NOT_SEEN; | |
1938 _doing_emit8 = false; | |
1939 _doing_emit_d32= false; | |
1940 _doing_emit_d16= false; | |
1941 _doing_emit_hi = false; | |
1942 _doing_emit_lo = false; | |
1943 _may_reloc = false; | |
1944 _reloc_form = RELOC_NONE; | |
1945 _reloc_type = AdlcVMDeps::none_reloc_type(); | |
1946 _strings_to_emit.clear(); | |
1947 } | |
1948 | |
1949 // Track necessary state when identifying a replacement variable | |
6850 | 1950 // @arg rep_var: The formal parameter of the encoding. |
0 | 1951 void update_state(const char *rep_var) { |
1952 // A replacement variable or one of its subfields | |
1953 // Obtain replacement variable from list | |
1954 if ( (*rep_var) != '$' ) { | |
1955 // A replacement variable, '$' prefix | |
1956 // check_rep_var( rep_var ); | |
1957 if ( Opcode::as_opcode_type(rep_var) != Opcode::NOT_AN_OPCODE ) { | |
1958 // No state needed. | |
1959 assert( _opclass == NULL, | |
1960 "'primary', 'secondary' and 'tertiary' don't follow operand."); | |
2008 | 1961 } |
1962 else if ((strcmp(rep_var, "constanttablebase") == 0) || | |
1963 (strcmp(rep_var, "constantoffset") == 0) || | |
1964 (strcmp(rep_var, "constantaddress") == 0)) { | |
14434
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
1965 if (!(_inst.is_mach_constant() || _inst.needs_constant_base())) { |
2008 | 1966 _AD.syntax_err(_encoding._linenum, |
14434
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
1967 "Replacement variable %s not allowed in instruct %s (only in MachConstantNode or MachCall).\n", |
2008 | 1968 rep_var, _encoding._name); |
1969 } | |
1970 } | |
1971 else { | |
6850 | 1972 // Lookup its position in (formal) parameter list of encoding |
0 | 1973 int param_no = _encoding.rep_var_index(rep_var); |
1974 if ( param_no == -1 ) { | |
1975 _AD.syntax_err( _encoding._linenum, | |
1976 "Replacement variable %s not found in enc_class %s.\n", | |
1977 rep_var, _encoding._name); | |
1978 } | |
1979 | |
1980 // Lookup the corresponding ins_encode parameter | |
6850 | 1981 // This is the argument (actual parameter) to the encoding. |
0 | 1982 const char *inst_rep_var = _ins_encode.rep_var_name(_inst, param_no); |
1983 if (inst_rep_var == NULL) { | |
1984 _AD.syntax_err( _ins_encode._linenum, | |
1985 "Parameter %s not passed to enc_class %s from instruct %s.\n", | |
1986 rep_var, _encoding._name, _inst._ident); | |
1987 } | |
1988 | |
1989 // Check if instruction's actual parameter is a local name in the instruction | |
1990 const Form *local = _inst._localNames[inst_rep_var]; | |
1991 OpClassForm *opc = (local != NULL) ? local->is_opclass() : NULL; | |
1992 // Note: assert removed to allow constant and symbolic parameters | |
1993 // assert( opc, "replacement variable was not found in local names"); | |
1994 // Lookup the index position iff the replacement variable is a localName | |
1995 int idx = (opc != NULL) ? _inst.operand_position_format(inst_rep_var) : -1; | |
1996 | |
1997 if ( idx != -1 ) { | |
1998 // This is a local in the instruction | |
1999 // Update local state info. | |
2000 _opclass = opc; | |
2001 _operand_idx = idx; | |
2002 _local_name = rep_var; | |
2003 _operand_name = inst_rep_var; | |
2004 | |
2005 // !!!!! | |
2006 // Do not support consecutive operands. | |
2007 assert( _operand == NULL, "Unimplemented()"); | |
2008 _operand = opc->is_operand(); | |
2009 } | |
2010 else if( ADLParser::is_literal_constant(inst_rep_var) ) { | |
2011 // Instruction provided a constant expression | |
2012 // Check later that encoding specifies $$$constant to resolve as constant | |
2013 _constant_status = LITERAL_SEEN; | |
2014 } | |
2015 else if( Opcode::as_opcode_type(inst_rep_var) != Opcode::NOT_AN_OPCODE ) { | |
2016 // Instruction provided an opcode: "primary", "secondary", "tertiary" | |
2017 // Check later that encoding specifies $$$constant to resolve as constant | |
2018 _constant_status = LITERAL_SEEN; | |
2019 } | |
2020 else if((_AD.get_registers() != NULL ) && (_AD.get_registers()->getRegDef(inst_rep_var) != NULL)) { | |
2021 // Instruction provided a literal register name for this parameter | |
2022 // Check that encoding specifies $$$reg to resolve.as register. | |
2023 _reg_status = LITERAL_SEEN; | |
2024 } | |
2025 else { | |
2026 // Check for unimplemented functionality before hard failure | |
2027 assert( strcmp(opc->_ident,"label")==0, "Unimplemented() Label"); | |
2028 assert( false, "ShouldNotReachHere()"); | |
2029 } | |
2030 } // done checking which operand this is. | |
2031 } else { | |
2032 // | |
2033 // A subfield variable, '$$' prefix | |
2034 // Check for fields that may require relocation information. | |
2035 // Then check that literal register parameters are accessed with 'reg' or 'constant' | |
2036 // | |
2037 if ( strcmp(rep_var,"$disp") == 0 ) { | |
2038 _doing_disp = true; | |
2039 assert( _opclass, "Must use operand or operand class before '$disp'"); | |
2040 if( _operand == NULL ) { | |
2041 // Only have an operand class, generate run-time check for relocation | |
2042 _may_reloc = true; | |
2043 _reloc_form = RELOC_DISP; | |
2044 _reloc_type = AdlcVMDeps::oop_reloc_type(); | |
2045 } else { | |
2046 // Do precise check on operand: is it a ConP or not | |
2047 // | |
2048 // Check interface for value of displacement | |
2049 assert( ( _operand->_interface != NULL ), | |
2050 "$disp can only follow memory interface operand"); | |
2051 MemInterface *mem_interface= _operand->_interface->is_MemInterface(); | |
2052 assert( mem_interface != NULL, | |
2053 "$disp can only follow memory interface operand"); | |
2054 const char *disp = mem_interface->_disp; | |
2055 | |
2056 if( disp != NULL && (*disp == '$') ) { | |
2057 // MemInterface::disp contains a replacement variable, | |
2058 // Check if this matches a ConP | |
2059 // | |
2060 // Lookup replacement variable, in operand's component list | |
2061 const char *rep_var_name = disp + 1; // Skip '$' | |
2062 const Component *comp = _operand->_components.search(rep_var_name); | |
2063 assert( comp != NULL,"Replacement variable not found in components"); | |
2064 const char *type = comp->_type; | |
2065 // Lookup operand form for replacement variable's type | |
2066 const Form *form = _AD.globalNames()[type]; | |
2067 assert( form != NULL, "Replacement variable's type not found"); | |
2068 OperandForm *op = form->is_operand(); | |
2069 assert( op, "Attempting to emit a non-register or non-constant"); | |
2070 // Check if this is a constant | |
2071 if (op->_matrule && op->_matrule->is_base_constant(_AD.globalNames())) { | |
2072 // Check which constant this name maps to: _c0, _c1, ..., _cn | |
2073 // const int idx = _operand.constant_position(_AD.globalNames(), comp); | |
2074 // assert( idx != -1, "Constant component not found in operand"); | |
2075 Form::DataType dtype = op->is_base_constant(_AD.globalNames()); | |
2076 if ( dtype == Form::idealP ) { | |
2077 _may_reloc = true; | |
2078 // No longer true that idealP is always an oop | |
2079 _reloc_form = RELOC_DISP; | |
2080 _reloc_type = AdlcVMDeps::oop_reloc_type(); | |
2081 } | |
2082 } | |
2083 | |
2084 else if( _operand->is_user_name_for_sReg() != Form::none ) { | |
2085 // The only non-constant allowed access to disp is an operand sRegX in a stackSlotX | |
2086 assert( op->ideal_to_sReg_type(type) != Form::none, "StackSlots access displacements using 'sRegs'"); | |
2087 _may_reloc = false; | |
2088 } else { | |
2089 assert( false, "fatal(); Only stackSlots can access a non-constant using 'disp'"); | |
2090 } | |
2091 } | |
2092 } // finished with precise check of operand for relocation. | |
2093 } // finished with subfield variable | |
2094 else if ( strcmp(rep_var,"$constant") == 0 ) { | |
2095 _doing_constant = true; | |
2096 if ( _constant_status == LITERAL_NOT_SEEN ) { | |
2097 // Check operand for type of constant | |
2098 assert( _operand, "Must use operand before '$$constant'"); | |
2099 Form::DataType dtype = _operand->is_base_constant(_AD.globalNames()); | |
2100 _constant_type = dtype; | |
2101 if ( dtype == Form::idealP ) { | |
2102 _may_reloc = true; | |
2103 // No longer true that idealP is always an oop | |
2104 // // _must_reloc = true; | |
2105 _reloc_form = RELOC_IMMEDIATE; | |
2106 _reloc_type = AdlcVMDeps::oop_reloc_type(); | |
2107 } else { | |
2108 // No relocation information needed | |
2109 } | |
2110 } else { | |
2111 // User-provided literals may not require relocation information !!!!! | |
2112 assert( _constant_status == LITERAL_SEEN, "Must know we are processing a user-provided literal"); | |
2113 } | |
2114 } | |
2115 else if ( strcmp(rep_var,"$label") == 0 ) { | |
2116 // Calls containing labels require relocation | |
2117 if ( _inst.is_ideal_call() ) { | |
2118 _may_reloc = true; | |
2119 // !!!!! !!!!! | |
2120 _reloc_type = AdlcVMDeps::none_reloc_type(); | |
2121 } | |
2122 } | |
2123 | |
2124 // literal register parameter must be accessed as a 'reg' field. | |
2125 if ( _reg_status != LITERAL_NOT_SEEN ) { | |
2126 assert( _reg_status == LITERAL_SEEN, "Must have seen register literal before now"); | |
2127 if (strcmp(rep_var,"$reg") == 0 || reg_conversion(rep_var) != NULL) { | |
2128 _reg_status = LITERAL_ACCESSED; | |
2129 } else { | |
14431
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
2130 _AD.syntax_err(_encoding._linenum, |
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
2131 "Invalid access to literal register parameter '%s' in %s.\n", |
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
2132 rep_var, _encoding._name); |
0 | 2133 assert( false, "invalid access to literal register parameter"); |
2134 } | |
2135 } | |
2136 // literal constant parameters must be accessed as a 'constant' field | |
14431
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
2137 if (_constant_status != LITERAL_NOT_SEEN) { |
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
2138 assert(_constant_status == LITERAL_SEEN, "Must have seen constant literal before now"); |
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
2139 if (strcmp(rep_var,"$constant") == 0) { |
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
2140 _constant_status = LITERAL_ACCESSED; |
0 | 2141 } else { |
14431
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
2142 _AD.syntax_err(_encoding._linenum, |
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
2143 "Invalid access to literal constant parameter '%s' in %s.\n", |
1410ad6b05f1
8028401: PPC (part 117): Improve usability of adlc and format() functionality.
goetz
parents:
14428
diff
changeset
|
2144 rep_var, _encoding._name); |
0 | 2145 } |
2146 } | |
2147 } // end replacement and/or subfield | |
2148 | |
2149 } | |
2150 | |
2151 void add_rep_var(const char *rep_var) { | |
2152 // Handle subfield and replacement variables. | |
2153 if ( ( *rep_var == '$' ) && ( *(rep_var+1) == '$' ) ) { | |
2154 // Check for emit prefix, '$$emit32' | |
2155 assert( _cleared, "Can not nest $$$emit32"); | |
2156 if ( strcmp(rep_var,"$$emit32") == 0 ) { | |
2157 _doing_emit_d32 = true; | |
2158 } | |
2159 else if ( strcmp(rep_var,"$$emit16") == 0 ) { | |
2160 _doing_emit_d16 = true; | |
2161 } | |
2162 else if ( strcmp(rep_var,"$$emit_hi") == 0 ) { | |
2163 _doing_emit_hi = true; | |
2164 } | |
2165 else if ( strcmp(rep_var,"$$emit_lo") == 0 ) { | |
2166 _doing_emit_lo = true; | |
2167 } | |
2168 else if ( strcmp(rep_var,"$$emit8") == 0 ) { | |
2169 _doing_emit8 = true; | |
2170 } | |
2171 else { | |
2172 _AD.syntax_err(_encoding._linenum, "Unsupported $$operation '%s'\n",rep_var); | |
2173 assert( false, "fatal();"); | |
2174 } | |
2175 } | |
2176 else { | |
2177 // Update state for replacement variables | |
2178 update_state( rep_var ); | |
2179 _strings_to_emit.addName(rep_var); | |
2180 } | |
2181 _cleared = false; | |
2182 } | |
2183 | |
2184 void emit_replacement() { | |
2185 // A replacement variable or one of its subfields | |
2186 // Obtain replacement variable from list | |
2187 // const char *ec_rep_var = encoding->_rep_vars.iter(); | |
2188 const char *rep_var; | |
2189 _strings_to_emit.reset(); | |
2190 while ( (rep_var = _strings_to_emit.iter()) != NULL ) { | |
2191 | |
2192 if ( (*rep_var) == '$' ) { | |
2193 // A subfield variable, '$$' prefix | |
2194 emit_field( rep_var ); | |
2195 } else { | |
624 | 2196 if (_strings_to_emit.peek() != NULL && |
2197 strcmp(_strings_to_emit.peek(), "$Address") == 0) { | |
2198 fprintf(_fp, "Address::make_raw("); | |
2199 | |
2200 emit_rep_var( rep_var ); | |
2201 fprintf(_fp,"->base(ra_,this,idx%d), ", _operand_idx); | |
2202 | |
2203 _reg_status = LITERAL_ACCESSED; | |
2204 emit_rep_var( rep_var ); | |
2205 fprintf(_fp,"->index(ra_,this,idx%d), ", _operand_idx); | |
2206 | |
2207 _reg_status = LITERAL_ACCESSED; | |
2208 emit_rep_var( rep_var ); | |
2209 fprintf(_fp,"->scale(), "); | |
2210 | |
2211 _reg_status = LITERAL_ACCESSED; | |
2212 emit_rep_var( rep_var ); | |
2213 Form::DataType stack_type = _operand ? _operand->is_user_name_for_sReg() : Form::none; | |
2214 if( _operand && _operand_idx==0 && stack_type != Form::none ) { | |
2215 fprintf(_fp,"->disp(ra_,this,0), "); | |
2216 } else { | |
2217 fprintf(_fp,"->disp(ra_,this,idx%d), ", _operand_idx); | |
2218 } | |
2219 | |
2220 _reg_status = LITERAL_ACCESSED; | |
2221 emit_rep_var( rep_var ); | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
4121
diff
changeset
|
2222 fprintf(_fp,"->disp_reloc())"); |
624 | 2223 |
2224 // skip trailing $Address | |
2225 _strings_to_emit.iter(); | |
2226 } else { | |
2227 // A replacement variable, '$' prefix | |
2228 const char* next = _strings_to_emit.peek(); | |
2229 const char* next2 = _strings_to_emit.peek(2); | |
2230 if (next != NULL && next2 != NULL && strcmp(next2, "$Register") == 0 && | |
2231 (strcmp(next, "$base") == 0 || strcmp(next, "$index") == 0)) { | |
2232 // handle $rev_var$$base$$Register and $rev_var$$index$$Register by | |
2233 // producing as_Register(opnd_array(#)->base(ra_,this,idx1)). | |
2234 fprintf(_fp, "as_Register("); | |
2235 // emit the operand reference | |
2236 emit_rep_var( rep_var ); | |
2237 rep_var = _strings_to_emit.iter(); | |
2238 assert(strcmp(rep_var, "$base") == 0 || strcmp(rep_var, "$index") == 0, "bad pattern"); | |
2239 // handle base or index | |
2240 emit_field(rep_var); | |
2241 rep_var = _strings_to_emit.iter(); | |
2242 assert(strcmp(rep_var, "$Register") == 0, "bad pattern"); | |
2243 // close up the parens | |
2244 fprintf(_fp, ")"); | |
2245 } else { | |
2246 emit_rep_var( rep_var ); | |
2247 } | |
2248 } | |
0 | 2249 } // end replacement and/or subfield |
2250 } | |
2251 } | |
2252 | |
2253 void emit_reloc_type(const char* type) { | |
2254 fprintf(_fp, "%s", type) | |
2255 ; | |
2256 } | |
2257 | |
2258 | |
2259 void emit() { | |
2260 // | |
2261 // "emit_d32_reloc(" or "emit_hi_reloc" or "emit_lo_reloc" | |
2262 // | |
2263 // Emit the function name when generating an emit function | |
2264 if ( _doing_emit_d32 || _doing_emit_hi || _doing_emit_lo ) { | |
2265 const char *d32_hi_lo = _doing_emit_d32 ? "d32" : (_doing_emit_hi ? "hi" : "lo"); | |
2266 // In general, relocatable isn't known at compiler compile time. | |
2267 // Check results of prior scan | |
2268 if ( ! _may_reloc ) { | |
2269 // Definitely don't need relocation information | |
2270 fprintf( _fp, "emit_%s(cbuf, ", d32_hi_lo ); | |
2271 emit_replacement(); fprintf(_fp, ")"); | |
2272 } | |
2273 else { | |
2274 // Emit RUNTIME CHECK to see if value needs relocation info | |
2275 // If emitting a relocatable address, use 'emit_d32_reloc' | |
2276 const char *disp_constant = _doing_disp ? "disp" : _doing_constant ? "constant" : "INVALID"; | |
2277 assert( (_doing_disp || _doing_constant) | |
2278 && !(_doing_disp && _doing_constant), | |
2279 "Must be emitting either a displacement or a constant"); | |
2280 fprintf(_fp,"\n"); | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
4121
diff
changeset
|
2281 fprintf(_fp,"if ( opnd_array(%d)->%s_reloc() != relocInfo::none ) {\n", |
0 | 2282 _operand_idx, disp_constant); |
2283 fprintf(_fp," "); | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
4121
diff
changeset
|
2284 fprintf(_fp,"emit_%s_reloc(cbuf, ", d32_hi_lo ); |
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
4121
diff
changeset
|
2285 emit_replacement(); fprintf(_fp,", "); |
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
4121
diff
changeset
|
2286 fprintf(_fp,"opnd_array(%d)->%s_reloc(), ", |
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
4121
diff
changeset
|
2287 _operand_idx, disp_constant); |
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
4121
diff
changeset
|
2288 fprintf(_fp, "%d", _reloc_form);fprintf(_fp, ");"); |
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
4121
diff
changeset
|
2289 fprintf(_fp,"\n"); |
0 | 2290 fprintf(_fp,"} else {\n"); |
2291 fprintf(_fp," emit_%s(cbuf, ", d32_hi_lo); | |
2292 emit_replacement(); fprintf(_fp, ");\n"); fprintf(_fp,"}"); | |
2293 } | |
2294 } | |
2295 else if ( _doing_emit_d16 ) { | |
2296 // Relocation of 16-bit values is not supported | |
2297 fprintf(_fp,"emit_d16(cbuf, "); | |
2298 emit_replacement(); fprintf(_fp, ")"); | |
2299 // No relocation done for 16-bit values | |
2300 } | |
2301 else if ( _doing_emit8 ) { | |
2302 // Relocation of 8-bit values is not supported | |
2303 fprintf(_fp,"emit_d8(cbuf, "); | |
2304 emit_replacement(); fprintf(_fp, ")"); | |
2305 // No relocation done for 8-bit values | |
2306 } | |
2307 else { | |
2308 // Not an emit# command, just output the replacement string. | |
2309 emit_replacement(); | |
2310 } | |
2311 | |
2312 // Get ready for next state collection. | |
2313 clear(); | |
2314 } | |
2315 | |
2316 private: | |
2317 | |
2318 // recognizes names which represent MacroAssembler register types | |
2319 // and return the conversion function to build them from OptoReg | |
2320 const char* reg_conversion(const char* rep_var) { | |
2321 if (strcmp(rep_var,"$Register") == 0) return "as_Register"; | |
2322 if (strcmp(rep_var,"$FloatRegister") == 0) return "as_FloatRegister"; | |
2323 #if defined(IA32) || defined(AMD64) | |
2324 if (strcmp(rep_var,"$XMMRegister") == 0) return "as_XMMRegister"; | |
2325 #endif | |
14444
492e67693373
8029888: PPC64: (part 219): adl replacement variable CondRegister
goetz
parents:
14434
diff
changeset
|
2326 if (strcmp(rep_var,"$CondRegister") == 0) return "as_ConditionRegister"; |
0 | 2327 return NULL; |
2328 } | |
2329 | |
2330 void emit_field(const char *rep_var) { | |
2331 const char* reg_convert = reg_conversion(rep_var); | |
2332 | |
2333 // A subfield variable, '$$subfield' | |
2334 if ( strcmp(rep_var, "$reg") == 0 || reg_convert != NULL) { | |
2335 // $reg form or the $Register MacroAssembler type conversions | |
2336 assert( _operand_idx != -1, | |
2337 "Must use this subfield after operand"); | |
2338 if( _reg_status == LITERAL_NOT_SEEN ) { | |
2339 if (_processing_noninput) { | |
2340 const Form *local = _inst._localNames[_operand_name]; | |
2341 OperandForm *oper = local->is_operand(); | |
2342 const RegDef* first = oper->get_RegClass()->find_first_elem(); | |
2343 if (reg_convert != NULL) { | |
2344 fprintf(_fp, "%s(%s_enc)", reg_convert, first->_regname); | |
2345 } else { | |
2346 fprintf(_fp, "%s_enc", first->_regname); | |
2347 } | |
2348 } else { | |
2349 fprintf(_fp,"->%s(ra_,this", reg_convert != NULL ? reg_convert : "reg"); | |
2350 // Add parameter for index position, if not result operand | |
2351 if( _operand_idx != 0 ) fprintf(_fp,",idx%d", _operand_idx); | |
2352 fprintf(_fp,")"); | |
6850 | 2353 fprintf(_fp, "/* %s */", _operand_name); |
0 | 2354 } |
2355 } else { | |
2356 assert( _reg_status == LITERAL_OUTPUT, "should have output register literal in emit_rep_var"); | |
2357 // Register literal has already been sent to output file, nothing more needed | |
2358 } | |
2359 } | |
2360 else if ( strcmp(rep_var,"$base") == 0 ) { | |
2361 assert( _operand_idx != -1, | |
2362 "Must use this subfield after operand"); | |
2363 assert( ! _may_reloc, "UnImplemented()"); | |
2364 fprintf(_fp,"->base(ra_,this,idx%d)", _operand_idx); | |
2365 } | |
2366 else if ( strcmp(rep_var,"$index") == 0 ) { | |
2367 assert( _operand_idx != -1, | |
2368 "Must use this subfield after operand"); | |
2369 assert( ! _may_reloc, "UnImplemented()"); | |
2370 fprintf(_fp,"->index(ra_,this,idx%d)", _operand_idx); | |
2371 } | |
2372 else if ( strcmp(rep_var,"$scale") == 0 ) { | |
2373 assert( ! _may_reloc, "UnImplemented()"); | |
2374 fprintf(_fp,"->scale()"); | |
2375 } | |
2376 else if ( strcmp(rep_var,"$cmpcode") == 0 ) { | |
2377 assert( ! _may_reloc, "UnImplemented()"); | |
2378 fprintf(_fp,"->ccode()"); | |
2379 } | |
2380 else if ( strcmp(rep_var,"$constant") == 0 ) { | |
2381 if( _constant_status == LITERAL_NOT_SEEN ) { | |
2382 if ( _constant_type == Form::idealD ) { | |
2383 fprintf(_fp,"->constantD()"); | |
2384 } else if ( _constant_type == Form::idealF ) { | |
2385 fprintf(_fp,"->constantF()"); | |
2386 } else if ( _constant_type == Form::idealL ) { | |
2387 fprintf(_fp,"->constantL()"); | |
2388 } else { | |
2389 fprintf(_fp,"->constant()"); | |
2390 } | |
2391 } else { | |
2392 assert( _constant_status == LITERAL_OUTPUT, "should have output constant literal in emit_rep_var"); | |
6850 | 2393 // Constant literal has already been sent to output file, nothing more needed |
0 | 2394 } |
2395 } | |
2396 else if ( strcmp(rep_var,"$disp") == 0 ) { | |
2397 Form::DataType stack_type = _operand ? _operand->is_user_name_for_sReg() : Form::none; | |
2398 if( _operand && _operand_idx==0 && stack_type != Form::none ) { | |
2399 fprintf(_fp,"->disp(ra_,this,0)"); | |
2400 } else { | |
2401 fprintf(_fp,"->disp(ra_,this,idx%d)", _operand_idx); | |
2402 } | |
2403 } | |
2404 else if ( strcmp(rep_var,"$label") == 0 ) { | |
2405 fprintf(_fp,"->label()"); | |
2406 } | |
2407 else if ( strcmp(rep_var,"$method") == 0 ) { | |
2408 fprintf(_fp,"->method()"); | |
2409 } | |
2410 else { | |
2411 printf("emit_field: %s\n",rep_var); | |
6850 | 2412 globalAD->syntax_err(_inst._linenum, "Unknown replacement variable %s in format statement of %s.", |
2413 rep_var, _inst._ident); | |
0 | 2414 assert( false, "UnImplemented()"); |
2415 } | |
2416 } | |
2417 | |
2418 | |
2419 void emit_rep_var(const char *rep_var) { | |
2420 _processing_noninput = false; | |
2421 // A replacement variable, originally '$' | |
2422 if ( Opcode::as_opcode_type(rep_var) != Opcode::NOT_AN_OPCODE ) { | |
415
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2423 if (!_inst._opcode->print_opcode(_fp, Opcode::as_opcode_type(rep_var) )) { |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2424 // Missing opcode |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2425 _AD.syntax_err( _inst._linenum, |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2426 "Missing $%s opcode definition in %s, used by encoding %s\n", |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2427 rep_var, _inst._ident, _encoding._name); |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2428 } |
0 | 2429 } |
2008 | 2430 else if (strcmp(rep_var, "constanttablebase") == 0) { |
2431 fprintf(_fp, "as_Register(ra_->get_encode(in(mach_constant_base_node_input())))"); | |
2432 } | |
2433 else if (strcmp(rep_var, "constantoffset") == 0) { | |
2434 fprintf(_fp, "constant_offset()"); | |
2435 } | |
2436 else if (strcmp(rep_var, "constantaddress") == 0) { | |
2437 fprintf(_fp, "InternalAddress(__ code()->consts()->start() + constant_offset())"); | |
2438 } | |
0 | 2439 else { |
2440 // Lookup its position in parameter list | |
2441 int param_no = _encoding.rep_var_index(rep_var); | |
2442 if ( param_no == -1 ) { | |
2443 _AD.syntax_err( _encoding._linenum, | |
2444 "Replacement variable %s not found in enc_class %s.\n", | |
2445 rep_var, _encoding._name); | |
2446 } | |
2447 // Lookup the corresponding ins_encode parameter | |
2448 const char *inst_rep_var = _ins_encode.rep_var_name(_inst, param_no); | |
2449 | |
2450 // Check if instruction's actual parameter is a local name in the instruction | |
2451 const Form *local = _inst._localNames[inst_rep_var]; | |
2452 OpClassForm *opc = (local != NULL) ? local->is_opclass() : NULL; | |
2453 // Note: assert removed to allow constant and symbolic parameters | |
2454 // assert( opc, "replacement variable was not found in local names"); | |
2455 // Lookup the index position iff the replacement variable is a localName | |
2456 int idx = (opc != NULL) ? _inst.operand_position_format(inst_rep_var) : -1; | |
2457 if( idx != -1 ) { | |
2458 if (_inst.is_noninput_operand(idx)) { | |
2459 // This operand isn't a normal input so printing it is done | |
2460 // specially. | |
2461 _processing_noninput = true; | |
2462 } else { | |
2463 // Output the emit code for this operand | |
2464 fprintf(_fp,"opnd_array(%d)",idx); | |
2465 } | |
2466 assert( _operand == opc->is_operand(), | |
2467 "Previous emit $operand does not match current"); | |
2468 } | |
2469 else if( ADLParser::is_literal_constant(inst_rep_var) ) { | |
2470 // else check if it is a constant expression | |
2471 // Removed following assert to allow primitive C types as arguments to encodings | |
2472 // assert( _constant_status == LITERAL_ACCESSED, "Must be processing a literal constant parameter"); | |
2473 fprintf(_fp,"(%s)", inst_rep_var); | |
2474 _constant_status = LITERAL_OUTPUT; | |
2475 } | |
2476 else if( Opcode::as_opcode_type(inst_rep_var) != Opcode::NOT_AN_OPCODE ) { | |
2477 // else check if "primary", "secondary", "tertiary" | |
2478 assert( _constant_status == LITERAL_ACCESSED, "Must be processing a literal constant parameter"); | |
415
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2479 if (!_inst._opcode->print_opcode(_fp, Opcode::as_opcode_type(inst_rep_var) )) { |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2480 // Missing opcode |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2481 _AD.syntax_err( _inst._linenum, |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2482 "Missing $%s opcode definition in %s\n", |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2483 rep_var, _inst._ident); |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2484 |
4d9884b01ba6
6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
never
parents:
196
diff
changeset
|
2485 } |
0 | 2486 _constant_status = LITERAL_OUTPUT; |
2487 } | |
2488 else if((_AD.get_registers() != NULL ) && (_AD.get_registers()->getRegDef(inst_rep_var) != NULL)) { | |
2489 // Instruction provided a literal register name for this parameter | |
2490 // Check that encoding specifies $$$reg to resolve.as register. | |
2491 assert( _reg_status == LITERAL_ACCESSED, "Must be processing a literal register parameter"); | |
2492 fprintf(_fp,"(%s_enc)", inst_rep_var); | |
2493 _reg_status = LITERAL_OUTPUT; | |
2494 } | |
2495 else { | |
2496 // Check for unimplemented functionality before hard failure | |
2497 assert( strcmp(opc->_ident,"label")==0, "Unimplemented() Label"); | |
2498 assert( false, "ShouldNotReachHere()"); | |
2499 } | |
2500 // all done | |
2501 } | |
2502 } | |
2503 | |
2504 }; // end class DefineEmitState | |
2505 | |
2506 | |
2507 void ArchDesc::defineSize(FILE *fp, InstructForm &inst) { | |
2508 | |
2509 //(1) | |
2510 // Output instruction's emit prototype | |
6850 | 2511 fprintf(fp,"uint %sNode::size(PhaseRegAlloc *ra_) const {\n", |
0 | 2512 inst._ident); |
2513 | |
6850 | 2514 fprintf(fp, " assert(VerifyOops || MachNode::size(ra_) <= %s, \"bad fixed size\");\n", inst._size); |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
2515 |
0 | 2516 //(2) |
2517 // Print the size | |
6850 | 2518 fprintf(fp, " return (VerifyOops ? MachNode::size(ra_) : %s);\n", inst._size); |
0 | 2519 |
2520 // (3) and (4) | |
14428
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2521 fprintf(fp,"}\n\n"); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2522 } |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2523 |
17797 | 2524 // Emit postalloc expand function. |
14428
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2525 void ArchDesc::define_postalloc_expand(FILE *fp, InstructForm &inst) { |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2526 InsEncode *ins_encode = inst._insencode; |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2527 |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2528 // Output instruction's postalloc_expand prototype. |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2529 fprintf(fp, "void %sNode::postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_) {\n", |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2530 inst._ident); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2531 |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2532 assert((_encode != NULL) && (ins_encode != NULL), "You must define an encode section."); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2533 |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2534 // Output each operand's offset into the array of registers. |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2535 inst.index_temps(fp, _globalNames); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2536 |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2537 // Output variables "unsigned idx_<par_name>", Node *n_<par_name> and "MachOpnd *op_<par_name>" |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2538 // for each parameter <par_name> specified in the encoding. |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2539 ins_encode->reset(); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2540 const char *ec_name = ins_encode->encode_class_iter(); |
17797 | 2541 assert(ec_name != NULL, "Postalloc expand must specify an encoding."); |
14428
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2542 |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2543 EncClass *encoding = _encode->encClass(ec_name); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2544 if (encoding == NULL) { |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2545 fprintf(stderr, "User did not define contents of this encode_class: %s\n", ec_name); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2546 abort(); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2547 } |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2548 if (ins_encode->current_encoding_num_args() != encoding->num_args()) { |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2549 globalAD->syntax_err(ins_encode->_linenum, "In %s: passing %d arguments to %s but expecting %d", |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2550 inst._ident, ins_encode->current_encoding_num_args(), |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2551 ec_name, encoding->num_args()); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2552 } |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2553 |
17797 | 2554 fprintf(fp, " // Access to ins and operands for postalloc expand.\n"); |
14428
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2555 const int buflen = 2000; |
17797 | 2556 char idxbuf[buflen]; char *ib = idxbuf; idxbuf[0] = '\0'; |
2557 char nbuf [buflen]; char *nb = nbuf; nbuf[0] = '\0'; | |
2558 char opbuf [buflen]; char *ob = opbuf; opbuf[0] = '\0'; | |
14428
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2559 |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2560 encoding->_parameter_type.reset(); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2561 encoding->_parameter_name.reset(); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2562 const char *type = encoding->_parameter_type.iter(); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2563 const char *name = encoding->_parameter_name.iter(); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2564 int param_no = 0; |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2565 for (; (type != NULL) && (name != NULL); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2566 (type = encoding->_parameter_type.iter()), (name = encoding->_parameter_name.iter())) { |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2567 const char* arg_name = ins_encode->rep_var_name(inst, param_no); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2568 int idx = inst.operand_position_format(arg_name); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2569 if (strcmp(arg_name, "constanttablebase") == 0) { |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2570 ib += sprintf(ib, " unsigned idx_%-5s = mach_constant_base_node_input(); \t// %s, \t%s\n", |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2571 name, type, arg_name); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2572 nb += sprintf(nb, " Node *n_%-7s = lookup(idx_%s);\n", name, name); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2573 // There is no operand for the constanttablebase. |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2574 } else if (inst.is_noninput_operand(idx)) { |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2575 globalAD->syntax_err(inst._linenum, |
17797 | 2576 "In %s: you can not pass the non-input %s to a postalloc expand encoding.\n", |
14428
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2577 inst._ident, arg_name); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2578 } else { |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2579 ib += sprintf(ib, " unsigned idx_%-5s = idx%d; \t// %s, \t%s\n", |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2580 name, idx, type, arg_name); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2581 nb += sprintf(nb, " Node *n_%-7s = lookup(idx_%s);\n", name, name); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2582 ob += sprintf(ob, " %sOper *op_%s = (%sOper *)opnd_array(%d);\n", type, name, type, idx); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2583 } |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2584 param_no++; |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2585 } |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2586 assert(ib < &idxbuf[buflen-1] && nb < &nbuf[buflen-1] && ob < &opbuf[buflen-1], "buffer overflow"); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2587 |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2588 fprintf(fp, "%s", idxbuf); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2589 fprintf(fp, " Node *n_region = lookup(0);\n"); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2590 fprintf(fp, "%s%s", nbuf, opbuf); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2591 fprintf(fp, " Compile *C = ra_->C;\n"); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2592 |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2593 // Output this instruction's encodings. |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2594 fprintf(fp, " {"); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2595 const char *ec_code = NULL; |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2596 const char *ec_rep_var = NULL; |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2597 assert(encoding == _encode->encClass(ec_name), ""); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2598 |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2599 DefineEmitState pending(fp, *this, *encoding, *ins_encode, inst); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2600 encoding->_code.reset(); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2601 encoding->_rep_vars.reset(); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2602 // Process list of user-defined strings, |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2603 // and occurrences of replacement variables. |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2604 // Replacement Vars are pushed into a list and then output. |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2605 while ((ec_code = encoding->_code.iter()) != NULL) { |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2606 if (! encoding->_code.is_signal(ec_code)) { |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2607 // Emit pending code. |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2608 pending.emit(); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2609 pending.clear(); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2610 // Emit this code section. |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2611 fprintf(fp, "%s", ec_code); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2612 } else { |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2613 // A replacement variable or one of its subfields. |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2614 // Obtain replacement variable from list. |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2615 ec_rep_var = encoding->_rep_vars.iter(); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2616 pending.add_rep_var(ec_rep_var); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2617 } |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2618 } |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2619 // Emit pending code. |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2620 pending.emit(); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2621 pending.clear(); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2622 fprintf(fp, " }\n"); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2623 |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2624 fprintf(fp, "}\n\n"); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2625 |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2626 ec_name = ins_encode->encode_class_iter(); |
17797 | 2627 assert(ec_name == NULL, "Postalloc expand may only have one encoding."); |
0 | 2628 } |
2629 | |
2008 | 2630 // defineEmit ----------------------------------------------------------------- |
2631 void ArchDesc::defineEmit(FILE* fp, InstructForm& inst) { | |
2632 InsEncode* encode = inst._insencode; | |
0 | 2633 |
2634 // (1) | |
2635 // Output instruction's emit prototype | |
2008 | 2636 fprintf(fp, "void %sNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {\n", inst._ident); |
0 | 2637 |
2638 // If user did not define an encode section, | |
2639 // provide stub that does not generate any machine code. | |
2008 | 2640 if( (_encode == NULL) || (encode == NULL) ) { |
0 | 2641 fprintf(fp, " // User did not define an encode section.\n"); |
2008 | 2642 fprintf(fp, "}\n"); |
0 | 2643 return; |
2644 } | |
2645 | |
2646 // Save current instruction's starting address (helps with relocation). | |
2008 | 2647 fprintf(fp, " cbuf.set_insts_mark();\n"); |
2648 | |
2649 // For MachConstantNodes which are ideal jump nodes, fill the jump table. | |
2650 if (inst.is_mach_constant() && inst.is_ideal_jump()) { | |
2651 fprintf(fp, " ra_->C->constant_table().fill_jump_table(cbuf, (MachConstantNode*) this, _index2label);\n"); | |
2652 } | |
0 | 2653 |
2654 // Output each operand's offset into the array of registers. | |
2008 | 2655 inst.index_temps(fp, _globalNames); |
0 | 2656 |
2657 // Output this instruction's encodings | |
2658 const char *ec_name; | |
2659 bool user_defined = false; | |
2008 | 2660 encode->reset(); |
2661 while ((ec_name = encode->encode_class_iter()) != NULL) { | |
2662 fprintf(fp, " {\n"); | |
0 | 2663 // Output user-defined encoding |
2664 user_defined = true; | |
2665 | |
2666 const char *ec_code = NULL; | |
2667 const char *ec_rep_var = NULL; | |
2668 EncClass *encoding = _encode->encClass(ec_name); | |
2669 if (encoding == NULL) { | |
2670 fprintf(stderr, "User did not define contents of this encode_class: %s\n", ec_name); | |
2671 abort(); | |
2672 } | |
2673 | |
2008 | 2674 if (encode->current_encoding_num_args() != encoding->num_args()) { |
2675 globalAD->syntax_err(encode->_linenum, "In %s: passing %d arguments to %s but expecting %d", | |
2676 inst._ident, encode->current_encoding_num_args(), | |
0 | 2677 ec_name, encoding->num_args()); |
2678 } | |
2679 | |
2008 | 2680 DefineEmitState pending(fp, *this, *encoding, *encode, inst); |
0 | 2681 encoding->_code.reset(); |
2682 encoding->_rep_vars.reset(); | |
2683 // Process list of user-defined strings, | |
2684 // and occurrences of replacement variables. | |
2685 // Replacement Vars are pushed into a list and then output | |
2008 | 2686 while ((ec_code = encoding->_code.iter()) != NULL) { |
2687 if (!encoding->_code.is_signal(ec_code)) { | |
0 | 2688 // Emit pending code |
2689 pending.emit(); | |
2690 pending.clear(); | |
2691 // Emit this code section | |
2008 | 2692 fprintf(fp, "%s", ec_code); |
0 | 2693 } else { |
2694 // A replacement variable or one of its subfields | |
2695 // Obtain replacement variable from list | |
2696 ec_rep_var = encoding->_rep_vars.iter(); | |
2697 pending.add_rep_var(ec_rep_var); | |
2698 } | |
2699 } | |
2700 // Emit pending code | |
2701 pending.emit(); | |
2702 pending.clear(); | |
2008 | 2703 fprintf(fp, " }\n"); |
0 | 2704 } // end while instruction's encodings |
2705 | |
2706 // Check if user stated which encoding to user | |
2707 if ( user_defined == false ) { | |
2708 fprintf(fp, " // User did not define which encode class to use.\n"); | |
2709 } | |
2710 | |
2711 // (3) and (4) | |
6850 | 2712 fprintf(fp, "}\n\n"); |
2008 | 2713 } |
2714 | |
2715 // defineEvalConstant --------------------------------------------------------- | |
2716 void ArchDesc::defineEvalConstant(FILE* fp, InstructForm& inst) { | |
2717 InsEncode* encode = inst._constant; | |
2718 | |
2719 // (1) | |
2720 // Output instruction's emit prototype | |
2721 fprintf(fp, "void %sNode::eval_constant(Compile* C) {\n", inst._ident); | |
2722 | |
4114
6729bbc1fcd6
7003454: order constants in constant table by number of references in code
twisti
parents:
3853
diff
changeset
|
2723 // For ideal jump nodes, add a jump-table entry. |
2008 | 2724 if (inst.is_ideal_jump()) { |
4114
6729bbc1fcd6
7003454: order constants in constant table by number of references in code
twisti
parents:
3853
diff
changeset
|
2725 fprintf(fp, " _constant = C->constant_table().add_jump_table(this);\n"); |
2008 | 2726 } |
2727 | |
2728 // If user did not define an encode section, | |
2729 // provide stub that does not generate any machine code. | |
2730 if ((_encode == NULL) || (encode == NULL)) { | |
2731 fprintf(fp, " // User did not define an encode section.\n"); | |
2732 fprintf(fp, "}\n"); | |
2733 return; | |
2734 } | |
2735 | |
2736 // Output this instruction's encodings | |
2737 const char *ec_name; | |
2738 bool user_defined = false; | |
2739 encode->reset(); | |
2740 while ((ec_name = encode->encode_class_iter()) != NULL) { | |
2741 fprintf(fp, " {\n"); | |
2742 // Output user-defined encoding | |
2743 user_defined = true; | |
2744 | |
2745 const char *ec_code = NULL; | |
2746 const char *ec_rep_var = NULL; | |
2747 EncClass *encoding = _encode->encClass(ec_name); | |
2748 if (encoding == NULL) { | |
2749 fprintf(stderr, "User did not define contents of this encode_class: %s\n", ec_name); | |
2750 abort(); | |
2751 } | |
2752 | |
2753 if (encode->current_encoding_num_args() != encoding->num_args()) { | |
2754 globalAD->syntax_err(encode->_linenum, "In %s: passing %d arguments to %s but expecting %d", | |
2755 inst._ident, encode->current_encoding_num_args(), | |
2756 ec_name, encoding->num_args()); | |
2757 } | |
2758 | |
2759 DefineEmitState pending(fp, *this, *encoding, *encode, inst); | |
2760 encoding->_code.reset(); | |
2761 encoding->_rep_vars.reset(); | |
2762 // Process list of user-defined strings, | |
2763 // and occurrences of replacement variables. | |
2764 // Replacement Vars are pushed into a list and then output | |
2765 while ((ec_code = encoding->_code.iter()) != NULL) { | |
2766 if (!encoding->_code.is_signal(ec_code)) { | |
2767 // Emit pending code | |
2768 pending.emit(); | |
2769 pending.clear(); | |
2770 // Emit this code section | |
2771 fprintf(fp, "%s", ec_code); | |
2772 } else { | |
2773 // A replacement variable or one of its subfields | |
2774 // Obtain replacement variable from list | |
2775 ec_rep_var = encoding->_rep_vars.iter(); | |
2776 pending.add_rep_var(ec_rep_var); | |
2777 } | |
2778 } | |
2779 // Emit pending code | |
2780 pending.emit(); | |
2781 pending.clear(); | |
2782 fprintf(fp, " }\n"); | |
2783 } // end while instruction's encodings | |
2784 | |
2785 // Check if user stated which encoding to user | |
2786 if (user_defined == false) { | |
2787 fprintf(fp, " // User did not define which encode class to use.\n"); | |
2788 } | |
2789 | |
2790 // (3) and (4) | |
2791 fprintf(fp, "}\n"); | |
0 | 2792 } |
2793 | |
2794 // --------------------------------------------------------------------------- | |
2795 //--------Utilities to build MachOper and MachNode derived Classes------------ | |
2796 // --------------------------------------------------------------------------- | |
2797 | |
2798 //------------------------------Utilities to build Operand Classes------------ | |
2799 static void defineIn_RegMask(FILE *fp, FormDict &globals, OperandForm &oper) { | |
2800 uint num_edges = oper.num_edges(globals); | |
2801 if( num_edges != 0 ) { | |
2802 // Method header | |
2803 fprintf(fp, "const RegMask *%sOper::in_RegMask(int index) const {\n", | |
2804 oper._ident); | |
2805 | |
2806 // Assert that the index is in range. | |
2807 fprintf(fp, " assert(0 <= index && index < %d, \"index out of range\");\n", | |
2808 num_edges); | |
2809 | |
2810 // Figure out if all RegMasks are the same. | |
2811 const char* first_reg_class = oper.in_reg_class(0, globals); | |
2812 bool all_same = true; | |
2813 assert(first_reg_class != NULL, "did not find register mask"); | |
2814 | |
2815 for (uint index = 1; all_same && index < num_edges; index++) { | |
2816 const char* some_reg_class = oper.in_reg_class(index, globals); | |
2817 assert(some_reg_class != NULL, "did not find register mask"); | |
2818 if (strcmp(first_reg_class, some_reg_class) != 0) { | |
2819 all_same = false; | |
2820 } | |
2821 } | |
2822 | |
2823 if (all_same) { | |
2824 // Return the sole RegMask. | |
2825 if (strcmp(first_reg_class, "stack_slots") == 0) { | |
2826 fprintf(fp," return &(Compile::current()->FIRST_STACK_mask());\n"); | |
2827 } else { | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
2828 const char* first_reg_class_to_upper = toUpper(first_reg_class); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
2829 fprintf(fp," return &%s_mask();\n", first_reg_class_to_upper); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
2830 delete[] first_reg_class_to_upper; |
0 | 2831 } |
2832 } else { | |
2833 // Build a switch statement to return the desired mask. | |
2834 fprintf(fp," switch (index) {\n"); | |
2835 | |
2836 for (uint index = 0; index < num_edges; index++) { | |
2837 const char *reg_class = oper.in_reg_class(index, globals); | |
2838 assert(reg_class != NULL, "did not find register mask"); | |
2839 if( !strcmp(reg_class, "stack_slots") ) { | |
2840 fprintf(fp, " case %d: return &(Compile::current()->FIRST_STACK_mask());\n", index); | |
2841 } else { | |
9078
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
2842 const char* reg_class_to_upper = toUpper(reg_class); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
2843 fprintf(fp, " case %d: return &%s_mask();\n", index, reg_class_to_upper); |
705ef39fcaa9
8006016: Memory leak at hotspot/src/share/vm/adlc/output_c.cpp
neliasso
parents:
6850
diff
changeset
|
2844 delete[] reg_class_to_upper; |
0 | 2845 } |
2846 } | |
2847 fprintf(fp," }\n"); | |
2848 fprintf(fp," ShouldNotReachHere();\n"); | |
2849 fprintf(fp," return NULL;\n"); | |
2850 } | |
2851 | |
2852 // Method close | |
2853 fprintf(fp, "}\n\n"); | |
2854 } | |
2855 } | |
2856 | |
2857 // generate code to create a clone for a class derived from MachOper | |
2858 // | |
2859 // (0) MachOper *MachOperXOper::clone(Compile* C) const { | |
2860 // (1) return new (C) MachXOper( _ccode, _c0, _c1, ..., _cn); | |
2861 // (2) } | |
2862 // | |
2863 static void defineClone(FILE *fp, FormDict &globalNames, OperandForm &oper) { | |
6850 | 2864 fprintf(fp,"MachOper *%sOper::clone(Compile* C) const {\n", oper._ident); |
0 | 2865 // Check for constants that need to be copied over |
2866 const int num_consts = oper.num_consts(globalNames); | |
2867 const bool is_ideal_bool = oper.is_ideal_bool(); | |
2868 if( (num_consts > 0) ) { | |
6850 | 2869 fprintf(fp," return new (C) %sOper(", oper._ident); |
0 | 2870 // generate parameters for constants |
2871 int i = 0; | |
2872 fprintf(fp,"_c%d", i); | |
2873 for( i = 1; i < num_consts; ++i) { | |
2874 fprintf(fp,", _c%d", i); | |
2875 } | |
2876 // finish line (1) | |
2877 fprintf(fp,");\n"); | |
2878 } | |
2879 else { | |
2880 assert( num_consts == 0, "Currently support zero or one constant per operand clone function"); | |
6850 | 2881 fprintf(fp," return new (C) %sOper();\n", oper._ident); |
0 | 2882 } |
2883 // finish method | |
2884 fprintf(fp,"}\n"); | |
2885 } | |
2886 | |
2887 // Helper functions for bug 4796752, abstracted with minimal modification | |
2888 // from define_oper_interface() | |
2889 OperandForm *rep_var_to_operand(const char *encoding, OperandForm &oper, FormDict &globals) { | |
2890 OperandForm *op = NULL; | |
2891 // Check for replacement variable | |
2892 if( *encoding == '$' ) { | |
2893 // Replacement variable | |
2894 const char *rep_var = encoding + 1; | |
2895 // Lookup replacement variable, rep_var, in operand's component list | |
2896 const Component *comp = oper._components.search(rep_var); | |
2897 assert( comp != NULL, "Replacement variable not found in components"); | |
2898 // Lookup operand form for replacement variable's type | |
2899 const char *type = comp->_type; | |
2900 Form *form = (Form*)globals[type]; | |
2901 assert( form != NULL, "Replacement variable's type not found"); | |
2902 op = form->is_operand(); | |
2903 assert( op, "Attempting to emit a non-register or non-constant"); | |
2904 } | |
2905 | |
2906 return op; | |
2907 } | |
2908 | |
2909 int rep_var_to_constant_index(const char *encoding, OperandForm &oper, FormDict &globals) { | |
2910 int idx = -1; | |
2911 // Check for replacement variable | |
2912 if( *encoding == '$' ) { | |
2913 // Replacement variable | |
2914 const char *rep_var = encoding + 1; | |
2915 // Lookup replacement variable, rep_var, in operand's component list | |
2916 const Component *comp = oper._components.search(rep_var); | |
2917 assert( comp != NULL, "Replacement variable not found in components"); | |
2918 // Lookup operand form for replacement variable's type | |
2919 const char *type = comp->_type; | |
2920 Form *form = (Form*)globals[type]; | |
2921 assert( form != NULL, "Replacement variable's type not found"); | |
2922 OperandForm *op = form->is_operand(); | |
2923 assert( op, "Attempting to emit a non-register or non-constant"); | |
2924 // Check that this is a constant and find constant's index: | |
2925 if (op->_matrule && op->_matrule->is_base_constant(globals)) { | |
2926 idx = oper.constant_position(globals, comp); | |
2927 } | |
2928 } | |
2929 | |
2930 return idx; | |
2931 } | |
2932 | |
2933 bool is_regI(const char *encoding, OperandForm &oper, FormDict &globals ) { | |
2934 bool is_regI = false; | |
2935 | |
2936 OperandForm *op = rep_var_to_operand(encoding, oper, globals); | |
2937 if( op != NULL ) { | |
2938 // Check that this is a register | |
2939 if ( (op->_matrule && op->_matrule->is_base_register(globals)) ) { | |
2940 // Register | |
2941 const char* ideal = op->ideal_type(globals); | |
2942 is_regI = (ideal && (op->ideal_to_Reg_type(ideal) == Form::idealI)); | |
2943 } | |
2944 } | |
2945 | |
2946 return is_regI; | |
2947 } | |
2948 | |
2949 bool is_conP(const char *encoding, OperandForm &oper, FormDict &globals ) { | |
2950 bool is_conP = false; | |
2951 | |
2952 OperandForm *op = rep_var_to_operand(encoding, oper, globals); | |
2953 if( op != NULL ) { | |
2954 // Check that this is a constant pointer | |
2955 if (op->_matrule && op->_matrule->is_base_constant(globals)) { | |
2956 // Constant | |
2957 Form::DataType dtype = op->is_base_constant(globals); | |
2958 is_conP = (dtype == Form::idealP); | |
2959 } | |
2960 } | |
2961 | |
2962 return is_conP; | |
2963 } | |
2964 | |
2965 | |
2966 // Define a MachOper interface methods | |
2967 void ArchDesc::define_oper_interface(FILE *fp, OperandForm &oper, FormDict &globals, | |
2968 const char *name, const char *encoding) { | |
2969 bool emit_position = false; | |
2970 int position = -1; | |
2971 | |
2972 fprintf(fp," virtual int %s", name); | |
2973 // Generate access method for base, index, scale, disp, ... | |
2974 if( (strcmp(name,"base") == 0) || (strcmp(name,"index") == 0) ) { | |
2975 fprintf(fp,"(PhaseRegAlloc *ra_, const Node *node, int idx) const { \n"); | |
2976 emit_position = true; | |
2977 } else if ( (strcmp(name,"disp") == 0) ) { | |
2978 fprintf(fp,"(PhaseRegAlloc *ra_, const Node *node, int idx) const { \n"); | |
2979 } else { | |
14428
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
2980 fprintf(fp, "() const {\n"); |
0 | 2981 } |
2982 | |
2983 // Check for hexadecimal value OR replacement variable | |
2984 if( *encoding == '$' ) { | |
2985 // Replacement variable | |
2986 const char *rep_var = encoding + 1; | |
6850 | 2987 fprintf(fp," // Replacement variable: %s\n", encoding+1); |
0 | 2988 // Lookup replacement variable, rep_var, in operand's component list |
2989 const Component *comp = oper._components.search(rep_var); | |
2990 assert( comp != NULL, "Replacement variable not found in components"); | |
2991 // Lookup operand form for replacement variable's type | |
2992 const char *type = comp->_type; | |
2993 Form *form = (Form*)globals[type]; | |
2994 assert( form != NULL, "Replacement variable's type not found"); | |
2995 OperandForm *op = form->is_operand(); | |
2996 assert( op, "Attempting to emit a non-register or non-constant"); | |
2997 // Check that this is a register or a constant and generate code: | |
2998 if ( (op->_matrule && op->_matrule->is_base_register(globals)) ) { | |
2999 // Register | |
3000 int idx_offset = oper.register_position( globals, rep_var); | |
3001 position = idx_offset; | |
3002 fprintf(fp," return (int)ra_->get_encode(node->in(idx"); | |
3003 if ( idx_offset > 0 ) fprintf(fp, "+%d",idx_offset); | |
3004 fprintf(fp,"));\n"); | |
3005 } else if ( op->ideal_to_sReg_type(op->_ident) != Form::none ) { | |
3006 // StackSlot for an sReg comes either from input node or from self, when idx==0 | |
3007 fprintf(fp," if( idx != 0 ) {\n"); | |
6850 | 3008 fprintf(fp," // Access stack offset (register number) for input operand\n"); |
0 | 3009 fprintf(fp," return ra_->reg2offset(ra_->get_reg_first(node->in(idx)));/* sReg */\n"); |
3010 fprintf(fp," }\n"); | |
6850 | 3011 fprintf(fp," // Access stack offset (register number) from myself\n"); |
0 | 3012 fprintf(fp," return ra_->reg2offset(ra_->get_reg_first(node));/* sReg */\n"); |
3013 } else if (op->_matrule && op->_matrule->is_base_constant(globals)) { | |
3014 // Constant | |
3015 // Check which constant this name maps to: _c0, _c1, ..., _cn | |
3016 const int idx = oper.constant_position(globals, comp); | |
3017 assert( idx != -1, "Constant component not found in operand"); | |
3018 // Output code for this constant, type dependent. | |
3019 fprintf(fp," return (int)" ); | |
3020 oper.access_constant(fp, globals, (uint)idx /* , const_type */); | |
3021 fprintf(fp,";\n"); | |
3022 } else { | |
3023 assert( false, "Attempting to emit a non-register or non-constant"); | |
3024 } | |
3025 } | |
3026 else if( *encoding == '0' && *(encoding+1) == 'x' ) { | |
3027 // Hex value | |
6850 | 3028 fprintf(fp," return %s;\n", encoding); |
0 | 3029 } else { |
14428
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
3030 globalAD->syntax_err(oper._linenum, "In operand %s: Do not support this encode constant: '%s' for %s.", |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
3031 oper._ident, encoding, name); |
0 | 3032 assert( false, "Do not support octal or decimal encode constants"); |
3033 } | |
3034 fprintf(fp," }\n"); | |
3035 | |
3036 if( emit_position && (position != -1) && (oper.num_edges(globals) > 0) ) { | |
3037 fprintf(fp," virtual int %s_position() const { return %d; }\n", name, position); | |
3038 MemInterface *mem_interface = oper._interface->is_MemInterface(); | |
3039 const char *base = mem_interface->_base; | |
3040 const char *disp = mem_interface->_disp; | |
3041 if( emit_position && (strcmp(name,"base") == 0) | |
3042 && base != NULL && is_regI(base, oper, globals) | |
3043 && disp != NULL && is_conP(disp, oper, globals) ) { | |
3044 // Found a memory access using a constant pointer for a displacement | |
3045 // and a base register containing an integer offset. | |
3046 // In this case the base and disp are reversed with respect to what | |
3047 // is expected by MachNode::get_base_and_disp() and MachNode::adr_type(). | |
3048 // Provide a non-NULL return for disp_as_type() that will allow adr_type() | |
3049 // to correctly compute the access type for alias analysis. | |
3050 // | |
3051 // See BugId 4796752, operand indOffset32X in i486.ad | |
3052 int idx = rep_var_to_constant_index(disp, oper, globals); | |
3053 fprintf(fp," virtual const TypePtr *disp_as_type() const { return _c%d; }\n", idx); | |
3054 } | |
3055 } | |
3056 } | |
3057 | |
3058 // | |
3059 // Construct the method to copy _idx, inputs and operands to new node. | |
3060 static void define_fill_new_machnode(bool used, FILE *fp_cpp) { | |
3061 fprintf(fp_cpp, "\n"); | |
3062 fprintf(fp_cpp, "// Copy _idx, inputs and operands to new node\n"); | |
3063 fprintf(fp_cpp, "void MachNode::fill_new_machnode( MachNode* node, Compile* C) const {\n"); | |
3064 if( !used ) { | |
3065 fprintf(fp_cpp, " // This architecture does not have cisc or short branch instructions\n"); | |
3066 fprintf(fp_cpp, " ShouldNotCallThis();\n"); | |
3067 fprintf(fp_cpp, "}\n"); | |
3068 } else { | |
3069 // New node must use same node index for access through allocator's tables | |
3070 fprintf(fp_cpp, " // New node must use same node index\n"); | |
3071 fprintf(fp_cpp, " node->set_idx( _idx );\n"); | |
3072 // Copy machine-independent inputs | |
3073 fprintf(fp_cpp, " // Copy machine-independent inputs\n"); | |
3074 fprintf(fp_cpp, " for( uint j = 0; j < req(); j++ ) {\n"); | |
3075 fprintf(fp_cpp, " node->add_req(in(j));\n"); | |
3076 fprintf(fp_cpp, " }\n"); | |
3077 // Copy machine operands to new MachNode | |
3078 fprintf(fp_cpp, " // Copy my operands, except for cisc position\n"); | |
3079 fprintf(fp_cpp, " int nopnds = num_opnds();\n"); | |
3080 fprintf(fp_cpp, " assert( node->num_opnds() == (uint)nopnds, \"Must have same number of operands\");\n"); | |
3081 fprintf(fp_cpp, " MachOper **to = node->_opnds;\n"); | |
3082 fprintf(fp_cpp, " for( int i = 0; i < nopnds; i++ ) {\n"); | |
3083 fprintf(fp_cpp, " if( i != cisc_operand() ) \n"); | |
3084 fprintf(fp_cpp, " to[i] = _opnds[i]->clone(C);\n"); | |
3085 fprintf(fp_cpp, " }\n"); | |
3086 fprintf(fp_cpp, "}\n"); | |
3087 } | |
3088 fprintf(fp_cpp, "\n"); | |
3089 } | |
3090 | |
3091 //------------------------------defineClasses---------------------------------- | |
3092 // Define members of MachNode and MachOper classes based on | |
3093 // operand and instruction lists | |
3094 void ArchDesc::defineClasses(FILE *fp) { | |
3095 | |
3096 // Define the contents of an array containing the machine register names | |
3097 defineRegNames(fp, _register); | |
3098 // Define an array containing the machine register encoding values | |
3099 defineRegEncodes(fp, _register); | |
3100 // Generate an enumeration of user-defined register classes | |
3101 // and a list of register masks, one for each class. | |
3102 // Only define the RegMask value objects in the expand file. | |
3103 // Declare each as an extern const RegMask ...; in ad_<arch>.hpp | |
3104 declare_register_masks(_HPP_file._fp); | |
3105 // build_register_masks(fp); | |
3106 build_register_masks(_CPP_EXPAND_file._fp); | |
3107 // Define the pipe_classes | |
3108 build_pipe_classes(_CPP_PIPELINE_file._fp); | |
3109 | |
3110 // Generate Machine Classes for each operand defined in AD file | |
3111 fprintf(fp,"\n"); | |
3112 fprintf(fp,"\n"); | |
3113 fprintf(fp,"//------------------Define classes derived from MachOper---------------------\n"); | |
3114 // Iterate through all operands | |
3115 _operands.reset(); | |
3116 OperandForm *oper; | |
3117 for( ; (oper = (OperandForm*)_operands.iter()) != NULL; ) { | |
3118 // Ensure this is a machine-world instruction | |
3119 if ( oper->ideal_only() ) continue; | |
3120 // !!!!! | |
3121 // The declaration of labelOper is in machine-independent file: machnode | |
3122 if ( strcmp(oper->_ident,"label") == 0 ) { | |
3123 defineIn_RegMask(_CPP_MISC_file._fp, _globalNames, *oper); | |
3124 | |
3125 fprintf(fp,"MachOper *%sOper::clone(Compile* C) const {\n", oper->_ident); | |
3126 fprintf(fp," return new (C) %sOper(_label, _block_num);\n", oper->_ident); | |
3127 fprintf(fp,"}\n"); | |
3128 | |
3129 fprintf(fp,"uint %sOper::opcode() const { return %s; }\n", | |
3130 oper->_ident, machOperEnum(oper->_ident)); | |
3131 // // Currently all XXXOper::Hash() methods are identical (990820) | |
3132 // define_hash(fp, oper->_ident); | |
3133 // // Currently all XXXOper::Cmp() methods are identical (990820) | |
3134 // define_cmp(fp, oper->_ident); | |
3135 fprintf(fp,"\n"); | |
3136 | |
3137 continue; | |
3138 } | |
3139 | |
3140 // The declaration of methodOper is in machine-independent file: machnode | |
3141 if ( strcmp(oper->_ident,"method") == 0 ) { | |
3142 defineIn_RegMask(_CPP_MISC_file._fp, _globalNames, *oper); | |
3143 | |
3144 fprintf(fp,"MachOper *%sOper::clone(Compile* C) const {\n", oper->_ident); | |
3145 fprintf(fp," return new (C) %sOper(_method);\n", oper->_ident); | |
3146 fprintf(fp,"}\n"); | |
3147 | |
3148 fprintf(fp,"uint %sOper::opcode() const { return %s; }\n", | |
3149 oper->_ident, machOperEnum(oper->_ident)); | |
3150 // // Currently all XXXOper::Hash() methods are identical (990820) | |
3151 // define_hash(fp, oper->_ident); | |
3152 // // Currently all XXXOper::Cmp() methods are identical (990820) | |
3153 // define_cmp(fp, oper->_ident); | |
3154 fprintf(fp,"\n"); | |
3155 | |
3156 continue; | |
3157 } | |
3158 | |
3159 defineIn_RegMask(fp, _globalNames, *oper); | |
3160 defineClone(_CPP_CLONE_file._fp, _globalNames, *oper); | |
3161 // // Currently all XXXOper::Hash() methods are identical (990820) | |
3162 // define_hash(fp, oper->_ident); | |
3163 // // Currently all XXXOper::Cmp() methods are identical (990820) | |
3164 // define_cmp(fp, oper->_ident); | |
3165 | |
3166 // side-call to generate output that used to be in the header file: | |
3167 extern void gen_oper_format(FILE *fp, FormDict &globals, OperandForm &oper, bool for_c_file); | |
3168 gen_oper_format(_CPP_FORMAT_file._fp, _globalNames, *oper, true); | |
3169 | |
3170 } | |
3171 | |
3172 | |
3173 // Generate Machine Classes for each instruction defined in AD file | |
3174 fprintf(fp,"//------------------Define members for classes derived from MachNode----------\n"); | |
3175 // Output the definitions for out_RegMask() // & kill_RegMask() | |
3176 _instructions.reset(); | |
3177 InstructForm *instr; | |
3178 MachNodeForm *machnode; | |
3179 for( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) { | |
3180 // Ensure this is a machine-world instruction | |
3181 if ( instr->ideal_only() ) continue; | |
3182 | |
3183 defineOut_RegMask(_CPP_MISC_file._fp, instr->_ident, reg_mask(*instr)); | |
3184 } | |
3185 | |
3186 bool used = false; | |
3187 // Output the definitions for expand rules & peephole rules | |
3188 _instructions.reset(); | |
3189 for( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) { | |
3190 // Ensure this is a machine-world instruction | |
3191 if ( instr->ideal_only() ) continue; | |
3192 // If there are multiple defs/kills, or an explicit expand rule, build rule | |
3193 if( instr->expands() || instr->needs_projections() || | |
3194 instr->has_temps() || | |
2008 | 3195 instr->is_mach_constant() || |
14434
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
3196 instr->needs_constant_base() || |
0 | 3197 instr->_matrule != NULL && |
3198 instr->num_opnds() != instr->num_unique_opnds() ) | |
3199 defineExpand(_CPP_EXPAND_file._fp, instr); | |
3200 // If there is an explicit peephole rule, build it | |
3201 if ( instr->peepholes() ) | |
3202 definePeephole(_CPP_PEEPHOLE_file._fp, instr); | |
3203 | |
3204 // Output code to convert to the cisc version, if applicable | |
3205 used |= instr->define_cisc_version(*this, fp); | |
3206 | |
3207 // Output code to convert to the short branch version, if applicable | |
1541
b5fdf39b9749
6953576: bottom_type for matched AddPNodes doesn't always agree with ideal
never
parents:
1489
diff
changeset
|
3208 used |= instr->define_short_branch_methods(*this, fp); |
0 | 3209 } |
3210 | |
3211 // Construct the method called by cisc_version() to copy inputs and operands. | |
3212 define_fill_new_machnode(used, fp); | |
3213 | |
3214 // Output the definitions for labels | |
3215 _instructions.reset(); | |
3216 while( (instr = (InstructForm*)_instructions.iter()) != NULL ) { | |
3217 // Ensure this is a machine-world instruction | |
3218 if ( instr->ideal_only() ) continue; | |
3219 | |
3220 // Access the fields for operand Label | |
3221 int label_position = instr->label_position(); | |
3222 if( label_position != -1 ) { | |
3223 // Set the label | |
3839 | 3224 fprintf(fp,"void %sNode::label_set( Label* label, uint block_num ) {\n", instr->_ident); |
0 | 3225 fprintf(fp," labelOper* oper = (labelOper*)(opnd_array(%d));\n", |
3226 label_position ); | |
3839 | 3227 fprintf(fp," oper->_label = label;\n"); |
0 | 3228 fprintf(fp," oper->_block_num = block_num;\n"); |
3229 fprintf(fp,"}\n"); | |
3853
11211f7cb5a0
7079317: Incorrect branch's destination block in PrintoOptoAssembly output
kvn
parents:
3839
diff
changeset
|
3230 // Save the label |
11211f7cb5a0
7079317: Incorrect branch's destination block in PrintoOptoAssembly output
kvn
parents:
3839
diff
changeset
|
3231 fprintf(fp,"void %sNode::save_label( Label** label, uint* block_num ) {\n", instr->_ident); |
11211f7cb5a0
7079317: Incorrect branch's destination block in PrintoOptoAssembly output
kvn
parents:
3839
diff
changeset
|
3232 fprintf(fp," labelOper* oper = (labelOper*)(opnd_array(%d));\n", |
11211f7cb5a0
7079317: Incorrect branch's destination block in PrintoOptoAssembly output
kvn
parents:
3839
diff
changeset
|
3233 label_position ); |
11211f7cb5a0
7079317: Incorrect branch's destination block in PrintoOptoAssembly output
kvn
parents:
3839
diff
changeset
|
3234 fprintf(fp," *label = oper->_label;\n"); |
11211f7cb5a0
7079317: Incorrect branch's destination block in PrintoOptoAssembly output
kvn
parents:
3839
diff
changeset
|
3235 fprintf(fp," *block_num = oper->_block_num;\n"); |
11211f7cb5a0
7079317: Incorrect branch's destination block in PrintoOptoAssembly output
kvn
parents:
3839
diff
changeset
|
3236 fprintf(fp,"}\n"); |
0 | 3237 } |
3238 } | |
3239 | |
3240 // Output the definitions for methods | |
3241 _instructions.reset(); | |
3242 while( (instr = (InstructForm*)_instructions.iter()) != NULL ) { | |
3243 // Ensure this is a machine-world instruction | |
3244 if ( instr->ideal_only() ) continue; | |
3245 | |
3246 // Access the fields for operand Label | |
3247 int method_position = instr->method_position(); | |
3248 if( method_position != -1 ) { | |
3249 // Access the method's address | |
3250 fprintf(fp,"void %sNode::method_set( intptr_t method ) {\n", instr->_ident); | |
3251 fprintf(fp," ((methodOper*)opnd_array(%d))->_method = method;\n", | |
3252 method_position ); | |
3253 fprintf(fp,"}\n"); | |
3254 fprintf(fp,"\n"); | |
3255 } | |
3256 } | |
3257 | |
3258 // Define this instruction's number of relocation entries, base is '0' | |
3259 _instructions.reset(); | |
3260 while( (instr = (InstructForm*)_instructions.iter()) != NULL ) { | |
3261 // Output the definition for number of relocation entries | |
3262 uint reloc_size = instr->reloc(_globalNames); | |
3263 if ( reloc_size != 0 ) { | |
6850 | 3264 fprintf(fp,"int %sNode::reloc() const {\n", instr->_ident); |
3265 fprintf(fp," return %d;\n", reloc_size); | |
0 | 3266 fprintf(fp,"}\n"); |
3267 fprintf(fp,"\n"); | |
3268 } | |
3269 } | |
3270 fprintf(fp,"\n"); | |
3271 | |
3272 // Output the definitions for code generation | |
3273 // | |
3274 // address ___Node::emit(address ptr, PhaseRegAlloc *ra_) const { | |
3275 // // ... encoding defined by user | |
3276 // return ptr; | |
3277 // } | |
3278 // | |
3279 _instructions.reset(); | |
3280 for( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) { | |
3281 // Ensure this is a machine-world instruction | |
3282 if ( instr->ideal_only() ) continue; | |
3283 | |
14428
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
3284 if (instr->_insencode) { |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
3285 if (instr->postalloc_expands()) { |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
3286 // Don't write this to _CPP_EXPAND_file, as the code generated calls C-code |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
3287 // from code sections in ad file that is dumped to fp. |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
3288 define_postalloc_expand(fp, *instr); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
3289 } else { |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
3290 defineEmit(fp, *instr); |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
3291 } |
044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
goetz
parents:
12167
diff
changeset
|
3292 } |
2008 | 3293 if (instr->is_mach_constant()) defineEvalConstant(fp, *instr); |
3294 if (instr->_size) defineSize (fp, *instr); | |
0 | 3295 |
3296 // side-call to generate output that used to be in the header file: | |
3297 extern void gen_inst_format(FILE *fp, FormDict &globals, InstructForm &oper, bool for_c_file); | |
3298 gen_inst_format(_CPP_FORMAT_file._fp, _globalNames, *instr, true); | |
3299 } | |
3300 | |
3301 // Output the definitions for alias analysis | |
3302 _instructions.reset(); | |
3303 for( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) { | |
3304 // Ensure this is a machine-world instruction | |
3305 if ( instr->ideal_only() ) continue; | |
3306 | |
3307 // Analyze machine instructions that either USE or DEF memory. | |
3308 int memory_operand = instr->memory_operand(_globalNames); | |
3309 // Some guys kill all of memory | |
3310 if ( instr->is_wide_memory_kill(_globalNames) ) { | |
3311 memory_operand = InstructForm::MANY_MEMORY_OPERANDS; | |
3312 } | |
3313 | |
3314 if ( memory_operand != InstructForm::NO_MEMORY_OPERAND ) { | |
3315 if( memory_operand == InstructForm::MANY_MEMORY_OPERANDS ) { | |
3316 fprintf(fp,"const TypePtr *%sNode::adr_type() const { return TypePtr::BOTTOM; }\n", instr->_ident); | |
3317 fprintf(fp,"const MachOper* %sNode::memory_operand() const { return (MachOper*)-1; }\n", instr->_ident); | |
3318 } else { | |
3319 fprintf(fp,"const MachOper* %sNode::memory_operand() const { return _opnds[%d]; }\n", instr->_ident, memory_operand); | |
3320 } | |
3321 } | |
3322 } | |
3323 | |
3324 // Get the length of the longest identifier | |
3325 int max_ident_len = 0; | |
3326 _instructions.reset(); | |
3327 | |
3328 for ( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) { | |
3329 if (instr->_ins_pipe && _pipeline->_classlist.search(instr->_ins_pipe)) { | |
3330 int ident_len = (int)strlen(instr->_ident); | |
3331 if( max_ident_len < ident_len ) | |
3332 max_ident_len = ident_len; | |
3333 } | |
3334 } | |
3335 | |
3336 // Emit specifically for Node(s) | |
3337 fprintf(_CPP_PIPELINE_file._fp, "const Pipeline * %*s::pipeline_class() { return %s; }\n", | |
3338 max_ident_len, "Node", _pipeline ? "(&pipeline_class_Zero_Instructions)" : "NULL"); | |
3339 fprintf(_CPP_PIPELINE_file._fp, "const Pipeline * %*s::pipeline() const { return %s; }\n", | |
3340 max_ident_len, "Node", _pipeline ? "(&pipeline_class_Zero_Instructions)" : "NULL"); | |
3341 fprintf(_CPP_PIPELINE_file._fp, "\n"); | |
3342 | |
3343 fprintf(_CPP_PIPELINE_file._fp, "const Pipeline * %*s::pipeline_class() { return %s; }\n", | |
3344 max_ident_len, "MachNode", _pipeline ? "(&pipeline_class_Unknown_Instructions)" : "NULL"); | |
3345 fprintf(_CPP_PIPELINE_file._fp, "const Pipeline * %*s::pipeline() const { return pipeline_class(); }\n", | |
3346 max_ident_len, "MachNode"); | |
3347 fprintf(_CPP_PIPELINE_file._fp, "\n"); | |
3348 | |
3349 // Output the definitions for machine node specific pipeline data | |
3350 _machnodes.reset(); | |
3351 | |
3352 for ( ; (machnode = (MachNodeForm*)_machnodes.iter()) != NULL; ) { | |
3353 fprintf(_CPP_PIPELINE_file._fp, "const Pipeline * %sNode::pipeline() const { return (&pipeline_class_%03d); }\n", | |
3354 machnode->_ident, ((class PipeClassForm *)_pipeline->_classdict[machnode->_machnode_pipe])->_num); | |
3355 } | |
3356 | |
3357 fprintf(_CPP_PIPELINE_file._fp, "\n"); | |
3358 | |
3359 // Output the definitions for instruction pipeline static data references | |
3360 _instructions.reset(); | |
3361 | |
3362 for ( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) { | |
3363 if (instr->_ins_pipe && _pipeline->_classlist.search(instr->_ins_pipe)) { | |
3364 fprintf(_CPP_PIPELINE_file._fp, "\n"); | |
3365 fprintf(_CPP_PIPELINE_file._fp, "const Pipeline * %*sNode::pipeline_class() { return (&pipeline_class_%03d); }\n", | |
3366 max_ident_len, instr->_ident, ((class PipeClassForm *)_pipeline->_classdict[instr->_ins_pipe])->_num); | |
3367 fprintf(_CPP_PIPELINE_file._fp, "const Pipeline * %*sNode::pipeline() const { return (&pipeline_class_%03d); }\n", | |
3368 max_ident_len, instr->_ident, ((class PipeClassForm *)_pipeline->_classdict[instr->_ins_pipe])->_num); | |
3369 } | |
3370 } | |
3371 } | |
3372 | |
3373 | |
3374 // -------------------------------- maps ------------------------------------ | |
3375 | |
3376 // Information needed to generate the ReduceOp mapping for the DFA | |
3377 class OutputReduceOp : public OutputMap { | |
3378 public: | |
3379 OutputReduceOp(FILE *hpp, FILE *cpp, FormDict &globals, ArchDesc &AD) | |
6850 | 3380 : OutputMap(hpp, cpp, globals, AD, "reduceOp") {}; |
0 | 3381 |
3382 void declaration() { fprintf(_hpp, "extern const int reduceOp[];\n"); } | |
3383 void definition() { fprintf(_cpp, "const int reduceOp[] = {\n"); } | |
3384 void closing() { fprintf(_cpp, " 0 // no trailing comma\n"); | |
3385 OutputMap::closing(); | |
3386 } | |
3387 void map(OpClassForm &opc) { | |
3388 const char *reduce = opc._ident; | |
3389 if( reduce ) fprintf(_cpp, " %s_rule", reduce); | |
3390 else fprintf(_cpp, " 0"); | |
3391 } | |
3392 void map(OperandForm &oper) { | |
3393 // Most operands without match rules, e.g. eFlagsReg, do not have a result operand | |
3394 const char *reduce = (oper._matrule ? oper.reduce_result() : NULL); | |
3395 // operand stackSlot does not have a match rule, but produces a stackSlot | |
3396 if( oper.is_user_name_for_sReg() != Form::none ) reduce = oper.reduce_result(); | |
3397 if( reduce ) fprintf(_cpp, " %s_rule", reduce); | |
3398 else fprintf(_cpp, " 0"); | |
3399 } | |
3400 void map(InstructForm &inst) { | |
3401 const char *reduce = (inst._matrule ? inst.reduce_result() : NULL); | |
3402 if( reduce ) fprintf(_cpp, " %s_rule", reduce); | |
3403 else fprintf(_cpp, " 0"); | |
3404 } | |
3405 void map(char *reduce) { | |
3406 if( reduce ) fprintf(_cpp, " %s_rule", reduce); | |
3407 else fprintf(_cpp, " 0"); | |
3408 } | |
3409 }; | |
3410 | |
3411 // Information needed to generate the LeftOp mapping for the DFA | |
3412 class OutputLeftOp : public OutputMap { | |
3413 public: | |
3414 OutputLeftOp(FILE *hpp, FILE *cpp, FormDict &globals, ArchDesc &AD) | |
6850 | 3415 : OutputMap(hpp, cpp, globals, AD, "leftOp") {}; |
0 | 3416 |
3417 void declaration() { fprintf(_hpp, "extern const int leftOp[];\n"); } | |
3418 void definition() { fprintf(_cpp, "const int leftOp[] = {\n"); } | |
3419 void closing() { fprintf(_cpp, " 0 // no trailing comma\n"); | |
3420 OutputMap::closing(); | |
3421 } | |
3422 void map(OpClassForm &opc) { fprintf(_cpp, " 0"); } | |
3423 void map(OperandForm &oper) { | |
3424 const char *reduce = oper.reduce_left(_globals); | |
3425 if( reduce ) fprintf(_cpp, " %s_rule", reduce); | |
3426 else fprintf(_cpp, " 0"); | |
3427 } | |
3428 void map(char *name) { | |
3429 const char *reduce = _AD.reduceLeft(name); | |
3430 if( reduce ) fprintf(_cpp, " %s_rule", reduce); | |
3431 else fprintf(_cpp, " 0"); | |
3432 } | |
3433 void map(InstructForm &inst) { | |
3434 const char *reduce = inst.reduce_left(_globals); | |
3435 if( reduce ) fprintf(_cpp, " %s_rule", reduce); | |
3436 else fprintf(_cpp, " 0"); | |
3437 } | |
3438 }; | |
3439 | |
3440 | |
3441 // Information needed to generate the RightOp mapping for the DFA | |
3442 class OutputRightOp : public OutputMap { | |
3443 public: | |
3444 OutputRightOp(FILE *hpp, FILE *cpp, FormDict &globals, ArchDesc &AD) | |
6850 | 3445 : OutputMap(hpp, cpp, globals, AD, "rightOp") {}; |
0 | 3446 |
3447 void declaration() { fprintf(_hpp, "extern const int rightOp[];\n"); } | |
3448 void definition() { fprintf(_cpp, "const int rightOp[] = {\n"); } | |
3449 void closing() { fprintf(_cpp, " 0 // no trailing comma\n"); | |
3450 OutputMap::closing(); | |
3451 } | |
3452 void map(OpClassForm &opc) { fprintf(_cpp, " 0"); } | |
3453 void map(OperandForm &oper) { | |
3454 const char *reduce = oper.reduce_right(_globals); | |
3455 if( reduce ) fprintf(_cpp, " %s_rule", reduce); | |
3456 else fprintf(_cpp, " 0"); | |
3457 } | |
3458 void map(char *name) { | |
3459 const char *reduce = _AD.reduceRight(name); | |
3460 if( reduce ) fprintf(_cpp, " %s_rule", reduce); | |
3461 else fprintf(_cpp, " 0"); | |
3462 } | |
3463 void map(InstructForm &inst) { | |
3464 const char *reduce = inst.reduce_right(_globals); | |
3465 if( reduce ) fprintf(_cpp, " %s_rule", reduce); | |
3466 else fprintf(_cpp, " 0"); | |
3467 } | |
3468 }; | |
3469 | |
3470 | |
3471 // Information needed to generate the Rule names for the DFA | |
3472 class OutputRuleName : public OutputMap { | |
3473 public: | |
3474 OutputRuleName(FILE *hpp, FILE *cpp, FormDict &globals, ArchDesc &AD) | |
6850 | 3475 : OutputMap(hpp, cpp, globals, AD, "ruleName") {}; |
0 | 3476 |
3477 void declaration() { fprintf(_hpp, "extern const char *ruleName[];\n"); } | |
3478 void definition() { fprintf(_cpp, "const char *ruleName[] = {\n"); } | |
6850 | 3479 void closing() { fprintf(_cpp, " \"invalid rule name\" // no trailing comma\n"); |
0 | 3480 OutputMap::closing(); |
3481 } | |
3482 void map(OpClassForm &opc) { fprintf(_cpp, " \"%s\"", _AD.machOperEnum(opc._ident) ); } | |
3483 void map(OperandForm &oper) { fprintf(_cpp, " \"%s\"", _AD.machOperEnum(oper._ident) ); } | |
3484 void map(char *name) { fprintf(_cpp, " \"%s\"", name ? name : "0"); } | |
3485 void map(InstructForm &inst){ fprintf(_cpp, " \"%s\"", inst._ident ? inst._ident : "0"); } | |
3486 }; | |
3487 | |
3488 | |
3489 // Information needed to generate the swallowed mapping for the DFA | |
3490 class OutputSwallowed : public OutputMap { | |
3491 public: | |
3492 OutputSwallowed(FILE *hpp, FILE *cpp, FormDict &globals, ArchDesc &AD) | |
6850 | 3493 : OutputMap(hpp, cpp, globals, AD, "swallowed") {}; |
0 | 3494 |
3495 void declaration() { fprintf(_hpp, "extern const bool swallowed[];\n"); } | |
3496 void definition() { fprintf(_cpp, "const bool swallowed[] = {\n"); } | |
3497 void closing() { fprintf(_cpp, " false // no trailing comma\n"); | |
3498 OutputMap::closing(); | |
3499 } | |
3500 void map(OperandForm &oper) { // Generate the entry for this opcode | |
3501 const char *swallowed = oper.swallowed(_globals) ? "true" : "false"; | |
3502 fprintf(_cpp, " %s", swallowed); | |
3503 } | |
3504 void map(OpClassForm &opc) { fprintf(_cpp, " false"); } | |
3505 void map(char *name) { fprintf(_cpp, " false"); } | |
3506 void map(InstructForm &inst){ fprintf(_cpp, " false"); } | |
3507 }; | |
3508 | |
3509 | |
3510 // Information needed to generate the decision array for instruction chain rule | |
3511 class OutputInstChainRule : public OutputMap { | |
3512 public: | |
3513 OutputInstChainRule(FILE *hpp, FILE *cpp, FormDict &globals, ArchDesc &AD) | |
6850 | 3514 : OutputMap(hpp, cpp, globals, AD, "instruction_chain_rule") {}; |
0 | 3515 |
3516 void declaration() { fprintf(_hpp, "extern const bool instruction_chain_rule[];\n"); } | |
3517 void definition() { fprintf(_cpp, "const bool instruction_chain_rule[] = {\n"); } | |
3518 void closing() { fprintf(_cpp, " false // no trailing comma\n"); | |
3519 OutputMap::closing(); | |
3520 } | |
3521 void map(OpClassForm &opc) { fprintf(_cpp, " false"); } | |
3522 void map(OperandForm &oper) { fprintf(_cpp, " false"); } | |
3523 void map(char *name) { fprintf(_cpp, " false"); } | |
3524 void map(InstructForm &inst) { // Check for simple chain rule | |
3525 const char *chain = inst.is_simple_chain_rule(_globals) ? "true" : "false"; | |
3526 fprintf(_cpp, " %s", chain); | |
3527 } | |
3528 }; | |
3529 | |
3530 | |
3531 //---------------------------build_map------------------------------------ | |
3532 // Build mapping from enumeration for densely packed operands | |
3533 // TO result and child types. | |
3534 void ArchDesc::build_map(OutputMap &map) { | |
3535 FILE *fp_hpp = map.decl_file(); | |
3536 FILE *fp_cpp = map.def_file(); | |
3537 int idx = 0; | |
3538 OperandForm *op; | |
3539 OpClassForm *opc; | |
3540 InstructForm *inst; | |
3541 | |
3542 // Construct this mapping | |
3543 map.declaration(); | |
3544 fprintf(fp_cpp,"\n"); | |
3545 map.definition(); | |
3546 | |
3547 // Output the mapping for operands | |
3548 map.record_position(OutputMap::BEGIN_OPERANDS, idx ); | |
3549 _operands.reset(); | |
3550 for(; (op = (OperandForm*)_operands.iter()) != NULL; ) { | |
3551 // Ensure this is a machine-world instruction | |
3552 if ( op->ideal_only() ) continue; | |
3553 | |
3554 // Generate the entry for this opcode | |
6850 | 3555 fprintf(fp_cpp, " /* %4d */", idx); map.map(*op); fprintf(fp_cpp, ",\n"); |
0 | 3556 ++idx; |
3557 }; | |
3558 fprintf(fp_cpp, " // last operand\n"); | |
3559 | |
3560 // Place all user-defined operand classes into the mapping | |
3561 map.record_position(OutputMap::BEGIN_OPCLASSES, idx ); | |
3562 _opclass.reset(); | |
3563 for(; (opc = (OpClassForm*)_opclass.iter()) != NULL; ) { | |
6850 | 3564 fprintf(fp_cpp, " /* %4d */", idx); map.map(*opc); fprintf(fp_cpp, ",\n"); |
0 | 3565 ++idx; |
3566 }; | |
3567 fprintf(fp_cpp, " // last operand class\n"); | |
3568 | |
3569 // Place all internally defined operands into the mapping | |
3570 map.record_position(OutputMap::BEGIN_INTERNALS, idx ); | |
3571 _internalOpNames.reset(); | |
3572 char *name = NULL; | |
3573 for(; (name = (char *)_internalOpNames.iter()) != NULL; ) { | |
6850 | 3574 fprintf(fp_cpp, " /* %4d */", idx); map.map(name); fprintf(fp_cpp, ",\n"); |
0 | 3575 ++idx; |
3576 }; | |
3577 fprintf(fp_cpp, " // last internally defined operand\n"); | |
3578 | |
3579 // Place all user-defined instructions into the mapping | |
3580 if( map.do_instructions() ) { | |
3581 map.record_position(OutputMap::BEGIN_INSTRUCTIONS, idx ); | |
3582 // Output all simple instruction chain rules first | |
3583 map.record_position(OutputMap::BEGIN_INST_CHAIN_RULES, idx ); | |
3584 { | |
3585 _instructions.reset(); | |
3586 for(; (inst = (InstructForm*)_instructions.iter()) != NULL; ) { | |
3587 // Ensure this is a machine-world instruction | |
3588 if ( inst->ideal_only() ) continue; | |
3589 if ( ! inst->is_simple_chain_rule(_globalNames) ) continue; | |
3590 if ( inst->rematerialize(_globalNames, get_registers()) ) continue; | |
3591 | |
6850 | 3592 fprintf(fp_cpp, " /* %4d */", idx); map.map(*inst); fprintf(fp_cpp, ",\n"); |
0 | 3593 ++idx; |
3594 }; | |
3595 map.record_position(OutputMap::BEGIN_REMATERIALIZE, idx ); | |
3596 _instructions.reset(); | |
3597 for(; (inst = (InstructForm*)_instructions.iter()) != NULL; ) { | |
3598 // Ensure this is a machine-world instruction | |
3599 if ( inst->ideal_only() ) continue; | |
3600 if ( ! inst->is_simple_chain_rule(_globalNames) ) continue; | |
3601 if ( ! inst->rematerialize(_globalNames, get_registers()) ) continue; | |
3602 | |
6850 | 3603 fprintf(fp_cpp, " /* %4d */", idx); map.map(*inst); fprintf(fp_cpp, ",\n"); |
0 | 3604 ++idx; |
3605 }; | |
3606 map.record_position(OutputMap::END_INST_CHAIN_RULES, idx ); | |
3607 } | |
3608 // Output all instructions that are NOT simple chain rules | |
3609 { | |
3610 _instructions.reset(); | |
3611 for(; (inst = (InstructForm*)_instructions.iter()) != NULL; ) { | |
3612 // Ensure this is a machine-world instruction | |
3613 if ( inst->ideal_only() ) continue; | |
3614 if ( inst->is_simple_chain_rule(_globalNames) ) continue; | |
3615 if ( ! inst->rematerialize(_globalNames, get_registers()) ) continue; | |
3616 | |
6850 | 3617 fprintf(fp_cpp, " /* %4d */", idx); map.map(*inst); fprintf(fp_cpp, ",\n"); |
0 | 3618 ++idx; |
3619 }; | |
3620 map.record_position(OutputMap::END_REMATERIALIZE, idx ); | |
3621 _instructions.reset(); | |
3622 for(; (inst = (InstructForm*)_instructions.iter()) != NULL; ) { | |
3623 // Ensure this is a machine-world instruction | |
3624 if ( inst->ideal_only() ) continue; | |
3625 if ( inst->is_simple_chain_rule(_globalNames) ) continue; | |
3626 if ( inst->rematerialize(_globalNames, get_registers()) ) continue; | |
3627 | |
6850 | 3628 fprintf(fp_cpp, " /* %4d */", idx); map.map(*inst); fprintf(fp_cpp, ",\n"); |
0 | 3629 ++idx; |
3630 }; | |
3631 } | |
3632 fprintf(fp_cpp, " // last instruction\n"); | |
3633 map.record_position(OutputMap::END_INSTRUCTIONS, idx ); | |
3634 } | |
3635 // Finish defining table | |
3636 map.closing(); | |
3637 }; | |
3638 | |
3639 | |
3640 // Helper function for buildReduceMaps | |
3641 char reg_save_policy(const char *calling_convention) { | |
3642 char callconv; | |
3643 | |
3644 if (!strcmp(calling_convention, "NS")) callconv = 'N'; | |
3645 else if (!strcmp(calling_convention, "SOE")) callconv = 'E'; | |
3646 else if (!strcmp(calling_convention, "SOC")) callconv = 'C'; | |
3647 else if (!strcmp(calling_convention, "AS")) callconv = 'A'; | |
3648 else callconv = 'Z'; | |
3649 | |
3650 return callconv; | |
3651 } | |
3652 | |
17791
ad3b94907eed
8030863: PPC64: (part 220): ConstantTableBase for calls between args and jvms
goetz
parents:
14444
diff
changeset
|
3653 void ArchDesc::generate_needs_clone_jvms(FILE *fp_cpp) { |
ad3b94907eed
8030863: PPC64: (part 220): ConstantTableBase for calls between args and jvms
goetz
parents:
14444
diff
changeset
|
3654 fprintf(fp_cpp, "bool Compile::needs_clone_jvms() { return %s; }\n\n", |
ad3b94907eed
8030863: PPC64: (part 220): ConstantTableBase for calls between args and jvms
goetz
parents:
14444
diff
changeset
|
3655 _needs_clone_jvms ? "true" : "false"); |
ad3b94907eed
8030863: PPC64: (part 220): ConstantTableBase for calls between args and jvms
goetz
parents:
14444
diff
changeset
|
3656 } |
ad3b94907eed
8030863: PPC64: (part 220): ConstantTableBase for calls between args and jvms
goetz
parents:
14444
diff
changeset
|
3657 |
0 | 3658 //---------------------------generate_assertion_checks------------------- |
3659 void ArchDesc::generate_adlc_verification(FILE *fp_cpp) { | |
3660 fprintf(fp_cpp, "\n"); | |
3661 | |
3662 fprintf(fp_cpp, "#ifndef PRODUCT\n"); | |
3663 fprintf(fp_cpp, "void Compile::adlc_verification() {\n"); | |
3664 globalDefs().print_asserts(fp_cpp); | |
3665 fprintf(fp_cpp, "}\n"); | |
3666 fprintf(fp_cpp, "#endif\n"); | |
3667 fprintf(fp_cpp, "\n"); | |
3668 } | |
3669 | |
3670 //---------------------------addSourceBlocks----------------------------- | |
3671 void ArchDesc::addSourceBlocks(FILE *fp_cpp) { | |
3672 if (_source.count() > 0) | |
3673 _source.output(fp_cpp); | |
3674 | |
3675 generate_adlc_verification(fp_cpp); | |
3676 } | |
3677 //---------------------------addHeaderBlocks----------------------------- | |
3678 void ArchDesc::addHeaderBlocks(FILE *fp_hpp) { | |
3679 if (_header.count() > 0) | |
3680 _header.output(fp_hpp); | |
3681 } | |
3682 //-------------------------addPreHeaderBlocks---------------------------- | |
3683 void ArchDesc::addPreHeaderBlocks(FILE *fp_hpp) { | |
3684 // Output #defines from definition block | |
3685 globalDefs().print_defines(fp_hpp); | |
3686 | |
3687 if (_pre_header.count() > 0) | |
3688 _pre_header.output(fp_hpp); | |
3689 } | |
3690 | |
3691 //---------------------------buildReduceMaps----------------------------- | |
3692 // Build mapping from enumeration for densely packed operands | |
3693 // TO result and child types. | |
3694 void ArchDesc::buildReduceMaps(FILE *fp_hpp, FILE *fp_cpp) { | |
3695 RegDef *rdef; | |
3696 RegDef *next; | |
3697 | |
3698 // The emit bodies currently require functions defined in the source block. | |
3699 | |
3700 // Build external declarations for mappings | |
3701 fprintf(fp_hpp, "\n"); | |
3702 fprintf(fp_hpp, "extern const char register_save_policy[];\n"); | |
3703 fprintf(fp_hpp, "extern const char c_reg_save_policy[];\n"); | |
3704 fprintf(fp_hpp, "extern const int register_save_type[];\n"); | |
3705 fprintf(fp_hpp, "\n"); | |
3706 | |
3707 // Construct Save-Policy array | |
3708 fprintf(fp_cpp, "// Map from machine-independent register number to register_save_policy\n"); | |
3709 fprintf(fp_cpp, "const char register_save_policy[] = {\n"); | |
3710 _register->reset_RegDefs(); | |
3711 for( rdef = _register->iter_RegDefs(); rdef != NULL; rdef = next ) { | |
3712 next = _register->iter_RegDefs(); | |
3713 char policy = reg_save_policy(rdef->_callconv); | |
3714 const char *comma = (next != NULL) ? "," : " // no trailing comma"; | |
6850 | 3715 fprintf(fp_cpp, " '%c'%s // %s\n", policy, comma, rdef->_regname); |
0 | 3716 } |
3717 fprintf(fp_cpp, "};\n\n"); | |
3718 | |
3719 // Construct Native Save-Policy array | |
3720 fprintf(fp_cpp, "// Map from machine-independent register number to c_reg_save_policy\n"); | |
3721 fprintf(fp_cpp, "const char c_reg_save_policy[] = {\n"); | |
3722 _register->reset_RegDefs(); | |
3723 for( rdef = _register->iter_RegDefs(); rdef != NULL; rdef = next ) { | |
3724 next = _register->iter_RegDefs(); | |
3725 char policy = reg_save_policy(rdef->_c_conv); | |
3726 const char *comma = (next != NULL) ? "," : " // no trailing comma"; | |
6850 | 3727 fprintf(fp_cpp, " '%c'%s // %s\n", policy, comma, rdef->_regname); |
0 | 3728 } |
3729 fprintf(fp_cpp, "};\n\n"); | |
3730 | |
3731 // Construct Register Save Type array | |
3732 fprintf(fp_cpp, "// Map from machine-independent register number to register_save_type\n"); | |
3733 fprintf(fp_cpp, "const int register_save_type[] = {\n"); | |
3734 _register->reset_RegDefs(); | |
3735 for( rdef = _register->iter_RegDefs(); rdef != NULL; rdef = next ) { | |
3736 next = _register->iter_RegDefs(); | |
3737 const char *comma = (next != NULL) ? "," : " // no trailing comma"; | |
3738 fprintf(fp_cpp, " %s%s\n", rdef->_idealtype, comma); | |
3739 } | |
3740 fprintf(fp_cpp, "};\n\n"); | |
3741 | |
3742 // Construct the table for reduceOp | |
3743 OutputReduceOp output_reduce_op(fp_hpp, fp_cpp, _globalNames, *this); | |
3744 build_map(output_reduce_op); | |
3745 // Construct the table for leftOp | |
3746 OutputLeftOp output_left_op(fp_hpp, fp_cpp, _globalNames, *this); | |
3747 build_map(output_left_op); | |
3748 // Construct the table for rightOp | |
3749 OutputRightOp output_right_op(fp_hpp, fp_cpp, _globalNames, *this); | |
3750 build_map(output_right_op); | |
3751 // Construct the table of rule names | |
3752 OutputRuleName output_rule_name(fp_hpp, fp_cpp, _globalNames, *this); | |
3753 build_map(output_rule_name); | |
3754 // Construct the boolean table for subsumed operands | |
3755 OutputSwallowed output_swallowed(fp_hpp, fp_cpp, _globalNames, *this); | |
3756 build_map(output_swallowed); | |
3757 // // // Preserve in case we decide to use this table instead of another | |
3758 //// Construct the boolean table for instruction chain rules | |
3759 //OutputInstChainRule output_inst_chain(fp_hpp, fp_cpp, _globalNames, *this); | |
3760 //build_map(output_inst_chain); | |
3761 | |
3762 } | |
3763 | |
3764 | |
3765 //---------------------------buildMachOperGenerator--------------------------- | |
3766 | |
3767 // Recurse through match tree, building path through corresponding state tree, | |
3768 // Until we reach the constant we are looking for. | |
3769 static void path_to_constant(FILE *fp, FormDict &globals, | |
3770 MatchNode *mnode, uint idx) { | |
3771 if ( ! mnode) return; | |
3772 | |
3773 unsigned position = 0; | |
3774 const char *result = NULL; | |
3775 const char *name = NULL; | |
3776 const char *optype = NULL; | |
3777 | |
3778 // Base Case: access constant in ideal node linked to current state node | |
3779 // Each type of constant has its own access function | |
3780 if ( (mnode->_lChild == NULL) && (mnode->_rChild == NULL) | |
3781 && mnode->base_operand(position, globals, result, name, optype) ) { | |
3782 if ( strcmp(optype,"ConI") == 0 ) { | |
3783 fprintf(fp, "_leaf->get_int()"); | |
3784 } else if ( (strcmp(optype,"ConP") == 0) ) { | |
3785 fprintf(fp, "_leaf->bottom_type()->is_ptr()"); | |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
3786 } else if ( (strcmp(optype,"ConN") == 0) ) { |
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
3787 fprintf(fp, "_leaf->bottom_type()->is_narrowoop()"); |
6848
8e47bac5643a
7054512: Compress class pointers after perm gen removal
roland
parents:
6804
diff
changeset
|
3788 } else if ( (strcmp(optype,"ConNKlass") == 0) ) { |
8e47bac5643a
7054512: Compress class pointers after perm gen removal
roland
parents:
6804
diff
changeset
|
3789 fprintf(fp, "_leaf->bottom_type()->is_narrowklass()"); |
0 | 3790 } else if ( (strcmp(optype,"ConF") == 0) ) { |
3791 fprintf(fp, "_leaf->getf()"); | |
3792 } else if ( (strcmp(optype,"ConD") == 0) ) { | |
3793 fprintf(fp, "_leaf->getd()"); | |
3794 } else if ( (strcmp(optype,"ConL") == 0) ) { | |
3795 fprintf(fp, "_leaf->get_long()"); | |
3796 } else if ( (strcmp(optype,"Con")==0) ) { | |
3797 // !!!!! - Update if adding a machine-independent constant type | |
3798 fprintf(fp, "_leaf->get_int()"); | |
3799 assert( false, "Unsupported constant type, pointer or indefinite"); | |
3800 } else if ( (strcmp(optype,"Bool") == 0) ) { | |
3801 fprintf(fp, "_leaf->as_Bool()->_test._test"); | |
3802 } else { | |
3803 assert( false, "Unsupported constant type"); | |
3804 } | |
3805 return; | |
3806 } | |
3807 | |
3808 // If constant is in left child, build path and recurse | |
3809 uint lConsts = (mnode->_lChild) ? (mnode->_lChild->num_consts(globals) ) : 0; | |
3810 uint rConsts = (mnode->_rChild) ? (mnode->_rChild->num_consts(globals) ) : 0; | |
3811 if ( (mnode->_lChild) && (lConsts > idx) ) { | |
3812 fprintf(fp, "_kids[0]->"); | |
3813 path_to_constant(fp, globals, mnode->_lChild, idx); | |
3814 return; | |
3815 } | |
3816 // If constant is in right child, build path and recurse | |
3817 if ( (mnode->_rChild) && (rConsts > (idx - lConsts) ) ) { | |
3818 idx = idx - lConsts; | |
3819 fprintf(fp, "_kids[1]->"); | |
3820 path_to_constant(fp, globals, mnode->_rChild, idx); | |
3821 return; | |
3822 } | |
3823 assert( false, "ShouldNotReachHere()"); | |
3824 } | |
3825 | |
3826 // Generate code that is executed when generating a specific Machine Operand | |
3827 static void genMachOperCase(FILE *fp, FormDict &globalNames, ArchDesc &AD, | |
3828 OperandForm &op) { | |
3829 const char *opName = op._ident; | |
3830 const char *opEnumName = AD.machOperEnum(opName); | |
3831 uint num_consts = op.num_consts(globalNames); | |
3832 | |
3833 // Generate the case statement for this opcode | |
3834 fprintf(fp, " case %s:", opEnumName); | |
3835 fprintf(fp, "\n return new (C) %sOper(", opName); | |
3836 // Access parameters for constructor from the stat object | |
3837 // | |
3838 // Build access to condition code value | |
3839 if ( (num_consts > 0) ) { | |
3840 uint i = 0; | |
3841 path_to_constant(fp, globalNames, op._matrule, i); | |
3842 for ( i = 1; i < num_consts; ++i ) { | |
3843 fprintf(fp, ", "); | |
3844 path_to_constant(fp, globalNames, op._matrule, i); | |
3845 } | |
3846 } | |
3847 fprintf(fp, " );\n"); | |
3848 } | |
3849 | |
3850 | |
3851 // Build switch to invoke "new" MachNode or MachOper | |
3852 void ArchDesc::buildMachOperGenerator(FILE *fp_cpp) { | |
3853 int idx = 0; | |
3854 | |
3855 // Build switch to invoke 'new' for a specific MachOper | |
3856 fprintf(fp_cpp, "\n"); | |
3857 fprintf(fp_cpp, "\n"); | |
3858 fprintf(fp_cpp, | |
3859 "//------------------------- MachOper Generator ---------------\n"); | |
3860 fprintf(fp_cpp, | |
3861 "// A switch statement on the dense-packed user-defined type system\n" | |
3862 "// that invokes 'new' on the corresponding class constructor.\n"); | |
3863 fprintf(fp_cpp, "\n"); | |
3864 fprintf(fp_cpp, "MachOper *State::MachOperGenerator"); | |
3865 fprintf(fp_cpp, "(int opcode, Compile* C)"); | |
3866 fprintf(fp_cpp, "{\n"); | |
3867 fprintf(fp_cpp, "\n"); | |
3868 fprintf(fp_cpp, " switch(opcode) {\n"); | |
3869 | |
3870 // Place all user-defined operands into the mapping | |
3871 _operands.reset(); | |
3872 int opIndex = 0; | |
3873 OperandForm *op; | |
3874 for( ; (op = (OperandForm*)_operands.iter()) != NULL; ) { | |
3875 // Ensure this is a machine-world instruction | |
3876 if ( op->ideal_only() ) continue; | |
3877 | |
3878 genMachOperCase(fp_cpp, _globalNames, *this, *op); | |
3879 }; | |
3880 | |
3881 // Do not iterate over operand classes for the operand generator!!! | |
3882 | |
3883 // Place all internal operands into the mapping | |
3884 _internalOpNames.reset(); | |
3885 const char *iopn; | |
3886 for( ; (iopn = _internalOpNames.iter()) != NULL; ) { | |
3887 const char *opEnumName = machOperEnum(iopn); | |
3888 // Generate the case statement for this opcode | |
3889 fprintf(fp_cpp, " case %s:", opEnumName); | |
3890 fprintf(fp_cpp, " return NULL;\n"); | |
3891 }; | |
3892 | |
3893 // Generate the default case for switch(opcode) | |
3894 fprintf(fp_cpp, " \n"); | |
3895 fprintf(fp_cpp, " default:\n"); | |
3896 fprintf(fp_cpp, " fprintf(stderr, \"Default MachOper Generator invoked for: \\n\");\n"); | |
3897 fprintf(fp_cpp, " fprintf(stderr, \" opcode = %cd\\n\", opcode);\n", '%'); | |
3898 fprintf(fp_cpp, " break;\n"); | |
3899 fprintf(fp_cpp, " }\n"); | |
3900 | |
3901 // Generate the closing for method Matcher::MachOperGenerator | |
3902 fprintf(fp_cpp, " return NULL;\n"); | |
3903 fprintf(fp_cpp, "};\n"); | |
3904 } | |
3905 | |
3906 | |
3907 //---------------------------buildMachNode------------------------------------- | |
3908 // Build a new MachNode, for MachNodeGenerator or cisc-spilling | |
3909 void ArchDesc::buildMachNode(FILE *fp_cpp, InstructForm *inst, const char *indent) { | |
3910 const char *opType = NULL; | |
3911 const char *opClass = inst->_ident; | |
3912 | |
3913 // Create the MachNode object | |
3914 fprintf(fp_cpp, "%s %sNode *node = new (C) %sNode();\n",indent, opClass,opClass); | |
3915 | |
3916 if ( (inst->num_post_match_opnds() != 0) ) { | |
3917 // Instruction that contains operands which are not in match rule. | |
3918 // | |
3919 // Check if the first post-match component may be an interesting def | |
3920 bool dont_care = false; | |
3921 ComponentList &comp_list = inst->_components; | |
3922 Component *comp = NULL; | |
3923 comp_list.reset(); | |
3924 if ( comp_list.match_iter() != NULL ) dont_care = true; | |
3925 | |
3926 // Insert operands that are not in match-rule. | |
3927 // Only insert a DEF if the do_care flag is set | |
3928 comp_list.reset(); | |
3929 while ( comp = comp_list.post_match_iter() ) { | |
3930 // Check if we don't care about DEFs or KILLs that are not USEs | |
3931 if ( dont_care && (! comp->isa(Component::USE)) ) { | |
3932 continue; | |
3933 } | |
3934 dont_care = true; | |
3935 // For each operand not in the match rule, call MachOperGenerator | |
2254
ab42c7e1cf83
7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
kvn
parents:
2008
diff
changeset
|
3936 // with the enum for the opcode that needs to be built. |
0 | 3937 ComponentList clist = inst->_components; |
6850 | 3938 int index = clist.operand_position(comp->_name, comp->_usedef, inst); |
0 | 3939 const char *opcode = machOperEnum(comp->_type); |
3940 fprintf(fp_cpp, "%s node->set_opnd_array(%d, ", indent, index); | |
3941 fprintf(fp_cpp, "MachOperGenerator(%s, C));\n", opcode); | |
3942 } | |
3943 } | |
3944 else if ( inst->is_chain_of_constant(_globalNames, opType) ) { | |
3945 // An instruction that chains from a constant! | |
3946 // In this case, we need to subsume the constant into the node | |
3947 // at operand position, oper_input_base(). | |
3948 // | |
3949 // Fill in the constant | |
3950 fprintf(fp_cpp, "%s node->_opnd_array[%d] = ", indent, | |
3951 inst->oper_input_base(_globalNames)); | |
3952 // ##### | |
3953 // Check for multiple constants and then fill them in. | |
3954 // Just like MachOperGenerator | |
3955 const char *opName = inst->_matrule->_rChild->_opType; | |
3956 fprintf(fp_cpp, "new (C) %sOper(", opName); | |
3957 // Grab operand form | |
3958 OperandForm *op = (_globalNames[opName])->is_operand(); | |
3959 // Look up the number of constants | |
3960 uint num_consts = op->num_consts(_globalNames); | |
3961 if ( (num_consts > 0) ) { | |
3962 uint i = 0; | |
3963 path_to_constant(fp_cpp, _globalNames, op->_matrule, i); | |
3964 for ( i = 1; i < num_consts; ++i ) { | |
3965 fprintf(fp_cpp, ", "); | |
3966 path_to_constant(fp_cpp, _globalNames, op->_matrule, i); | |
3967 } | |
3968 } | |
3969 fprintf(fp_cpp, " );\n"); | |
3970 // ##### | |
3971 } | |
3972 | |
3973 // Fill in the bottom_type where requested | |
14434
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
3974 if (inst->captures_bottom_type(_globalNames)) { |
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
3975 if (strncmp("MachCall", inst->mach_base_class(_globalNames), strlen("MachCall"))) { |
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
3976 fprintf(fp_cpp, "%s node->_bottom_type = _leaf->bottom_type();\n", indent); |
318d0622a6d7
8028580: PPC64 (part 114/120): Support for Call nodes with constants.
goetz
parents:
14431
diff
changeset
|
3977 } |
0 | 3978 } |
3979 if( inst->is_ideal_if() ) { | |
3980 fprintf(fp_cpp, "%s node->_prob = _leaf->as_If()->_prob;\n", indent); | |
3981 fprintf(fp_cpp, "%s node->_fcnt = _leaf->as_If()->_fcnt;\n", indent); | |
3982 } | |
3983 if( inst->is_ideal_fastlock() ) { | |
3984 fprintf(fp_cpp, "%s node->_counters = _leaf->as_FastLock()->counters();\n", indent); | |
17780 | 3985 fprintf(fp_cpp, "%s node->_rtm_counters = _leaf->as_FastLock()->rtm_counters();\n", indent); |
3986 fprintf(fp_cpp, "%s node->_stack_rtm_counters = _leaf->as_FastLock()->stack_rtm_counters();\n", indent); | |
0 | 3987 } |
3988 | |
3989 } | |
3990 | |
3991 //---------------------------declare_cisc_version------------------------------ | |
3992 // Build CISC version of this instruction | |
3993 void InstructForm::declare_cisc_version(ArchDesc &AD, FILE *fp_hpp) { | |
3994 if( AD.can_cisc_spill() ) { | |
3995 InstructForm *inst_cisc = cisc_spill_alternate(); | |
3996 if (inst_cisc != NULL) { | |
3997 fprintf(fp_hpp, " virtual int cisc_operand() const { return %d; }\n", cisc_spill_operand()); | |
3998 fprintf(fp_hpp, " virtual MachNode *cisc_version(int offset, Compile* C);\n"); | |
3999 fprintf(fp_hpp, " virtual void use_cisc_RegMask();\n"); | |
4000 fprintf(fp_hpp, " virtual const RegMask *cisc_RegMask() const { return _cisc_RegMask; }\n"); | |
4001 } | |
4002 } | |
4003 } | |
4004 | |
4005 //---------------------------define_cisc_version------------------------------- | |
4006 // Build CISC version of this instruction | |
4007 bool InstructForm::define_cisc_version(ArchDesc &AD, FILE *fp_cpp) { | |
4008 InstructForm *inst_cisc = this->cisc_spill_alternate(); | |
4009 if( AD.can_cisc_spill() && (inst_cisc != NULL) ) { | |
4010 const char *name = inst_cisc->_ident; | |
4011 assert( inst_cisc->num_opnds() == this->num_opnds(), "Must have same number of operands"); | |
4012 OperandForm *cisc_oper = AD.cisc_spill_operand(); | |
4013 assert( cisc_oper != NULL, "insanity check"); | |
4014 const char *cisc_oper_name = cisc_oper->_ident; | |
4015 assert( cisc_oper_name != NULL, "insanity check"); | |
4016 // | |
4017 // Set the correct reg_mask_or_stack for the cisc operand | |
4018 fprintf(fp_cpp, "\n"); | |
4019 fprintf(fp_cpp, "void %sNode::use_cisc_RegMask() {\n", this->_ident); | |
4020 // Lookup the correct reg_mask_or_stack | |
4021 const char *reg_mask_name = cisc_reg_mask_name(); | |
4022 fprintf(fp_cpp, " _cisc_RegMask = &STACK_OR_%s;\n", reg_mask_name); | |
4023 fprintf(fp_cpp, "}\n"); | |
4024 // | |
4025 // Construct CISC version of this instruction | |
4026 fprintf(fp_cpp, "\n"); | |
4027 fprintf(fp_cpp, "// Build CISC version of this instruction\n"); | |
4028 fprintf(fp_cpp, "MachNode *%sNode::cisc_version( int offset, Compile* C ) {\n", this->_ident); | |
4029 // Create the MachNode object | |
4030 fprintf(fp_cpp, " %sNode *node = new (C) %sNode();\n", name, name); | |
4031 // Fill in the bottom_type where requested | |
1541
b5fdf39b9749
6953576: bottom_type for matched AddPNodes doesn't always agree with ideal
never
parents:
1489
diff
changeset
|
4032 if ( this->captures_bottom_type(AD.globalNames()) ) { |
0 | 4033 fprintf(fp_cpp, " node->_bottom_type = bottom_type();\n"); |
4034 } | |
785 | 4035 |
4036 uint cur_num_opnds = num_opnds(); | |
4037 if (cur_num_opnds > 1 && cur_num_opnds != num_unique_opnds()) { | |
4038 fprintf(fp_cpp," node->_num_opnds = %d;\n", num_unique_opnds()); | |
4039 } | |
4040 | |
0 | 4041 fprintf(fp_cpp, "\n"); |
4042 fprintf(fp_cpp, " // Copy _idx, inputs and operands to new node\n"); | |
4043 fprintf(fp_cpp, " fill_new_machnode(node, C);\n"); | |
4044 // Construct operand to access [stack_pointer + offset] | |
4045 fprintf(fp_cpp, " // Construct operand to access [stack_pointer + offset]\n"); | |
4046 fprintf(fp_cpp, " node->set_opnd_array(cisc_operand(), new (C) %sOper(offset));\n", cisc_oper_name); | |
4047 fprintf(fp_cpp, "\n"); | |
4048 | |
4049 // Return result and exit scope | |
4050 fprintf(fp_cpp, " return node;\n"); | |
4051 fprintf(fp_cpp, "}\n"); | |
4052 fprintf(fp_cpp, "\n"); | |
4053 return true; | |
4054 } | |
4055 return false; | |
4056 } | |
4057 | |
4058 //---------------------------declare_short_branch_methods---------------------- | |
4059 // Build prototypes for short branch methods | |
4060 void InstructForm::declare_short_branch_methods(FILE *fp_hpp) { | |
4061 if (has_short_branch_form()) { | |
4062 fprintf(fp_hpp, " virtual MachNode *short_branch_version(Compile* C);\n"); | |
4063 } | |
4064 } | |
4065 | |
4066 //---------------------------define_short_branch_methods----------------------- | |
4067 // Build definitions for short branch methods | |
1541
b5fdf39b9749
6953576: bottom_type for matched AddPNodes doesn't always agree with ideal
never
parents:
1489
diff
changeset
|
4068 bool InstructForm::define_short_branch_methods(ArchDesc &AD, FILE *fp_cpp) { |
0 | 4069 if (has_short_branch_form()) { |
4070 InstructForm *short_branch = short_branch_form(); | |
4071 const char *name = short_branch->_ident; | |
4072 | |
4073 // Construct short_branch_version() method. | |
4074 fprintf(fp_cpp, "// Build short branch version of this instruction\n"); | |
4075 fprintf(fp_cpp, "MachNode *%sNode::short_branch_version(Compile* C) {\n", this->_ident); | |
4076 // Create the MachNode object | |
4077 fprintf(fp_cpp, " %sNode *node = new (C) %sNode();\n", name, name); | |
4078 if( is_ideal_if() ) { | |
4079 fprintf(fp_cpp, " node->_prob = _prob;\n"); | |
4080 fprintf(fp_cpp, " node->_fcnt = _fcnt;\n"); | |
4081 } | |
4082 // Fill in the bottom_type where requested | |
1541
b5fdf39b9749
6953576: bottom_type for matched AddPNodes doesn't always agree with ideal
never
parents:
1489
diff
changeset
|
4083 if ( this->captures_bottom_type(AD.globalNames()) ) { |
0 | 4084 fprintf(fp_cpp, " node->_bottom_type = bottom_type();\n"); |
4085 } | |
4086 | |
4087 fprintf(fp_cpp, "\n"); | |
4088 // Short branch version must use same node index for access | |
4089 // through allocator's tables | |
4090 fprintf(fp_cpp, " // Copy _idx, inputs and operands to new node\n"); | |
4091 fprintf(fp_cpp, " fill_new_machnode(node, C);\n"); | |
4092 | |
4093 // Return result and exit scope | |
4094 fprintf(fp_cpp, " return node;\n"); | |
4095 fprintf(fp_cpp, "}\n"); | |
4096 fprintf(fp_cpp,"\n"); | |
4097 return true; | |
4098 } | |
4099 return false; | |
4100 } | |
4101 | |
4102 | |
4103 //---------------------------buildMachNodeGenerator---------------------------- | |
4104 // Build switch to invoke appropriate "new" MachNode for an opcode | |
4105 void ArchDesc::buildMachNodeGenerator(FILE *fp_cpp) { | |
4106 | |
4107 // Build switch to invoke 'new' for a specific MachNode | |
4108 fprintf(fp_cpp, "\n"); | |
4109 fprintf(fp_cpp, "\n"); | |
4110 fprintf(fp_cpp, | |
4111 "//------------------------- MachNode Generator ---------------\n"); | |
4112 fprintf(fp_cpp, | |
4113 "// A switch statement on the dense-packed user-defined type system\n" | |
4114 "// that invokes 'new' on the corresponding class constructor.\n"); | |
4115 fprintf(fp_cpp, "\n"); | |
4116 fprintf(fp_cpp, "MachNode *State::MachNodeGenerator"); | |
4117 fprintf(fp_cpp, "(int opcode, Compile* C)"); | |
4118 fprintf(fp_cpp, "{\n"); | |
4119 fprintf(fp_cpp, " switch(opcode) {\n"); | |
4120 | |
4121 // Provide constructor for all user-defined instructions | |
4122 _instructions.reset(); | |
4123 int opIndex = operandFormCount(); | |
4124 InstructForm *inst; | |
4125 for( ; (inst = (InstructForm*)_instructions.iter()) != NULL; ) { | |
4126 // Ensure that matrule is defined. | |
4127 if ( inst->_matrule == NULL ) continue; | |
4128 | |
4129 int opcode = opIndex++; | |
4130 const char *opClass = inst->_ident; | |
4131 char *opType = NULL; | |
4132 | |
4133 // Generate the case statement for this instruction | |
4134 fprintf(fp_cpp, " case %s_rule:", opClass); | |
4135 | |
4136 // Start local scope | |
6850 | 4137 fprintf(fp_cpp, " {\n"); |
0 | 4138 // Generate code to construct the new MachNode |
4139 buildMachNode(fp_cpp, inst, " "); | |
4140 // Return result and exit scope | |
4141 fprintf(fp_cpp, " return node;\n"); | |
4142 fprintf(fp_cpp, " }\n"); | |
4143 } | |
4144 | |
4145 // Generate the default case for switch(opcode) | |
4146 fprintf(fp_cpp, " \n"); | |
4147 fprintf(fp_cpp, " default:\n"); | |
4148 fprintf(fp_cpp, " fprintf(stderr, \"Default MachNode Generator invoked for: \\n\");\n"); | |
4149 fprintf(fp_cpp, " fprintf(stderr, \" opcode = %cd\\n\", opcode);\n", '%'); | |
4150 fprintf(fp_cpp, " break;\n"); | |
4151 fprintf(fp_cpp, " };\n"); | |
4152 | |
4153 // Generate the closing for method Matcher::MachNodeGenerator | |
4154 fprintf(fp_cpp, " return NULL;\n"); | |
4155 fprintf(fp_cpp, "}\n"); | |
4156 } | |
4157 | |
4158 | |
4159 //---------------------------buildInstructMatchCheck-------------------------- | |
4160 // Output the method to Matcher which checks whether or not a specific | |
4161 // instruction has a matching rule for the host architecture. | |
4162 void ArchDesc::buildInstructMatchCheck(FILE *fp_cpp) const { | |
4163 fprintf(fp_cpp, "\n\n"); | |
4164 fprintf(fp_cpp, "const bool Matcher::has_match_rule(int opcode) {\n"); | |
4165 fprintf(fp_cpp, " assert(_last_machine_leaf < opcode && opcode < _last_opcode, \"opcode in range\");\n"); | |
4166 fprintf(fp_cpp, " return _hasMatchRule[opcode];\n"); | |
4167 fprintf(fp_cpp, "}\n\n"); | |
4168 | |
4169 fprintf(fp_cpp, "const bool Matcher::_hasMatchRule[_last_opcode] = {\n"); | |
4170 int i; | |
4171 for (i = 0; i < _last_opcode - 1; i++) { | |
4172 fprintf(fp_cpp, " %-5s, // %s\n", | |
4173 _has_match_rule[i] ? "true" : "false", | |
4174 NodeClassNames[i]); | |
4175 } | |
4176 fprintf(fp_cpp, " %-5s // %s\n", | |
4177 _has_match_rule[i] ? "true" : "false", | |
4178 NodeClassNames[i]); | |
4179 fprintf(fp_cpp, "};\n"); | |
4180 } | |
4181 | |
4182 //---------------------------buildFrameMethods--------------------------------- | |
4183 // Output the methods to Matcher which specify frame behavior | |
4184 void ArchDesc::buildFrameMethods(FILE *fp_cpp) { | |
4185 fprintf(fp_cpp,"\n\n"); | |
4186 // Stack Direction | |
4187 fprintf(fp_cpp,"bool Matcher::stack_direction() const { return %s; }\n\n", | |
4188 _frame->_direction ? "true" : "false"); | |
4189 // Sync Stack Slots | |
4190 fprintf(fp_cpp,"int Compile::sync_stack_slots() const { return %s; }\n\n", | |
4191 _frame->_sync_stack_slots); | |
4192 // Java Stack Alignment | |
4193 fprintf(fp_cpp,"uint Matcher::stack_alignment_in_bytes() { return %s; }\n\n", | |
4194 _frame->_alignment); | |
4195 // Java Return Address Location | |
4196 fprintf(fp_cpp,"OptoReg::Name Matcher::return_addr() const {"); | |
4197 if (_frame->_return_addr_loc) { | |
4198 fprintf(fp_cpp," return OptoReg::Name(%s_num); }\n\n", | |
4199 _frame->_return_addr); | |
4200 } | |
4201 else { | |
4202 fprintf(fp_cpp," return OptoReg::stack2reg(%s); }\n\n", | |
4203 _frame->_return_addr); | |
4204 } | |
4205 // Java Stack Slot Preservation | |
4206 fprintf(fp_cpp,"uint Compile::in_preserve_stack_slots() "); | |
4207 fprintf(fp_cpp,"{ return %s; }\n\n", _frame->_in_preserve_slots); | |
4208 // Top Of Stack Slot Preservation, for both Java and C | |
4209 fprintf(fp_cpp,"uint Compile::out_preserve_stack_slots() "); | |
4210 fprintf(fp_cpp,"{ return SharedRuntime::out_preserve_stack_slots(); }\n\n"); | |
4211 // varargs C out slots killed | |
4212 fprintf(fp_cpp,"uint Compile::varargs_C_out_slots_killed() const "); | |
4213 fprintf(fp_cpp,"{ return %s; }\n\n", _frame->_varargs_C_out_slots_killed); | |
4214 // Java Argument Position | |
4215 fprintf(fp_cpp,"void Matcher::calling_convention(BasicType *sig_bt, VMRegPair *regs, uint length, bool is_outgoing) {\n"); | |
4216 fprintf(fp_cpp,"%s\n", _frame->_calling_convention); | |
4217 fprintf(fp_cpp,"}\n\n"); | |
4218 // Native Argument Position | |
4219 fprintf(fp_cpp,"void Matcher::c_calling_convention(BasicType *sig_bt, VMRegPair *regs, uint length) {\n"); | |
4220 fprintf(fp_cpp,"%s\n", _frame->_c_calling_convention); | |
4221 fprintf(fp_cpp,"}\n\n"); | |
4222 // Java Return Value Location | |
4223 fprintf(fp_cpp,"OptoRegPair Matcher::return_value(int ideal_reg, bool is_outgoing) {\n"); | |
4224 fprintf(fp_cpp,"%s\n", _frame->_return_value); | |
4225 fprintf(fp_cpp,"}\n\n"); | |
4226 // Native Return Value Location | |
4227 fprintf(fp_cpp,"OptoRegPair Matcher::c_return_value(int ideal_reg, bool is_outgoing) {\n"); | |
4228 fprintf(fp_cpp,"%s\n", _frame->_c_return_value); | |
4229 fprintf(fp_cpp,"}\n\n"); | |
4230 | |
4231 // Inline Cache Register, mask definition, and encoding | |
4232 fprintf(fp_cpp,"OptoReg::Name Matcher::inline_cache_reg() {"); | |
4233 fprintf(fp_cpp," return OptoReg::Name(%s_num); }\n\n", | |
4234 _frame->_inline_cache_reg); | |
4235 fprintf(fp_cpp,"int Matcher::inline_cache_reg_encode() {"); | |
4236 fprintf(fp_cpp," return _regEncode[inline_cache_reg()]; }\n\n"); | |
4237 | |
4238 // Interpreter's Method Oop Register, mask definition, and encoding | |
4239 fprintf(fp_cpp,"OptoReg::Name Matcher::interpreter_method_oop_reg() {"); | |
4240 fprintf(fp_cpp," return OptoReg::Name(%s_num); }\n\n", | |
4241 _frame->_interpreter_method_oop_reg); | |
4242 fprintf(fp_cpp,"int Matcher::interpreter_method_oop_reg_encode() {"); | |
4243 fprintf(fp_cpp," return _regEncode[interpreter_method_oop_reg()]; }\n\n"); | |
4244 | |
4245 // Interpreter's Frame Pointer Register, mask definition, and encoding | |
4246 fprintf(fp_cpp,"OptoReg::Name Matcher::interpreter_frame_pointer_reg() {"); | |
4247 if (_frame->_interpreter_frame_pointer_reg == NULL) | |
4248 fprintf(fp_cpp," return OptoReg::Bad; }\n\n"); | |
4249 else | |
4250 fprintf(fp_cpp," return OptoReg::Name(%s_num); }\n\n", | |
4251 _frame->_interpreter_frame_pointer_reg); | |
4252 | |
4253 // Frame Pointer definition | |
4254 /* CNC - I can not contemplate having a different frame pointer between | |
4255 Java and native code; makes my head hurt to think about it. | |
4256 fprintf(fp_cpp,"OptoReg::Name Matcher::frame_pointer() const {"); | |
4257 fprintf(fp_cpp," return OptoReg::Name(%s_num); }\n\n", | |
4258 _frame->_frame_pointer); | |
4259 */ | |
4260 // (Native) Frame Pointer definition | |
4261 fprintf(fp_cpp,"OptoReg::Name Matcher::c_frame_pointer() const {"); | |
4262 fprintf(fp_cpp," return OptoReg::Name(%s_num); }\n\n", | |
4263 _frame->_frame_pointer); | |
4264 | |
4265 // Number of callee-save + always-save registers for calling convention | |
4266 fprintf(fp_cpp, "// Number of callee-save + always-save registers\n"); | |
4267 fprintf(fp_cpp, "int Matcher::number_of_saved_registers() {\n"); | |
4268 RegDef *rdef; | |
4269 int nof_saved_registers = 0; | |
4270 _register->reset_RegDefs(); | |
4271 while( (rdef = _register->iter_RegDefs()) != NULL ) { | |
4272 if( !strcmp(rdef->_callconv, "SOE") || !strcmp(rdef->_callconv, "AS") ) | |
4273 ++nof_saved_registers; | |
4274 } | |
4275 fprintf(fp_cpp, " return %d;\n", nof_saved_registers); | |
4276 fprintf(fp_cpp, "};\n\n"); | |
4277 } | |
4278 | |
4279 | |
4280 | |
4281 | |
4282 static int PrintAdlcCisc = 0; | |
4283 //---------------------------identify_cisc_spilling---------------------------- | |
4284 // Get info for the CISC_oracle and MachNode::cisc_version() | |
4285 void ArchDesc::identify_cisc_spill_instructions() { | |
4286 | |
6850 | 4287 if (_frame == NULL) |
4288 return; | |
4289 | |
0 | 4290 // Find the user-defined operand for cisc-spilling |
4291 if( _frame->_cisc_spilling_operand_name != NULL ) { | |
4292 const Form *form = _globalNames[_frame->_cisc_spilling_operand_name]; | |
4293 OperandForm *oper = form ? form->is_operand() : NULL; | |
4294 // Verify the user's suggestion | |
4295 if( oper != NULL ) { | |
4296 // Ensure that match field is defined. | |
4297 if ( oper->_matrule != NULL ) { | |
4298 MatchRule &mrule = *oper->_matrule; | |
4299 if( strcmp(mrule._opType,"AddP") == 0 ) { | |
4300 MatchNode *left = mrule._lChild; | |
4301 MatchNode *right= mrule._rChild; | |
4302 if( left != NULL && right != NULL ) { | |
4303 const Form *left_op = _globalNames[left->_opType]->is_operand(); | |
4304 const Form *right_op = _globalNames[right->_opType]->is_operand(); | |
4305 if( (left_op != NULL && right_op != NULL) | |
4306 && (left_op->interface_type(_globalNames) == Form::register_interface) | |
4307 && (right_op->interface_type(_globalNames) == Form::constant_interface) ) { | |
4308 // Successfully verified operand | |
4309 set_cisc_spill_operand( oper ); | |
4310 if( _cisc_spill_debug ) { | |
4311 fprintf(stderr, "\n\nVerified CISC-spill operand %s\n\n", oper->_ident); | |
4312 } | |
4313 } | |
4314 } | |
4315 } | |
4316 } | |
4317 } | |
4318 } | |
4319 | |
4320 if( cisc_spill_operand() != NULL ) { | |
4321 // N^2 comparison of instructions looking for a cisc-spilling version | |
4322 _instructions.reset(); | |
4323 InstructForm *instr; | |
4324 for( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) { | |
4325 // Ensure that match field is defined. | |
4326 if ( instr->_matrule == NULL ) continue; | |
4327 | |
4328 MatchRule &mrule = *instr->_matrule; | |
4329 Predicate *pred = instr->build_predicate(); | |
4330 | |
4331 // Grab the machine type of the operand | |
4332 const char *rootOp = instr->_ident; | |
4333 mrule._machType = rootOp; | |
4334 | |
4335 // Find result type for match | |
4336 const char *result = instr->reduce_result(); | |
4337 | |
4338 if( PrintAdlcCisc ) fprintf(stderr, " new instruction %s \n", instr->_ident ? instr->_ident : " "); | |
4339 bool found_cisc_alternate = false; | |
4340 _instructions.reset2(); | |
4341 InstructForm *instr2; | |
4342 for( ; !found_cisc_alternate && (instr2 = (InstructForm*)_instructions.iter2()) != NULL; ) { | |
4343 // Ensure that match field is defined. | |
4344 if( PrintAdlcCisc ) fprintf(stderr, " instr2 == %s \n", instr2->_ident ? instr2->_ident : " "); | |
4345 if ( instr2->_matrule != NULL | |
4346 && (instr != instr2 ) // Skip self | |
4347 && (instr2->reduce_result() != NULL) // want same result | |
4348 && (strcmp(result, instr2->reduce_result()) == 0)) { | |
4349 MatchRule &mrule2 = *instr2->_matrule; | |
4350 Predicate *pred2 = instr2->build_predicate(); | |
4351 found_cisc_alternate = instr->cisc_spills_to(*this, instr2); | |
4352 } | |
4353 } | |
4354 } | |
4355 } | |
4356 } | |
4357 | |
4358 //---------------------------build_cisc_spilling------------------------------- | |
4359 // Get info for the CISC_oracle and MachNode::cisc_version() | |
4360 void ArchDesc::build_cisc_spill_instructions(FILE *fp_hpp, FILE *fp_cpp) { | |
4361 // Output the table for cisc spilling | |
4362 fprintf(fp_cpp, "// The following instructions can cisc-spill\n"); | |
4363 _instructions.reset(); | |
4364 InstructForm *inst = NULL; | |
4365 for(; (inst = (InstructForm*)_instructions.iter()) != NULL; ) { | |
4366 // Ensure this is a machine-world instruction | |
4367 if ( inst->ideal_only() ) continue; | |
4368 const char *inst_name = inst->_ident; | |
4369 int operand = inst->cisc_spill_operand(); | |
4370 if( operand != AdlcVMDeps::Not_cisc_spillable ) { | |
4371 InstructForm *inst2 = inst->cisc_spill_alternate(); | |
4372 fprintf(fp_cpp, "// %s can cisc-spill operand %d to %s\n", inst->_ident, operand, inst2->_ident); | |
4373 } | |
4374 } | |
4375 fprintf(fp_cpp, "\n\n"); | |
4376 } | |
4377 | |
4378 //---------------------------identify_short_branches---------------------------- | |
4379 // Get info for our short branch replacement oracle. | |
4380 void ArchDesc::identify_short_branches() { | |
4381 // Walk over all instructions, checking to see if they match a short | |
4382 // branching alternate. | |
4383 _instructions.reset(); | |
4384 InstructForm *instr; | |
4385 while( (instr = (InstructForm*)_instructions.iter()) != NULL ) { | |
4386 // The instruction must have a match rule. | |
4387 if (instr->_matrule != NULL && | |
4388 instr->is_short_branch()) { | |
4389 | |
4390 _instructions.reset2(); | |
4391 InstructForm *instr2; | |
4392 while( (instr2 = (InstructForm*)_instructions.iter2()) != NULL ) { | |
4393 instr2->check_branch_variant(*this, instr); | |
4394 } | |
4395 } | |
4396 } | |
4397 } | |
4398 | |
4399 | |
4400 //---------------------------identify_unique_operands--------------------------- | |
4401 // Identify unique operands. | |
4402 void ArchDesc::identify_unique_operands() { | |
4403 // Walk over all instructions. | |
4404 _instructions.reset(); | |
4405 InstructForm *instr; | |
4406 while( (instr = (InstructForm*)_instructions.iter()) != NULL ) { | |
4407 // Ensure this is a machine-world instruction | |
4408 if (!instr->ideal_only()) { | |
4409 instr->set_unique_opnds(); | |
4410 } | |
4411 } | |
4412 } |