annotate src/share/vm/opto/chaitin.hpp @ 9126:bc26f978b0ce

HotSpotResolvedObjectType: implement hasFinalizeSubclass() correctly don't use the (wrong) cached value, but ask the runtime on each request. Fixes regression on xml.* benchmarks @ specjvm2008. The problem was: After the constructor of Object was deoptimized due to an assumption violation, it was recompiled again after some time. However, on recompilation, the value of hasFinalizeSubclass for the class was not updated and it was compiled again with a, now wrong, assumption, which then triggers deoptimization again. This was repeated until it hit the recompilation limit (defined by PerMethodRecompilationCutoff), and therefore only executed by the interpreter from now on, causing the performance regression.
author Bernhard Urban <bernhard.urban@jku.at>
date Mon, 15 Apr 2013 19:54:58 +0200
parents 056ab43544a4
children 8373c19be854
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1 /*
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2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #ifndef SHARE_VM_OPTO_CHAITIN_HPP
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26 #define SHARE_VM_OPTO_CHAITIN_HPP
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27
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28 #include "code/vmreg.hpp"
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29 #include "libadt/port.hpp"
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30 #include "memory/resourceArea.hpp"
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31 #include "opto/connode.hpp"
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32 #include "opto/live.hpp"
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33 #include "opto/matcher.hpp"
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34 #include "opto/phase.hpp"
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35 #include "opto/regalloc.hpp"
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36 #include "opto/regmask.hpp"
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37
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38 class LoopTree;
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39 class MachCallNode;
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40 class MachSafePointNode;
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41 class Matcher;
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42 class PhaseCFG;
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43 class PhaseLive;
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44 class PhaseRegAlloc;
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45 class PhaseChaitin;
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46
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47 #define OPTO_DEBUG_SPLIT_FREQ BLOCK_FREQUENCY(0.001)
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48 #define OPTO_LRG_HIGH_FREQ BLOCK_FREQUENCY(0.25)
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49
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50 //------------------------------LRG--------------------------------------------
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51 // Live-RanGe structure.
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52 class LRG : public ResourceObj {
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53 friend class VMStructs;
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54 public:
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55 enum { SPILL_REG=29999 }; // Register number of a spilled LRG
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56
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57 double _cost; // 2 for loads/1 for stores times block freq
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58 double _area; // Sum of all simultaneously live values
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59 double score() const; // Compute score from cost and area
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60 double _maxfreq; // Maximum frequency of any def or use
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61
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62 Node *_def; // Check for multi-def live ranges
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63 #ifndef PRODUCT
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64 GrowableArray<Node*>* _defs;
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65 #endif
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66
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67 uint _risk_bias; // Index of LRG which we want to avoid color
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68 uint _copy_bias; // Index of LRG which we want to share color
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69
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70 uint _next; // Index of next LRG in linked list
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71 uint _prev; // Index of prev LRG in linked list
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72 private:
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73 uint _reg; // Chosen register; undefined if mask is plural
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74 public:
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75 // Return chosen register for this LRG. Error if the LRG is not bound to
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76 // a single register.
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77 OptoReg::Name reg() const { return OptoReg::Name(_reg); }
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78 void set_reg( OptoReg::Name r ) { _reg = r; }
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79
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80 private:
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81 uint _eff_degree; // Effective degree: Sum of neighbors _num_regs
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82 public:
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83 int degree() const { assert( _degree_valid, "" ); return _eff_degree; }
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84 // Degree starts not valid and any change to the IFG neighbor
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85 // set makes it not valid.
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86 void set_degree( uint degree ) { _eff_degree = degree; debug_only(_degree_valid = 1;) }
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87 // Made a change that hammered degree
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88 void invalid_degree() { debug_only(_degree_valid=0;) }
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89 // Incrementally modify degree. If it was correct, it should remain correct
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90 void inc_degree( uint mod ) { _eff_degree += mod; }
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91 // Compute the degree between 2 live ranges
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92 int compute_degree( LRG &l ) const;
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93
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94 private:
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95 RegMask _mask; // Allowed registers for this LRG
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96 uint _mask_size; // cache of _mask.Size();
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97 public:
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98 int compute_mask_size() const { return _mask.is_AllStack() ? 65535 : _mask.Size(); }
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99 void set_mask_size( int size ) {
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100 assert((size == 65535) || (size == (int)_mask.Size()), "");
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101 _mask_size = size;
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102 #ifdef ASSERT
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103 _msize_valid=1;
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104 if (_is_vector) {
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105 assert(!_fat_proj, "sanity");
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106 _mask.verify_sets(_num_regs);
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107 } else if (_num_regs == 2 && !_fat_proj) {
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108 _mask.verify_pairs();
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109 }
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110 #endif
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111 }
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112 void compute_set_mask_size() { set_mask_size(compute_mask_size()); }
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113 int mask_size() const { assert( _msize_valid, "mask size not valid" );
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114 return _mask_size; }
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115 // Get the last mask size computed, even if it does not match the
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116 // count of bits in the current mask.
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117 int get_invalid_mask_size() const { return _mask_size; }
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118 const RegMask &mask() const { return _mask; }
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119 void set_mask( const RegMask &rm ) { _mask = rm; debug_only(_msize_valid=0;)}
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120 void AND( const RegMask &rm ) { _mask.AND(rm); debug_only(_msize_valid=0;)}
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121 void SUBTRACT( const RegMask &rm ) { _mask.SUBTRACT(rm); debug_only(_msize_valid=0;)}
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122 void Clear() { _mask.Clear() ; debug_only(_msize_valid=1); _mask_size = 0; }
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123 void Set_All() { _mask.Set_All(); debug_only(_msize_valid=1); _mask_size = RegMask::CHUNK_SIZE; }
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124 void Insert( OptoReg::Name reg ) { _mask.Insert(reg); debug_only(_msize_valid=0;) }
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125 void Remove( OptoReg::Name reg ) { _mask.Remove(reg); debug_only(_msize_valid=0;) }
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126 void clear_to_pairs() { _mask.clear_to_pairs(); debug_only(_msize_valid=0;) }
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127 void clear_to_sets() { _mask.clear_to_sets(_num_regs); debug_only(_msize_valid=0;) }
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128
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129 // Number of registers this live range uses when it colors
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130 private:
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131 uint8 _num_regs; // 2 for Longs and Doubles, 1 for all else
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132 // except _num_regs is kill count for fat_proj
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133 public:
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134 int num_regs() const { return _num_regs; }
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135 void set_num_regs( int reg ) { assert( _num_regs == reg || !_num_regs, "" ); _num_regs = reg; }
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136
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137 private:
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138 // Number of physical registers this live range uses when it colors
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139 // Architecture and register-set dependent
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140 uint8 _reg_pressure;
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141 public:
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142 void set_reg_pressure(int i) { _reg_pressure = i; }
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143 int reg_pressure() const { return _reg_pressure; }
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144
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145 // How much 'wiggle room' does this live range have?
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146 // How many color choices can it make (scaled by _num_regs)?
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147 int degrees_of_freedom() const { return mask_size() - _num_regs; }
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148 // Bound LRGs have ZERO degrees of freedom. We also count
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149 // must_spill as bound.
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150 bool is_bound () const { return _is_bound; }
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151 // Negative degrees-of-freedom; even with no neighbors this
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152 // live range must spill.
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153 bool not_free() const { return degrees_of_freedom() < 0; }
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154 // Is this live range of "low-degree"? Trivially colorable?
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155 bool lo_degree () const { return degree() <= degrees_of_freedom(); }
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156 // Is this live range just barely "low-degree"? Trivially colorable?
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157 bool just_lo_degree () const { return degree() == degrees_of_freedom(); }
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158
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159 uint _is_oop:1, // Live-range holds an oop
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160 _is_float:1, // True if in float registers
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161 _is_vector:1, // True if in vector registers
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162 _was_spilled1:1, // True if prior spilling on def
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163 _was_spilled2:1, // True if twice prior spilling on def
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164 _is_bound:1, // live range starts life with no
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165 // degrees of freedom.
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166 _direct_conflict:1, // True if def and use registers in conflict
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167 _must_spill:1, // live range has lost all degrees of freedom
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168 // If _fat_proj is set, live range does NOT require aligned, adjacent
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169 // registers and has NO interferences.
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170 // If _fat_proj is clear, live range requires num_regs() to be a power of
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171 // 2, and it requires registers to form an aligned, adjacent set.
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172 _fat_proj:1, //
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173 _was_lo:1, // Was lo-degree prior to coalesce
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174 _msize_valid:1, // _mask_size cache valid
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175 _degree_valid:1, // _degree cache valid
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176 _has_copy:1, // Adjacent to some copy instruction
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177 _at_risk:1; // Simplify says this guy is at risk to spill
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178
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179
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180 // Alive if non-zero, dead if zero
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181 bool alive() const { return _def != NULL; }
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182 bool is_multidef() const { return _def == NodeSentinel; }
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183 bool is_singledef() const { return _def != NodeSentinel; }
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184
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185 #ifndef PRODUCT
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186 void dump( ) const;
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187 #endif
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188 };
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189
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190 //------------------------------IFG--------------------------------------------
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191 // InterFerence Graph
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192 // An undirected graph implementation. Created with a fixed number of
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193 // vertices. Edges can be added & tested. Vertices can be removed, then
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194 // added back later with all edges intact. Can add edges between one vertex
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195 // and a list of other vertices. Can union vertices (and their edges)
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196 // together. The IFG needs to be really really fast, and also fairly
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197 // abstract! It needs abstraction so I can fiddle with the implementation to
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198 // get even more speed.
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199 class PhaseIFG : public Phase {
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200 friend class VMStructs;
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201 // Current implementation: a triangular adjacency list.
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202
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203 // Array of adjacency-lists, indexed by live-range number
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204 IndexSet *_adjs;
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205
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206 // Assertion bit for proper use of Squaring
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207 bool _is_square;
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208
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209 // Live range structure goes here
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210 LRG *_lrgs; // Array of LRG structures
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211
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212 public:
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213 // Largest live-range number
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214 uint _maxlrg;
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215
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216 Arena *_arena;
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217
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218 // Keep track of inserted and deleted Nodes
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219 VectorSet *_yanked;
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220
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221 PhaseIFG( Arena *arena );
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222 void init( uint maxlrg );
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223
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224 // Add edge between a and b. Returns true if actually addded.
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225 int add_edge( uint a, uint b );
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226
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227 // Add edge between a and everything in the vector
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228 void add_vector( uint a, IndexSet *vec );
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229
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230 // Test for edge existance
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231 int test_edge( uint a, uint b ) const;
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232
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233 // Square-up matrix for faster Union
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234 void SquareUp();
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235
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236 // Return number of LRG neighbors
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237 uint neighbor_cnt( uint a ) const { return _adjs[a].count(); }
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238 // Union edges of b into a on Squared-up matrix
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239 void Union( uint a, uint b );
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240 // Test for edge in Squared-up matrix
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241 int test_edge_sq( uint a, uint b ) const;
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242 // Yank a Node and all connected edges from the IFG. Be prepared to
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243 // re-insert the yanked Node in reverse order of yanking. Return a
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244 // list of neighbors (edges) yanked.
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245 IndexSet *remove_node( uint a );
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246 // Reinsert a yanked Node
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247 void re_insert( uint a );
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248 // Return set of neighbors
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249 IndexSet *neighbors( uint a ) const { return &_adjs[a]; }
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250
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251 #ifndef PRODUCT
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252 // Dump the IFG
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253 void dump() const;
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254 void stats() const;
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255 void verify( const PhaseChaitin * ) const;
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256 #endif
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257
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258 //--------------- Live Range Accessors
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259 LRG &lrgs(uint idx) const { assert(idx < _maxlrg, "oob"); return _lrgs[idx]; }
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260
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261 // Compute and set effective degree. Might be folded into SquareUp().
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262 void Compute_Effective_Degree();
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263
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264 // Compute effective degree as the sum of neighbors' _sizes.
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265 int effective_degree( uint lidx ) const;
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266 };
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267
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268 // TEMPORARILY REPLACED WITH COMMAND LINE FLAG
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269
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270 //// !!!!! Magic Constants need to move into ad file
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271 #ifdef SPARC
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272 //#define FLOAT_PRESSURE 30 /* SFLT_REG_mask.Size() - 1 */
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273 //#define INT_PRESSURE 23 /* NOTEMP_I_REG_mask.Size() - 1 */
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274 #define FLOAT_INCREMENT(regs) regs
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275 #else
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276 //#define FLOAT_PRESSURE 6
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277 //#define INT_PRESSURE 6
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278 #define FLOAT_INCREMENT(regs) 1
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279 #endif
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280
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281 //------------------------------Chaitin----------------------------------------
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282 // Briggs-Chaitin style allocation, mostly.
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283 class PhaseChaitin : public PhaseRegAlloc {
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284 friend class VMStructs;
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285
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286 int _trip_cnt;
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287 int _alternate;
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288
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289 uint _maxlrg; // Max live range number
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290 LRG &lrgs(uint idx) const { return _ifg->lrgs(idx); }
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291 PhaseLive *_live; // Liveness, used in the interference graph
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292 PhaseIFG *_ifg; // Interference graph (for original chunk)
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293 Node_List **_lrg_nodes; // Array of node; lists for lrgs which spill
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294 VectorSet _spilled_once; // Nodes that have been spilled
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295 VectorSet _spilled_twice; // Nodes that have been spilled twice
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296
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297 LRG_List _names; // Map from Nodes to Live RanGes
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298
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299 // Union-find map. Declared as a short for speed.
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300 // Indexed by live-range number, it returns the compacted live-range number
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301 LRG_List _uf_map;
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302 // Reset the Union-Find map to identity
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303 void reset_uf_map( uint maxlrg );
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304 // Remove the need for the Union-Find mapping
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305 void compress_uf_map_for_nodes( );
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306
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307 // Combine the Live Range Indices for these 2 Nodes into a single live
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308 // range. Future requests for any Node in either live range will
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309 // return the live range index for the combined live range.
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310 void Union( const Node *src, const Node *dst );
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311
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312 void new_lrg( const Node *x, uint lrg );
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313
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314 // Compact live ranges, removing unused ones. Return new maxlrg.
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315 void compact();
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316
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317 uint _lo_degree; // Head of lo-degree LRGs list
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318 uint _lo_stk_degree; // Head of lo-stk-degree LRGs list
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319 uint _hi_degree; // Head of hi-degree LRGs list
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320 uint _simplified; // Linked list head of simplified LRGs
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321
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322 // Helper functions for Split()
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323 uint split_DEF( Node *def, Block *b, int loc, uint max, Node **Reachblock, Node **debug_defs, GrowableArray<uint> splits, int slidx );
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324 uint split_USE( Node *def, Block *b, Node *use, uint useidx, uint max, bool def_down, bool cisc_sp, GrowableArray<uint> splits, int slidx );
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325 int clone_projs( Block *b, uint idx, Node *con, Node *copy, uint &maxlrg );
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326 Node *split_Rematerialize(Node *def, Block *b, uint insidx, uint &maxlrg, GrowableArray<uint> splits,
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327 int slidx, uint *lrg2reach, Node **Reachblock, bool walkThru);
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328 // True if lidx is used before any real register is def'd in the block
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329 bool prompt_use( Block *b, uint lidx );
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330 Node *get_spillcopy_wide( Node *def, Node *use, uint uidx );
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331 // Insert the spill at chosen location. Skip over any intervening Proj's or
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332 // Phis. Skip over a CatchNode and projs, inserting in the fall-through block
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333 // instead. Update high-pressure indices. Create a new live range.
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334 void insert_proj( Block *b, uint i, Node *spill, uint maxlrg );
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335
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336 bool is_high_pressure( Block *b, LRG *lrg, uint insidx );
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337
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338 uint _oldphi; // Node index which separates pre-allocation nodes
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339
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340 Block **_blks; // Array of blocks sorted by frequency for coalescing
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341
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342 float _high_frequency_lrg; // Frequency at which LRG will be spilled for debug info
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343
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344 #ifndef PRODUCT
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345 bool _trace_spilling;
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346 #endif
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347
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348 public:
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349 PhaseChaitin( uint unique, PhaseCFG &cfg, Matcher &matcher );
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350 ~PhaseChaitin() {}
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351
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352 // Convert a Node into a Live Range Index - a lidx
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353 uint Find( const Node *n ) {
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354 uint lidx = n2lidx(n);
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355 uint uf_lidx = _uf_map[lidx];
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356 return (uf_lidx == lidx) ? uf_lidx : Find_compress(n);
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357 }
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358 uint Find_const( uint lrg ) const;
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359 uint Find_const( const Node *n ) const;
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360
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361 // Do all the real work of allocate
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362 void Register_Allocate();
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363
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364 uint n2lidx( const Node *n ) const { return _names[n->_idx]; }
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365
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366 float high_frequency_lrg() const { return _high_frequency_lrg; }
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367
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368 #ifndef PRODUCT
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369 bool trace_spilling() const { return _trace_spilling; }
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370 #endif
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371
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372 private:
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373 // De-SSA the world. Assign registers to Nodes. Use the same register for
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374 // all inputs to a PhiNode, effectively coalescing live ranges. Insert
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375 // copies as needed.
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376 void de_ssa();
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377 uint Find_compress( const Node *n );
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378 uint Find( uint lidx ) {
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379 uint uf_lidx = _uf_map[lidx];
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380 return (uf_lidx == lidx) ? uf_lidx : Find_compress(lidx);
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381 }
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382 uint Find_compress( uint lidx );
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383
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384 uint Find_id( const Node *n ) {
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385 uint retval = n2lidx(n);
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386 assert(retval == Find(n),"Invalid node to lidx mapping");
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387 return retval;
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388 }
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389
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390 // Add edge between reg and everything in the vector.
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391 // Same as _ifg->add_vector(reg,live) EXCEPT use the RegMask
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392 // information to trim the set of interferences. Return the
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393 // count of edges added.
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394 void interfere_with_live( uint reg, IndexSet *live );
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395 // Count register pressure for asserts
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396 uint count_int_pressure( IndexSet *liveout );
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397 uint count_float_pressure( IndexSet *liveout );
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398
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399 // Build the interference graph using virtual registers only.
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400 // Used for aggressive coalescing.
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401 void build_ifg_virtual( );
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402
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403 // Build the interference graph using physical registers when available.
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404 // That is, if 2 live ranges are simultaneously alive but in their
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405 // acceptable register sets do not overlap, then they do not interfere.
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406 uint build_ifg_physical( ResourceArea *a );
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407
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408 // Gather LiveRanGe information, including register masks and base pointer/
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409 // derived pointer relationships.
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410 void gather_lrg_masks( bool mod_cisc_masks );
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411
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412 // Force the bases of derived pointers to be alive at GC points.
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413 bool stretch_base_pointer_live_ranges( ResourceArea *a );
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414 // Helper to stretch above; recursively discover the base Node for
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415 // a given derived Node. Easy for AddP-related machine nodes, but
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416 // needs to be recursive for derived Phis.
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417 Node *find_base_for_derived( Node **derived_base_map, Node *derived, uint &maxlrg );
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418
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419 // Set the was-lo-degree bit. Conservative coalescing should not change the
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420 // colorability of the graph. If any live range was of low-degree before
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421 // coalescing, it should Simplify. This call sets the was-lo-degree bit.
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422 void set_was_low();
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423
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424 // Split live-ranges that must spill due to register conflicts (as opposed
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425 // to capacity spills). Typically these are things def'd in a register
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426 // and used on the stack or vice-versa.
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427 void pre_spill();
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428
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429 // Init LRG caching of degree, numregs. Init lo_degree list.
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430 void cache_lrg_info( );
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431
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432 // Simplify the IFG by removing LRGs of low degree with no copies
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433 void Pre_Simplify();
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434
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435 // Simplify the IFG by removing LRGs of low degree
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436 void Simplify();
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437
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438 // Select colors by re-inserting edges into the IFG.
605
98cb887364d3 6810672: Comment typos
twisti
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439 // Return TRUE if any spills occurred.
0
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440 uint Select( );
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441 // Helper function for select which allows biased coloring
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442 OptoReg::Name choose_color( LRG &lrg, int chunk );
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443 // Helper function which implements biasing heuristic
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444 OptoReg::Name bias_color( LRG &lrg, int chunk );
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445
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446 // Split uncolorable live ranges
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447 // Return new number of live ranges
6632
a1c7f6472621 7148109: C2 compiler consumes too much heap resources
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448 uint Split(uint maxlrg, ResourceArea* split_arena);
0
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449
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450 // Copy 'was_spilled'-edness from one Node to another.
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451 void copy_was_spilled( Node *src, Node *dst );
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452 // Set the 'spilled_once' or 'spilled_twice' flag on a node.
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453 void set_was_spilled( Node *n );
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454
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455 // Convert ideal spill-nodes into machine loads & stores
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456 // Set C->failing when fixup spills could not complete, node limit exceeded.
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457 void fixup_spills();
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458
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459 // Post-Allocation peephole copy removal
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460 void post_allocate_copy_removal();
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461 Node *skip_copies( Node *c );
923
a70508bb21c3 6862863: C2 compiler fails in elide_copy()
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462 // Replace the old node with the current live version of that value
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463 // and yank the old value if it's dead.
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464 int replace_and_yank_if_dead( Node *old, OptoReg::Name nreg,
a70508bb21c3 6862863: C2 compiler fails in elide_copy()
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465 Block *current_block, Node_List& value, Node_List& regnd ) {
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466 Node* v = regnd[nreg];
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467 assert(v->outcnt() != 0, "no dead values");
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468 old->replace_by(v);
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469 return yank_if_dead(old, current_block, &value, &regnd);
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470 }
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471
4776
5da7201222d5 7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
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472 int yank_if_dead( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) {
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473 return yank_if_dead_recurse(old, old, current_block, value, regnd);
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474 }
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475 int yank_if_dead_recurse(Node *old, Node *orig_old, Block *current_block,
5da7201222d5 7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
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476 Node_List *value, Node_List *regnd);
3934
8f47d8870d9a 7087453: PhaseChaitin::yank_if_dead() should handle MachTemp inputs
roland
parents: 2016
diff changeset
477 int yank( Node *old, Block *current_block, Node_List *value, Node_List *regnd );
0
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478 int elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List &regnd, bool can_change_regs );
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479 int use_prior_register( Node *copy, uint idx, Node *def, Block *current_block, Node_List &value, Node_List &regnd );
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480 bool may_be_copy_of_callee( Node *def ) const;
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481
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482 // If nreg already contains the same constant as val then eliminate it
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b683f557224b 6661247: Internal bug in 32-bit HotSpot optimizer while bit manipulations
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483 bool eliminate_copy_of_constant(Node* val, Node* n,
b683f557224b 6661247: Internal bug in 32-bit HotSpot optimizer while bit manipulations
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484 Block *current_block, Node_List& value, Node_List &regnd,
0
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485 OptoReg::Name nreg, OptoReg::Name nreg2);
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486 // Extend the node to LRG mapping
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487 void add_reference( const Node *node, const Node *old_node);
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488
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489 private:
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490
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491 static int _final_loads, _final_stores, _final_copies, _final_memoves;
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492 static double _final_load_cost, _final_store_cost, _final_copy_cost, _final_memove_cost;
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493 static int _conserv_coalesce, _conserv_coalesce_pair;
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494 static int _conserv_coalesce_trie, _conserv_coalesce_quad;
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495 static int _post_alloc;
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496 static int _lost_opp_pp_coalesce, _lost_opp_cflow_coalesce;
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497 static int _used_cisc_instructions, _unused_cisc_instructions;
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498 static int _allocator_attempts, _allocator_successes;
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499
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500 #ifndef PRODUCT
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501 static uint _high_pressure, _low_pressure;
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502
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503 void dump() const;
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504 void dump( const Node *n ) const;
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505 void dump( const Block * b ) const;
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506 void dump_degree_lists() const;
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507 void dump_simplified() const;
2016
361783318e7e 7004940: CTW: assert(!def_outside->member(r)) failed: Use of external LRG overlaps the same LRG
never
parents: 1972
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508 void dump_lrg( uint lidx, bool defs_only) const;
361783318e7e 7004940: CTW: assert(!def_outside->member(r)) failed: Use of external LRG overlaps the same LRG
never
parents: 1972
diff changeset
509 void dump_lrg( uint lidx) const {
361783318e7e 7004940: CTW: assert(!def_outside->member(r)) failed: Use of external LRG overlaps the same LRG
never
parents: 1972
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510 // dump defs and uses by default
361783318e7e 7004940: CTW: assert(!def_outside->member(r)) failed: Use of external LRG overlaps the same LRG
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511 dump_lrg(lidx, false);
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512 }
0
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513 void dump_bb( uint pre_order ) const;
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514
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515 // Verify that base pointers and derived pointers are still sane
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516 void verify_base_ptrs( ResourceArea *a ) const;
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517
566
91263420e1c6 6791852: assert(b->_nodes[insidx] == n,"got insidx set incorrectly")
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518 void verify( ResourceArea *a, bool verify_ifg = false ) const;
91263420e1c6 6791852: assert(b->_nodes[insidx] == n,"got insidx set incorrectly")
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519
0
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520 void dump_for_spill_split_recycle() const;
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521
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522 public:
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523 void dump_frame() const;
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524 char *dump_register( const Node *n, char *buf ) const;
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525 private:
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526 static void print_chaitin_statistics();
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527 #endif
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528 friend class PhaseCoalesce;
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529 friend class PhaseAggressiveCoalesce;
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530 friend class PhaseConservativeCoalesce;
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531 };
1972
f95d63e2154a 6989984: Use standard include model for Hospot
stefank
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532
f95d63e2154a 6989984: Use standard include model for Hospot
stefank
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533 #endif // SHARE_VM_OPTO_CHAITIN_HPP