Mercurial > hg > truffle
annotate src/share/vm/code/vmreg.hpp @ 6972:bd7a7ce2e264
6830717: replay of compilations would help with debugging
Summary: When java process crashed in compiler thread, repeat the compilation process will help finding root cause. This is done with using SA dump application class data and replay data from core dump, then use debug version of jvm to recompile the problematic java method.
Reviewed-by: kvn, twisti, sspitsyn
Contributed-by: yumin.qi@oracle.com
| author | minqi |
|---|---|
| date | Mon, 12 Nov 2012 14:03:53 -0800 |
| parents | b9a9ed0f8eeb |
| children | f0c2369fda5a |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 1998, 2012, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #ifndef SHARE_VM_CODE_VMREG_HPP |
| 26 #define SHARE_VM_CODE_VMREG_HPP | |
| 27 | |
| 28 #include "memory/allocation.hpp" | |
| 29 #include "utilities/globalDefinitions.hpp" | |
| 30 #ifdef TARGET_ARCH_x86 | |
| 31 # include "register_x86.hpp" | |
| 32 #endif | |
| 33 #ifdef TARGET_ARCH_sparc | |
| 34 # include "register_sparc.hpp" | |
| 35 #endif | |
| 36 #ifdef TARGET_ARCH_zero | |
| 37 # include "register_zero.hpp" | |
| 38 #endif | |
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39 #ifdef TARGET_ARCH_arm |
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40 # include "register_arm.hpp" |
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41 #endif |
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42 #ifdef TARGET_ARCH_ppc |
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43 # include "register_ppc.hpp" |
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44 #endif |
| 1972 | 45 #ifdef COMPILER2 |
| 46 #include "opto/adlcVMDeps.hpp" | |
| 47 #include "utilities/ostream.hpp" | |
| 48 #ifdef TARGET_ARCH_MODEL_x86_32 | |
| 49 # include "adfiles/adGlobals_x86_32.hpp" | |
| 50 #endif | |
| 51 #ifdef TARGET_ARCH_MODEL_x86_64 | |
| 52 # include "adfiles/adGlobals_x86_64.hpp" | |
| 53 #endif | |
| 54 #ifdef TARGET_ARCH_MODEL_sparc | |
| 55 # include "adfiles/adGlobals_sparc.hpp" | |
| 56 #endif | |
| 57 #ifdef TARGET_ARCH_MODEL_zero | |
| 58 # include "adfiles/adGlobals_zero.hpp" | |
| 59 #endif | |
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60 #ifdef TARGET_ARCH_MODEL_arm |
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61 # include "adfiles/adGlobals_arm.hpp" |
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62 #endif |
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63 #ifdef TARGET_ARCH_MODEL_ppc |
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64 # include "adfiles/adGlobals_ppc.hpp" |
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65 #endif |
| 1972 | 66 #endif |
| 67 | |
| 0 | 68 //------------------------------VMReg------------------------------------------ |
| 69 // The VM uses 'unwarped' stack slots; the compiler uses 'warped' stack slots. | |
| 70 // Register numbers below VMRegImpl::stack0 are the same for both. Register | |
| 71 // numbers above stack0 are either warped (in the compiler) or unwarped | |
| 72 // (in the VM). Unwarped numbers represent stack indices, offsets from | |
| 73 // the current stack pointer. Warped numbers are required during compilation | |
| 74 // when we do not yet know how big the frame will be. | |
| 75 | |
| 76 class VMRegImpl; | |
| 77 typedef VMRegImpl* VMReg; | |
| 78 | |
| 79 class VMRegImpl { | |
| 80 // friend class OopMap; | |
| 81 friend class VMStructs; | |
| 82 friend class OptoReg; | |
| 83 // friend class Location; | |
| 84 private: | |
| 85 enum { | |
| 86 BAD = -1 | |
| 87 }; | |
| 88 | |
| 89 | |
| 90 | |
| 91 static VMReg stack0; | |
| 92 // Names for registers | |
| 93 static const char *regName[]; | |
| 94 static const int register_count; | |
| 95 | |
| 96 | |
| 97 public: | |
| 98 | |
| 99 static VMReg as_VMReg(int val, bool bad_ok = false) { assert(val > BAD || bad_ok, "invalid"); return (VMReg) (intptr_t) val; } | |
| 100 | |
| 101 const char* name() { | |
| 102 if (is_reg()) { | |
| 103 return regName[value()]; | |
| 104 } else if (!is_valid()) { | |
| 105 return "BAD"; | |
| 106 } else { | |
| 107 // shouldn't really be called with stack | |
| 108 return "STACKED REG"; | |
| 109 } | |
| 110 } | |
| 111 static VMReg Bad() { return (VMReg) (intptr_t) BAD; } | |
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112 bool is_valid() const { return ((intptr_t) this) != BAD; } |
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113 bool is_stack() const { return (intptr_t) this >= (intptr_t) stack0; } |
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114 bool is_reg() const { return is_valid() && !is_stack(); } |
| 0 | 115 |
| 116 // A concrete register is a value that returns true for is_reg() and is | |
| 117 // also a register you could use in the assembler. On machines with | |
| 118 // 64bit registers only one half of the VMReg (and OptoReg) is considered | |
| 119 // concrete. | |
| 120 bool is_concrete(); | |
| 121 | |
| 122 // VMRegs are 4 bytes wide on all platforms | |
| 123 static const int stack_slot_size; | |
| 124 static const int slots_per_word; | |
| 125 | |
| 126 | |
| 127 // This really ought to check that the register is "real" in the sense that | |
| 128 // we don't try and get the VMReg number of a physical register that doesn't | |
| 129 // have an expressible part. That would be pd specific code | |
| 130 VMReg next() { | |
| 131 assert((is_reg() && value() < stack0->value() - 1) || is_stack(), "must be"); | |
| 132 return (VMReg)(intptr_t)(value() + 1); | |
| 133 } | |
| 6225 | 134 VMReg next(int i) { |
| 135 assert((is_reg() && value() < stack0->value() - i) || is_stack(), "must be"); | |
| 136 return (VMReg)(intptr_t)(value() + i); | |
| 137 } | |
| 0 | 138 VMReg prev() { |
| 139 assert((is_stack() && value() > stack0->value()) || (is_reg() && value() != 0), "must be"); | |
| 140 return (VMReg)(intptr_t)(value() - 1); | |
| 141 } | |
| 142 | |
| 143 | |
| 144 intptr_t value() const {return (intptr_t) this; } | |
| 145 | |
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146 void print_on(outputStream* st) const; |
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147 void print() const { print_on(tty); } |
| 0 | 148 |
| 149 // bias a stack slot. | |
| 150 // Typically used to adjust a virtual frame slots by amounts that are offset by | |
| 151 // amounts that are part of the native abi. The VMReg must be a stack slot | |
| 152 // and the result must be also. | |
| 153 | |
| 154 VMReg bias(int offset) { | |
| 155 assert(is_stack(), "must be"); | |
| 156 // VMReg res = VMRegImpl::as_VMReg(value() + offset); | |
| 157 VMReg res = stack2reg(reg2stack() + offset); | |
| 158 assert(res->is_stack(), "must be"); | |
| 159 return res; | |
| 160 } | |
| 161 | |
| 162 // Convert register numbers to stack slots and vice versa | |
| 163 static VMReg stack2reg( int idx ) { | |
| 164 return (VMReg) (intptr_t) (stack0->value() + idx); | |
| 165 } | |
| 166 | |
| 167 uintptr_t reg2stack() { | |
| 168 assert( is_stack(), "Not a stack-based register" ); | |
| 169 return value() - stack0->value(); | |
| 170 } | |
| 171 | |
| 172 static void set_regName(); | |
| 173 | |
| 1972 | 174 #ifdef TARGET_ARCH_x86 |
| 175 # include "vmreg_x86.hpp" | |
| 176 #endif | |
| 177 #ifdef TARGET_ARCH_sparc | |
| 178 # include "vmreg_sparc.hpp" | |
| 179 #endif | |
| 180 #ifdef TARGET_ARCH_zero | |
| 181 # include "vmreg_zero.hpp" | |
| 182 #endif | |
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183 #ifdef TARGET_ARCH_arm |
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184 # include "vmreg_arm.hpp" |
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185 #endif |
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186 #ifdef TARGET_ARCH_ppc |
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187 # include "vmreg_ppc.hpp" |
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188 #endif |
| 1972 | 189 |
| 0 | 190 |
| 191 }; | |
| 192 | |
| 193 //---------------------------VMRegPair------------------------------------------- | |
| 194 // Pairs of 32-bit registers for arguments. | |
| 195 // SharedRuntime::java_calling_convention will overwrite the structs with | |
| 196 // the calling convention's registers. VMRegImpl::Bad is returned for any | |
| 197 // unused 32-bit register. This happens for the unused high half of Int | |
| 198 // arguments, or for 32-bit pointers or for longs in the 32-bit sparc build | |
| 199 // (which are passed to natives in low 32-bits of e.g. O0/O1 and the high | |
| 200 // 32-bits of O0/O1 are set to VMRegImpl::Bad). Longs in one register & doubles | |
| 201 // always return a high and a low register, as do 64-bit pointers. | |
| 202 // | |
| 203 class VMRegPair { | |
| 204 private: | |
| 205 VMReg _second; | |
| 206 VMReg _first; | |
| 207 public: | |
| 208 void set_bad ( ) { _second=VMRegImpl::Bad(); _first=VMRegImpl::Bad(); } | |
| 209 void set1 ( VMReg v ) { _second=VMRegImpl::Bad(); _first=v; } | |
| 210 void set2 ( VMReg v ) { _second=v->next(); _first=v; } | |
| 211 void set_pair( VMReg second, VMReg first ) { _second= second; _first= first; } | |
| 212 void set_ptr ( VMReg ptr ) { | |
| 213 #ifdef _LP64 | |
| 214 _second = ptr->next(); | |
| 215 #else | |
| 216 _second = VMRegImpl::Bad(); | |
| 217 #endif | |
| 218 _first = ptr; | |
| 219 } | |
| 220 // Return true if single register, even if the pair is really just adjacent stack slots | |
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221 bool is_single_reg() const { |
| 0 | 222 return (_first->is_valid()) && (_first->value() + 1 == _second->value()); |
| 223 } | |
| 224 | |
| 225 // Return true if single stack based "register" where the slot alignment matches input alignment | |
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226 bool is_adjacent_on_stack(int alignment) const { |
| 0 | 227 return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0)); |
| 228 } | |
| 229 | |
| 230 // Return true if single stack based "register" where the slot alignment matches input alignment | |
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231 bool is_adjacent_aligned_on_stack(int alignment) const { |
| 0 | 232 return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0)); |
| 233 } | |
| 234 | |
| 235 // Return true if single register but adjacent stack slots do not count | |
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236 bool is_single_phys_reg() const { |
| 0 | 237 return (_first->is_reg() && (_first->value() + 1 == _second->value())); |
| 238 } | |
| 239 | |
| 240 VMReg second() const { return _second; } | |
| 241 VMReg first() const { return _first; } | |
| 242 VMRegPair(VMReg s, VMReg f) { _second = s; _first = f; } | |
| 243 VMRegPair(VMReg f) { _second = VMRegImpl::Bad(); _first = f; } | |
| 244 VMRegPair() { _second = VMRegImpl::Bad(); _first = VMRegImpl::Bad(); } | |
| 245 }; | |
| 1972 | 246 |
| 247 #endif // SHARE_VM_CODE_VMREG_HPP |