Mercurial > hg > truffle
annotate src/cpu/x86/vm/sharedRuntime_x86_64.cpp @ 5904:bf7796b7367a
7148486: At a method handle call returning with an exception may call the runtime with misaligned stack (x64)
Summary: stack must be realigned when calling the runtime for exception propagation at a call.
Reviewed-by: kvn, never
author | roland |
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date | Mon, 27 Feb 2012 11:42:30 +0100 |
parents | 0382d2b469b2 |
children | 2ee7dcc77c63 |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
26 #include "asm/assembler.hpp" | |
27 #include "assembler_x86.inline.hpp" | |
28 #include "code/debugInfoRec.hpp" | |
29 #include "code/icBuffer.hpp" | |
30 #include "code/vtableStubs.hpp" | |
31 #include "interpreter/interpreter.hpp" | |
32 #include "oops/compiledICHolderOop.hpp" | |
33 #include "prims/jvmtiRedefineClassesTrace.hpp" | |
34 #include "runtime/sharedRuntime.hpp" | |
35 #include "runtime/vframeArray.hpp" | |
36 #include "vmreg_x86.inline.hpp" | |
37 #ifdef COMPILER1 | |
38 #include "c1/c1_Runtime1.hpp" | |
39 #endif | |
40 #ifdef COMPILER2 | |
41 #include "opto/runtime.hpp" | |
42 #endif | |
0 | 43 |
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44 #define __ masm-> |
0 | 45 |
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46 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; |
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47 |
0 | 48 class SimpleRuntimeFrame { |
49 | |
50 public: | |
51 | |
52 // Most of the runtime stubs have this simple frame layout. | |
53 // This class exists to make the layout shared in one place. | |
54 // Offsets are for compiler stack slots, which are jints. | |
55 enum layout { | |
56 // The frame sender code expects that rbp will be in the "natural" place and | |
57 // will override any oopMap setting for it. We must therefore force the layout | |
58 // so that it agrees with the frame sender code. | |
59 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt, | |
60 rbp_off2, | |
61 return_off, return_off2, | |
62 framesize | |
63 }; | |
64 }; | |
65 | |
66 class RegisterSaver { | |
67 // Capture info about frame layout. Layout offsets are in jint | |
68 // units because compiler frame slots are jints. | |
69 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off | |
70 enum layout { | |
71 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area | |
72 xmm_off = fpu_state_off + 160/BytesPerInt, // offset in fxsave save area | |
73 DEF_XMM_OFFS(0), | |
74 DEF_XMM_OFFS(1), | |
75 DEF_XMM_OFFS(2), | |
76 DEF_XMM_OFFS(3), | |
77 DEF_XMM_OFFS(4), | |
78 DEF_XMM_OFFS(5), | |
79 DEF_XMM_OFFS(6), | |
80 DEF_XMM_OFFS(7), | |
81 DEF_XMM_OFFS(8), | |
82 DEF_XMM_OFFS(9), | |
83 DEF_XMM_OFFS(10), | |
84 DEF_XMM_OFFS(11), | |
85 DEF_XMM_OFFS(12), | |
86 DEF_XMM_OFFS(13), | |
87 DEF_XMM_OFFS(14), | |
88 DEF_XMM_OFFS(15), | |
89 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt), | |
90 fpu_stateH_end, | |
91 r15_off, r15H_off, | |
92 r14_off, r14H_off, | |
93 r13_off, r13H_off, | |
94 r12_off, r12H_off, | |
95 r11_off, r11H_off, | |
96 r10_off, r10H_off, | |
97 r9_off, r9H_off, | |
98 r8_off, r8H_off, | |
99 rdi_off, rdiH_off, | |
100 rsi_off, rsiH_off, | |
101 ignore_off, ignoreH_off, // extra copy of rbp | |
102 rsp_off, rspH_off, | |
103 rbx_off, rbxH_off, | |
104 rdx_off, rdxH_off, | |
105 rcx_off, rcxH_off, | |
106 rax_off, raxH_off, | |
107 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state | |
108 align_off, alignH_off, | |
109 flags_off, flagsH_off, | |
110 // The frame sender code expects that rbp will be in the "natural" place and | |
111 // will override any oopMap setting for it. We must therefore force the layout | |
112 // so that it agrees with the frame sender code. | |
113 rbp_off, rbpH_off, // copy of rbp we will restore | |
114 return_off, returnH_off, // slot for return address | |
115 reg_save_size // size in compiler stack slots | |
116 }; | |
117 | |
118 public: | |
119 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words); | |
120 static void restore_live_registers(MacroAssembler* masm); | |
121 | |
122 // Offsets into the register save area | |
123 // Used by deoptimization when it is managing result register | |
124 // values on its own | |
125 | |
126 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; } | |
304 | 127 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; } |
0 | 128 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; } |
129 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; } | |
130 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; } | |
131 | |
132 // During deoptimization only the result registers need to be restored, | |
133 // all the other values have already been extracted. | |
134 static void restore_result_registers(MacroAssembler* masm); | |
135 }; | |
136 | |
137 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) { | |
138 | |
139 // Always make the frame size 16-byte aligned | |
140 int frame_size_in_bytes = round_to(additional_frame_words*wordSize + | |
141 reg_save_size*BytesPerInt, 16); | |
142 // OopMap frame size is in compiler stack slots (jint's) not bytes or words | |
143 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt; | |
144 // The caller will allocate additional_frame_words | |
145 int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt; | |
146 // CodeBlob frame size is in words. | |
147 int frame_size_in_words = frame_size_in_bytes / wordSize; | |
148 *total_frame_words = frame_size_in_words; | |
149 | |
150 // Save registers, fpu state, and flags. | |
151 // We assume caller has already pushed the return address onto the | |
152 // stack, so rsp is 8-byte aligned here. | |
153 // We push rpb twice in this sequence because we want the real rbp | |
154 // to be under the return like a normal enter. | |
155 | |
156 __ enter(); // rsp becomes 16-byte aligned here | |
157 __ push_CPU_state(); // Push a multiple of 16 bytes | |
158 if (frame::arg_reg_save_area_bytes != 0) { | |
159 // Allocate argument register save area | |
304 | 160 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 161 } |
162 | |
163 // Set an oopmap for the call site. This oopmap will map all | |
164 // oop-registers and debug-info registers as callee-saved. This | |
165 // will allow deoptimization at this safepoint to find all possible | |
166 // debug-info recordings, as well as let GC find all oops. | |
167 | |
168 OopMapSet *oop_maps = new OopMapSet(); | |
169 OopMap* map = new OopMap(frame_size_in_slots, 0); | |
170 map->set_callee_saved(VMRegImpl::stack2reg( rax_off + additional_frame_slots), rax->as_VMReg()); | |
171 map->set_callee_saved(VMRegImpl::stack2reg( rcx_off + additional_frame_slots), rcx->as_VMReg()); | |
172 map->set_callee_saved(VMRegImpl::stack2reg( rdx_off + additional_frame_slots), rdx->as_VMReg()); | |
173 map->set_callee_saved(VMRegImpl::stack2reg( rbx_off + additional_frame_slots), rbx->as_VMReg()); | |
174 // rbp location is known implicitly by the frame sender code, needs no oopmap | |
175 // and the location where rbp was saved by is ignored | |
176 map->set_callee_saved(VMRegImpl::stack2reg( rsi_off + additional_frame_slots), rsi->as_VMReg()); | |
177 map->set_callee_saved(VMRegImpl::stack2reg( rdi_off + additional_frame_slots), rdi->as_VMReg()); | |
178 map->set_callee_saved(VMRegImpl::stack2reg( r8_off + additional_frame_slots), r8->as_VMReg()); | |
179 map->set_callee_saved(VMRegImpl::stack2reg( r9_off + additional_frame_slots), r9->as_VMReg()); | |
180 map->set_callee_saved(VMRegImpl::stack2reg( r10_off + additional_frame_slots), r10->as_VMReg()); | |
181 map->set_callee_saved(VMRegImpl::stack2reg( r11_off + additional_frame_slots), r11->as_VMReg()); | |
182 map->set_callee_saved(VMRegImpl::stack2reg( r12_off + additional_frame_slots), r12->as_VMReg()); | |
183 map->set_callee_saved(VMRegImpl::stack2reg( r13_off + additional_frame_slots), r13->as_VMReg()); | |
184 map->set_callee_saved(VMRegImpl::stack2reg( r14_off + additional_frame_slots), r14->as_VMReg()); | |
185 map->set_callee_saved(VMRegImpl::stack2reg( r15_off + additional_frame_slots), r15->as_VMReg()); | |
186 map->set_callee_saved(VMRegImpl::stack2reg(xmm0_off + additional_frame_slots), xmm0->as_VMReg()); | |
187 map->set_callee_saved(VMRegImpl::stack2reg(xmm1_off + additional_frame_slots), xmm1->as_VMReg()); | |
188 map->set_callee_saved(VMRegImpl::stack2reg(xmm2_off + additional_frame_slots), xmm2->as_VMReg()); | |
189 map->set_callee_saved(VMRegImpl::stack2reg(xmm3_off + additional_frame_slots), xmm3->as_VMReg()); | |
190 map->set_callee_saved(VMRegImpl::stack2reg(xmm4_off + additional_frame_slots), xmm4->as_VMReg()); | |
191 map->set_callee_saved(VMRegImpl::stack2reg(xmm5_off + additional_frame_slots), xmm5->as_VMReg()); | |
192 map->set_callee_saved(VMRegImpl::stack2reg(xmm6_off + additional_frame_slots), xmm6->as_VMReg()); | |
193 map->set_callee_saved(VMRegImpl::stack2reg(xmm7_off + additional_frame_slots), xmm7->as_VMReg()); | |
194 map->set_callee_saved(VMRegImpl::stack2reg(xmm8_off + additional_frame_slots), xmm8->as_VMReg()); | |
195 map->set_callee_saved(VMRegImpl::stack2reg(xmm9_off + additional_frame_slots), xmm9->as_VMReg()); | |
196 map->set_callee_saved(VMRegImpl::stack2reg(xmm10_off + additional_frame_slots), xmm10->as_VMReg()); | |
197 map->set_callee_saved(VMRegImpl::stack2reg(xmm11_off + additional_frame_slots), xmm11->as_VMReg()); | |
198 map->set_callee_saved(VMRegImpl::stack2reg(xmm12_off + additional_frame_slots), xmm12->as_VMReg()); | |
199 map->set_callee_saved(VMRegImpl::stack2reg(xmm13_off + additional_frame_slots), xmm13->as_VMReg()); | |
200 map->set_callee_saved(VMRegImpl::stack2reg(xmm14_off + additional_frame_slots), xmm14->as_VMReg()); | |
201 map->set_callee_saved(VMRegImpl::stack2reg(xmm15_off + additional_frame_slots), xmm15->as_VMReg()); | |
202 | |
203 // %%% These should all be a waste but we'll keep things as they were for now | |
204 if (true) { | |
205 map->set_callee_saved(VMRegImpl::stack2reg( raxH_off + additional_frame_slots), | |
206 rax->as_VMReg()->next()); | |
207 map->set_callee_saved(VMRegImpl::stack2reg( rcxH_off + additional_frame_slots), | |
208 rcx->as_VMReg()->next()); | |
209 map->set_callee_saved(VMRegImpl::stack2reg( rdxH_off + additional_frame_slots), | |
210 rdx->as_VMReg()->next()); | |
211 map->set_callee_saved(VMRegImpl::stack2reg( rbxH_off + additional_frame_slots), | |
212 rbx->as_VMReg()->next()); | |
213 // rbp location is known implicitly by the frame sender code, needs no oopmap | |
214 map->set_callee_saved(VMRegImpl::stack2reg( rsiH_off + additional_frame_slots), | |
215 rsi->as_VMReg()->next()); | |
216 map->set_callee_saved(VMRegImpl::stack2reg( rdiH_off + additional_frame_slots), | |
217 rdi->as_VMReg()->next()); | |
218 map->set_callee_saved(VMRegImpl::stack2reg( r8H_off + additional_frame_slots), | |
219 r8->as_VMReg()->next()); | |
220 map->set_callee_saved(VMRegImpl::stack2reg( r9H_off + additional_frame_slots), | |
221 r9->as_VMReg()->next()); | |
222 map->set_callee_saved(VMRegImpl::stack2reg( r10H_off + additional_frame_slots), | |
223 r10->as_VMReg()->next()); | |
224 map->set_callee_saved(VMRegImpl::stack2reg( r11H_off + additional_frame_slots), | |
225 r11->as_VMReg()->next()); | |
226 map->set_callee_saved(VMRegImpl::stack2reg( r12H_off + additional_frame_slots), | |
227 r12->as_VMReg()->next()); | |
228 map->set_callee_saved(VMRegImpl::stack2reg( r13H_off + additional_frame_slots), | |
229 r13->as_VMReg()->next()); | |
230 map->set_callee_saved(VMRegImpl::stack2reg( r14H_off + additional_frame_slots), | |
231 r14->as_VMReg()->next()); | |
232 map->set_callee_saved(VMRegImpl::stack2reg( r15H_off + additional_frame_slots), | |
233 r15->as_VMReg()->next()); | |
234 map->set_callee_saved(VMRegImpl::stack2reg(xmm0H_off + additional_frame_slots), | |
235 xmm0->as_VMReg()->next()); | |
236 map->set_callee_saved(VMRegImpl::stack2reg(xmm1H_off + additional_frame_slots), | |
237 xmm1->as_VMReg()->next()); | |
238 map->set_callee_saved(VMRegImpl::stack2reg(xmm2H_off + additional_frame_slots), | |
239 xmm2->as_VMReg()->next()); | |
240 map->set_callee_saved(VMRegImpl::stack2reg(xmm3H_off + additional_frame_slots), | |
241 xmm3->as_VMReg()->next()); | |
242 map->set_callee_saved(VMRegImpl::stack2reg(xmm4H_off + additional_frame_slots), | |
243 xmm4->as_VMReg()->next()); | |
244 map->set_callee_saved(VMRegImpl::stack2reg(xmm5H_off + additional_frame_slots), | |
245 xmm5->as_VMReg()->next()); | |
246 map->set_callee_saved(VMRegImpl::stack2reg(xmm6H_off + additional_frame_slots), | |
247 xmm6->as_VMReg()->next()); | |
248 map->set_callee_saved(VMRegImpl::stack2reg(xmm7H_off + additional_frame_slots), | |
249 xmm7->as_VMReg()->next()); | |
250 map->set_callee_saved(VMRegImpl::stack2reg(xmm8H_off + additional_frame_slots), | |
251 xmm8->as_VMReg()->next()); | |
252 map->set_callee_saved(VMRegImpl::stack2reg(xmm9H_off + additional_frame_slots), | |
253 xmm9->as_VMReg()->next()); | |
254 map->set_callee_saved(VMRegImpl::stack2reg(xmm10H_off + additional_frame_slots), | |
255 xmm10->as_VMReg()->next()); | |
256 map->set_callee_saved(VMRegImpl::stack2reg(xmm11H_off + additional_frame_slots), | |
257 xmm11->as_VMReg()->next()); | |
258 map->set_callee_saved(VMRegImpl::stack2reg(xmm12H_off + additional_frame_slots), | |
259 xmm12->as_VMReg()->next()); | |
260 map->set_callee_saved(VMRegImpl::stack2reg(xmm13H_off + additional_frame_slots), | |
261 xmm13->as_VMReg()->next()); | |
262 map->set_callee_saved(VMRegImpl::stack2reg(xmm14H_off + additional_frame_slots), | |
263 xmm14->as_VMReg()->next()); | |
264 map->set_callee_saved(VMRegImpl::stack2reg(xmm15H_off + additional_frame_slots), | |
265 xmm15->as_VMReg()->next()); | |
266 } | |
267 | |
268 return map; | |
269 } | |
270 | |
271 void RegisterSaver::restore_live_registers(MacroAssembler* masm) { | |
272 if (frame::arg_reg_save_area_bytes != 0) { | |
273 // Pop arg register save area | |
304 | 274 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 275 } |
276 // Recover CPU state | |
277 __ pop_CPU_state(); | |
278 // Get the rbp described implicitly by the calling convention (no oopMap) | |
304 | 279 __ pop(rbp); |
0 | 280 } |
281 | |
282 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
283 | |
284 // Just restore result register. Only used by deoptimization. By | |
285 // now any callee save register that needs to be restored to a c2 | |
286 // caller of the deoptee has been extracted into the vframeArray | |
287 // and will be stuffed into the c2i adapter we create for later | |
288 // restoration so only result registers need to be restored here. | |
289 | |
290 // Restore fp result register | |
291 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes())); | |
292 // Restore integer result register | |
304 | 293 __ movptr(rax, Address(rsp, rax_offset_in_bytes())); |
294 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes())); | |
295 | |
0 | 296 // Pop all of the register save are off the stack except the return address |
304 | 297 __ addptr(rsp, return_offset_in_bytes()); |
0 | 298 } |
299 | |
300 // The java_calling_convention describes stack locations as ideal slots on | |
301 // a frame with no abi restrictions. Since we must observe abi restrictions | |
302 // (like the placement of the register window) the slots must be biased by | |
303 // the following value. | |
304 static int reg2offset_in(VMReg r) { | |
305 // Account for saved rbp and return address | |
306 // This should really be in_preserve_stack_slots | |
307 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size; | |
308 } | |
309 | |
310 static int reg2offset_out(VMReg r) { | |
311 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
312 } | |
313 | |
314 // --------------------------------------------------------------------------- | |
315 // Read the array of BasicTypes from a signature, and compute where the | |
316 // arguments should go. Values in the VMRegPair regs array refer to 4-byte | |
317 // quantities. Values less than VMRegImpl::stack0 are registers, those above | |
318 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer | |
319 // as framesizes are fixed. | |
320 // VMRegImpl::stack0 refers to the first slot 0(sp). | |
321 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
322 // up to RegisterImpl::number_of_registers) are the 64-bit | |
323 // integer registers. | |
324 | |
325 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
326 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
327 // units regardless of build. Of course for i486 there is no 64 bit build | |
328 | |
329 // The Java calling convention is a "shifted" version of the C ABI. | |
330 // By skipping the first C ABI register we can call non-static jni methods | |
331 // with small numbers of arguments without having to shuffle the arguments | |
332 // at all. Since we control the java ABI we ought to at least get some | |
333 // advantage out of it. | |
334 | |
335 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
336 VMRegPair *regs, | |
337 int total_args_passed, | |
338 int is_outgoing) { | |
339 | |
340 // Create the mapping between argument positions and | |
341 // registers. | |
342 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = { | |
343 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5 | |
344 }; | |
345 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = { | |
346 j_farg0, j_farg1, j_farg2, j_farg3, | |
347 j_farg4, j_farg5, j_farg6, j_farg7 | |
348 }; | |
349 | |
350 | |
351 uint int_args = 0; | |
352 uint fp_args = 0; | |
353 uint stk_args = 0; // inc by 2 each time | |
354 | |
355 for (int i = 0; i < total_args_passed; i++) { | |
356 switch (sig_bt[i]) { | |
357 case T_BOOLEAN: | |
358 case T_CHAR: | |
359 case T_BYTE: | |
360 case T_SHORT: | |
361 case T_INT: | |
362 if (int_args < Argument::n_int_register_parameters_j) { | |
363 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
364 } else { | |
365 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
366 stk_args += 2; | |
367 } | |
368 break; | |
369 case T_VOID: | |
370 // halves of T_LONG or T_DOUBLE | |
371 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
372 regs[i].set_bad(); | |
373 break; | |
374 case T_LONG: | |
375 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
376 // fall through | |
377 case T_OBJECT: | |
378 case T_ARRAY: | |
379 case T_ADDRESS: | |
380 if (int_args < Argument::n_int_register_parameters_j) { | |
381 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
382 } else { | |
383 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
384 stk_args += 2; | |
385 } | |
386 break; | |
387 case T_FLOAT: | |
388 if (fp_args < Argument::n_float_register_parameters_j) { | |
389 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
390 } else { | |
391 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
392 stk_args += 2; | |
393 } | |
394 break; | |
395 case T_DOUBLE: | |
396 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
397 if (fp_args < Argument::n_float_register_parameters_j) { | |
398 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
399 } else { | |
400 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
401 stk_args += 2; | |
402 } | |
403 break; | |
404 default: | |
405 ShouldNotReachHere(); | |
406 break; | |
407 } | |
408 } | |
409 | |
410 return round_to(stk_args, 2); | |
411 } | |
412 | |
413 // Patch the callers callsite with entry to compiled code if it exists. | |
414 static void patch_callers_callsite(MacroAssembler *masm) { | |
415 Label L; | |
416 __ verify_oop(rbx); | |
304 | 417 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD); |
0 | 418 __ jcc(Assembler::equal, L); |
419 | |
420 // Save the current stack pointer | |
304 | 421 __ mov(r13, rsp); |
0 | 422 // Schedule the branch target address early. |
423 // Call into the VM to patch the caller, then jump to compiled callee | |
424 // rax isn't live so capture return address while we easily can | |
304 | 425 __ movptr(rax, Address(rsp, 0)); |
0 | 426 |
427 // align stack so push_CPU_state doesn't fault | |
304 | 428 __ andptr(rsp, -(StackAlignmentInBytes)); |
0 | 429 __ push_CPU_state(); |
430 | |
431 | |
432 __ verify_oop(rbx); | |
433 // VM needs caller's callsite | |
434 // VM needs target method | |
435 // This needs to be a long call since we will relocate this adapter to | |
436 // the codeBuffer and it may not reach | |
437 | |
438 // Allocate argument register save area | |
439 if (frame::arg_reg_save_area_bytes != 0) { | |
304 | 440 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 441 } |
304 | 442 __ mov(c_rarg0, rbx); |
443 __ mov(c_rarg1, rax); | |
0 | 444 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); |
445 | |
446 // De-allocate argument register save area | |
447 if (frame::arg_reg_save_area_bytes != 0) { | |
304 | 448 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 449 } |
450 | |
451 __ pop_CPU_state(); | |
452 // restore sp | |
304 | 453 __ mov(rsp, r13); |
0 | 454 __ bind(L); |
455 } | |
456 | |
457 | |
458 static void gen_c2i_adapter(MacroAssembler *masm, | |
459 int total_args_passed, | |
460 int comp_args_on_stack, | |
461 const BasicType *sig_bt, | |
462 const VMRegPair *regs, | |
463 Label& skip_fixup) { | |
464 // Before we get into the guts of the C2I adapter, see if we should be here | |
465 // at all. We've come from compiled code and are attempting to jump to the | |
466 // interpreter, which means the caller made a static call to get here | |
467 // (vcalls always get a compiled target if there is one). Check for a | |
468 // compiled target. If there is one, we need to patch the caller's call. | |
469 patch_callers_callsite(masm); | |
470 | |
471 __ bind(skip_fixup); | |
472 | |
473 // Since all args are passed on the stack, total_args_passed * | |
474 // Interpreter::stackElementSize is the space we need. Plus 1 because | |
475 // we also account for the return address location since | |
476 // we store it first rather than hold it in rax across all the shuffling | |
477 | |
1506 | 478 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize; |
0 | 479 |
480 // stack is aligned, keep it that way | |
481 extraspace = round_to(extraspace, 2*wordSize); | |
482 | |
483 // Get return address | |
304 | 484 __ pop(rax); |
0 | 485 |
486 // set senderSP value | |
304 | 487 __ mov(r13, rsp); |
488 | |
489 __ subptr(rsp, extraspace); | |
0 | 490 |
491 // Store the return address in the expected location | |
304 | 492 __ movptr(Address(rsp, 0), rax); |
0 | 493 |
494 // Now write the args into the outgoing interpreter space | |
495 for (int i = 0; i < total_args_passed; i++) { | |
496 if (sig_bt[i] == T_VOID) { | |
497 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
498 continue; | |
499 } | |
500 | |
501 // offset to start parameters | |
1506 | 502 int st_off = (total_args_passed - i) * Interpreter::stackElementSize; |
503 int next_off = st_off - Interpreter::stackElementSize; | |
0 | 504 |
505 // Say 4 args: | |
506 // i st_off | |
507 // 0 32 T_LONG | |
508 // 1 24 T_VOID | |
509 // 2 16 T_OBJECT | |
510 // 3 8 T_BOOL | |
511 // - 0 return address | |
512 // | |
513 // However to make thing extra confusing. Because we can fit a long/double in | |
514 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter | |
515 // leaves one slot empty and only stores to a single slot. In this case the | |
516 // slot that is occupied is the T_VOID slot. See I said it was confusing. | |
517 | |
518 VMReg r_1 = regs[i].first(); | |
519 VMReg r_2 = regs[i].second(); | |
520 if (!r_1->is_valid()) { | |
521 assert(!r_2->is_valid(), ""); | |
522 continue; | |
523 } | |
524 if (r_1->is_stack()) { | |
525 // memory to memory use rax | |
526 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; | |
527 if (!r_2->is_valid()) { | |
528 // sign extend?? | |
529 __ movl(rax, Address(rsp, ld_off)); | |
304 | 530 __ movptr(Address(rsp, st_off), rax); |
0 | 531 |
532 } else { | |
533 | |
534 __ movq(rax, Address(rsp, ld_off)); | |
535 | |
536 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
537 // T_DOUBLE and T_LONG use two slots in the interpreter | |
538 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
539 // ld_off == LSW, ld_off+wordSize == MSW | |
540 // st_off == MSW, next_off == LSW | |
541 __ movq(Address(rsp, next_off), rax); | |
542 #ifdef ASSERT | |
543 // Overwrite the unused slot with known junk | |
544 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); | |
304 | 545 __ movptr(Address(rsp, st_off), rax); |
0 | 546 #endif /* ASSERT */ |
547 } else { | |
548 __ movq(Address(rsp, st_off), rax); | |
549 } | |
550 } | |
551 } else if (r_1->is_Register()) { | |
552 Register r = r_1->as_Register(); | |
553 if (!r_2->is_valid()) { | |
554 // must be only an int (or less ) so move only 32bits to slot | |
555 // why not sign extend?? | |
556 __ movl(Address(rsp, st_off), r); | |
557 } else { | |
558 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
559 // T_DOUBLE and T_LONG use two slots in the interpreter | |
560 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
561 // long/double in gpr | |
562 #ifdef ASSERT | |
563 // Overwrite the unused slot with known junk | |
564 __ mov64(rax, CONST64(0xdeadffffdeadaaab)); | |
304 | 565 __ movptr(Address(rsp, st_off), rax); |
0 | 566 #endif /* ASSERT */ |
567 __ movq(Address(rsp, next_off), r); | |
568 } else { | |
304 | 569 __ movptr(Address(rsp, st_off), r); |
0 | 570 } |
571 } | |
572 } else { | |
573 assert(r_1->is_XMMRegister(), ""); | |
574 if (!r_2->is_valid()) { | |
575 // only a float use just part of the slot | |
576 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); | |
577 } else { | |
578 #ifdef ASSERT | |
579 // Overwrite the unused slot with known junk | |
580 __ mov64(rax, CONST64(0xdeadffffdeadaaac)); | |
304 | 581 __ movptr(Address(rsp, st_off), rax); |
0 | 582 #endif /* ASSERT */ |
583 __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister()); | |
584 } | |
585 } | |
586 } | |
587 | |
588 // Schedule the branch target address early. | |
304 | 589 __ movptr(rcx, Address(rbx, in_bytes(methodOopDesc::interpreter_entry_offset()))); |
0 | 590 __ jmp(rcx); |
591 } | |
592 | |
593 static void gen_i2c_adapter(MacroAssembler *masm, | |
594 int total_args_passed, | |
595 int comp_args_on_stack, | |
596 const BasicType *sig_bt, | |
597 const VMRegPair *regs) { | |
598 | |
599 // Note: r13 contains the senderSP on entry. We must preserve it since | |
600 // we may do a i2c -> c2i transition if we lose a race where compiled | |
601 // code goes non-entrant while we get args ready. | |
602 // In addition we use r13 to locate all the interpreter args as | |
603 // we must align the stack to 16 bytes on an i2c entry else we | |
604 // lose alignment we expect in all compiled code and register | |
605 // save code can segv when fxsave instructions find improperly | |
606 // aligned stack pointer. | |
607 | |
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608 // Pick up the return address |
304 | 609 __ movptr(rax, Address(rsp, 0)); |
0 | 610 |
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611 // Must preserve original SP for loading incoming arguments because |
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612 // we need to align the outgoing SP for compiled code. |
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613 __ movptr(r11, rsp); |
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614 |
0 | 615 // Cut-out for having no stack args. Since up to 2 int/oop args are passed |
616 // in registers, we will occasionally have no stack args. | |
617 int comp_words_on_stack = 0; | |
618 if (comp_args_on_stack) { | |
619 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in | |
620 // registers are below. By subtracting stack0, we either get a negative | |
621 // number (all values in registers) or the maximum stack slot accessed. | |
622 | |
623 // Convert 4-byte c2 stack slots to words. | |
624 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; | |
625 // Round up to miminum stack alignment, in wordSize | |
626 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
304 | 627 __ subptr(rsp, comp_words_on_stack * wordSize); |
0 | 628 } |
629 | |
630 | |
631 // Ensure compiled code always sees stack at proper alignment | |
304 | 632 __ andptr(rsp, -16); |
0 | 633 |
634 // push the return address and misalign the stack that youngest frame always sees | |
635 // as far as the placement of the call instruction | |
304 | 636 __ push(rax); |
0 | 637 |
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638 // Put saved SP in another register |
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639 const Register saved_sp = rax; |
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640 __ movptr(saved_sp, r11); |
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641 |
0 | 642 // Will jump to the compiled code just as if compiled code was doing it. |
643 // Pre-load the register-jump target early, to schedule it better. | |
304 | 644 __ movptr(r11, Address(rbx, in_bytes(methodOopDesc::from_compiled_offset()))); |
0 | 645 |
646 // Now generate the shuffle code. Pick up all register args and move the | |
647 // rest through the floating point stack top. | |
648 for (int i = 0; i < total_args_passed; i++) { | |
649 if (sig_bt[i] == T_VOID) { | |
650 // Longs and doubles are passed in native word order, but misaligned | |
651 // in the 32-bit build. | |
652 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
653 continue; | |
654 } | |
655 | |
656 // Pick up 0, 1 or 2 words from SP+offset. | |
657 | |
658 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), | |
659 "scrambled load targets?"); | |
660 // Load in argument order going down. | |
1506 | 661 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize; |
0 | 662 // Point to interpreter value (vs. tag) |
1506 | 663 int next_off = ld_off - Interpreter::stackElementSize; |
0 | 664 // |
665 // | |
666 // | |
667 VMReg r_1 = regs[i].first(); | |
668 VMReg r_2 = regs[i].second(); | |
669 if (!r_1->is_valid()) { | |
670 assert(!r_2->is_valid(), ""); | |
671 continue; | |
672 } | |
673 if (r_1->is_stack()) { | |
674 // Convert stack slot to an SP offset (+ wordSize to account for return address ) | |
675 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; | |
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676 |
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677 // We can use r13 as a temp here because compiled code doesn't need r13 as an input |
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678 // and if we end up going thru a c2i because of a miss a reasonable value of r13 |
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679 // will be generated. |
0 | 680 if (!r_2->is_valid()) { |
681 // sign extend??? | |
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682 __ movl(r13, Address(saved_sp, ld_off)); |
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683 __ movptr(Address(rsp, st_off), r13); |
0 | 684 } else { |
685 // | |
686 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
687 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
688 // So we must adjust where to pick up the data to match the interpreter. | |
689 // | |
690 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
691 // are accessed as negative so LSW is at LOW address | |
692 | |
693 // ld_off is MSW so get LSW | |
694 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
695 next_off : ld_off; | |
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696 __ movq(r13, Address(saved_sp, offset)); |
0 | 697 // st_off is LSW (i.e. reg.first()) |
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698 __ movq(Address(rsp, st_off), r13); |
0 | 699 } |
700 } else if (r_1->is_Register()) { // Register argument | |
701 Register r = r_1->as_Register(); | |
702 assert(r != rax, "must be different"); | |
703 if (r_2->is_valid()) { | |
704 // | |
705 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
706 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
707 // So we must adjust where to pick up the data to match the interpreter. | |
708 | |
709 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
710 next_off : ld_off; | |
711 | |
712 // this can be a misaligned move | |
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713 __ movq(r, Address(saved_sp, offset)); |
0 | 714 } else { |
715 // sign extend and use a full word? | |
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716 __ movl(r, Address(saved_sp, ld_off)); |
0 | 717 } |
718 } else { | |
719 if (!r_2->is_valid()) { | |
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720 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); |
0 | 721 } else { |
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722 __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off)); |
0 | 723 } |
724 } | |
725 } | |
726 | |
727 // 6243940 We might end up in handle_wrong_method if | |
728 // the callee is deoptimized as we race thru here. If that | |
729 // happens we don't want to take a safepoint because the | |
730 // caller frame will look interpreted and arguments are now | |
731 // "compiled" so it is much better to make this transition | |
732 // invisible to the stack walking code. Unfortunately if | |
733 // we try and find the callee by normal means a safepoint | |
734 // is possible. So we stash the desired callee in the thread | |
735 // and the vm will find there should this case occur. | |
736 | |
304 | 737 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx); |
0 | 738 |
739 // put methodOop where a c2i would expect should we end up there | |
740 // only needed becaus eof c2 resolve stubs return methodOop as a result in | |
741 // rax | |
304 | 742 __ mov(rax, rbx); |
0 | 743 __ jmp(r11); |
744 } | |
745 | |
746 // --------------------------------------------------------------- | |
747 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
748 int total_args_passed, | |
749 int comp_args_on_stack, | |
750 const BasicType *sig_bt, | |
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751 const VMRegPair *regs, |
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752 AdapterFingerPrint* fingerprint) { |
0 | 753 address i2c_entry = __ pc(); |
754 | |
755 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); | |
756 | |
757 // ------------------------------------------------------------------------- | |
758 // Generate a C2I adapter. On entry we know rbx holds the methodOop during calls | |
759 // to the interpreter. The args start out packed in the compiled layout. They | |
760 // need to be unpacked into the interpreter layout. This will almost always | |
761 // require some stack space. We grow the current (compiled) stack, then repack | |
762 // the args. We finally end in a jump to the generic interpreter entry point. | |
763 // On exit from the interpreter, the interpreter will restore our SP (lest the | |
764 // compiled code, which relys solely on SP and not RBP, get sick). | |
765 | |
766 address c2i_unverified_entry = __ pc(); | |
767 Label skip_fixup; | |
768 Label ok; | |
769 | |
770 Register holder = rax; | |
771 Register receiver = j_rarg0; | |
772 Register temp = rbx; | |
773 | |
774 { | |
775 __ verify_oop(holder); | |
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776 __ load_klass(temp, receiver); |
0 | 777 __ verify_oop(temp); |
778 | |
304 | 779 __ cmpptr(temp, Address(holder, compiledICHolderOopDesc::holder_klass_offset())); |
780 __ movptr(rbx, Address(holder, compiledICHolderOopDesc::holder_method_offset())); | |
0 | 781 __ jcc(Assembler::equal, ok); |
782 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
783 | |
784 __ bind(ok); | |
785 // Method might have been compiled since the call site was patched to | |
786 // interpreted if that is the case treat it as a miss so we can get | |
787 // the call site corrected. | |
304 | 788 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD); |
0 | 789 __ jcc(Assembler::equal, skip_fixup); |
790 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
791 } | |
792 | |
793 address c2i_entry = __ pc(); | |
794 | |
795 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); | |
796 | |
797 __ flush(); | |
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798 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
0 | 799 } |
800 | |
801 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
802 VMRegPair *regs, | |
803 int total_args_passed) { | |
804 // We return the amount of VMRegImpl stack slots we need to reserve for all | |
805 // the arguments NOT counting out_preserve_stack_slots. | |
806 | |
807 // NOTE: These arrays will have to change when c1 is ported | |
808 #ifdef _WIN64 | |
809 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
810 c_rarg0, c_rarg1, c_rarg2, c_rarg3 | |
811 }; | |
812 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
813 c_farg0, c_farg1, c_farg2, c_farg3 | |
814 }; | |
815 #else | |
816 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
817 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5 | |
818 }; | |
819 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
820 c_farg0, c_farg1, c_farg2, c_farg3, | |
821 c_farg4, c_farg5, c_farg6, c_farg7 | |
822 }; | |
823 #endif // _WIN64 | |
824 | |
825 | |
826 uint int_args = 0; | |
827 uint fp_args = 0; | |
828 uint stk_args = 0; // inc by 2 each time | |
829 | |
830 for (int i = 0; i < total_args_passed; i++) { | |
831 switch (sig_bt[i]) { | |
832 case T_BOOLEAN: | |
833 case T_CHAR: | |
834 case T_BYTE: | |
835 case T_SHORT: | |
836 case T_INT: | |
837 if (int_args < Argument::n_int_register_parameters_c) { | |
838 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
839 #ifdef _WIN64 | |
840 fp_args++; | |
841 // Allocate slots for callee to stuff register args the stack. | |
842 stk_args += 2; | |
843 #endif | |
844 } else { | |
845 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
846 stk_args += 2; | |
847 } | |
848 break; | |
849 case T_LONG: | |
850 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
851 // fall through | |
852 case T_OBJECT: | |
853 case T_ARRAY: | |
854 case T_ADDRESS: | |
855 if (int_args < Argument::n_int_register_parameters_c) { | |
856 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
857 #ifdef _WIN64 | |
858 fp_args++; | |
859 stk_args += 2; | |
860 #endif | |
861 } else { | |
862 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
863 stk_args += 2; | |
864 } | |
865 break; | |
866 case T_FLOAT: | |
867 if (fp_args < Argument::n_float_register_parameters_c) { | |
868 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
869 #ifdef _WIN64 | |
870 int_args++; | |
871 // Allocate slots for callee to stuff register args the stack. | |
872 stk_args += 2; | |
873 #endif | |
874 } else { | |
875 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
876 stk_args += 2; | |
877 } | |
878 break; | |
879 case T_DOUBLE: | |
880 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
881 if (fp_args < Argument::n_float_register_parameters_c) { | |
882 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
883 #ifdef _WIN64 | |
884 int_args++; | |
885 // Allocate slots for callee to stuff register args the stack. | |
886 stk_args += 2; | |
887 #endif | |
888 } else { | |
889 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
890 stk_args += 2; | |
891 } | |
892 break; | |
893 case T_VOID: // Halves of longs and doubles | |
894 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
895 regs[i].set_bad(); | |
896 break; | |
897 default: | |
898 ShouldNotReachHere(); | |
899 break; | |
900 } | |
901 } | |
902 #ifdef _WIN64 | |
903 // windows abi requires that we always allocate enough stack space | |
904 // for 4 64bit registers to be stored down. | |
905 if (stk_args < 8) { | |
906 stk_args = 8; | |
907 } | |
908 #endif // _WIN64 | |
909 | |
910 return stk_args; | |
911 } | |
912 | |
913 // On 64 bit we will store integer like items to the stack as | |
914 // 64 bits items (sparc abi) even though java would only store | |
915 // 32bits for a parameter. On 32bit it will simply be 32 bits | |
916 // So this routine will do 32->32 on 32bit and 32->64 on 64bit | |
917 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
918 if (src.first()->is_stack()) { | |
919 if (dst.first()->is_stack()) { | |
920 // stack to stack | |
921 __ movslq(rax, Address(rbp, reg2offset_in(src.first()))); | |
922 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
923 } else { | |
924 // stack to reg | |
925 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); | |
926 } | |
927 } else if (dst.first()->is_stack()) { | |
928 // reg to stack | |
929 // Do we really have to sign extend??? | |
930 // __ movslq(src.first()->as_Register(), src.first()->as_Register()); | |
931 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
932 } else { | |
933 // Do we really have to sign extend??? | |
934 // __ movslq(dst.first()->as_Register(), src.first()->as_Register()); | |
935 if (dst.first() != src.first()) { | |
936 __ movq(dst.first()->as_Register(), src.first()->as_Register()); | |
937 } | |
938 } | |
939 } | |
940 | |
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941 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
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942 if (src.first()->is_stack()) { |
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943 if (dst.first()->is_stack()) { |
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944 // stack to stack |
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945 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
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946 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); |
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947 } else { |
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948 // stack to reg |
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949 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); |
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950 } |
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951 } else if (dst.first()->is_stack()) { |
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952 // reg to stack |
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953 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); |
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954 } else { |
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955 if (dst.first() != src.first()) { |
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956 __ movq(dst.first()->as_Register(), src.first()->as_Register()); |
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957 } |
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958 } |
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959 } |
0 | 960 |
961 // An oop arg. Must pass a handle not the oop itself | |
962 static void object_move(MacroAssembler* masm, | |
963 OopMap* map, | |
964 int oop_handle_offset, | |
965 int framesize_in_slots, | |
966 VMRegPair src, | |
967 VMRegPair dst, | |
968 bool is_receiver, | |
969 int* receiver_offset) { | |
970 | |
971 // must pass a handle. First figure out the location we use as a handle | |
972 | |
973 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register(); | |
974 | |
975 // See if oop is NULL if it is we need no handle | |
976 | |
977 if (src.first()->is_stack()) { | |
978 | |
979 // Oop is already on the stack as an argument | |
980 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
981 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
982 if (is_receiver) { | |
983 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
984 } | |
985 | |
304 | 986 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); |
987 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); | |
0 | 988 // conditionally move a NULL |
304 | 989 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first()))); |
0 | 990 } else { |
991 | |
992 // Oop is in an a register we must store it to the space we reserve | |
993 // on the stack for oop_handles and pass a handle if oop is non-NULL | |
994 | |
995 const Register rOop = src.first()->as_Register(); | |
996 int oop_slot; | |
997 if (rOop == j_rarg0) | |
998 oop_slot = 0; | |
999 else if (rOop == j_rarg1) | |
1000 oop_slot = 1; | |
1001 else if (rOop == j_rarg2) | |
1002 oop_slot = 2; | |
1003 else if (rOop == j_rarg3) | |
1004 oop_slot = 3; | |
1005 else if (rOop == j_rarg4) | |
1006 oop_slot = 4; | |
1007 else { | |
1008 assert(rOop == j_rarg5, "wrong register"); | |
1009 oop_slot = 5; | |
1010 } | |
1011 | |
1012 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset; | |
1013 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
1014 | |
1015 map->set_oop(VMRegImpl::stack2reg(oop_slot)); | |
1016 // Store oop in handle area, may be NULL | |
304 | 1017 __ movptr(Address(rsp, offset), rOop); |
0 | 1018 if (is_receiver) { |
1019 *receiver_offset = offset; | |
1020 } | |
1021 | |
304 | 1022 __ cmpptr(rOop, (int32_t)NULL_WORD); |
1023 __ lea(rHandle, Address(rsp, offset)); | |
0 | 1024 // conditionally move a NULL from the handle area where it was just stored |
304 | 1025 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset)); |
0 | 1026 } |
1027 | |
1028 // If arg is on the stack then place it otherwise it is already in correct reg. | |
1029 if (dst.first()->is_stack()) { | |
304 | 1030 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
0 | 1031 } |
1032 } | |
1033 | |
1034 // A float arg may have to do float reg int reg conversion | |
1035 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1036 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
1037 | |
1038 // The calling conventions assures us that each VMregpair is either | |
1039 // all really one physical register or adjacent stack slots. | |
1040 // This greatly simplifies the cases here compared to sparc. | |
1041 | |
1042 if (src.first()->is_stack()) { | |
1043 if (dst.first()->is_stack()) { | |
1044 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); | |
304 | 1045 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); |
0 | 1046 } else { |
1047 // stack to reg | |
1048 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
1049 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first()))); | |
1050 } | |
1051 } else if (dst.first()->is_stack()) { | |
1052 // reg to stack | |
1053 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
1054 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1055 } else { | |
1056 // reg to reg | |
1057 // In theory these overlap but the ordering is such that this is likely a nop | |
1058 if ( src.first() != dst.first()) { | |
1059 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
1060 } | |
1061 } | |
1062 } | |
1063 | |
1064 // A long move | |
1065 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1066 | |
1067 // The calling conventions assures us that each VMregpair is either | |
1068 // all really one physical register or adjacent stack slots. | |
1069 // This greatly simplifies the cases here compared to sparc. | |
1070 | |
1071 if (src.is_single_phys_reg() ) { | |
1072 if (dst.is_single_phys_reg()) { | |
1073 if (dst.first() != src.first()) { | |
304 | 1074 __ mov(dst.first()->as_Register(), src.first()->as_Register()); |
0 | 1075 } |
1076 } else { | |
1077 assert(dst.is_single_reg(), "not a stack pair"); | |
1078 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
1079 } | |
1080 } else if (dst.is_single_phys_reg()) { | |
1081 assert(src.is_single_reg(), "not a stack pair"); | |
1082 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first()))); | |
1083 } else { | |
1084 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
1085 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1086 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1087 } | |
1088 } | |
1089 | |
1090 // A double move | |
1091 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1092 | |
1093 // The calling conventions assures us that each VMregpair is either | |
1094 // all really one physical register or adjacent stack slots. | |
1095 // This greatly simplifies the cases here compared to sparc. | |
1096 | |
1097 if (src.is_single_phys_reg() ) { | |
1098 if (dst.is_single_phys_reg()) { | |
1099 // In theory these overlap but the ordering is such that this is likely a nop | |
1100 if ( src.first() != dst.first()) { | |
1101 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
1102 } | |
1103 } else { | |
1104 assert(dst.is_single_reg(), "not a stack pair"); | |
1105 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1106 } | |
1107 } else if (dst.is_single_phys_reg()) { | |
1108 assert(src.is_single_reg(), "not a stack pair"); | |
1109 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first()))); | |
1110 } else { | |
1111 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
1112 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1113 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1114 } | |
1115 } | |
1116 | |
1117 | |
1118 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1119 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1120 // which by this time is free to use | |
1121 switch (ret_type) { | |
1122 case T_FLOAT: | |
1123 __ movflt(Address(rbp, -wordSize), xmm0); | |
1124 break; | |
1125 case T_DOUBLE: | |
1126 __ movdbl(Address(rbp, -wordSize), xmm0); | |
1127 break; | |
1128 case T_VOID: break; | |
1129 default: { | |
304 | 1130 __ movptr(Address(rbp, -wordSize), rax); |
0 | 1131 } |
1132 } | |
1133 } | |
1134 | |
1135 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1136 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1137 // which by this time is free to use | |
1138 switch (ret_type) { | |
1139 case T_FLOAT: | |
1140 __ movflt(xmm0, Address(rbp, -wordSize)); | |
1141 break; | |
1142 case T_DOUBLE: | |
1143 __ movdbl(xmm0, Address(rbp, -wordSize)); | |
1144 break; | |
1145 case T_VOID: break; | |
1146 default: { | |
304 | 1147 __ movptr(rax, Address(rbp, -wordSize)); |
0 | 1148 } |
1149 } | |
1150 } | |
1151 | |
1152 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
1153 for ( int i = first_arg ; i < arg_count ; i++ ) { | |
1154 if (args[i].first()->is_Register()) { | |
304 | 1155 __ push(args[i].first()->as_Register()); |
0 | 1156 } else if (args[i].first()->is_XMMRegister()) { |
304 | 1157 __ subptr(rsp, 2*wordSize); |
0 | 1158 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister()); |
1159 } | |
1160 } | |
1161 } | |
1162 | |
1163 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
1164 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) { | |
1165 if (args[i].first()->is_Register()) { | |
304 | 1166 __ pop(args[i].first()->as_Register()); |
0 | 1167 } else if (args[i].first()->is_XMMRegister()) { |
1168 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0)); | |
304 | 1169 __ addptr(rsp, 2*wordSize); |
0 | 1170 } |
1171 } | |
1172 } | |
1173 | |
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1174 |
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1175 static void save_or_restore_arguments(MacroAssembler* masm, |
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1176 const int stack_slots, |
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1177 const int total_in_args, |
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1178 const int arg_save_area, |
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1179 OopMap* map, |
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1180 VMRegPair* in_regs, |
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1181 BasicType* in_sig_bt) { |
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1182 // if map is non-NULL then the code should store the values, |
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1183 // otherwise it should load them. |
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1184 int handle_index = 0; |
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1185 // Save down double word first |
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1186 for ( int i = 0; i < total_in_args; i++) { |
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1187 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) { |
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1188 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area; |
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1189 int offset = slot * VMRegImpl::stack_slot_size; |
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1190 handle_index += 2; |
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1191 assert(handle_index <= stack_slots, "overflow"); |
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1192 if (map != NULL) { |
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1193 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1194 } else { |
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1195 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1196 } |
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1197 } |
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1198 if (in_regs[i].first()->is_Register() && |
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1199 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) { |
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1200 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area; |
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1201 int offset = slot * VMRegImpl::stack_slot_size; |
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1202 handle_index += 2; |
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1203 assert(handle_index <= stack_slots, "overflow"); |
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1204 if (map != NULL) { |
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1205 __ movq(Address(rsp, offset), in_regs[i].first()->as_Register()); |
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1206 if (in_sig_bt[i] == T_ARRAY) { |
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1207 map->set_oop(VMRegImpl::stack2reg(slot));; |
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1208 } |
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1209 } else { |
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1210 __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset)); |
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1211 } |
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1212 } |
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1213 } |
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1214 // Save or restore single word registers |
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1215 for ( int i = 0; i < total_in_args; i++) { |
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1216 if (in_regs[i].first()->is_Register()) { |
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1217 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area; |
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1218 int offset = slot * VMRegImpl::stack_slot_size; |
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1219 assert(handle_index <= stack_slots, "overflow"); |
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1220 |
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1221 // Value is in an input register pass we must flush it to the stack |
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1222 const Register reg = in_regs[i].first()->as_Register(); |
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1223 switch (in_sig_bt[i]) { |
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1224 case T_BOOLEAN: |
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1225 case T_CHAR: |
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1226 case T_BYTE: |
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1227 case T_SHORT: |
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1228 case T_INT: |
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1229 if (map != NULL) { |
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1230 __ movl(Address(rsp, offset), reg); |
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1231 } else { |
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1232 __ movl(reg, Address(rsp, offset)); |
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1233 } |
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1234 break; |
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1235 case T_ARRAY: |
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1236 case T_LONG: |
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1237 // handled above |
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1238 break; |
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1239 case T_OBJECT: |
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1240 default: ShouldNotReachHere(); |
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1241 } |
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1242 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1243 if (in_sig_bt[i] == T_FLOAT) { |
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1244 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area; |
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1245 int offset = slot * VMRegImpl::stack_slot_size; |
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1246 assert(handle_index <= stack_slots, "overflow"); |
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1247 if (map != NULL) { |
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1248 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1249 } else { |
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1250 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1251 } |
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1252 } |
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1253 } else if (in_regs[i].first()->is_stack()) { |
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1254 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
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1255 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
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1256 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); |
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1257 } |
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1258 } |
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1259 } |
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1260 } |
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1261 |
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1262 |
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1263 // Check GC_locker::needs_gc and enter the runtime if it's true. This |
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1264 // keeps a new JNI critical region from starting until a GC has been |
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1265 // forced. Save down any oops in registers and describe them in an |
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1266 // OopMap. |
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1267 static void check_needs_gc_for_critical_native(MacroAssembler* masm, |
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1268 int stack_slots, |
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1269 int total_c_args, |
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1270 int total_in_args, |
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1271 int arg_save_area, |
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1272 OopMapSet* oop_maps, |
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1273 VMRegPair* in_regs, |
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1274 BasicType* in_sig_bt) { |
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1275 __ block_comment("check GC_locker::needs_gc"); |
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1276 Label cont; |
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1277 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false); |
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1278 __ jcc(Assembler::equal, cont); |
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1279 |
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1280 // Save down any incoming oops and call into the runtime to halt for a GC |
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1281 |
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1282 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1283 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1284 arg_save_area, map, in_regs, in_sig_bt); |
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1285 |
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1286 address the_pc = __ pc(); |
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1287 oop_maps->add_gc_map( __ offset(), map); |
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1288 __ set_last_Java_frame(rsp, noreg, the_pc); |
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1289 |
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1290 __ block_comment("block_for_jni_critical"); |
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1291 __ movptr(c_rarg0, r15_thread); |
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1292 __ mov(r12, rsp); // remember sp |
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1293 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows |
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1294 __ andptr(rsp, -16); // align stack as required by ABI |
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1295 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical))); |
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1296 __ mov(rsp, r12); // restore sp |
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1297 __ reinit_heapbase(); |
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1298 |
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1299 __ reset_last_Java_frame(false, true); |
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1300 |
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1301 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1302 arg_save_area, NULL, in_regs, in_sig_bt); |
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1303 |
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1304 __ bind(cont); |
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1305 #ifdef ASSERT |
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1306 if (StressCriticalJNINatives) { |
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1307 // Stress register saving |
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1308 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1309 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1310 arg_save_area, map, in_regs, in_sig_bt); |
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1311 // Destroy argument registers |
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1312 for (int i = 0; i < total_in_args - 1; i++) { |
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1313 if (in_regs[i].first()->is_Register()) { |
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1314 const Register reg = in_regs[i].first()->as_Register(); |
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1315 __ xorptr(reg, reg); |
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1316 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1317 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister()); |
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1318 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1319 ShouldNotReachHere(); |
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1320 } else if (in_regs[i].first()->is_stack()) { |
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1321 // Nothing to do |
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1322 } else { |
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1323 ShouldNotReachHere(); |
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1324 } |
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1325 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) { |
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1326 i++; |
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1327 } |
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1328 } |
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1329 |
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1330 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1331 arg_save_area, NULL, in_regs, in_sig_bt); |
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1332 } |
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1333 #endif |
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1334 } |
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1335 |
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1336 // Unpack an array argument into a pointer to the body and the length |
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1337 // if the array is non-null, otherwise pass 0 for both. |
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1338 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { |
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1339 Register tmp_reg = rax; |
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1340 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg, |
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1341 "possible collision"); |
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1342 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg, |
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1343 "possible collision"); |
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1344 |
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1345 // Pass the length, ptr pair |
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1346 Label is_null, done; |
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1347 VMRegPair tmp; |
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1348 tmp.set_ptr(tmp_reg->as_VMReg()); |
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1349 if (reg.first()->is_stack()) { |
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1350 // Load the arg up from the stack |
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1351 move_ptr(masm, reg, tmp); |
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1352 reg = tmp; |
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1353 } |
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1354 __ testptr(reg.first()->as_Register(), reg.first()->as_Register()); |
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1355 __ jccb(Assembler::equal, is_null); |
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1356 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1357 move_ptr(masm, tmp, body_arg); |
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1358 // load the length relative to the body. |
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1359 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() - |
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1360 arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1361 move32_64(masm, tmp, length_arg); |
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1362 __ jmpb(done); |
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1363 __ bind(is_null); |
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1364 // Pass zeros |
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1365 __ xorptr(tmp_reg, tmp_reg); |
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1366 move_ptr(masm, tmp, body_arg); |
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1367 move32_64(masm, tmp, length_arg); |
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1368 __ bind(done); |
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1369 } |
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1370 |
0 | 1371 // --------------------------------------------------------------------------- |
1372 // Generate a native wrapper for a given method. The method takes arguments | |
1373 // in the Java compiled code convention, marshals them to the native | |
1374 // convention (handlizes oops, etc), transitions to native, makes the call, | |
1375 // returns to java state (possibly blocking), unhandlizes any result and | |
1376 // returns. | |
1377 nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm, | |
1378 methodHandle method, | |
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1379 int compile_id, |
0 | 1380 int total_in_args, |
1381 int comp_args_on_stack, | |
1382 BasicType *in_sig_bt, | |
1383 VMRegPair *in_regs, | |
1384 BasicType ret_type) { | |
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1385 bool is_critical_native = true; |
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1386 address native_func = method->critical_native_function(); |
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1387 if (native_func == NULL) { |
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1388 native_func = method->native_function(); |
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1389 is_critical_native = false; |
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1390 } |
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1391 assert(native_func != NULL, "must have function"); |
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1392 |
0 | 1393 // An OopMap for lock (and class if static) |
1394 OopMapSet *oop_maps = new OopMapSet(); | |
1395 intptr_t start = (intptr_t)__ pc(); | |
1396 | |
1397 // We have received a description of where all the java arg are located | |
1398 // on entry to the wrapper. We need to convert these args to where | |
1399 // the jni function will expect them. To figure out where they go | |
1400 // we convert the java signature to a C signature by inserting | |
1401 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
1402 | |
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1403 int total_c_args = total_in_args; |
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1404 if (!is_critical_native) { |
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1405 total_c_args += 1; |
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1406 if (method->is_static()) { |
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1407 total_c_args++; |
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1408 } |
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1409 } else { |
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1410 for (int i = 0; i < total_in_args; i++) { |
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1411 if (in_sig_bt[i] == T_ARRAY) { |
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1412 total_c_args++; |
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1413 } |
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1414 } |
0 | 1415 } |
1416 | |
1417 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
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1418 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); |
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1419 BasicType* in_elem_bt = NULL; |
0 | 1420 |
1421 int argc = 0; | |
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1422 if (!is_critical_native) { |
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1423 out_sig_bt[argc++] = T_ADDRESS; |
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1424 if (method->is_static()) { |
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1425 out_sig_bt[argc++] = T_OBJECT; |
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1426 } |
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1427 |
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1428 for (int i = 0; i < total_in_args ; i++ ) { |
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1429 out_sig_bt[argc++] = in_sig_bt[i]; |
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1430 } |
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1431 } else { |
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1432 Thread* THREAD = Thread::current(); |
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1433 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); |
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1434 SignatureStream ss(method->signature()); |
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1435 for (int i = 0; i < total_in_args ; i++ ) { |
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1436 if (in_sig_bt[i] == T_ARRAY) { |
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1437 // Arrays are passed as int, elem* pair |
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1438 out_sig_bt[argc++] = T_INT; |
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1439 out_sig_bt[argc++] = T_ADDRESS; |
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1440 Symbol* atype = ss.as_symbol(CHECK_NULL); |
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1441 const char* at = atype->as_C_string(); |
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1442 if (strlen(at) == 2) { |
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1443 assert(at[0] == '[', "must be"); |
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1444 switch (at[1]) { |
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1445 case 'B': in_elem_bt[i] = T_BYTE; break; |
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1446 case 'C': in_elem_bt[i] = T_CHAR; break; |
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1447 case 'D': in_elem_bt[i] = T_DOUBLE; break; |
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1448 case 'F': in_elem_bt[i] = T_FLOAT; break; |
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1449 case 'I': in_elem_bt[i] = T_INT; break; |
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1450 case 'J': in_elem_bt[i] = T_LONG; break; |
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1451 case 'S': in_elem_bt[i] = T_SHORT; break; |
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1452 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; |
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1453 default: ShouldNotReachHere(); |
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1454 } |
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1455 } |
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1456 } else { |
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1457 out_sig_bt[argc++] = in_sig_bt[i]; |
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1458 in_elem_bt[i] = T_VOID; |
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1459 } |
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1460 if (in_sig_bt[i] != T_VOID) { |
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1461 assert(in_sig_bt[i] == ss.type(), "must match"); |
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1462 ss.next(); |
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1463 } |
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1464 } |
0 | 1465 } |
1466 | |
1467 // Now figure out where the args must be stored and how much stack space | |
1468 // they require. | |
1469 int out_arg_slots; | |
1470 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); | |
1471 | |
1472 // Compute framesize for the wrapper. We need to handlize all oops in | |
1473 // incoming registers | |
1474 | |
1475 // Calculate the total number of stack slots we will need. | |
1476 | |
1477 // First count the abi requirement plus all of the outgoing args | |
1478 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
1479 | |
1480 // Now the space for the inbound oop handle area | |
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1481 int total_save_slots = 6 * VMRegImpl::slots_per_word; // 6 arguments passed in registers |
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1482 if (is_critical_native) { |
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1483 // Critical natives may have to call out so they need a save area |
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1484 // for register arguments. |
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1485 int double_slots = 0; |
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1486 int single_slots = 0; |
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1487 for ( int i = 0; i < total_in_args; i++) { |
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1488 if (in_regs[i].first()->is_Register()) { |
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1489 const Register reg = in_regs[i].first()->as_Register(); |
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1490 switch (in_sig_bt[i]) { |
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1491 case T_ARRAY: |
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1492 case T_BOOLEAN: |
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1493 case T_BYTE: |
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1494 case T_SHORT: |
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1495 case T_CHAR: |
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1496 case T_INT: single_slots++; break; |
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1497 case T_LONG: double_slots++; break; |
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1498 default: ShouldNotReachHere(); |
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1499 } |
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1500 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1501 switch (in_sig_bt[i]) { |
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1502 case T_FLOAT: single_slots++; break; |
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1503 case T_DOUBLE: double_slots++; break; |
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1504 default: ShouldNotReachHere(); |
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1505 } |
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1506 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1507 ShouldNotReachHere(); |
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1508 } |
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1509 } |
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1510 total_save_slots = double_slots * 2 + single_slots; |
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1511 // align the save area |
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1512 if (double_slots != 0) { |
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1513 stack_slots = round_to(stack_slots, 2); |
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1514 } |
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1515 } |
0 | 1516 |
1517 int oop_handle_offset = stack_slots; | |
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1518 stack_slots += total_save_slots; |
0 | 1519 |
1520 // Now any space we need for handlizing a klass if static method | |
1521 | |
1522 int klass_slot_offset = 0; | |
1523 int klass_offset = -1; | |
1524 int lock_slot_offset = 0; | |
1525 bool is_static = false; | |
1526 | |
1527 if (method->is_static()) { | |
1528 klass_slot_offset = stack_slots; | |
1529 stack_slots += VMRegImpl::slots_per_word; | |
1530 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
1531 is_static = true; | |
1532 } | |
1533 | |
1534 // Plus a lock if needed | |
1535 | |
1536 if (method->is_synchronized()) { | |
1537 lock_slot_offset = stack_slots; | |
1538 stack_slots += VMRegImpl::slots_per_word; | |
1539 } | |
1540 | |
1541 // Now a place (+2) to save return values or temp during shuffling | |
1542 // + 4 for return address (which we own) and saved rbp | |
1543 stack_slots += 6; | |
1544 | |
1545 // Ok The space we have allocated will look like: | |
1546 // | |
1547 // | |
1548 // FP-> | | | |
1549 // |---------------------| | |
1550 // | 2 slots for moves | | |
1551 // |---------------------| | |
1552 // | lock box (if sync) | | |
1553 // |---------------------| <- lock_slot_offset | |
1554 // | klass (if static) | | |
1555 // |---------------------| <- klass_slot_offset | |
1556 // | oopHandle area | | |
1557 // |---------------------| <- oop_handle_offset (6 java arg registers) | |
1558 // | outbound memory | | |
1559 // | based arguments | | |
1560 // | | | |
1561 // |---------------------| | |
1562 // | | | |
1563 // SP-> | out_preserved_slots | | |
1564 // | |
1565 // | |
1566 | |
1567 | |
1568 // Now compute actual number of stack words we need rounding to make | |
1569 // stack properly aligned. | |
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1570 stack_slots = round_to(stack_slots, StackAlignmentInSlots); |
0 | 1571 |
1572 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
1573 | |
1574 // First thing make an ic check to see if we should even be here | |
1575 | |
1576 // We are free to use all registers as temps without saving them and | |
1577 // restoring them except rbp. rbp is the only callee save register | |
1578 // as far as the interpreter and the compiler(s) are concerned. | |
1579 | |
1580 | |
1581 const Register ic_reg = rax; | |
1582 const Register receiver = j_rarg0; | |
1583 | |
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1584 Label hit; |
0 | 1585 Label exception_pending; |
1586 | |
848
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1587 assert_different_registers(ic_reg, receiver, rscratch1); |
0 | 1588 __ verify_oop(receiver); |
848
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1589 __ load_klass(rscratch1, receiver); |
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1590 __ cmpq(ic_reg, rscratch1); |
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1591 __ jcc(Assembler::equal, hit); |
0 | 1592 |
1593 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
1594 | |
1595 // Verified entry point must be aligned | |
1596 __ align(8); | |
1597 | |
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1598 __ bind(hit); |
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1599 |
0 | 1600 int vep_offset = ((intptr_t)__ pc()) - start; |
1601 | |
1602 // The instruction at the verified entry point must be 5 bytes or longer | |
1603 // because it can be patched on the fly by make_non_entrant. The stack bang | |
1604 // instruction fits that requirement. | |
1605 | |
1606 // Generate stack overflow check | |
1607 | |
1608 if (UseStackBanging) { | |
1609 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); | |
1610 } else { | |
1611 // need a 5 byte instruction to allow MT safe patching to non-entrant | |
1612 __ fat_nop(); | |
1613 } | |
1614 | |
1615 // Generate a new frame for the wrapper. | |
1616 __ enter(); | |
1617 // -2 because return address is already present and so is saved rbp | |
304 | 1618 __ subptr(rsp, stack_size - 2*wordSize); |
0 | 1619 |
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1620 // Frame is now completed as far as size and linkage. |
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1621 int frame_complete = ((intptr_t)__ pc()) - start; |
0 | 1622 |
1623 #ifdef ASSERT | |
1624 { | |
1625 Label L; | |
304 | 1626 __ mov(rax, rsp); |
605 | 1627 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI) |
304 | 1628 __ cmpptr(rax, rsp); |
0 | 1629 __ jcc(Assembler::equal, L); |
1630 __ stop("improperly aligned stack"); | |
1631 __ bind(L); | |
1632 } | |
1633 #endif /* ASSERT */ | |
1634 | |
1635 | |
1636 // We use r14 as the oop handle for the receiver/klass | |
1637 // It is callee save so it survives the call to native | |
1638 | |
1639 const Register oop_handle_reg = r14; | |
1640 | |
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1641 if (is_critical_native) { |
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1642 check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args, |
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1643 oop_handle_offset, oop_maps, in_regs, in_sig_bt); |
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1644 } |
0 | 1645 |
1646 // | |
1647 // We immediately shuffle the arguments so that any vm call we have to | |
1648 // make from here on out (sync slow path, jvmti, etc.) we will have | |
1649 // captured the oops from our caller and have a valid oopMap for | |
1650 // them. | |
1651 | |
1652 // ----------------- | |
1653 // The Grand Shuffle | |
1654 | |
1655 // The Java calling convention is either equal (linux) or denser (win64) than the | |
1656 // c calling convention. However the because of the jni_env argument the c calling | |
1657 // convention always has at least one more (and two for static) arguments than Java. | |
1658 // Therefore if we move the args from java -> c backwards then we will never have | |
1659 // a register->register conflict and we don't have to build a dependency graph | |
1660 // and figure out how to break any cycles. | |
1661 // | |
1662 | |
1663 // Record esp-based slot for receiver on stack for non-static methods | |
1664 int receiver_offset = -1; | |
1665 | |
1666 // This is a trick. We double the stack slots so we can claim | |
1667 // the oops in the caller's frame. Since we are sure to have | |
1668 // more args than the caller doubling is enough to make | |
1669 // sure we can capture all the incoming oop args from the | |
1670 // caller. | |
1671 // | |
1672 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
1673 | |
1674 // Mark location of rbp (someday) | |
1675 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp)); | |
1676 | |
1677 // Use eax, ebx as temporaries during any memory-memory moves we have to do | |
1678 // All inbound args are referenced based on rbp and all outbound args via rsp. | |
1679 | |
1680 | |
1681 #ifdef ASSERT | |
1682 bool reg_destroyed[RegisterImpl::number_of_registers]; | |
1683 bool freg_destroyed[XMMRegisterImpl::number_of_registers]; | |
1684 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { | |
1685 reg_destroyed[r] = false; | |
1686 } | |
1687 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) { | |
1688 freg_destroyed[f] = false; | |
1689 } | |
1690 | |
1691 #endif /* ASSERT */ | |
1692 | |
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1693 if (is_critical_native) { |
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1694 // The mapping of Java and C arguments passed in registers are |
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1695 // rotated by one, which helps when passing arguments to regular |
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1696 // Java method but for critical natives that creates a cycle which |
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1697 // can cause arguments to be killed before they are used. Break |
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1698 // the cycle by moving the first argument into a temporary |
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1699 // register. |
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1700 for (int i = 0; i < total_c_args; i++) { |
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1701 if (in_regs[i].first()->is_Register() && |
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1702 in_regs[i].first()->as_Register() == rdi) { |
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1703 __ mov(rbx, rdi); |
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1704 in_regs[i].set1(rbx->as_VMReg()); |
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1705 } |
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1706 } |
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1707 } |
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1708 |
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1709 // This may iterate in two different directions depending on the |
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1710 // kind of native it is. The reason is that for regular JNI natives |
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1711 // the incoming and outgoing registers are offset upwards and for |
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1712 // critical natives they are offset down. |
0 | 1713 int c_arg = total_c_args - 1; |
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1714 int stride = -1; |
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1715 int init = total_in_args - 1; |
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1716 if (is_critical_native) { |
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1717 // stride forwards |
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1718 c_arg = 0; |
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1719 stride = 1; |
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1720 init = 0; |
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1721 } |
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1722 for (int i = init, count = 0; count < total_in_args; i += stride, c_arg += stride, count++ ) { |
0 | 1723 #ifdef ASSERT |
1724 if (in_regs[i].first()->is_Register()) { | |
1725 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!"); | |
1726 } else if (in_regs[i].first()->is_XMMRegister()) { | |
1727 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!"); | |
1728 } | |
1729 if (out_regs[c_arg].first()->is_Register()) { | |
1730 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; | |
1731 } else if (out_regs[c_arg].first()->is_XMMRegister()) { | |
1732 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; | |
1733 } | |
1734 #endif /* ASSERT */ | |
1735 switch (in_sig_bt[i]) { | |
1736 case T_ARRAY: | |
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1737 if (is_critical_native) { |
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1738 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); |
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1739 c_arg++; |
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1740 #ifdef ASSERT |
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1741 if (out_regs[c_arg].first()->is_Register()) { |
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1742 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; |
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1743 } else if (out_regs[c_arg].first()->is_XMMRegister()) { |
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1744 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; |
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1745 } |
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1746 #endif |
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1747 break; |
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1748 } |
0 | 1749 case T_OBJECT: |
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1750 assert(!is_critical_native, "no oop arguments"); |
0 | 1751 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], |
1752 ((i == 0) && (!is_static)), | |
1753 &receiver_offset); | |
1754 break; | |
1755 case T_VOID: | |
1756 break; | |
1757 | |
1758 case T_FLOAT: | |
1759 float_move(masm, in_regs[i], out_regs[c_arg]); | |
1760 break; | |
1761 | |
1762 case T_DOUBLE: | |
1763 assert( i + 1 < total_in_args && | |
1764 in_sig_bt[i + 1] == T_VOID && | |
1765 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
1766 double_move(masm, in_regs[i], out_regs[c_arg]); | |
1767 break; | |
1768 | |
1769 case T_LONG : | |
1770 long_move(masm, in_regs[i], out_regs[c_arg]); | |
1771 break; | |
1772 | |
1773 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
1774 | |
1775 default: | |
1776 move32_64(masm, in_regs[i], out_regs[c_arg]); | |
1777 } | |
1778 } | |
1779 | |
1780 // point c_arg at the first arg that is already loaded in case we | |
1781 // need to spill before we call out | |
1782 c_arg++; | |
1783 | |
1784 // Pre-load a static method's oop into r14. Used both by locking code and | |
1785 // the normal JNI call code. | |
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1786 if (method->is_static() && !is_critical_native) { |
0 | 1787 |
1788 // load oop into a register | |
1789 __ movoop(oop_handle_reg, JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror())); | |
1790 | |
1791 // Now handlize the static class mirror it's known not-null. | |
304 | 1792 __ movptr(Address(rsp, klass_offset), oop_handle_reg); |
0 | 1793 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
1794 | |
1795 // Now get the handle | |
304 | 1796 __ lea(oop_handle_reg, Address(rsp, klass_offset)); |
0 | 1797 // store the klass handle as second argument |
304 | 1798 __ movptr(c_rarg1, oop_handle_reg); |
0 | 1799 // and protect the arg if we must spill |
1800 c_arg--; | |
1801 } | |
1802 | |
1803 // Change state to native (we save the return address in the thread, since it might not | |
1804 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() | |
1805 // points into the right code segment. It does not have to be the correct return pc. | |
1806 // We use the same pc/oopMap repeatedly when we call out | |
1807 | |
1808 intptr_t the_pc = (intptr_t) __ pc(); | |
1809 oop_maps->add_gc_map(the_pc - start, map); | |
1810 | |
1811 __ set_last_Java_frame(rsp, noreg, (address)the_pc); | |
1812 | |
1813 | |
1814 // We have all of the arguments setup at this point. We must not touch any register | |
1815 // argument registers at this point (what if we save/restore them there are no oop? | |
1816 | |
1817 { | |
1818 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
1819 // protect the args we've loaded | |
1820 save_args(masm, total_c_args, c_arg, out_regs); | |
1821 __ movoop(c_rarg1, JNIHandles::make_local(method())); | |
1822 __ call_VM_leaf( | |
1823 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
1824 r15_thread, c_rarg1); | |
1825 restore_args(masm, total_c_args, c_arg, out_regs); | |
1826 } | |
1827 | |
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1828 // RedefineClasses() tracing support for obsolete method entry |
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1829 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
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1830 // protect the args we've loaded |
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1831 save_args(masm, total_c_args, c_arg, out_regs); |
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1832 __ movoop(c_rarg1, JNIHandles::make_local(method())); |
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1833 __ call_VM_leaf( |
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1834 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
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1835 r15_thread, c_rarg1); |
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1836 restore_args(masm, total_c_args, c_arg, out_regs); |
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1837 } |
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1838 |
0 | 1839 // Lock a synchronized method |
1840 | |
1841 // Register definitions used by locking and unlocking | |
1842 | |
1843 const Register swap_reg = rax; // Must use rax for cmpxchg instruction | |
1844 const Register obj_reg = rbx; // Will contain the oop | |
1845 const Register lock_reg = r13; // Address of compiler lock object (BasicLock) | |
1846 const Register old_hdr = r13; // value of old header at unlock time | |
1847 | |
1848 Label slow_path_lock; | |
1849 Label lock_done; | |
1850 | |
1851 if (method->is_synchronized()) { | |
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1852 assert(!is_critical_native, "unhandled"); |
0 | 1853 |
1854 | |
1855 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); | |
1856 | |
1857 // Get the handle (the 2nd argument) | |
304 | 1858 __ mov(oop_handle_reg, c_rarg1); |
0 | 1859 |
1860 // Get address of the box | |
1861 | |
304 | 1862 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
0 | 1863 |
1864 // Load the oop from the handle | |
304 | 1865 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 1866 |
1867 if (UseBiasedLocking) { | |
1868 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock); | |
1869 } | |
1870 | |
1871 // Load immediate 1 into swap_reg %rax | |
1872 __ movl(swap_reg, 1); | |
1873 | |
1874 // Load (object->mark() | 1) into swap_reg %rax | |
304 | 1875 __ orptr(swap_reg, Address(obj_reg, 0)); |
0 | 1876 |
1877 // Save (object->mark() | 1) into BasicLock's displaced header | |
304 | 1878 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 1879 |
1880 if (os::is_MP()) { | |
1881 __ lock(); | |
1882 } | |
1883 | |
1884 // src -> dest iff dest == rax else rax <- dest | |
304 | 1885 __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); |
0 | 1886 __ jcc(Assembler::equal, lock_done); |
1887 | |
1888 // Hmm should this move to the slow path code area??? | |
1889 | |
1890 // Test if the oopMark is an obvious stack pointer, i.e., | |
1891 // 1) (mark & 3) == 0, and | |
1892 // 2) rsp <= mark < mark + os::pagesize() | |
1893 // These 3 tests can be done by evaluating the following | |
1894 // expression: ((mark - rsp) & (3 - os::vm_page_size())), | |
1895 // assuming both stack pointer and pagesize have their | |
1896 // least significant 2 bits clear. | |
1897 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg | |
1898 | |
304 | 1899 __ subptr(swap_reg, rsp); |
1900 __ andptr(swap_reg, 3 - os::vm_page_size()); | |
0 | 1901 |
1902 // Save the test result, for recursive case, the result is zero | |
304 | 1903 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 1904 __ jcc(Assembler::notEqual, slow_path_lock); |
1905 | |
1906 // Slow path will re-enter here | |
1907 | |
1908 __ bind(lock_done); | |
1909 } | |
1910 | |
1911 | |
1912 // Finally just about ready to make the JNI call | |
1913 | |
1914 | |
1915 // get JNIEnv* which is first argument to native | |
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1916 if (!is_critical_native) { |
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1917 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset()))); |
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1918 } |
0 | 1919 |
1920 // Now set thread in native | |
304 | 1921 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native); |
0 | 1922 |
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1923 __ call(RuntimeAddress(native_func)); |
0 | 1924 |
1925 // Either restore the MXCSR register after returning from the JNI Call | |
1926 // or verify that it wasn't changed. | |
1927 if (RestoreMXCSROnJNICalls) { | |
304 | 1928 __ ldmxcsr(ExternalAddress(StubRoutines::x86::mxcsr_std())); |
0 | 1929 |
1930 } | |
1931 else if (CheckJNICalls ) { | |
304 | 1932 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::verify_mxcsr_entry()))); |
0 | 1933 } |
1934 | |
1935 | |
1936 // Unpack native results. | |
1937 switch (ret_type) { | |
1938 case T_BOOLEAN: __ c2bool(rax); break; | |
1939 case T_CHAR : __ movzwl(rax, rax); break; | |
1940 case T_BYTE : __ sign_extend_byte (rax); break; | |
1941 case T_SHORT : __ sign_extend_short(rax); break; | |
1942 case T_INT : /* nothing to do */ break; | |
1943 case T_DOUBLE : | |
1944 case T_FLOAT : | |
1945 // Result is in xmm0 we'll save as needed | |
1946 break; | |
1947 case T_ARRAY: // Really a handle | |
1948 case T_OBJECT: // Really a handle | |
1949 break; // can't de-handlize until after safepoint check | |
1950 case T_VOID: break; | |
1951 case T_LONG: break; | |
1952 default : ShouldNotReachHere(); | |
1953 } | |
1954 | |
1955 // Switch thread to "native transition" state before reading the synchronization state. | |
1956 // This additional state is necessary because reading and testing the synchronization | |
1957 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
1958 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
1959 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
1960 // Thread A is resumed to finish this native method, but doesn't block here since it | |
1961 // didn't see any synchronization is progress, and escapes. | |
304 | 1962 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans); |
0 | 1963 |
1964 if(os::is_MP()) { | |
1965 if (UseMembar) { | |
1966 // Force this write out before the read below | |
1967 __ membar(Assembler::Membar_mask_bits( | |
1968 Assembler::LoadLoad | Assembler::LoadStore | | |
1969 Assembler::StoreLoad | Assembler::StoreStore)); | |
1970 } else { | |
1971 // Write serialization page so VM thread can do a pseudo remote membar. | |
1972 // We use the current thread pointer to calculate a thread specific | |
1973 // offset to write to within the page. This minimizes bus traffic | |
1974 // due to cache line collision. | |
1975 __ serialize_memory(r15_thread, rcx); | |
1976 } | |
1977 } | |
1978 | |
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1979 Label after_transition; |
0 | 1980 |
1981 // check for safepoint operation in progress and/or pending suspend requests | |
1982 { | |
1983 Label Continue; | |
1984 | |
1985 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), | |
1986 SafepointSynchronize::_not_synchronized); | |
1987 | |
1988 Label L; | |
1989 __ jcc(Assembler::notEqual, L); | |
1990 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0); | |
1991 __ jcc(Assembler::equal, Continue); | |
1992 __ bind(L); | |
1993 | |
1994 // Don't use call_VM as it will see a possible pending exception and forward it | |
1995 // and never return here preventing us from clearing _last_native_pc down below. | |
1996 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are | |
1997 // preserved and correspond to the bcp/locals pointers. So we do a runtime call | |
1998 // by hand. | |
1999 // | |
2000 save_native_result(masm, ret_type, stack_slots); | |
304 | 2001 __ mov(c_rarg0, r15_thread); |
2002 __ mov(r12, rsp); // remember sp | |
2003 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2004 __ andptr(rsp, -16); // align stack as required by ABI | |
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2005 if (!is_critical_native) { |
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2006 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans))); |
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2007 } else { |
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2008 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition))); |
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2009 } |
304 | 2010 __ mov(rsp, r12); // restore sp |
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2011 __ reinit_heapbase(); |
0 | 2012 // Restore any method result value |
2013 restore_native_result(masm, ret_type, stack_slots); | |
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2014 |
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2015 if (is_critical_native) { |
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2016 // The call above performed the transition to thread_in_Java so |
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2017 // skip the transition logic below. |
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2018 __ jmpb(after_transition); |
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2019 } |
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2020 |
0 | 2021 __ bind(Continue); |
2022 } | |
2023 | |
2024 // change thread state | |
2025 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java); | |
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2026 __ bind(after_transition); |
0 | 2027 |
2028 Label reguard; | |
2029 Label reguard_done; | |
2030 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); | |
2031 __ jcc(Assembler::equal, reguard); | |
2032 __ bind(reguard_done); | |
2033 | |
2034 // native result if any is live | |
2035 | |
2036 // Unlock | |
2037 Label unlock_done; | |
2038 Label slow_path_unlock; | |
2039 if (method->is_synchronized()) { | |
2040 | |
2041 // Get locked oop from the handle we passed to jni | |
304 | 2042 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 2043 |
2044 Label done; | |
2045 | |
2046 if (UseBiasedLocking) { | |
2047 __ biased_locking_exit(obj_reg, old_hdr, done); | |
2048 } | |
2049 | |
2050 // Simple recursive lock? | |
2051 | |
304 | 2052 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD); |
0 | 2053 __ jcc(Assembler::equal, done); |
2054 | |
2055 // Must save rax if if it is live now because cmpxchg must use it | |
2056 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
2057 save_native_result(masm, ret_type, stack_slots); | |
2058 } | |
2059 | |
2060 | |
2061 // get address of the stack lock | |
304 | 2062 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
0 | 2063 // get old displaced header |
304 | 2064 __ movptr(old_hdr, Address(rax, 0)); |
0 | 2065 |
2066 // Atomic swap old header if oop still contains the stack lock | |
2067 if (os::is_MP()) { | |
2068 __ lock(); | |
2069 } | |
304 | 2070 __ cmpxchgptr(old_hdr, Address(obj_reg, 0)); |
0 | 2071 __ jcc(Assembler::notEqual, slow_path_unlock); |
2072 | |
2073 // slow path re-enters here | |
2074 __ bind(unlock_done); | |
2075 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
2076 restore_native_result(masm, ret_type, stack_slots); | |
2077 } | |
2078 | |
2079 __ bind(done); | |
2080 | |
2081 } | |
2082 { | |
2083 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
2084 save_native_result(masm, ret_type, stack_slots); | |
2085 __ movoop(c_rarg1, JNIHandles::make_local(method())); | |
2086 __ call_VM_leaf( | |
2087 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
2088 r15_thread, c_rarg1); | |
2089 restore_native_result(masm, ret_type, stack_slots); | |
2090 } | |
2091 | |
2092 __ reset_last_Java_frame(false, true); | |
2093 | |
2094 // Unpack oop result | |
2095 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
2096 Label L; | |
304 | 2097 __ testptr(rax, rax); |
0 | 2098 __ jcc(Assembler::zero, L); |
304 | 2099 __ movptr(rax, Address(rax, 0)); |
0 | 2100 __ bind(L); |
2101 __ verify_oop(rax); | |
2102 } | |
2103 | |
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2104 if (!is_critical_native) { |
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2105 // reset handle block |
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2106 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset())); |
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2107 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD); |
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2108 } |
0 | 2109 |
2110 // pop our frame | |
2111 | |
2112 __ leave(); | |
2113 | |
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2114 if (!is_critical_native) { |
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2115 // Any exception pending? |
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2116 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
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2117 __ jcc(Assembler::notEqual, exception_pending); |
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2118 } |
0 | 2119 |
2120 // Return | |
2121 | |
2122 __ ret(0); | |
2123 | |
2124 // Unexpected paths are out of line and go here | |
2125 | |
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2126 if (!is_critical_native) { |
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2127 // forward the exception |
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2128 __ bind(exception_pending); |
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2129 |
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2130 // and forward the exception |
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2131 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
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2132 } |
0 | 2133 |
2134 // Slow path locking & unlocking | |
2135 if (method->is_synchronized()) { | |
2136 | |
2137 // BEGIN Slow path lock | |
2138 __ bind(slow_path_lock); | |
2139 | |
2140 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM | |
2141 // args are (oop obj, BasicLock* lock, JavaThread* thread) | |
2142 | |
2143 // protect the args we've loaded | |
2144 save_args(masm, total_c_args, c_arg, out_regs); | |
2145 | |
304 | 2146 __ mov(c_rarg0, obj_reg); |
2147 __ mov(c_rarg1, lock_reg); | |
2148 __ mov(c_rarg2, r15_thread); | |
0 | 2149 |
2150 // Not a leaf but we have last_Java_frame setup as we want | |
2151 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3); | |
2152 restore_args(masm, total_c_args, c_arg, out_regs); | |
2153 | |
2154 #ifdef ASSERT | |
2155 { Label L; | |
304 | 2156 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
0 | 2157 __ jcc(Assembler::equal, L); |
2158 __ stop("no pending exception allowed on exit from monitorenter"); | |
2159 __ bind(L); | |
2160 } | |
2161 #endif | |
2162 __ jmp(lock_done); | |
2163 | |
2164 // END Slow path lock | |
2165 | |
2166 // BEGIN Slow path unlock | |
2167 __ bind(slow_path_unlock); | |
2168 | |
2169 // If we haven't already saved the native result we must save it now as xmm registers | |
2170 // are still exposed. | |
2171 | |
2172 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
2173 save_native_result(masm, ret_type, stack_slots); | |
2174 } | |
2175 | |
304 | 2176 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
2177 | |
2178 __ mov(c_rarg0, obj_reg); | |
2179 __ mov(r12, rsp); // remember sp | |
2180 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2181 __ andptr(rsp, -16); // align stack as required by ABI | |
0 | 2182 |
2183 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) | |
2184 // NOTE that obj_reg == rbx currently | |
304 | 2185 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset()))); |
2186 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); | |
0 | 2187 |
2188 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); | |
304 | 2189 __ mov(rsp, r12); // restore sp |
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2190 __ reinit_heapbase(); |
0 | 2191 #ifdef ASSERT |
2192 { | |
2193 Label L; | |
304 | 2194 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); |
0 | 2195 __ jcc(Assembler::equal, L); |
2196 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); | |
2197 __ bind(L); | |
2198 } | |
2199 #endif /* ASSERT */ | |
2200 | |
304 | 2201 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx); |
0 | 2202 |
2203 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
2204 restore_native_result(masm, ret_type, stack_slots); | |
2205 } | |
2206 __ jmp(unlock_done); | |
2207 | |
2208 // END Slow path unlock | |
2209 | |
2210 } // synchronized | |
2211 | |
2212 // SLOW PATH Reguard the stack if needed | |
2213 | |
2214 __ bind(reguard); | |
2215 save_native_result(masm, ret_type, stack_slots); | |
304 | 2216 __ mov(r12, rsp); // remember sp |
2217 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2218 __ andptr(rsp, -16); // align stack as required by ABI | |
0 | 2219 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); |
304 | 2220 __ mov(rsp, r12); // restore sp |
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2221 __ reinit_heapbase(); |
0 | 2222 restore_native_result(masm, ret_type, stack_slots); |
2223 // and continue | |
2224 __ jmp(reguard_done); | |
2225 | |
2226 | |
2227 | |
2228 __ flush(); | |
2229 | |
2230 nmethod *nm = nmethod::new_native_nmethod(method, | |
2405
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2231 compile_id, |
0 | 2232 masm->code(), |
2233 vep_offset, | |
2234 frame_complete, | |
2235 stack_slots / VMRegImpl::slots_per_word, | |
2236 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
2237 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), | |
2238 oop_maps); | |
4873
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2239 |
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2240 if (is_critical_native) { |
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2241 nm->set_lazy_critical_native(true); |
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2242 } |
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2243 |
0 | 2244 return nm; |
2245 | |
2246 } | |
2247 | |
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2248 #ifdef HAVE_DTRACE_H |
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2249 // --------------------------------------------------------------------------- |
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2250 // Generate a dtrace nmethod for a given signature. The method takes arguments |
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2251 // in the Java compiled code convention, marshals them to the native |
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2252 // abi and then leaves nops at the position you would expect to call a native |
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2253 // function. When the probe is enabled the nops are replaced with a trap |
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2254 // instruction that dtrace inserts and the trace will cause a notification |
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2255 // to dtrace. |
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2256 // |
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2257 // The probes are only able to take primitive types and java/lang/String as |
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2258 // arguments. No other java types are allowed. Strings are converted to utf8 |
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2259 // strings so that from dtrace point of view java strings are converted to C |
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2260 // strings. There is an arbitrary fixed limit on the total space that a method |
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2261 // can use for converting the strings. (256 chars per string in the signature). |
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2262 // So any java string larger then this is truncated. |
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2263 |
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2264 static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 }; |
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2265 static bool offsets_initialized = false; |
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2266 |
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2267 |
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2268 nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm, |
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2269 methodHandle method) { |
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2270 |
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2271 |
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2272 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
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2273 // be single threaded in this method. |
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2274 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
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2275 |
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2276 if (!offsets_initialized) { |
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2277 fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize; |
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2278 fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize; |
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2279 fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize; |
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2280 fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize; |
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2281 fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize; |
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2282 fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize; |
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2283 |
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2284 fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize; |
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2285 fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize; |
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2286 fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize; |
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2287 fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize; |
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2288 fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize; |
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2289 fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize; |
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2290 fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize; |
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2291 fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize; |
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2292 |
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2293 offsets_initialized = true; |
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2294 } |
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2295 // Fill in the signature array, for the calling-convention call. |
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2296 int total_args_passed = method->size_of_parameters(); |
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2297 |
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2298 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
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2299 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
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2300 |
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2301 // The signature we are going to use for the trap that dtrace will see |
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2302 // java/lang/String is converted. We drop "this" and any other object |
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2303 // is converted to NULL. (A one-slot java/lang/Long object reference |
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2304 // is converted to a two-slot long, which is why we double the allocation). |
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2305 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
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2306 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
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2307 |
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2308 int i=0; |
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2309 int total_strings = 0; |
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2310 int first_arg_to_pass = 0; |
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2311 int total_c_args = 0; |
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2312 |
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2313 // Skip the receiver as dtrace doesn't want to see it |
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2314 if( !method->is_static() ) { |
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2315 in_sig_bt[i++] = T_OBJECT; |
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2316 first_arg_to_pass = 1; |
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2317 } |
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2318 |
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2319 // We need to convert the java args to where a native (non-jni) function |
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2320 // would expect them. To figure out where they go we convert the java |
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2321 // signature to a C signature. |
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2322 |
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2323 SignatureStream ss(method->signature()); |
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2324 for ( ; !ss.at_return_type(); ss.next()) { |
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2325 BasicType bt = ss.type(); |
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2326 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
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2327 out_sig_bt[total_c_args++] = bt; |
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2328 if( bt == T_OBJECT) { |
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2329 Symbol* s = ss.as_symbol_or_null(); // symbol is created |
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2330 if (s == vmSymbols::java_lang_String()) { |
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2331 total_strings++; |
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2332 out_sig_bt[total_c_args-1] = T_ADDRESS; |
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2333 } else if (s == vmSymbols::java_lang_Boolean() || |
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2334 s == vmSymbols::java_lang_Character() || |
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2335 s == vmSymbols::java_lang_Byte() || |
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2336 s == vmSymbols::java_lang_Short() || |
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2337 s == vmSymbols::java_lang_Integer() || |
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2338 s == vmSymbols::java_lang_Float()) { |
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2339 out_sig_bt[total_c_args-1] = T_INT; |
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2340 } else if (s == vmSymbols::java_lang_Long() || |
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2341 s == vmSymbols::java_lang_Double()) { |
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2342 out_sig_bt[total_c_args-1] = T_LONG; |
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2343 out_sig_bt[total_c_args++] = T_VOID; |
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2344 } |
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2345 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
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2346 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
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2347 // We convert double to long |
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2348 out_sig_bt[total_c_args-1] = T_LONG; |
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2349 out_sig_bt[total_c_args++] = T_VOID; |
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2350 } else if ( bt == T_FLOAT) { |
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2351 // We convert float to int |
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2352 out_sig_bt[total_c_args-1] = T_INT; |
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2353 } |
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2354 } |
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2355 |
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2356 assert(i==total_args_passed, "validly parsed signature"); |
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2357 |
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2358 // Now get the compiled-Java layout as input arguments |
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2359 int comp_args_on_stack; |
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2360 comp_args_on_stack = SharedRuntime::java_calling_convention( |
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2361 in_sig_bt, in_regs, total_args_passed, false); |
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2362 |
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2363 // Now figure out where the args must be stored and how much stack space |
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2364 // they require (neglecting out_preserve_stack_slots but space for storing |
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2365 // the 1st six register arguments). It's weird see int_stk_helper. |
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2366 |
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2367 int out_arg_slots; |
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2368 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); |
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2369 |
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2370 // Calculate the total number of stack slots we will need. |
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2371 |
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2372 // First count the abi requirement plus all of the outgoing args |
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2373 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
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2374 |
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2375 // Now space for the string(s) we must convert |
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2376 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1); |
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2377 for (i = 0; i < total_strings ; i++) { |
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2378 string_locs[i] = stack_slots; |
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2379 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size; |
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2380 } |
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2381 |
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2382 // Plus the temps we might need to juggle register args |
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2383 // regs take two slots each |
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2384 stack_slots += (Argument::n_int_register_parameters_c + |
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2385 Argument::n_float_register_parameters_c) * 2; |
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2386 |
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2387 |
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2388 // + 4 for return address (which we own) and saved rbp, |
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2389 |
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2390 stack_slots += 4; |
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2391 |
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2392 // Ok The space we have allocated will look like: |
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2393 // |
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2394 // |
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2395 // FP-> | | |
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2396 // |---------------------| |
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2397 // | string[n] | |
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2398 // |---------------------| <- string_locs[n] |
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2399 // | string[n-1] | |
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2400 // |---------------------| <- string_locs[n-1] |
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2401 // | ... | |
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2402 // | ... | |
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2403 // |---------------------| <- string_locs[1] |
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2404 // | string[0] | |
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2405 // |---------------------| <- string_locs[0] |
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2406 // | outbound memory | |
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2407 // | based arguments | |
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2408 // | | |
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2409 // |---------------------| |
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2410 // | | |
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2411 // SP-> | out_preserved_slots | |
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2412 // |
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2413 // |
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2414 |
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2415 // Now compute actual number of stack words we need rounding to make |
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2416 // stack properly aligned. |
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2417 stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word); |
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2418 |
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2419 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
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2420 |
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2421 intptr_t start = (intptr_t)__ pc(); |
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2422 |
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2423 // First thing make an ic check to see if we should even be here |
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2424 |
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2425 // We are free to use all registers as temps without saving them and |
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2426 // restoring them except rbp. rbp, is the only callee save register |
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2427 // as far as the interpreter and the compiler(s) are concerned. |
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2428 |
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2429 const Register ic_reg = rax; |
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2430 const Register receiver = rcx; |
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2431 Label hit; |
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2432 Label exception_pending; |
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2433 |
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2434 |
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2435 __ verify_oop(receiver); |
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2436 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
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2437 __ jcc(Assembler::equal, hit); |
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2438 |
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2439 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); |
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2440 |
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2441 // verified entry must be aligned for code patching. |
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2442 // and the first 5 bytes must be in the same cache line |
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2443 // if we align at 8 then we will be sure 5 bytes are in the same line |
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2444 __ align(8); |
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2445 |
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2446 __ bind(hit); |
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2447 |
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2448 int vep_offset = ((intptr_t)__ pc()) - start; |
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2449 |
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2450 |
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2451 // The instruction at the verified entry point must be 5 bytes or longer |
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2452 // because it can be patched on the fly by make_non_entrant. The stack bang |
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2453 // instruction fits that requirement. |
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2454 |
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2455 // Generate stack overflow check |
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2456 |
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2457 if (UseStackBanging) { |
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2458 if (stack_size <= StackShadowPages*os::vm_page_size()) { |
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2459 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); |
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2460 } else { |
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2461 __ movl(rax, stack_size); |
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2462 __ bang_stack_size(rax, rbx); |
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2463 } |
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2464 } else { |
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2465 // need a 5 byte instruction to allow MT safe patching to non-entrant |
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2466 __ fat_nop(); |
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2467 } |
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2468 |
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2469 assert(((uintptr_t)__ pc() - start - vep_offset) >= 5, |
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2470 "valid size for make_non_entrant"); |
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2471 |
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2472 // Generate a new frame for the wrapper. |
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2473 __ enter(); |
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2474 |
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2475 // -4 because return address is already present and so is saved rbp, |
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2476 if (stack_size - 2*wordSize != 0) { |
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2477 __ subq(rsp, stack_size - 2*wordSize); |
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2478 } |
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2479 |
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2480 // Frame is now completed as far a size and linkage. |
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2481 |
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2482 int frame_complete = ((intptr_t)__ pc()) - start; |
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2483 |
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2484 int c_arg, j_arg; |
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2485 |
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2486 // State of input register args |
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2487 |
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2488 bool live[ConcreteRegisterImpl::number_of_registers]; |
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2489 |
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2490 live[j_rarg0->as_VMReg()->value()] = false; |
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2491 live[j_rarg1->as_VMReg()->value()] = false; |
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2492 live[j_rarg2->as_VMReg()->value()] = false; |
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2493 live[j_rarg3->as_VMReg()->value()] = false; |
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2494 live[j_rarg4->as_VMReg()->value()] = false; |
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2495 live[j_rarg5->as_VMReg()->value()] = false; |
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2496 |
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2497 live[j_farg0->as_VMReg()->value()] = false; |
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2498 live[j_farg1->as_VMReg()->value()] = false; |
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2499 live[j_farg2->as_VMReg()->value()] = false; |
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2500 live[j_farg3->as_VMReg()->value()] = false; |
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2501 live[j_farg4->as_VMReg()->value()] = false; |
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2502 live[j_farg5->as_VMReg()->value()] = false; |
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2503 live[j_farg6->as_VMReg()->value()] = false; |
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2504 live[j_farg7->as_VMReg()->value()] = false; |
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2505 |
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2506 |
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2507 bool rax_is_zero = false; |
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2508 |
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2509 // All args (except strings) destined for the stack are moved first |
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2510 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2511 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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2512 VMRegPair src = in_regs[j_arg]; |
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2513 VMRegPair dst = out_regs[c_arg]; |
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2514 |
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2515 // Get the real reg value or a dummy (rsp) |
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2516 |
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2517 int src_reg = src.first()->is_reg() ? |
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2518 src.first()->value() : |
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2519 rsp->as_VMReg()->value(); |
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2520 |
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2521 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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2522 (in_sig_bt[j_arg] == T_OBJECT && |
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2523 out_sig_bt[c_arg] != T_INT && |
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2524 out_sig_bt[c_arg] != T_ADDRESS && |
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2525 out_sig_bt[c_arg] != T_LONG); |
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2526 |
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2527 live[src_reg] = !useless; |
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2528 |
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2529 if (dst.first()->is_stack()) { |
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2530 |
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2531 // Even though a string arg in a register is still live after this loop |
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2532 // after the string conversion loop (next) it will be dead so we take |
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2533 // advantage of that now for simpler code to manage live. |
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2534 |
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2535 live[src_reg] = false; |
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2536 switch (in_sig_bt[j_arg]) { |
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2537 |
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2538 case T_ARRAY: |
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2539 case T_OBJECT: |
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2540 { |
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2541 Address stack_dst(rsp, reg2offset_out(dst.first())); |
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2542 |
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2543 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
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2544 // need to unbox a one-word value |
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2545 Register in_reg = rax; |
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2546 if ( src.first()->is_reg() ) { |
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2547 in_reg = src.first()->as_Register(); |
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2548 } else { |
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2549 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
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2550 rax_is_zero = false; |
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2551 } |
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2552 Label skipUnbox; |
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2553 __ movptr(Address(rsp, reg2offset_out(dst.first())), |
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2554 (int32_t)NULL_WORD); |
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2555 __ testq(in_reg, in_reg); |
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2556 __ jcc(Assembler::zero, skipUnbox); |
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2557 |
165
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2558 BasicType bt = out_sig_bt[c_arg]; |
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2559 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
116
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2560 Address src1(in_reg, box_offset); |
165
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2561 if ( bt == T_LONG ) { |
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2562 __ movq(in_reg, src1); |
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2563 __ movq(stack_dst, in_reg); |
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2564 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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2565 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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2566 } else { |
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2567 __ movl(in_reg, src1); |
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2568 __ movl(stack_dst, in_reg); |
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2569 } |
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2570 |
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2571 __ bind(skipUnbox); |
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2572 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
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2573 // Convert the arg to NULL |
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2574 if (!rax_is_zero) { |
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2575 __ xorq(rax, rax); |
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2576 rax_is_zero = true; |
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|
2577 } |
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|
2578 __ movq(stack_dst, rax); |
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|
2579 } |
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|
2580 } |
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|
2581 break; |
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|
2582 |
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|
2583 case T_VOID: |
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|
2584 break; |
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113
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|
2585 |
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|
2586 case T_FLOAT: |
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2587 // This does the right thing since we know it is destined for the |
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2588 // stack |
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|
2589 float_move(masm, src, dst); |
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113
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|
2590 break; |
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113
diff
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|
2591 |
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|
2592 case T_DOUBLE: |
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2593 // This does the right thing since we know it is destined for the |
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2594 // stack |
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|
2595 double_move(masm, src, dst); |
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|
2596 break; |
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|
2597 |
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|
2598 case T_LONG : |
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|
2599 long_move(masm, src, dst); |
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|
2600 break; |
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|
2601 |
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|
2602 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
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|
2603 |
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|
2604 default: |
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|
2605 move32_64(masm, src, dst); |
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|
2606 } |
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|
2607 } |
018d5b58dd4f
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|
2608 |
018d5b58dd4f
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|
2609 } |
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|
2610 |
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|
2611 // If we have any strings we must store any register based arg to the stack |
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2612 // This includes any still live xmm registers too. |
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|
2613 |
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|
2614 int sid = 0; |
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113
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|
2615 |
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2616 if (total_strings > 0 ) { |
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2617 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2618 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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2619 VMRegPair src = in_regs[j_arg]; |
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2620 VMRegPair dst = out_regs[c_arg]; |
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|
2621 |
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2622 if (src.first()->is_reg()) { |
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2623 Address src_tmp(rbp, fp_offset[src.first()->value()]); |
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|
2624 |
018d5b58dd4f
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|
2625 // string oops were left untouched by the previous loop even if the |
018d5b58dd4f
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2626 // eventual (converted) arg is destined for the stack so park them |
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2627 // away now (except for first) |
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|
2628 |
018d5b58dd4f
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|
2629 if (out_sig_bt[c_arg] == T_ADDRESS) { |
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|
2630 Address utf8_addr = Address( |
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|
2631 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
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2632 if (sid != 1) { |
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|
2633 // The first string arg won't be killed until after the utf8 |
018d5b58dd4f
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113
diff
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|
2634 // conversion |
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|
2635 __ movq(utf8_addr, src.first()->as_Register()); |
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113
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|
2636 } |
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|
2637 } else if (dst.first()->is_reg()) { |
018d5b58dd4f
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2638 if (in_sig_bt[j_arg] == T_FLOAT || in_sig_bt[j_arg] == T_DOUBLE) { |
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|
2639 |
018d5b58dd4f
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|
2640 // Convert the xmm register to an int and store it in the reserved |
018d5b58dd4f
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|
2641 // location for the eventual c register arg |
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|
2642 XMMRegister f = src.first()->as_XMMRegister(); |
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|
2643 if (in_sig_bt[j_arg] == T_FLOAT) { |
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|
2644 __ movflt(src_tmp, f); |
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|
2645 } else { |
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|
2646 __ movdbl(src_tmp, f); |
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113
diff
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|
2647 } |
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|
2648 } else { |
018d5b58dd4f
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|
2649 // If the arg is an oop type we don't support don't bother to store |
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|
2650 // it remember string was handled above. |
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|
2651 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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|
2652 (in_sig_bt[j_arg] == T_OBJECT && |
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|
2653 out_sig_bt[c_arg] != T_INT && |
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|
2654 out_sig_bt[c_arg] != T_LONG); |
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113
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|
2655 |
018d5b58dd4f
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|
2656 if (!useless) { |
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|
2657 __ movq(src_tmp, src.first()->as_Register()); |
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|
2658 } |
018d5b58dd4f
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kamg
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113
diff
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|
2659 } |
018d5b58dd4f
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kamg
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113
diff
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|
2660 } |
018d5b58dd4f
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kamg
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113
diff
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|
2661 } |
018d5b58dd4f
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113
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|
2662 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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|
2663 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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|
2664 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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|
2665 } |
018d5b58dd4f
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kamg
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113
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|
2666 } |
018d5b58dd4f
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kamg
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113
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|
2667 |
018d5b58dd4f
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|
2668 // Now that the volatile registers are safe, convert all the strings |
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|
2669 sid = 0; |
018d5b58dd4f
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|
2670 |
018d5b58dd4f
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|
2671 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2672 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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|
2673 if (out_sig_bt[c_arg] == T_ADDRESS) { |
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|
2674 // It's a string |
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|
2675 Address utf8_addr = Address( |
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|
2676 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
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|
2677 // The first string we find might still be in the original java arg |
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|
2678 // register |
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|
2679 |
018d5b58dd4f
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|
2680 VMReg src = in_regs[j_arg].first(); |
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|
2681 |
018d5b58dd4f
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|
2682 // We will need to eventually save the final argument to the trap |
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2683 // in the von-volatile location dedicated to src. This is the offset |
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|
2684 // from fp we will use. |
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|
2685 int src_off = src->is_reg() ? |
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|
2686 fp_offset[src->value()] : reg2offset_in(src); |
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|
2687 |
018d5b58dd4f
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|
2688 // This is where the argument will eventually reside |
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|
2689 VMRegPair dst = out_regs[c_arg]; |
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|
2690 |
018d5b58dd4f
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|
2691 if (src->is_reg()) { |
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|
2692 if (sid == 1) { |
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|
2693 __ movq(c_rarg0, src->as_Register()); |
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2694 } else { |
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2695 __ movq(c_rarg0, utf8_addr); |
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2696 } |
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2697 } else { |
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2698 // arg is still in the original location |
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2699 __ movq(c_rarg0, Address(rbp, reg2offset_in(src))); |
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2700 } |
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2701 Label done, convert; |
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2702 |
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2703 // see if the oop is NULL |
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2704 __ testq(c_rarg0, c_rarg0); |
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2705 __ jcc(Assembler::notEqual, convert); |
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2706 |
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2707 if (dst.first()->is_reg()) { |
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2708 // Save the ptr to utf string in the origina src loc or the tmp |
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2709 // dedicated to it |
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2710 __ movq(Address(rbp, src_off), c_rarg0); |
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2711 } else { |
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2712 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg0); |
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2713 } |
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2714 __ jmp(done); |
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2715 |
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2716 __ bind(convert); |
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2717 |
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2718 __ lea(c_rarg1, utf8_addr); |
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2719 if (dst.first()->is_reg()) { |
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2720 __ movq(Address(rbp, src_off), c_rarg1); |
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2721 } else { |
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2722 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1); |
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2723 } |
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2724 // And do the conversion |
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2725 __ call(RuntimeAddress( |
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2726 CAST_FROM_FN_PTR(address, SharedRuntime::get_utf))); |
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2727 |
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2728 __ bind(done); |
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2729 } |
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2730 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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2731 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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2732 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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2733 } |
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2734 } |
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2735 // The get_utf call killed all the c_arg registers |
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2736 live[c_rarg0->as_VMReg()->value()] = false; |
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2737 live[c_rarg1->as_VMReg()->value()] = false; |
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2738 live[c_rarg2->as_VMReg()->value()] = false; |
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2739 live[c_rarg3->as_VMReg()->value()] = false; |
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2740 live[c_rarg4->as_VMReg()->value()] = false; |
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2741 live[c_rarg5->as_VMReg()->value()] = false; |
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2742 |
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2743 live[c_farg0->as_VMReg()->value()] = false; |
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2744 live[c_farg1->as_VMReg()->value()] = false; |
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2745 live[c_farg2->as_VMReg()->value()] = false; |
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2746 live[c_farg3->as_VMReg()->value()] = false; |
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2747 live[c_farg4->as_VMReg()->value()] = false; |
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2748 live[c_farg5->as_VMReg()->value()] = false; |
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2749 live[c_farg6->as_VMReg()->value()] = false; |
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2750 live[c_farg7->as_VMReg()->value()] = false; |
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2751 } |
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2752 |
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2753 // Now we can finally move the register args to their desired locations |
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2754 |
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2755 rax_is_zero = false; |
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2756 |
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2757 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2758 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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2759 |
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2760 VMRegPair src = in_regs[j_arg]; |
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2761 VMRegPair dst = out_regs[c_arg]; |
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2762 |
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2763 // Only need to look for args destined for the interger registers (since we |
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2764 // convert float/double args to look like int/long outbound) |
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2765 if (dst.first()->is_reg()) { |
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2766 Register r = dst.first()->as_Register(); |
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2767 |
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2768 // Check if the java arg is unsupported and thereofre useless |
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2769 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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2770 (in_sig_bt[j_arg] == T_OBJECT && |
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2771 out_sig_bt[c_arg] != T_INT && |
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2772 out_sig_bt[c_arg] != T_ADDRESS && |
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2773 out_sig_bt[c_arg] != T_LONG); |
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2774 |
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|
2775 |
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2776 // If we're going to kill an existing arg save it first |
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2777 if (live[dst.first()->value()]) { |
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2778 // you can't kill yourself |
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2779 if (src.first() != dst.first()) { |
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2780 __ movq(Address(rbp, fp_offset[dst.first()->value()]), r); |
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2781 } |
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|
2782 } |
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2783 if (src.first()->is_reg()) { |
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2784 if (live[src.first()->value()] ) { |
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2785 if (in_sig_bt[j_arg] == T_FLOAT) { |
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2786 __ movdl(r, src.first()->as_XMMRegister()); |
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2787 } else if (in_sig_bt[j_arg] == T_DOUBLE) { |
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2788 __ movdq(r, src.first()->as_XMMRegister()); |
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2789 } else if (r != src.first()->as_Register()) { |
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2790 if (!useless) { |
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2791 __ movq(r, src.first()->as_Register()); |
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2792 } |
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|
2793 } |
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|
2794 } else { |
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2795 // If the arg is an oop type we don't support don't bother to store |
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2796 // it |
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2797 if (!useless) { |
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2798 if (in_sig_bt[j_arg] == T_DOUBLE || |
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2799 in_sig_bt[j_arg] == T_LONG || |
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2800 in_sig_bt[j_arg] == T_OBJECT ) { |
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2801 __ movq(r, Address(rbp, fp_offset[src.first()->value()])); |
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2802 } else { |
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2803 __ movl(r, Address(rbp, fp_offset[src.first()->value()])); |
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2804 } |
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|
2805 } |
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|
2806 } |
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|
2807 live[src.first()->value()] = false; |
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2808 } else if (!useless) { |
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2809 // full sized move even for int should be ok |
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2810 __ movq(r, Address(rbp, reg2offset_in(src.first()))); |
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2811 } |
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2812 |
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2813 // At this point r has the original java arg in the final location |
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2814 // (assuming it wasn't useless). If the java arg was an oop |
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2815 // we have a bit more to do |
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2816 |
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2817 if (in_sig_bt[j_arg] == T_ARRAY || in_sig_bt[j_arg] == T_OBJECT ) { |
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2818 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
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2819 // need to unbox a one-word value |
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2820 Label skip; |
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2821 __ testq(r, r); |
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2822 __ jcc(Assembler::equal, skip); |
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2823 BasicType bt = out_sig_bt[c_arg]; |
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2824 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
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2825 Address src1(r, box_offset); |
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2826 if ( bt == T_LONG ) { |
116
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2827 __ movq(r, src1); |
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2828 } else { |
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2829 __ movl(r, src1); |
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2830 } |
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2831 __ bind(skip); |
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2832 |
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2833 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
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2834 // Convert the arg to NULL |
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2835 __ xorq(r, r); |
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2836 } |
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2837 } |
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2838 |
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2839 // dst can longer be holding an input value |
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2840 live[dst.first()->value()] = false; |
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2841 } |
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2842 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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2843 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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2844 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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2845 } |
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2846 } |
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2847 |
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2848 |
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2849 // Ok now we are done. Need to place the nop that dtrace wants in order to |
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2850 // patch in the trap |
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2851 int patch_offset = ((intptr_t)__ pc()) - start; |
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2852 |
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2853 __ nop(); |
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2854 |
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2855 |
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2856 // Return |
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2857 |
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2858 __ leave(); |
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2859 __ ret(0); |
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2860 |
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2861 __ flush(); |
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2862 |
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2863 nmethod *nm = nmethod::new_dtrace_nmethod( |
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2864 method, masm->code(), vep_offset, patch_offset, frame_complete, |
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2865 stack_slots / VMRegImpl::slots_per_word); |
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2866 return nm; |
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2867 |
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2868 } |
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2869 |
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2870 #endif // HAVE_DTRACE_H |
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2871 |
0 | 2872 // this function returns the adjust size (in number of words) to a c2i adapter |
2873 // activation for use during deoptimization | |
2874 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { | |
1506 | 2875 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
0 | 2876 } |
2877 | |
2878 | |
2879 uint SharedRuntime::out_preserve_stack_slots() { | |
2880 return 0; | |
2881 } | |
2882 | |
2883 | |
2884 //------------------------------generate_deopt_blob---------------------------- | |
2885 void SharedRuntime::generate_deopt_blob() { | |
2886 // Allocate space for the code | |
2887 ResourceMark rm; | |
2888 // Setup code generation tools | |
2889 CodeBuffer buffer("deopt_blob", 2048, 1024); | |
2890 MacroAssembler* masm = new MacroAssembler(&buffer); | |
2891 int frame_size_in_words; | |
2892 OopMap* map = NULL; | |
2893 OopMapSet *oop_maps = new OopMapSet(); | |
2894 | |
2895 // ------------- | |
2896 // This code enters when returning to a de-optimized nmethod. A return | |
2897 // address has been pushed on the the stack, and return values are in | |
2898 // registers. | |
2899 // If we are doing a normal deopt then we were called from the patched | |
2900 // nmethod from the point we returned to the nmethod. So the return | |
2901 // address on the stack is wrong by NativeCall::instruction_size | |
2902 // We will adjust the value so it looks like we have the original return | |
2903 // address on the stack (like when we eagerly deoptimized). | |
2904 // In the case of an exception pending when deoptimizing, we enter | |
2905 // with a return address on the stack that points after the call we patched | |
2906 // into the exception handler. We have the following register state from, | |
2907 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp). | |
2908 // rax: exception oop | |
2909 // rbx: exception handler | |
2910 // rdx: throwing pc | |
2911 // So in this case we simply jam rdx into the useless return address and | |
2912 // the stack looks just like we want. | |
2913 // | |
2914 // At this point we need to de-opt. We save the argument return | |
2915 // registers. We call the first C routine, fetch_unroll_info(). This | |
2916 // routine captures the return values and returns a structure which | |
2917 // describes the current frame size and the sizes of all replacement frames. | |
2918 // The current frame is compiled code and may contain many inlined | |
2919 // functions, each with their own JVM state. We pop the current frame, then | |
2920 // push all the new frames. Then we call the C routine unpack_frames() to | |
2921 // populate these frames. Finally unpack_frames() returns us the new target | |
2922 // address. Notice that callee-save registers are BLOWN here; they have | |
2923 // already been captured in the vframeArray at the time the return PC was | |
2924 // patched. | |
2925 address start = __ pc(); | |
2926 Label cont; | |
2927 | |
2928 // Prolog for non exception case! | |
2929 | |
2930 // Save everything in sight. | |
2931 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
2932 | |
2933 // Normal deoptimization. Save exec mode for unpack_frames. | |
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2934 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved |
0 | 2935 __ jmp(cont); |
304 | 2936 |
2937 int reexecute_offset = __ pc() - start; | |
2938 | |
2939 // Reexecute case | |
2940 // return address is the pc describes what bci to do re-execute at | |
2941 | |
2942 // No need to update map as each call to save_live_registers will produce identical oopmap | |
2943 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
2944 | |
2945 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved | |
2946 __ jmp(cont); | |
2947 | |
0 | 2948 int exception_offset = __ pc() - start; |
2949 | |
2950 // Prolog for exception case | |
2951 | |
304 | 2952 // all registers are dead at this entry point, except for rax, and |
2953 // rdx which contain the exception oop and exception pc | |
2954 // respectively. Set them in TLS and fall thru to the | |
2955 // unpack_with_exception_in_tls entry point. | |
2956 | |
2957 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
2958 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax); | |
2959 | |
2960 int exception_in_tls_offset = __ pc() - start; | |
2961 | |
2962 // new implementation because exception oop is now passed in JavaThread | |
2963 | |
2964 // Prolog for exception case | |
2965 // All registers must be preserved because they might be used by LinearScan | |
2966 // Exceptiop oop and throwing PC are passed in JavaThread | |
2967 // tos: stack at point of call to method that threw the exception (i.e. only | |
2968 // args are on the stack, no return address) | |
2969 | |
2970 // make room on stack for the return address | |
2971 // It will be patched later with the throwing pc. The correct value is not | |
2972 // available now because loading it from memory would destroy registers. | |
2973 __ push(0); | |
0 | 2974 |
2975 // Save everything in sight. | |
2976 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
2977 | |
304 | 2978 // Now it is safe to overwrite any register |
2979 | |
0 | 2980 // Deopt during an exception. Save exec mode for unpack_frames. |
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2981 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved |
0 | 2982 |
304 | 2983 // load throwing pc from JavaThread and patch it as the return address |
2984 // of the current frame. Then clear the field in JavaThread | |
2985 | |
2986 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
2987 __ movptr(Address(rbp, wordSize), rdx); | |
2988 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
2989 | |
2990 #ifdef ASSERT | |
2991 // verify that there is really an exception oop in JavaThread | |
2992 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
2993 __ verify_oop(rax); | |
2994 | |
2995 // verify that there is no pending exception | |
2996 Label no_pending_exception; | |
2997 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); | |
2998 __ testptr(rax, rax); | |
2999 __ jcc(Assembler::zero, no_pending_exception); | |
3000 __ stop("must not have pending exception here"); | |
3001 __ bind(no_pending_exception); | |
3002 #endif | |
3003 | |
0 | 3004 __ bind(cont); |
3005 | |
3006 // Call C code. Need thread and this frame, but NOT official VM entry | |
3007 // crud. We cannot block on this call, no GC can happen. | |
3008 // | |
3009 // UnrollBlock* fetch_unroll_info(JavaThread* thread) | |
3010 | |
3011 // fetch_unroll_info needs to call last_java_frame(). | |
3012 | |
3013 __ set_last_Java_frame(noreg, noreg, NULL); | |
3014 #ifdef ASSERT | |
3015 { Label L; | |
304 | 3016 __ cmpptr(Address(r15_thread, |
0 | 3017 JavaThread::last_Java_fp_offset()), |
304 | 3018 (int32_t)0); |
0 | 3019 __ jcc(Assembler::equal, L); |
3020 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared"); | |
3021 __ bind(L); | |
3022 } | |
3023 #endif // ASSERT | |
304 | 3024 __ mov(c_rarg0, r15_thread); |
0 | 3025 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); |
3026 | |
3027 // Need to have an oopmap that tells fetch_unroll_info where to | |
3028 // find any register it might need. | |
3029 oop_maps->add_gc_map(__ pc() - start, map); | |
3030 | |
3031 __ reset_last_Java_frame(false, false); | |
3032 | |
3033 // Load UnrollBlock* into rdi | |
304 | 3034 __ mov(rdi, rax); |
3035 | |
3036 Label noException; | |
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3037 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending? |
304 | 3038 __ jcc(Assembler::notEqual, noException); |
3039 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
3040 // QQQ this is useless it was NULL above | |
3041 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
3042 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); | |
3043 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
3044 | |
3045 __ verify_oop(rax); | |
3046 | |
3047 // Overwrite the result registers with the exception results. | |
3048 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
3049 // I think this is useless | |
3050 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx); | |
3051 | |
3052 __ bind(noException); | |
0 | 3053 |
3054 // Only register save data is on the stack. | |
3055 // Now restore the result registers. Everything else is either dead | |
3056 // or captured in the vframeArray. | |
3057 RegisterSaver::restore_result_registers(masm); | |
3058 | |
3059 // All of the register save area has been popped of the stack. Only the | |
3060 // return address remains. | |
3061 | |
3062 // Pop all the frames we must move/replace. | |
3063 // | |
3064 // Frame picture (youngest to oldest) | |
3065 // 1: self-frame (no frame link) | |
3066 // 2: deopting frame (no frame link) | |
3067 // 3: caller of deopting frame (could be compiled/interpreted). | |
3068 // | |
3069 // Note: by leaving the return address of self-frame on the stack | |
3070 // and using the size of frame 2 to adjust the stack | |
3071 // when we are done the return to frame 3 will still be on the stack. | |
3072 | |
3073 // Pop deoptimized frame | |
3074 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); | |
304 | 3075 __ addptr(rsp, rcx); |
0 | 3076 |
3077 // rsp should be pointing at the return address to the caller (3) | |
3078 | |
3079 // Stack bang to make sure there's enough room for these interpreter frames. | |
3080 if (UseStackBanging) { | |
3081 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
3082 __ bang_stack_size(rbx, rcx); | |
3083 } | |
3084 | |
3085 // Load address of array of frame pcs into rcx | |
304 | 3086 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
0 | 3087 |
3088 // Trash the old pc | |
304 | 3089 __ addptr(rsp, wordSize); |
0 | 3090 |
3091 // Load address of array of frame sizes into rsi | |
304 | 3092 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
0 | 3093 |
3094 // Load counter into rdx | |
3095 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
3096 | |
3097 // Pick up the initial fp we should save | |
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3098 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
0 | 3099 |
3100 // Now adjust the caller's stack to make up for the extra locals | |
3101 // but record the original sp so that we can save it in the skeletal interpreter | |
3102 // frame and the stack walking of interpreter_sender will get the unextended sp | |
3103 // value and not the "real" sp value. | |
3104 | |
3105 const Register sender_sp = r8; | |
3106 | |
304 | 3107 __ mov(sender_sp, rsp); |
0 | 3108 __ movl(rbx, Address(rdi, |
3109 Deoptimization::UnrollBlock:: | |
3110 caller_adjustment_offset_in_bytes())); | |
304 | 3111 __ subptr(rsp, rbx); |
0 | 3112 |
3113 // Push interpreter frames in a loop | |
3114 Label loop; | |
3115 __ bind(loop); | |
304 | 3116 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
3117 #ifdef CC_INTERP | |
3118 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and | |
3119 #ifdef ASSERT | |
3120 __ push(0xDEADDEAD); // Make a recognizable pattern | |
3121 __ push(0xDEADDEAD); | |
3122 #else /* ASSERT */ | |
3123 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" | |
3124 #endif /* ASSERT */ | |
3125 #else | |
3126 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand | |
3127 #endif // CC_INTERP | |
3128 __ pushptr(Address(rcx, 0)); // Save return address | |
0 | 3129 __ enter(); // Save old & set new ebp |
304 | 3130 __ subptr(rsp, rbx); // Prolog |
3131 #ifdef CC_INTERP | |
3132 __ movptr(Address(rbp, | |
3133 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), | |
3134 sender_sp); // Make it walkable | |
3135 #else /* CC_INTERP */ | |
0 | 3136 // This value is corrected by layout_activation_impl |
304 | 3137 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
3138 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable | |
3139 #endif /* CC_INTERP */ | |
3140 __ mov(sender_sp, rsp); // Pass sender_sp to next frame | |
3141 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
3142 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
0 | 3143 __ decrementl(rdx); // Decrement counter |
3144 __ jcc(Assembler::notZero, loop); | |
304 | 3145 __ pushptr(Address(rcx, 0)); // Save final return address |
0 | 3146 |
3147 // Re-push self-frame | |
3148 __ enter(); // Save old & set new ebp | |
3149 | |
3150 // Allocate a full sized register save area. | |
3151 // Return address and rbp are in place, so we allocate two less words. | |
304 | 3152 __ subptr(rsp, (frame_size_in_words - 2) * wordSize); |
0 | 3153 |
3154 // Restore frame locals after moving the frame | |
3155 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0); | |
304 | 3156 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); |
0 | 3157 |
3158 // Call C code. Need thread but NOT official VM entry | |
3159 // crud. We cannot block on this call, no GC can happen. Call should | |
3160 // restore return values to their stack-slots with the new SP. | |
3161 // | |
3162 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode) | |
3163 | |
3164 // Use rbp because the frames look interpreted now | |
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3165 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
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3166 // Don't need the precise return PC here, just precise enough to point into this code blob. |
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3167 address the_pc = __ pc(); |
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3168 __ set_last_Java_frame(noreg, rbp, the_pc); |
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3169 |
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3170 __ andptr(rsp, -(StackAlignmentInBytes)); // Fix stack alignment as required by ABI |
304 | 3171 __ mov(c_rarg0, r15_thread); |
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3172 __ movl(c_rarg1, r14); // second arg: exec_mode |
0 | 3173 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); |
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3174 // Revert SP alignment after call since we're going to do some SP relative addressing below |
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3175 __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset())); |
0 | 3176 |
3177 // Set an oopmap for the call site | |
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3178 // Use the same PC we used for the last java frame |
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3179 oop_maps->add_gc_map(the_pc - start, |
0 | 3180 new OopMap( frame_size_in_words, 0 )); |
3181 | |
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3182 // Clear fp AND pc |
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3183 __ reset_last_Java_frame(true, true); |
0 | 3184 |
3185 // Collect return values | |
3186 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes())); | |
304 | 3187 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes())); |
3188 // I think this is useless (throwing pc?) | |
3189 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes())); | |
0 | 3190 |
3191 // Pop self-frame. | |
3192 __ leave(); // Epilog | |
3193 | |
3194 // Jump to interpreter | |
3195 __ ret(0); | |
3196 | |
3197 // Make sure all code is generated | |
3198 masm->flush(); | |
3199 | |
304 | 3200 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); |
3201 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
0 | 3202 } |
3203 | |
3204 #ifdef COMPILER2 | |
3205 //------------------------------generate_uncommon_trap_blob-------------------- | |
3206 void SharedRuntime::generate_uncommon_trap_blob() { | |
3207 // Allocate space for the code | |
3208 ResourceMark rm; | |
3209 // Setup code generation tools | |
3210 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024); | |
3211 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3212 | |
3213 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
3214 | |
3215 address start = __ pc(); | |
3216 | |
3217 // Push self-frame. We get here with a return address on the | |
3218 // stack, so rsp is 8-byte aligned until we allocate our frame. | |
304 | 3219 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog! |
0 | 3220 |
3221 // No callee saved registers. rbp is assumed implicitly saved | |
304 | 3222 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
0 | 3223 |
3224 // compiler left unloaded_class_index in j_rarg0 move to where the | |
3225 // runtime expects it. | |
3226 __ movl(c_rarg1, j_rarg0); | |
3227 | |
3228 __ set_last_Java_frame(noreg, noreg, NULL); | |
3229 | |
3230 // Call C code. Need thread but NOT official VM entry | |
3231 // crud. We cannot block on this call, no GC can happen. Call should | |
3232 // capture callee-saved registers as well as return values. | |
3233 // Thread is in rdi already. | |
3234 // | |
3235 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index); | |
3236 | |
304 | 3237 __ mov(c_rarg0, r15_thread); |
0 | 3238 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
3239 | |
3240 // Set an oopmap for the call site | |
3241 OopMapSet* oop_maps = new OopMapSet(); | |
3242 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0); | |
3243 | |
3244 // location of rbp is known implicitly by the frame sender code | |
3245 | |
3246 oop_maps->add_gc_map(__ pc() - start, map); | |
3247 | |
3248 __ reset_last_Java_frame(false, false); | |
3249 | |
3250 // Load UnrollBlock* into rdi | |
304 | 3251 __ mov(rdi, rax); |
0 | 3252 |
3253 // Pop all the frames we must move/replace. | |
3254 // | |
3255 // Frame picture (youngest to oldest) | |
3256 // 1: self-frame (no frame link) | |
3257 // 2: deopting frame (no frame link) | |
3258 // 3: caller of deopting frame (could be compiled/interpreted). | |
3259 | |
3260 // Pop self-frame. We have no frame, and must rely only on rax and rsp. | |
304 | 3261 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog! |
0 | 3262 |
3263 // Pop deoptimized frame (int) | |
3264 __ movl(rcx, Address(rdi, | |
3265 Deoptimization::UnrollBlock:: | |
3266 size_of_deoptimized_frame_offset_in_bytes())); | |
304 | 3267 __ addptr(rsp, rcx); |
0 | 3268 |
3269 // rsp should be pointing at the return address to the caller (3) | |
3270 | |
3271 // Stack bang to make sure there's enough room for these interpreter frames. | |
3272 if (UseStackBanging) { | |
3273 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
3274 __ bang_stack_size(rbx, rcx); | |
3275 } | |
3276 | |
3277 // Load address of array of frame pcs into rcx (address*) | |
304 | 3278 __ movptr(rcx, |
3279 Address(rdi, | |
3280 Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); | |
0 | 3281 |
3282 // Trash the return pc | |
304 | 3283 __ addptr(rsp, wordSize); |
0 | 3284 |
3285 // Load address of array of frame sizes into rsi (intptr_t*) | |
304 | 3286 __ movptr(rsi, Address(rdi, |
3287 Deoptimization::UnrollBlock:: | |
3288 frame_sizes_offset_in_bytes())); | |
0 | 3289 |
3290 // Counter | |
3291 __ movl(rdx, Address(rdi, | |
3292 Deoptimization::UnrollBlock:: | |
3293 number_of_frames_offset_in_bytes())); // (int) | |
3294 | |
3295 // Pick up the initial fp we should save | |
304 | 3296 __ movptr(rbp, |
3297 Address(rdi, | |
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3298 Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
0 | 3299 |
3300 // Now adjust the caller's stack to make up for the extra locals but | |
3301 // record the original sp so that we can save it in the skeletal | |
3302 // interpreter frame and the stack walking of interpreter_sender | |
3303 // will get the unextended sp value and not the "real" sp value. | |
3304 | |
3305 const Register sender_sp = r8; | |
3306 | |
304 | 3307 __ mov(sender_sp, rsp); |
0 | 3308 __ movl(rbx, Address(rdi, |
3309 Deoptimization::UnrollBlock:: | |
3310 caller_adjustment_offset_in_bytes())); // (int) | |
304 | 3311 __ subptr(rsp, rbx); |
0 | 3312 |
3313 // Push interpreter frames in a loop | |
3314 Label loop; | |
3315 __ bind(loop); | |
304 | 3316 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
3317 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand | |
3318 __ pushptr(Address(rcx, 0)); // Save return address | |
3319 __ enter(); // Save old & set new rbp | |
3320 __ subptr(rsp, rbx); // Prolog | |
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3321 #ifdef CC_INTERP |
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3322 __ movptr(Address(rbp, |
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3323 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
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3324 sender_sp); // Make it walkable |
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3325 #else // CC_INTERP |
304 | 3326 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), |
3327 sender_sp); // Make it walkable | |
0 | 3328 // This value is corrected by layout_activation_impl |
304 | 3329 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
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3330 #endif // CC_INTERP |
304 | 3331 __ mov(sender_sp, rsp); // Pass sender_sp to next frame |
3332 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
3333 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
3334 __ decrementl(rdx); // Decrement counter | |
0 | 3335 __ jcc(Assembler::notZero, loop); |
304 | 3336 __ pushptr(Address(rcx, 0)); // Save final return address |
0 | 3337 |
3338 // Re-push self-frame | |
3339 __ enter(); // Save old & set new rbp | |
304 | 3340 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt); |
0 | 3341 // Prolog |
3342 | |
3343 // Use rbp because the frames look interpreted now | |
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3344 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
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3345 // Don't need the precise return PC here, just precise enough to point into this code blob. |
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3346 address the_pc = __ pc(); |
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3347 __ set_last_Java_frame(noreg, rbp, the_pc); |
0 | 3348 |
3349 // Call C code. Need thread but NOT official VM entry | |
3350 // crud. We cannot block on this call, no GC can happen. Call should | |
3351 // restore return values to their stack-slots with the new SP. | |
3352 // Thread is in rdi already. | |
3353 // | |
3354 // BasicType unpack_frames(JavaThread* thread, int exec_mode); | |
3355 | |
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3356 __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI |
304 | 3357 __ mov(c_rarg0, r15_thread); |
0 | 3358 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap); |
3359 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
3360 | |
3361 // Set an oopmap for the call site | |
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3362 // Use the same PC we used for the last java frame |
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3363 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
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3364 |
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3365 // Clear fp AND pc |
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3366 __ reset_last_Java_frame(true, true); |
0 | 3367 |
3368 // Pop self-frame. | |
3369 __ leave(); // Epilog | |
3370 | |
3371 // Jump to interpreter | |
3372 __ ret(0); | |
3373 | |
3374 // Make sure all code is generated | |
3375 masm->flush(); | |
3376 | |
3377 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, | |
3378 SimpleRuntimeFrame::framesize >> 1); | |
3379 } | |
3380 #endif // COMPILER2 | |
3381 | |
3382 | |
3383 //------------------------------generate_handler_blob------ | |
3384 // | |
3385 // Generate a special Compile2Runtime blob that saves all registers, | |
3386 // and setup oopmap. | |
3387 // | |
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3388 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, bool cause_return) { |
0 | 3389 assert(StubRoutines::forward_exception_entry() != NULL, |
3390 "must be generated before"); | |
3391 | |
3392 ResourceMark rm; | |
3393 OopMapSet *oop_maps = new OopMapSet(); | |
3394 OopMap* map; | |
3395 | |
3396 // Allocate space for the code. Setup code generation tools. | |
3397 CodeBuffer buffer("handler_blob", 2048, 1024); | |
3398 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3399 | |
3400 address start = __ pc(); | |
3401 address call_pc = NULL; | |
3402 int frame_size_in_words; | |
3403 | |
3404 // Make room for return address (or push it again) | |
3405 if (!cause_return) { | |
304 | 3406 __ push(rbx); |
0 | 3407 } |
3408 | |
3409 // Save registers, fpu state, and flags | |
3410 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3411 | |
3412 // The following is basically a call_VM. However, we need the precise | |
3413 // address of the call in order to generate an oopmap. Hence, we do all the | |
3414 // work outselves. | |
3415 | |
3416 __ set_last_Java_frame(noreg, noreg, NULL); | |
3417 | |
3418 // The return address must always be correct so that frame constructor never | |
3419 // sees an invalid pc. | |
3420 | |
3421 if (!cause_return) { | |
3422 // overwrite the dummy value we pushed on entry | |
304 | 3423 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset())); |
3424 __ movptr(Address(rbp, wordSize), c_rarg0); | |
0 | 3425 } |
3426 | |
3427 // Do the call | |
304 | 3428 __ mov(c_rarg0, r15_thread); |
0 | 3429 __ call(RuntimeAddress(call_ptr)); |
3430 | |
3431 // Set an oopmap for the call site. This oopmap will map all | |
3432 // oop-registers and debug-info registers as callee-saved. This | |
3433 // will allow deoptimization at this safepoint to find all possible | |
3434 // debug-info recordings, as well as let GC find all oops. | |
3435 | |
3436 oop_maps->add_gc_map( __ pc() - start, map); | |
3437 | |
3438 Label noException; | |
3439 | |
3440 __ reset_last_Java_frame(false, false); | |
3441 | |
304 | 3442 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 3443 __ jcc(Assembler::equal, noException); |
3444 | |
3445 // Exception pending | |
3446 | |
3447 RegisterSaver::restore_live_registers(masm); | |
3448 | |
3449 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
3450 | |
3451 // No exception case | |
3452 __ bind(noException); | |
3453 | |
3454 // Normal exit, restore registers and exit. | |
3455 RegisterSaver::restore_live_registers(masm); | |
3456 | |
3457 __ ret(0); | |
3458 | |
3459 // Make sure all code is generated | |
3460 masm->flush(); | |
3461 | |
3462 // Fill-out other meta info | |
3463 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); | |
3464 } | |
3465 | |
3466 // | |
3467 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
3468 // | |
3469 // Generate a stub that calls into vm to find out the proper destination | |
3470 // of a java call. All the argument registers are live at this point | |
3471 // but since this is generic code we don't know what they are and the caller | |
3472 // must do any gc of the args. | |
3473 // | |
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3474 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
0 | 3475 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
3476 | |
3477 // allocate space for the code | |
3478 ResourceMark rm; | |
3479 | |
3480 CodeBuffer buffer(name, 1000, 512); | |
3481 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3482 | |
3483 int frame_size_in_words; | |
3484 | |
3485 OopMapSet *oop_maps = new OopMapSet(); | |
3486 OopMap* map = NULL; | |
3487 | |
3488 int start = __ offset(); | |
3489 | |
3490 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3491 | |
3492 int frame_complete = __ offset(); | |
3493 | |
3494 __ set_last_Java_frame(noreg, noreg, NULL); | |
3495 | |
304 | 3496 __ mov(c_rarg0, r15_thread); |
0 | 3497 |
3498 __ call(RuntimeAddress(destination)); | |
3499 | |
3500 | |
3501 // Set an oopmap for the call site. | |
3502 // We need this not only for callee-saved registers, but also for volatile | |
3503 // registers that the compiler might be keeping live across a safepoint. | |
3504 | |
3505 oop_maps->add_gc_map( __ offset() - start, map); | |
3506 | |
3507 // rax contains the address we are going to jump to assuming no exception got installed | |
3508 | |
3509 // clear last_Java_sp | |
3510 __ reset_last_Java_frame(false, false); | |
3511 // check for pending exceptions | |
3512 Label pending; | |
304 | 3513 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 3514 __ jcc(Assembler::notEqual, pending); |
3515 | |
3516 // get the returned methodOop | |
304 | 3517 __ movptr(rbx, Address(r15_thread, JavaThread::vm_result_offset())); |
3518 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx); | |
3519 | |
3520 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
0 | 3521 |
3522 RegisterSaver::restore_live_registers(masm); | |
3523 | |
3524 // We are back the the original state on entry and ready to go. | |
3525 | |
3526 __ jmp(rax); | |
3527 | |
3528 // Pending exception after the safepoint | |
3529 | |
3530 __ bind(pending); | |
3531 | |
3532 RegisterSaver::restore_live_registers(masm); | |
3533 | |
3534 // exception pending => remove activation and forward to exception handler | |
3535 | |
3536 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD); | |
3537 | |
304 | 3538 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); |
0 | 3539 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
3540 | |
3541 // ------------- | |
3542 // make sure all code is generated | |
3543 masm->flush(); | |
3544 | |
3545 // return the blob | |
3546 // frame_size_words or bytes?? | |
3547 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true); | |
3548 } | |
3549 | |
3550 | |
3551 #ifdef COMPILER2 | |
3552 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame | |
3553 // | |
3554 //------------------------------generate_exception_blob--------------------------- | |
3555 // creates exception blob at the end | |
3556 // Using exception blob, this code is jumped from a compiled method. | |
3557 // (see emit_exception_handler in x86_64.ad file) | |
3558 // | |
3559 // Given an exception pc at a call we call into the runtime for the | |
3560 // handler in this method. This handler might merely restore state | |
3561 // (i.e. callee save registers) unwind the frame and jump to the | |
3562 // exception handler for the nmethod if there is no Java level handler | |
3563 // for the nmethod. | |
3564 // | |
3565 // This code is entered with a jmp. | |
3566 // | |
3567 // Arguments: | |
3568 // rax: exception oop | |
3569 // rdx: exception pc | |
3570 // | |
3571 // Results: | |
3572 // rax: exception oop | |
3573 // rdx: exception pc in caller or ??? | |
3574 // destination: exception handler of caller | |
3575 // | |
3576 // Note: the exception pc MUST be at a call (precise debug information) | |
3577 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved. | |
3578 // | |
3579 | |
3580 void OptoRuntime::generate_exception_blob() { | |
3581 assert(!OptoRuntime::is_callee_saved_register(RDX_num), ""); | |
3582 assert(!OptoRuntime::is_callee_saved_register(RAX_num), ""); | |
3583 assert(!OptoRuntime::is_callee_saved_register(RCX_num), ""); | |
3584 | |
3585 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
3586 | |
3587 // Allocate space for the code | |
3588 ResourceMark rm; | |
3589 // Setup code generation tools | |
3590 CodeBuffer buffer("exception_blob", 2048, 1024); | |
3591 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3592 | |
3593 | |
3594 address start = __ pc(); | |
3595 | |
3596 // Exception pc is 'return address' for stack walker | |
304 | 3597 __ push(rdx); |
3598 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog | |
0 | 3599 |
3600 // Save callee-saved registers. See x86_64.ad. | |
3601 | |
3602 // rbp is an implicitly saved callee saved register (i.e. the calling | |
3603 // convention will save restore it in prolog/epilog) Other than that | |
3604 // there are no callee save registers now that adapter frames are gone. | |
3605 | |
304 | 3606 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
0 | 3607 |
3608 // Store exception in Thread object. We cannot pass any arguments to the | |
3609 // handle_exception call, since we do not want to make any assumption | |
3610 // about the size of the frame where the exception happened in. | |
3611 // c_rarg0 is either rdi (Linux) or rcx (Windows). | |
304 | 3612 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax); |
3613 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
0 | 3614 |
3615 // This call does all the hard work. It checks if an exception handler | |
3616 // exists in the method. | |
3617 // If so, it returns the handler address. | |
3618 // If not, it prepares for stack-unwinding, restoring the callee-save | |
3619 // registers of the frame being removed. | |
3620 // | |
3621 // address OptoRuntime::handle_exception_C(JavaThread* thread) | |
3622 | |
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3623 // At a method handle call, the stack may not be properly aligned |
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3624 // when returning with an exception. |
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3625 address the_pc = __ pc(); |
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3626 __ set_last_Java_frame(noreg, noreg, the_pc); |
304 | 3627 __ mov(c_rarg0, r15_thread); |
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3628 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack |
0 | 3629 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C))); |
3630 | |
3631 // Set an oopmap for the call site. This oopmap will only be used if we | |
3632 // are unwinding the stack. Hence, all locations will be dead. | |
3633 // Callee-saved registers will be the same as the frame above (i.e., | |
3634 // handle_exception_stub), since they were restored when we got the | |
3635 // exception. | |
3636 | |
3637 OopMapSet* oop_maps = new OopMapSet(); | |
3638 | |
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3639 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
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3640 |
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3641 __ reset_last_Java_frame(false, true); |
0 | 3642 |
3643 // Restore callee-saved registers | |
3644 | |
3645 // rbp is an implicitly saved callee saved register (i.e. the calling | |
3646 // convention will save restore it in prolog/epilog) Other than that | |
3647 // there are no callee save registers no that adapter frames are gone. | |
3648 | |
304 | 3649 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt)); |
3650 | |
3651 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog | |
3652 __ pop(rdx); // No need for exception pc anymore | |
0 | 3653 |
3654 // rax: exception handler | |
3655 | |
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3656 // Restore SP from BP if the exception PC is a MethodHandle call site. |
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3657 __ cmpl(Address(r15_thread, JavaThread::is_method_handle_return_offset()), 0); |
1567 | 3658 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
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3659 |
0 | 3660 // We have a handler in rax (could be deopt blob). |
304 | 3661 __ mov(r8, rax); |
0 | 3662 |
3663 // Get the exception oop | |
304 | 3664 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); |
0 | 3665 // Get the exception pc in case we are deoptimized |
304 | 3666 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); |
0 | 3667 #ifdef ASSERT |
3668 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD); | |
3669 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD); | |
3670 #endif | |
3671 // Clear the exception oop so GC no longer processes it as a root. | |
3672 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD); | |
3673 | |
3674 // rax: exception oop | |
3675 // r8: exception handler | |
3676 // rdx: exception pc | |
3677 // Jump to handler | |
3678 | |
3679 __ jmp(r8); | |
3680 | |
3681 // Make sure all code is generated | |
3682 masm->flush(); | |
3683 | |
3684 // Set exception blob | |
3685 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1); | |
3686 } | |
3687 #endif // COMPILER2 |