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annotate src/share/vm/code/vmreg.hpp @ 15457:c0e1a8693e0e
mx: added --jdt-warning-as-error when building annotation processor jars
author | Doug Simon <doug.simon@oracle.com> |
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date | Thu, 01 May 2014 11:51:45 +0200 |
parents | 4ca6dc0799b6 |
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0 | 1 /* |
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2 * Copyright (c) 1998, 2012, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #ifndef SHARE_VM_CODE_VMREG_HPP |
26 #define SHARE_VM_CODE_VMREG_HPP | |
27 | |
28 #include "memory/allocation.hpp" | |
29 #include "utilities/globalDefinitions.hpp" | |
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30 #include "asm/register.hpp" |
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31 |
1972 | 32 #ifdef COMPILER2 |
33 #include "opto/adlcVMDeps.hpp" | |
34 #include "utilities/ostream.hpp" | |
35 #ifdef TARGET_ARCH_MODEL_x86_32 | |
36 # include "adfiles/adGlobals_x86_32.hpp" | |
37 #endif | |
38 #ifdef TARGET_ARCH_MODEL_x86_64 | |
39 # include "adfiles/adGlobals_x86_64.hpp" | |
40 #endif | |
41 #ifdef TARGET_ARCH_MODEL_sparc | |
42 # include "adfiles/adGlobals_sparc.hpp" | |
43 #endif | |
44 #ifdef TARGET_ARCH_MODEL_zero | |
45 # include "adfiles/adGlobals_zero.hpp" | |
46 #endif | |
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47 #ifdef TARGET_ARCH_MODEL_arm |
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48 # include "adfiles/adGlobals_arm.hpp" |
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49 #endif |
14909 | 50 #ifdef TARGET_ARCH_MODEL_ppc |
51 # include "adfiles/adGlobals_ppc.hpp" | |
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52 #endif |
1972 | 53 #endif |
54 | |
0 | 55 //------------------------------VMReg------------------------------------------ |
56 // The VM uses 'unwarped' stack slots; the compiler uses 'warped' stack slots. | |
57 // Register numbers below VMRegImpl::stack0 are the same for both. Register | |
58 // numbers above stack0 are either warped (in the compiler) or unwarped | |
59 // (in the VM). Unwarped numbers represent stack indices, offsets from | |
60 // the current stack pointer. Warped numbers are required during compilation | |
61 // when we do not yet know how big the frame will be. | |
62 | |
63 class VMRegImpl; | |
64 typedef VMRegImpl* VMReg; | |
65 | |
66 class VMRegImpl { | |
67 // friend class OopMap; | |
68 friend class VMStructs; | |
69 friend class OptoReg; | |
70 // friend class Location; | |
71 private: | |
72 enum { | |
14909 | 73 BAD = -1 |
0 | 74 }; |
75 | |
76 | |
77 | |
78 static VMReg stack0; | |
79 // Names for registers | |
80 static const char *regName[]; | |
81 static const int register_count; | |
82 | |
83 | |
84 public: | |
85 | |
14909 | 86 static VMReg as_VMReg(int val, bool bad_ok = false) { assert(val > BAD || bad_ok, "invalid"); return (VMReg) (intptr_t) val; } |
0 | 87 |
88 const char* name() { | |
89 if (is_reg()) { | |
90 return regName[value()]; | |
91 } else if (!is_valid()) { | |
92 return "BAD"; | |
93 } else { | |
94 // shouldn't really be called with stack | |
95 return "STACKED REG"; | |
96 } | |
97 } | |
14909 | 98 static VMReg Bad() { return (VMReg) (intptr_t) BAD; } |
99 bool is_valid() const { return ((intptr_t) this) != BAD; } | |
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100 bool is_stack() const { return (intptr_t) this >= (intptr_t) stack0; } |
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101 bool is_reg() const { return is_valid() && !is_stack(); } |
0 | 102 |
103 // A concrete register is a value that returns true for is_reg() and is | |
104 // also a register you could use in the assembler. On machines with | |
105 // 64bit registers only one half of the VMReg (and OptoReg) is considered | |
106 // concrete. | |
107 bool is_concrete(); | |
108 | |
109 // VMRegs are 4 bytes wide on all platforms | |
110 static const int stack_slot_size; | |
111 static const int slots_per_word; | |
112 | |
113 | |
114 // This really ought to check that the register is "real" in the sense that | |
115 // we don't try and get the VMReg number of a physical register that doesn't | |
116 // have an expressible part. That would be pd specific code | |
117 VMReg next() { | |
118 assert((is_reg() && value() < stack0->value() - 1) || is_stack(), "must be"); | |
119 return (VMReg)(intptr_t)(value() + 1); | |
120 } | |
6225 | 121 VMReg next(int i) { |
122 assert((is_reg() && value() < stack0->value() - i) || is_stack(), "must be"); | |
123 return (VMReg)(intptr_t)(value() + i); | |
124 } | |
0 | 125 VMReg prev() { |
126 assert((is_stack() && value() > stack0->value()) || (is_reg() && value() != 0), "must be"); | |
127 return (VMReg)(intptr_t)(value() - 1); | |
128 } | |
129 | |
130 | |
131 intptr_t value() const {return (intptr_t) this; } | |
132 | |
100
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133 void print_on(outputStream* st) const; |
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134 void print() const { print_on(tty); } |
0 | 135 |
136 // bias a stack slot. | |
137 // Typically used to adjust a virtual frame slots by amounts that are offset by | |
138 // amounts that are part of the native abi. The VMReg must be a stack slot | |
139 // and the result must be also. | |
140 | |
141 VMReg bias(int offset) { | |
142 assert(is_stack(), "must be"); | |
143 // VMReg res = VMRegImpl::as_VMReg(value() + offset); | |
144 VMReg res = stack2reg(reg2stack() + offset); | |
145 assert(res->is_stack(), "must be"); | |
146 return res; | |
147 } | |
148 | |
149 // Convert register numbers to stack slots and vice versa | |
150 static VMReg stack2reg( int idx ) { | |
151 return (VMReg) (intptr_t) (stack0->value() + idx); | |
152 } | |
153 | |
154 uintptr_t reg2stack() { | |
155 assert( is_stack(), "Not a stack-based register" ); | |
156 return value() - stack0->value(); | |
157 } | |
158 | |
159 static void set_regName(); | |
160 | |
1972 | 161 #ifdef TARGET_ARCH_x86 |
162 # include "vmreg_x86.hpp" | |
163 #endif | |
164 #ifdef TARGET_ARCH_sparc | |
165 # include "vmreg_sparc.hpp" | |
166 #endif | |
167 #ifdef TARGET_ARCH_zero | |
168 # include "vmreg_zero.hpp" | |
169 #endif | |
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170 #ifdef TARGET_ARCH_arm |
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171 # include "vmreg_arm.hpp" |
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172 #endif |
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173 #ifdef TARGET_ARCH_ppc |
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174 # include "vmreg_ppc.hpp" |
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175 #endif |
1972 | 176 |
0 | 177 |
178 }; | |
179 | |
180 //---------------------------VMRegPair------------------------------------------- | |
181 // Pairs of 32-bit registers for arguments. | |
182 // SharedRuntime::java_calling_convention will overwrite the structs with | |
183 // the calling convention's registers. VMRegImpl::Bad is returned for any | |
184 // unused 32-bit register. This happens for the unused high half of Int | |
185 // arguments, or for 32-bit pointers or for longs in the 32-bit sparc build | |
186 // (which are passed to natives in low 32-bits of e.g. O0/O1 and the high | |
187 // 32-bits of O0/O1 are set to VMRegImpl::Bad). Longs in one register & doubles | |
188 // always return a high and a low register, as do 64-bit pointers. | |
189 // | |
190 class VMRegPair { | |
191 private: | |
192 VMReg _second; | |
193 VMReg _first; | |
194 public: | |
195 void set_bad ( ) { _second=VMRegImpl::Bad(); _first=VMRegImpl::Bad(); } | |
196 void set1 ( VMReg v ) { _second=VMRegImpl::Bad(); _first=v; } | |
197 void set2 ( VMReg v ) { _second=v->next(); _first=v; } | |
198 void set_pair( VMReg second, VMReg first ) { _second= second; _first= first; } | |
199 void set_ptr ( VMReg ptr ) { | |
200 #ifdef _LP64 | |
201 _second = ptr->next(); | |
202 #else | |
203 _second = VMRegImpl::Bad(); | |
204 #endif | |
205 _first = ptr; | |
206 } | |
207 // Return true if single register, even if the pair is really just adjacent stack slots | |
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208 bool is_single_reg() const { |
0 | 209 return (_first->is_valid()) && (_first->value() + 1 == _second->value()); |
210 } | |
211 | |
212 // Return true if single stack based "register" where the slot alignment matches input alignment | |
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213 bool is_adjacent_on_stack(int alignment) const { |
0 | 214 return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0)); |
215 } | |
216 | |
217 // Return true if single stack based "register" where the slot alignment matches input alignment | |
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218 bool is_adjacent_aligned_on_stack(int alignment) const { |
0 | 219 return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0)); |
220 } | |
221 | |
222 // Return true if single register but adjacent stack slots do not count | |
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223 bool is_single_phys_reg() const { |
0 | 224 return (_first->is_reg() && (_first->value() + 1 == _second->value())); |
225 } | |
226 | |
227 VMReg second() const { return _second; } | |
228 VMReg first() const { return _first; } | |
229 VMRegPair(VMReg s, VMReg f) { _second = s; _first = f; } | |
230 VMRegPair(VMReg f) { _second = VMRegImpl::Bad(); _first = f; } | |
231 VMRegPair() { _second = VMRegImpl::Bad(); _first = VMRegImpl::Bad(); } | |
232 }; | |
1972 | 233 |
234 #endif // SHARE_VM_CODE_VMREG_HPP |